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authorRichard Sandiford <rdsandiford@googlemail.com>2003-06-10 07:27:56 +0000
committerRichard Sandiford <rdsandiford@googlemail.com>2003-06-10 07:27:56 +0000
commit0613284fd49388e6d5938e76e471362485c6c93e (patch)
tree701fe75ed8d9bad2d580b3ca9eff768f97a5ffa8 /gas
parent28d7dee9f8d1335bac2a2c51ea152d4d3db46823 (diff)
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opcodes/
* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round rts/l and rte/l register lists. gas/ * config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register lists. Allow single-register ranges. testsuite/ * gas/h8300/h8sx_rtsl.[sd]: New test. * gas/h8300/h8300.exp: Run it.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-h8300.c23
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/h8300/h8300.exp1
-rw-r--r--gas/testsuite/gas/h8300/h8sx_rtsl.d14
-rw-r--r--gas/testsuite/gas/h8300/h8sx_rtsl.s8
6 files changed, 42 insertions, 14 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 9a3888f..9a69d58 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,10 @@
2003-06-10 Richard Sandiford <rsandifo@redhat.com>
+ * config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register
+ lists. Allow single-register ranges.
+
+2003-06-10 Richard Sandiford <rsandifo@redhat.com>
+
* config/tc-h8300.c (h8300sxnmode): New.
(md_pseudo_table): Add .h8300sxn entry.
diff --git a/gas/config/tc-h8300.c b/gas/config/tc-h8300.c
index 6e6a170..6a6e3a8 100644
--- a/gas/config/tc-h8300.c
+++ b/gas/config/tc-h8300.c
@@ -1091,29 +1091,19 @@ get_rtsl_operands (char *ptr, struct h8_op *operand)
as_bad (_("expected register"));
return;
}
- if (type == 1)
+ ptr += len;
+ if (*ptr == '-')
{
- ptr += len;
- if (*ptr++ != '-')
- {
- as_bad (_("expected register list"));
- return;
- }
- len = parse_reg (ptr, &mode, &num2, SRC);
+ len = parse_reg (++ptr, &mode, &num2, SRC);
if (len == 0 || (mode & MODE) != REG)
{
as_bad (_("expected register"));
return;
}
ptr += len;
- if (*ptr++ != ')')
- {
- as_bad (_("expected closing paren"));
- return;
- }
/* CONST_xxx are used as placeholders in the opcode table. */
num = num2 - num;
- if (num < 1 || num > 3)
+ if (num < 0 || num > 3)
{
as_bad (_("invalid register list"));
return;
@@ -1121,6 +1111,11 @@ get_rtsl_operands (char *ptr, struct h8_op *operand)
}
else
num2 = num, num = 0;
+ if (type == 1 && *ptr++ != ')')
+ {
+ as_bad (_("expected closing paren"));
+ return;
+ }
operand[0].mode = RS32;
operand[1].mode = RD32;
operand[0].reg = num;
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d72b21a..4ea3d4b 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,5 +1,10 @@
2003-06-10 Richard Sandiford <rsandifo@redhat.com>
+ * gas/h8300/h8sx_rtsl.[sd]: New test.
+ * gas/h8300/h8300.exp: Run it.
+
+2003-06-10 Richard Sandiford <rsandifo@redhat.com>
+
* gas/h8300/h8sx_disp2.[sd]: New test.
* gas/h8300/h8300.exp: Run it.
diff --git a/gas/testsuite/gas/h8300/h8300.exp b/gas/testsuite/gas/h8300/h8300.exp
index 8162f48..e167a3f 100644
--- a/gas/testsuite/gas/h8300/h8300.exp
+++ b/gas/testsuite/gas/h8300/h8300.exp
@@ -2168,6 +2168,7 @@ if [istarget h8300*-*-*] then {
do_h8300h_mov32bug
run_dump_test h8sx_disp2
+ run_dump_test h8sx_rtsl
# Now some random tests
set svr4pic [expr [istarget *-*-elf*] || [istarget *-*-irix5*] ]
diff --git a/gas/testsuite/gas/h8300/h8sx_rtsl.d b/gas/testsuite/gas/h8300/h8sx_rtsl.d
new file mode 100644
index 0000000..648faf9
--- /dev/null
+++ b/gas/testsuite/gas/h8300/h8sx_rtsl.d
@@ -0,0 +1,14 @@
+# objdump: -dr
+
+.*: *file format elf32-h8300
+
+Disassembly of section \.text:
+
+0+00 <\.text>:
+ *0: 54 00 * 54 00 * rts/l er0
+ *2: 54 01 * 54 01 * rts/l er1
+ *4: 54 03 * 54 03 * rts/l er3
+ *6: 54 05 * 54 05 * rts/l er5
+ *8: 54 16 * 54 16 * rts/l er5-er6
+ *a: 54 25 * 54 25 * rts/l er3-er5
+ *c: 54 34 * 54 34 * rts/l er1-er4
diff --git a/gas/testsuite/gas/h8300/h8sx_rtsl.s b/gas/testsuite/gas/h8300/h8sx_rtsl.s
new file mode 100644
index 0000000..b5f4788
--- /dev/null
+++ b/gas/testsuite/gas/h8300/h8sx_rtsl.s
@@ -0,0 +1,8 @@
+ .h8300sx
+ rts/l er0
+ rts/l er1-er1
+ rts/l (er3)
+ rts/l (er5-er5)
+ rts/l er5-er6
+ rts/l er3-er5
+ rts/l (er1-er4)