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| author | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:12 +0100 |
|---|---|---|
| committer | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:12 +0100 |
| commit | 7ce2460a77a8f66a145c11522f494f3262255390 (patch) | |
| tree | 74a65e3d48ac6927214a1e2b8b555b908fed7ccd /gas | |
| parent | dd3189990b1d918b3a9e482ec6e9cc9a8b9e8fe9 (diff) | |
| download | gdb-7ce2460a77a8f66a145c11522f494f3262255390.zip gdb-7ce2460a77a8f66a145c11522f494f3262255390.tar.gz gdb-7ce2460a77a8f66a145c11522f494f3262255390.tar.bz2 | |
[binutils][aarch64] SVE2 feature extension flags.
Include all feature flag macros.
The "sve2" extension that enables the core sve2 instructions.
This also enables the sve extension, since sve is a requirement of sve2.
Extra optional sve2 features are the bitperm, sm4, aes, and sha3 extensions.
These are all given extra feature flags, "bitperm", "sve2-sm4",
"sve2-aes", and "sve2-sha3" respectively.
The sm4, aes, and sha3 extensions are explicitly marked as sve2
extensions to distinguish them from the corresponding NEON extensions.
Rather than continue extending the current feature flag numbers, I used
some bits that have been skipped.
gas/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* config/tc-aarch64.c: Add command line architecture feature flags
"sve2", "sve2-sm4", "sve2-aes", "sve2-sha3", "bitperm".
* doc/c-aarch64.texi: Document new architecture feature flags.
include/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_SVE2
AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
feature macros.
opcodes/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-tbl.h
(aarch64_feature_sve2, aarch64_feature_sve2aes,
aarch64_feature_sve2sha3, aarch64_feature_sve2sm4,
aarch64_feature_sve2bitperm): New feature sets.
(SVE2, SVE2_AES, SVE2_SHA3, SVE2_SM4, SVE2_BITPERM): New macros
for feature set addresses.
(SVE2_INSN, SVE2_INSNC, SVE2AES_INSN, SVE2SHA3_INSN,
SVE2SM4_INSN, SVE2SM4_INSNC, SVE2BITPERM_INSN): New macros.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/config/tc-aarch64.c | 13 | ||||
| -rw-r--r-- | gas/doc/c-aarch64.texi | 10 |
3 files changed, 29 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 9de92c0..c21493f 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> + + * config/tc-aarch64.c: Add command line architecture feature flags + "sve2", "sve2-sm4", "sve2-aes", "sve2-sha3", "bitperm". + * doc/c-aarch64.texi: Document new architecture feature flags. + 2019-05-08 Alan Modra <amodra@gmail.com> * testsuite/gas/elf/dwarf2-1.s, diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 7b5f1b1..b07a722 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -8874,6 +8874,19 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = { AARCH64_ARCH_NONE}, {"memtag", AARCH64_FEATURE (AARCH64_FEATURE_MEMTAG, 0), AARCH64_ARCH_NONE}, + {"sve2", AARCH64_FEATURE (AARCH64_FEATURE_SVE2, 0), + AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0)}, + {"sve2-sm4", AARCH64_FEATURE (AARCH64_FEATURE_SVE2_SM4, 0), + AARCH64_FEATURE (AARCH64_FEATURE_SVE2 + | AARCH64_FEATURE_SM4, 0)}, + {"sve2-aes", AARCH64_FEATURE (AARCH64_FEATURE_SVE2_AES, 0), + AARCH64_FEATURE (AARCH64_FEATURE_SVE2 + | AARCH64_FEATURE_AES, 0)}, + {"sve2-sha3", AARCH64_FEATURE (AARCH64_FEATURE_SVE2_SHA3, 0), + AARCH64_FEATURE (AARCH64_FEATURE_SVE2 + | AARCH64_FEATURE_SHA3, 0)}, + {"bitperm", AARCH64_FEATURE (AARCH64_FEATURE_SVE2_BITPERM, 0), + AARCH64_FEATURE (AARCH64_FEATURE_SVE2, 0)}, {NULL, AARCH64_ARCH_NONE, AARCH64_ARCH_NONE}, }; diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 3614deb..74ffc8f 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -196,6 +196,16 @@ automatically cause those extensions to be disabled. @tab Enable ARMv8.5-A Memory Tagging Extensions. @item @code{tme} @tab ARMv8-A @tab No @tab Enable Transactional Memory Extensions. +@item @code{sve2} @tab ARMv8-A @tab No + @tab Enable the SVE2 Extension. +@item @code{bitperm} @tab ARMv8-A @tab No + @tab Enable SVE2 BITPERM Extension. +@item @code{sve2-sm4} @tab ARMv8-A @tab No + @tab Enable SVE2 SM4 Extension. +@item @code{sve2-aes} @tab ARMv8-A @tab No + @tab Enable SVE2 AES Extension. +@item @code{sve2-sha3} @tab ARMv8-A @tab No + @tab Enable SVE2 SHA3 Extension. @end multitable @node AArch64 Syntax |