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| author | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 19:02:54 +0000 |
|---|---|---|
| committer | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 19:16:48 +0000 |
| commit | 57f02370a1e55bf09d3ede5ba6b2fcc78b40200a (patch) | |
| tree | ccfec990c7a93945882e6a0b6ebb8e487e2922ba /gas | |
| parent | ef6379e16dd164487e10a06e19bcb006d5c3788b (diff) | |
| download | gdb-57f02370a1e55bf09d3ede5ba6b2fcc78b40200a.zip gdb-57f02370a1e55bf09d3ede5ba6b2fcc78b40200a.tar.gz gdb-57f02370a1e55bf09d3ede5ba6b2fcc78b40200a.tar.bz2 | |
aarch64: [SME] Add +sme option to -march
This series of patches (tagged [SME]) add support for the Scalable
Matrix Extension. Patch introduces new command line options: +sme, +sme-f64 and
+sme-i64 to -march command line options.
gas/ChangeLog:
* NEWS: Updated docs.
* config/tc-aarch64.c: New SME command line options.
* doc/c-aarch64.texi: Update docs.
include/ChangeLog:
* opcode/aarch64.h (AARCH64_FEATURE_SME): New flag.
(AARCH64_FEATURE_SME_F64): New flag.
(AARCH64_FEATURE_SME_I64): New flag.
opcodes/ChangeLog:
* aarch64-tbl.h (SME): New feature object.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/NEWS | 2 | ||||
| -rw-r--r-- | gas/config/tc-aarch64.c | 11 | ||||
| -rw-r--r-- | gas/doc/c-aarch64.texi | 6 |
3 files changed, 19 insertions, 0 deletions
@@ -11,6 +11,8 @@ * Add support for Cortex-A710 for Arm. +* Add support for Scalable Matrix Extension (SME) for AArch64. + * Outputs of .ds.x directive and .tfloat directive with hex input from x86 assembler have been reduced from 12 bytes to 10 bytes to match the output of .tfloat directive. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 2ea55d8..b592e80 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -9244,6 +9244,17 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = { | AARCH64_FEATURE_SHA3, 0)}, {"sve2-bitperm", AARCH64_FEATURE (AARCH64_FEATURE_SVE2_BITPERM, 0), AARCH64_FEATURE (AARCH64_FEATURE_SVE2, 0)}, + {"sme", AARCH64_FEATURE (AARCH64_FEATURE_SME, 0), + AARCH64_FEATURE (AARCH64_FEATURE_SVE2 + | AARCH64_FEATURE_BFLOAT16, 0)}, + {"sme-f64", AARCH64_FEATURE (AARCH64_FEATURE_SME_F64, 0), + AARCH64_FEATURE (AARCH64_FEATURE_SME + | AARCH64_FEATURE_SVE2 + | AARCH64_FEATURE_BFLOAT16, 0)}, + {"sme-i64", AARCH64_FEATURE (AARCH64_FEATURE_SME_I64, 0), + AARCH64_FEATURE (AARCH64_FEATURE_SME + | AARCH64_FEATURE_SVE2 + | AARCH64_FEATURE_BFLOAT16, 0)}, {"bf16", AARCH64_FEATURE (AARCH64_FEATURE_BFLOAT16, 0), AARCH64_ARCH_NONE}, {"i8mm", AARCH64_FEATURE (AARCH64_FEATURE_I8MM, 0), diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 8263c1a..6c39963 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -222,6 +222,12 @@ automatically cause those extensions to be disabled. @item @code{sm4} @tab ARMv8.2-A @tab No @tab Enable the ARMv8.2-A SM3 and SM4 cryptographic extensions. This implies @code{fp} and @code{simd}. +@item @code{sme} @tab Armv9-A @tab No + @tab Enable SME Extension. +@item @code{sme-f64} @tab Armv9-A @tab No + @tab Enable SME F64 Extension. +@item @code{sme-i64} @tab Armv9-A @tab No + @tab Enable SME I64 Extension. @item @code{ssbs} @tab ARMv8-A @tab ARMv8.5-A or later @tab Enable Speculative Store Bypassing Safe state read and write. @item @code{sve} @tab ARMv8.2-A @tab Armv9-A or later |