gas/

2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (set_intel_mnemonic): New.
	(intel_mnemonic): Likewise.
	(old_gcc): Likewise.
	(OPTION_MMNEMONIC): Likewise.
	(OPTION_MSYNTAX): Likewise.
	(OPTION_MINDEX_REG): Likewise.
	(OPTION_MNAKED_REG): Likewise.
	(OPTION_MOLD_GCC): Likewise.
	(md_pseudo_table): Add .intel_mnemonic and .att_mnemonic.
	(match_template): Don't allow AT&T/Intel mnemonic if Intel/AT&T
	mnemonic is specified.  Don't allow old gcc support if old_gcc
	is 0.
	(md_longopts): Add -mmnemonic, -msyntax, -mindex-reg,
	-mmnaked-reg and -mold-gcc.
	(md_parse_option): Handle OPTION_MMNEMONIC, OPTION_MSYNTAX,
	OPTION_MINDEX_REG, OPTION_MNAKED_REG and OPTION_MOLD_GCC.

	* doc/c-i386.texi: Docoument -mmnemonic, -msyntax, --mnaked-reg
	and AT&T mnemonic vs. Intel mnemonic.

gas/testsuite/

2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/compat-intel.d: Pass -mmnemonic=att to assembler.
	* gas/i386/compat.d: Likewise.

	* gas/i386/i386.exp: Pass -mmnemonic=att to assembler for
	"float".  Pass -mold-gcc to assembler for  "general".

opcodes/

2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add OldGcc, ATTMnemonic and
	IntelMnemonic.

	* i386-opc.h (OldGcc): New.
	(ATTMnemonic): Likewise.
	(IntelMnemonic): Likewise.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add oldgcc, attmnemonic and
	intelmnemonic.

	* i386-opc.tbl: Update fadd, fdiv, fdivp, fdivr, fdivrp, fmul,
	fsub, fsubp, fsubr and fsubrp with OldGcc, ATTMnemonic and
	IntelMnemonic.
	* i386-tbl.h: Regeneratd.

7 files changed, 172 insertions, 2 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index fbcce02..6f9c491 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,25 @@
+2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (set_intel_mnemonic): New.
+	(intel_mnemonic): Likewise.
+	(old_gcc): Likewise.
+	(OPTION_MMNEMONIC): Likewise.
+	(OPTION_MSYNTAX): Likewise.
+	(OPTION_MINDEX_REG): Likewise.
+	(OPTION_MNAKED_REG): Likewise.
+	(OPTION_MOLD_GCC): Likewise.
+	(md_pseudo_table): Add .intel_mnemonic and .att_mnemonic.
+	(match_template): Don't allow AT&T/Intel mnemonic if Intel/AT&T
+	mnemonic is specified.  Don't allow old gcc support if old_gcc
+	is 0.
+	(md_longopts): Add -mmnemonic, -msyntax, -mindex-reg,
+	-mmnaked-reg and -mold-gcc.
+	(md_parse_option): Handle OPTION_MMNEMONIC, OPTION_MSYNTAX,
+	OPTION_MINDEX_REG, OPTION_MNAKED_REG and OPTION_MOLD_GCC.
+
+	* doc/c-i386.texi: Docoument -mmnemonic, -msyntax, --mnaked-reg
+	and AT&T mnemonic vs. Intel mnemonic.
+
 2007-12-20  Bob Wilson  <bob.wilson@acm.org>
 	
 	* config/tc-xtensa.c (xtensa_elf_cons): Set frag flags for
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index b33d1be..359d988 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -58,6 +58,7 @@
 static void set_code_flag (int);
 static void set_16bit_gcc_code_flag (int);
 static void set_intel_syntax (int);
+static void set_intel_mnemonic (int);
 static void set_allow_index_reg (int);
 static void set_cpu_arch (int);
 #ifdef TE_PE
@@ -283,6 +284,13 @@ static const char *flag_code_names[] =
    0 if att syntax.  */
 static int intel_syntax = 0;
 
+/* 1 for intel mnemonic,
+   0 if att mnemonic.  */
+static int intel_mnemonic = !SYSV386_COMPAT;
+
+/* 1 ti support old (<= 2.8.1) versions of gcc.  */
+static int old_gcc = OLDGCC_COMPAT;
+
 /* 1 if register prefix % not required.  */
 static int allow_naked_reg = 0;
 
@@ -534,6 +542,8 @@ const pseudo_typeS md_pseudo_table[] =
   {"code64", set_code_flag, CODE_64BIT},
   {"intel_syntax", set_intel_syntax, 1},
   {"att_syntax", set_intel_syntax, 0},
+  {"intel_mnemonic", set_intel_mnemonic, 1},
+  {"att_mnemonic", set_intel_mnemonic, 0},
   {"allow_index_reg", set_allow_index_reg, 1},
   {"disallow_index_reg", set_allow_index_reg, 0},
 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
@@ -1505,6 +1515,42 @@ set_intel_syntax (int syntax_flag)
 }
 
 static void
+set_intel_mnemonic (int mnemonic_flag)
+{
+  /* Find out if register prefixing is specified.  */
+  int ask_naked_reg = 0;
+
+  SKIP_WHITESPACE ();
+  if (!is_end_of_line[(unsigned char) *input_line_pointer])
+    {
+      char *string = input_line_pointer;
+      int e = get_symbol_end ();
+
+      if (strcmp (string, "prefix") == 0)
+	ask_naked_reg = 1;
+      else if (strcmp (string, "noprefix") == 0)
+	ask_naked_reg = -1;
+      else
+	as_bad (_("bad argument to syntax directive."));
+      *input_line_pointer = e;
+    }
+  demand_empty_rest_of_line ();
+
+  /* intel_mnemonic implies intel_syntax.  */
+  intel_mnemonic = intel_syntax = mnemonic_flag;
+
+  if (ask_naked_reg == 0)
+    allow_naked_reg = (intel_mnemonic
+		       && (bfd_get_symbol_leading_char (stdoutput) != '\0'));
+  else
+    allow_naked_reg = (ask_naked_reg < 0);
+
+  identifier_chars['%'] = intel_mnemonic && allow_naked_reg ? '%' : 0;
+  identifier_chars['$'] = intel_mnemonic ? '$' : 0;
+  register_prefix = allow_naked_reg ? "" : "%";
+}
+
+static void
 set_allow_index_reg (int flag)
 {
   allow_index_reg = flag;
@@ -3010,6 +3056,17 @@ match_template (void)
       if (i.operands != t->operands)
 	continue;
 
+      /* Check AT&T mnemonic and old gcc support. */
+      if (t->opcode_modifier.attmnemonic
+	  && (intel_mnemonic
+	      || (!old_gcc
+		  && t->opcode_modifier.oldgcc)))
+	continue;
+
+      /* Check Intel mnemonic. */
+      if (!intel_mnemonic && t->opcode_modifier.intelmnemonic)
+	continue;
+
       /* Check the suffix, except for some instructions in intel mode.  */
       if ((!intel_syntax || !t->opcode_modifier.ignoresize)
 	  && ((t->opcode_modifier.no_bsuf && suffix_check.no_bsuf)
@@ -6911,6 +6968,11 @@ const char *md_shortopts = "qn";
 #define OPTION_DIVIDE (OPTION_MD_BASE + 2)
 #define OPTION_MARCH (OPTION_MD_BASE + 3)
 #define OPTION_MTUNE (OPTION_MD_BASE + 4)
+#define OPTION_MMNEMONIC (OPTION_MD_BASE + 5)
+#define OPTION_MSYNTAX (OPTION_MD_BASE + 6)
+#define OPTION_MINDEX_REG (OPTION_MD_BASE + 7)
+#define OPTION_MNAKED_REG (OPTION_MD_BASE + 8)
+#define OPTION_MOLD_GCC (OPTION_MD_BASE + 9)
 
 struct option md_longopts[] =
 {
@@ -6921,6 +6983,11 @@ struct option md_longopts[] =
   {"divide", no_argument, NULL, OPTION_DIVIDE},
   {"march", required_argument, NULL, OPTION_MARCH},
   {"mtune", required_argument, NULL, OPTION_MTUNE},
+  {"mmnemonic", required_argument, NULL, OPTION_MMNEMONIC},
+  {"msyntax", required_argument, NULL, OPTION_MSYNTAX},
+  {"mindex-reg", no_argument, NULL, OPTION_MINDEX_REG},
+  {"mnaked-reg", no_argument, NULL, OPTION_MNAKED_REG},
+  {"mold-gcc", no_argument, NULL, OPTION_MOLD_GCC},
   {NULL, no_argument, NULL, 0}
 };
 size_t md_longopts_size = sizeof (md_longopts);
@@ -7041,6 +7108,37 @@ md_parse_option (int c, char *arg)
 	as_fatal (_("Invalid -mtune= option: `%s'"), arg);
       break;
 
+    case OPTION_MMNEMONIC:
+      if (strcasecmp (arg, "att") == 0)
+	intel_mnemonic = 0;
+      else if (strcasecmp (arg, "intel") == 0)
+	intel_mnemonic = 1;
+      else
+	as_fatal (_("Invalid -mmnemonic= option: `%s'"), arg);
+      break;
+
+    case OPTION_MSYNTAX:
+      if (strcasecmp (arg, "att") == 0)
+	intel_syntax = 0;
+      else if (strcasecmp (arg, "intel") == 0)
+	intel_syntax = 1;
+      else
+	as_fatal (_("Invalid -msyntax= option: `%s'"), arg);
+      break;
+
+    case OPTION_MINDEX_REG:
+      allow_index_reg = 1;
+      break;
+
+    case OPTION_MNAKED_REG:
+      allow_naked_reg = 1;
+      break;
+
+    case OPTION_MOLD_GCC:
+      old_gcc = 1;
+      intel_mnemonic = 0;
+      break;
+
     default:
       return 0;
     }
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 869aff6..16640d2 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -119,6 +119,29 @@ generated.
 
 Valid @var{CPU} values are identical to @option{-march=@var{CPU}}.
 
+@cindex @samp{-mmnemonic=} option, i386
+@cindex @samp{-mmnemonic=} option, x86-64
+@item -mmnemonic=@var{att}
+@item -mmnemonic=@var{intel}
+This option specifies instruction mnemonic for matching instructions. 
+The @code{.att_mnemonic} and @code{.intel_mnemonic} directives will
+take precedent.
+
+@cindex @samp{-msyntax=} option, i386
+@cindex @samp{-msyntax=} option, x86-64
+@item -msyntax=@var{att}
+@item -msyntax=@var{intel}
+This option specifies instruction syntax when processing instructions. 
+The @code{.att_syntax} and @code{.intel_syntax} directives will
+take precedent.
+
+@cindex @samp{-mnaked-reg} option, i386
+@cindex @samp{-mnaked-reg} option, x86-64
+@item -mnaked-reg
+This opetion specifies that registers don't require a @samp{%} prefix.
+The @code{.att_mnemonic}, @code{.intel_mnemonic}, @code{.att_syntax} and
+@code{.intel_syntax} directives will take precedent.
+
 @end table
 
 @node i386-Syntax
@@ -297,6 +320,23 @@ Far call/jump instructions are @samp{lcall} and @samp{ljmp} in
 AT&T syntax, but are @samp{call far} and @samp{jump far} in Intel
 convention.
 
+@section AT&T Mnemonic versus Intel Mnemonic
+
+@cindex i386 mnemonic compatibility
+@cindex mnemonic compatibility, i386
+
+@code{@value{AS}} supports assembly using Intel mnemonic.
+@code{.intel_mnemonic} selects Intel mnemonic with Intel syntax, and
+@code{.att_mnemonic} switches back to the usual AT&T mnemonic with AT&T
+syntax for compatibility with the output of @code{@value{GCC}}.
+Either of these directives may have an optional argument, @code{prefix},
+or @code{noprefix} specifying whether registers require a @samp{%} prefix.
+Several x87 instructions, @samp{fadd}, @samp{fdiv}, @samp{fdivp},
+@samp{fdivr}, @samp{fdivrp}, @samp{fmul}, @samp{fsub}, @samp{fsubp},
+@samp{fsubr} and @samp{fsubrp},  are implemented in AT&T System V/386
+assembler with different mnemonics from those in Intel IA32 specification.
+@code{@value{GCC}} generates those instructions with AT&T mnemonic.
+
 @node i386-Regs
 @section Register Naming
 
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d85a112..245646d 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/compat-intel.d: Pass -mmnemonic=att to assembler.
+	* gas/i386/compat.d: Likewise.
+
+	* gas/i386/i386.exp: Pass -mmnemonic=att to assembler for
+	"float".  Pass -mold-gcc to assembler for  "general".
+
 2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* gas/i386/compat-intel.d: New file.
diff --git a/gas/testsuite/gas/i386/compat-intel.d b/gas/testsuite/gas/i386/compat-intel.d
index f252a9b..d9404f8 100644
--- a/gas/testsuite/gas/i386/compat-intel.d
+++ b/gas/testsuite/gas/i386/compat-intel.d
@@ -1,3 +1,4 @@
+#as: -mmnemonic=att
 #objdump: -d -Mintel-mnemonic
 #name: i386 float Intel mnemonic
 #source: compat.s
diff --git a/gas/testsuite/gas/i386/compat.d b/gas/testsuite/gas/i386/compat.d
index 9629971..575f2bb 100644
--- a/gas/testsuite/gas/i386/compat.d
+++ b/gas/testsuite/gas/i386/compat.d
@@ -1,3 +1,4 @@
+#as: -mmnemonic=att
 #objdump: -d -Matt-mnemonic
 #name: i386 float AT&T mnemonic
 
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 70e80bf..22812b8 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -23,8 +23,8 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     set old_ASFLAGS "$ASFLAGS"
     set ASFLAGS "$ASFLAGS --32"
 
-    run_list_test "float" "-al"
-    run_list_test "general" "-al --listing-lhs-width=2"
+    run_list_test "float" "-al -mmnemonic=att"
+    run_list_test "general" "-al --listing-lhs-width=2 -mold-gcc"
     run_list_test "inval" "-al"
     run_list_test "segment" "-al"
     run_list_test "inval-seg" "-al"