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authorNick Clifton <nickc@redhat.com>2000-04-09 20:25:17 +0000
committerNick Clifton <nickc@redhat.com>2000-04-09 20:25:17 +0000
commitec694b8956f6190e733dcf7b49399f928a40f051 (patch)
tree64c49894d45e082111e2f68f1a2eac9acab04689 /gas
parent1ad03bde8a4b930b4f83aa42482afd45c127220c (diff)
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Add 'avr' to Makefile.am
Add M32R docs to as.texinfo
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog10
-rw-r--r--gas/Makefile.am3
-rw-r--r--gas/doc/as.texinfo40
3 files changed, 52 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 6b47aa3..8d4c973 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,13 @@
+2000-04-09 Nick Clifton <nickc@cygnus.com>
+
+ * Makefile.am (CPU_TYPES): Add 'avr'.
+ (TARGET_CPU_CFILES): Add 'tc-avr.c'.
+ (TARGET_CPU_HFILES): Add 'tc-avr.h'.
+
+ * makefine.in: Regenerate.
+
+ * doc/as.texinfo: Add M32R documentation.
+
Fri Apr 7 15:56:57 2000 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add
diff --git a/gas/Makefile.am b/gas/Makefile.am
index 79a5c9f..b0a65ba 100644
--- a/gas/Makefile.am
+++ b/gas/Makefile.am
@@ -41,6 +41,7 @@ CPU_TYPES = \
alpha \
arc \
arm \
+ avr \
d10v \
d30v \
fr30 \
@@ -199,6 +200,7 @@ TARGET_CPU_CFILES = \
config/tc-alpha.c \
config/tc-arc.c \
config/tc-arm.c \
+ config/tc-avr.c \
config/tc-d10v.c \
config/tc-d30v.c \
config/tc-fr30.c \
@@ -234,6 +236,7 @@ TARGET_CPU_HFILES = \
config/tc-alpha.h \
config/tc-arc.h \
config/tc-arm.h \
+ config/tc-avr.h \
config/tc-d10v.h \
config/tc-d30v.h \
config/tc-fr30.h \
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 5917a00..f9cf578 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -257,11 +257,15 @@ Here is a brief summary of how to invoke @code{@value{AS}}. For details,
[ -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC ]
[ -b ] [ -no-relax ]
@end ifset
+@ifset M32R
+ [ --m32rx | --[no-]warn-explicit-parallel-conflicts | --W[n]p ]
+@end ifset
@ifset M680X0
[ -l ] [ -m68000 | -m68010 | -m68020 | ... ]
@end ifset
@ifset MCORE
[ -jsri2bsr ] [ -sifilter ] [ -relax ]
+ [ -mcpu=[210|340] ]
@end ifset
@ifset MIPS
[ -nocpp ] [ -EL ] [ -EB ] [ -G @var{num} ] [ -mcpu=@var{CPU} ]
@@ -486,6 +490,26 @@ error if necessary.
@end table
@end ifset
+@ifset M32R
+The following options are available when @value{AS} is configured for the
+Mitsubishi M32R series.
+
+@table @code
+
+@item --m32rx
+Specify which processor in the M32R family is the target. The default
+is normally the M32R, but this option changes it to the M32RX.
+
+@item --warn-explicit-parallel-conflicts or --Wp
+Produce warning messages when questionable parallel constructs are
+encountered.
+
+@item --no-warn-explicit-parallel-conflicts or --Wnp
+Do not produce warning messages when questionable parallel constructs are
+encountered.
+
+@end table
+@end ifset
@ifset M680X0
The following options are available when @value{AS} is configured for the
@@ -534,7 +558,6 @@ Generate ``little endian'' format output.
@end table
@end ifset
-
@ifset SPARC
The following options are available when @code{@value{AS}} is configured
for the SPARC architecture:
@@ -659,6 +682,15 @@ The default can be overidden by the @samp{-sifilter} command line option.
@item -relax
Alter jump instructions for long displacements.
+@item -mcpu=[210|340]
+Select the cpu type on the target hardware. This controls which instructions
+can be assembled.
+
+@item -EB
+Assemble for a big endian target.
+
+@item -EL
+Assemble for a little endian target.
@end table
@end ifset
@@ -4936,6 +4968,9 @@ subject, see the hardware manufacturer's manual.
@ifset I960
* i960-Dependent:: Intel 80960 Dependent Features
@end ifset
+@ifset M32R
+* M32R-Dependent:: M32R Dependent Features
+@end ifset
@ifset M680X0
* M68K-Dependent:: M680x0 Dependent Features
@end ifset
@@ -5109,6 +5144,9 @@ family.
@include c-i960.texi
@end ifset
+@ifset M32R
+@include c-m32r.texi
+@end ifset
@ifset M680X0
@include c-m68k.texi