Add support for the AVR Tiny series of microcontrollers.

        * archures.c: add avrtiny architecture for avr target.
	* bfd-in2.h: Regenerate.
	* cpu-avr.c (arch_info_struct): add avrtiny arch info.
	* elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16
	added for 16 bit LDS/STS instruction of avrtiny arch.
	(avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to
	BFD_RELOC_AVR_LDS_STS_16.
	(bfd_elf_avr_final_write_processing): select machine number avrtiny arch.
	(elf32_avr_object_p): set machine number for avrtiny arch.
	* libbfd.h: Regenerate.
	* reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc.

         * config/tc-avr.c (mcu_types): Add avrtiny arch.
	Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20
	and attiny40.
	(md_show_usage): Add avrtiny arch in usage message.
	(avr_operand): validate and issue error for invalid register for avrtiny.
	add new reloc exp for 16 bit lds/sts instruction.
	(md_apply_fix): check 16 bit lds/sts operand for out of range and encode.
	(md_assemble): check ISA for arch and issue diagnostic.

	* include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number.
	(R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number.
	* include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA.
	(AVR_ISA_2xxxa): define ISA without LPM.
	(AVR_ISA_AVRTINY): define avrtiny arch ISA.
	Add doc for contraint used in 16 bit lds/sts.
	Adjust ISA group for icall, ijmp, pop and push.
	Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints.
	* opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
	(print_insn_avr): do not select opcode if insn ISA is avrtiny and machine
	is not avrtiny.

	* Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source.
	(eavrtiny.c): add rules for avrtiny emulation source.
	* Makefile.in: Regenerate.
	* configure.tgt: Add avrtiny to avr target emulations.
	* scripttempl/avrtiny.sc: New file.
	linker script template for avrtiny arch.
	* emulparams/avrtiny.sh: New file.
	emulation parameters for avrtiny arch.

4 files changed, 146 insertions, 70 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 67d19b5..e65aa83 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,19 @@
+2014-07-01  Barney Stratford   <barney_stratford@fastmail.fm>
+            Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+            Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
+            Soundararajan  <Sounderarajan.D@atmel.com>
+
+	* config/tc-avr.c (mcu_types): Add avrtiny arch.
+	Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20
+	and attiny40.
+	(md_show_usage): Add avrtiny arch in usage message.
+	(avr_operand): validate and issue error for invalid register for avrtiny.
+	add new reloc exp for 16 bit lds/sts instruction.
+	(md_apply_fix): check 16 bit lds/sts operand for out of range and encode.
+	(md_assemble): check ISA for arch and issue diagnostic.
+	* NEWS: Mention new support.
+	* doc/c-avr.texi: Document support for avrtiny architecture.
+
 2014-06-27  Alan Modra  <amodra@gmail.com>
 
 	* config/obj-macho.c (obj_mach_o_set_symbol_qualifier): Don't set
diff --git a/gas/NEWS b/gas/NEWS
index debf37f..ee4ea94 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,7 @@
 -*- text -*-
 
+* Add support for the AVR Tiny microcontrollers.
+
 * Replace support for openrisc and or32 with support for or1k.
 
 * Enhanced the ARM port to accept the assembler output from the CodeComposer
diff --git a/gas/config/tc-avr.c b/gas/config/tc-avr.c
index e4bc59c..9ed7de8 100644
--- a/gas/config/tc-avr.c
+++ b/gas/config/tc-avr.c
@@ -89,6 +89,7 @@ static struct mcu_type_s mcu_types[] =
   {"avrxmega5",  AVR_ISA_XMEGA,   bfd_mach_avrxmega5},
   {"avrxmega6",  AVR_ISA_XMEGA,   bfd_mach_avrxmega6},
   {"avrxmega7",  AVR_ISA_XMEGA,   bfd_mach_avrxmega7},
+  {"avrtiny",    AVR_ISA_AVRTINY, bfd_mach_avrtiny},
   {"at90s1200",  AVR_ISA_1200,    bfd_mach_avr1},
   {"attiny11",   AVR_ISA_AVR1,    bfd_mach_avr1},
   {"attiny12",   AVR_ISA_AVR1,    bfd_mach_avr1},
@@ -323,6 +324,12 @@ static struct mcu_type_s mcu_types[] =
   {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
   {"atxmega128a1u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7},
   {"atxmega128a4u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7},
+  {"attiny4",      AVR_ISA_AVRTINY, bfd_mach_avrtiny},
+  {"attiny5",      AVR_ISA_AVRTINY, bfd_mach_avrtiny},
+  {"attiny9",      AVR_ISA_AVRTINY, bfd_mach_avrtiny},
+  {"attiny10",     AVR_ISA_AVRTINY, bfd_mach_avrtiny},
+  {"attiny20",     AVR_ISA_AVRTINY, bfd_mach_avrtiny},
+  {"attiny40",     AVR_ISA_AVRTINY, bfd_mach_avrtiny},
   {NULL, 0, 0}
 };
 
@@ -513,7 +520,7 @@ md_show_usage (FILE *stream)
 	"                   avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
 	"                   avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
 	"                   avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
-	"                   or immediate microcontroller name.\n"));
+	"                   avrtiny   - AVR Tiny core with 16 gp registers\n"));
   fprintf (stream,
       _("  -mall-opcodes    accept all AVR opcodes, even if not supported by MCU\n"
 	"  -mno-skip-bug    disable warnings for skipping two-word instructions\n"
@@ -855,29 +862,41 @@ avr_operand (struct avr_opcodes_s *opcode,
     case 'a':
     case 'v':
       if (*str == 'r' || *str == 'R')
-	{
-	  char r_name[20];
+        {
+          char r_name[20];
 
-	  str = extract_word (str, r_name, sizeof (r_name));
-	  op_mask = 0xff;
-	  if (ISDIGIT (r_name[1]))
-	    {
-	      if (r_name[2] == '\0')
-		op_mask = r_name[1] - '0';
-	      else if (r_name[1] != '0'
-		       && ISDIGIT (r_name[2])
-		       && r_name[3] == '\0')
-		op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
-	    }
-	}
+          str = extract_word (str, r_name, sizeof (r_name));
+          op_mask = 0xff;
+          if (ISDIGIT (r_name[1]))
+            {
+              if (r_name[2] == '\0')
+                op_mask = r_name[1] - '0';
+              else if (r_name[1] != '0'
+                       && ISDIGIT (r_name[2])
+                       && r_name[3] == '\0')
+                op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
+            }
+        }
       else
-	{
-	  op_mask = avr_get_constant (str, 31);
-	  str = input_line_pointer;
-	}
+        {
+          op_mask = avr_get_constant (str, 31);
+          str = input_line_pointer;
+        }
+
+      if (avr_mcu->mach == bfd_mach_avrtiny)
+        {
+          if (op_mask < 16 || op_mask > 31)
+            {
+              as_bad (_("register name or number from 16 to 31 required"));
+              break;
+            }
+        }
+      else if (op_mask > 31)
+        {
+          as_bad (_("register name or number from 0 to 31 required"));
+          break;
+        }
 
-      if (op_mask <= 31)
-	{
 	  switch (*op)
 	    {
 	    case 'a':
@@ -905,9 +924,6 @@ avr_operand (struct avr_opcodes_s *opcode,
 	      break;
 	    }
 	  break;
-	}
-      as_bad (_("register name or number from 0 to 31 required"));
-      break;
 
     case 'e':
       {
@@ -1014,6 +1030,12 @@ avr_operand (struct avr_opcodes_s *opcode,
 		   &op_expr, FALSE, BFD_RELOC_16);
       break;
 
+    case 'j':
+      str = parse_exp (str, &op_expr);
+      fix_new_exp (frag_now, where, opcode->insn_size * 2,
+		   &op_expr, FALSE, BFD_RELOC_AVR_LDS_STS_16);
+      break;
+
     case 'M':
       {
 	bfd_reloc_code_real_type r_type;
@@ -1415,11 +1437,21 @@ md_apply_fix (fixS *fixP, valueT * valP, segT seg)
 	  bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
 	  break;
 
+	case BFD_RELOC_AVR_LDS_STS_16:
+	  if ((value < 0x40) || (value > 0xBF))
+	    as_warn_where (fixP->fx_file, fixP->fx_line,
+			   _("operand out of range: 0x%lx"),
+			   (unsigned long)value);
+	  insn |= ((value & 0xF) | ((value & 0x30) << 5) | ((value & 0x40) << 2));
+	  bfd_putl16 ((bfd_vma) insn, where);
+	  break;
+
 	case BFD_RELOC_AVR_6:
 	  if ((value > 63) || (value < 0))
 	    as_bad_where (fixP->fx_file, fixP->fx_line,
 			  _("operand out of range: %ld"), value);
-	  bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
+	  bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7)
+					| ((value & (1 << 5)) << 8)), where);
 	  break;
 
 	case BFD_RELOC_AVR_6_ADIW:
@@ -1594,6 +1626,28 @@ md_assemble (char *str)
 
   opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
 
+  if (opcode && !avr_opt.all_opcodes)
+    {
+      /* Check if the instruction's ISA bit is ON in the ISA bits of the part 
+         specified by the user.  If not look for other instructions
+	 specifications with same mnemonic who's ISA bits matches. 
+
+         This requires include/opcode/avr.h to have the instructions with
+         same mnenomic to be specified in sequence.  */
+
+      while ((opcode->isa & avr_mcu->isa) != opcode->isa)
+        {
+          opcode++;
+     
+          if (opcode->name && strcmp(op, opcode->name))
+            {
+              as_bad (_("illegal opcode %s for mcu %s"), 
+                      opcode->name, avr_mcu->name);
+              return;
+            }
+        }
+    } 
+
   if (opcode == NULL)
     {
       as_bad (_("unknown opcode `%s'"), op);
@@ -1606,9 +1660,6 @@ md_assemble (char *str)
   if (*str && *opcode->constraints == '?')
     ++opcode;
 
-  if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
-    as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
-
   dwarf2_emit_insn (0);
 
   /* We used to set input_line_pointer to the result of get_operands,
diff --git a/gas/doc/c-avr.texi b/gas/doc/c-avr.texi
index 305e64c..75b5d20 100644
--- a/gas/doc/c-avr.texi
+++ b/gas/doc/c-avr.texi
@@ -58,64 +58,71 @@ instructions (MCU types: attiny167, attiny1634, at90usb82, at90usb162,
 atmega8u2, atmega16u2, atmega32u2, ata5505).
 
 Instruction set avr4 is for the enhanced AVR core with up to 8K program
-memory space (MCU types: atmega48, atmega48a, atmega48pa, atmega48p, atmega8, 
-atmega8a, atmega88, atmega88a, atmega88p, atmega88pa, atmega8515, atmega8535, 
-atmega8hva, at90pwm1, at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81, 
+memory space (MCU types: atmega48, atmega48a, atmega48pa, atmega48p, atmega8,
+atmega8a, atmega88, atmega88a, atmega88p, atmega88pa, atmega8515, atmega8535,
+atmega8hva, at90pwm1, at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81,
 ata6285, ata6286).
 
 Instruction set avr5 is for the enhanced AVR core with up to 128K program
 memory space (MCU types: at90pwm161, atmega16, atmega16a, atmega161, atmega162,
-atmega163, atmega164a, atmega164p, atmega164pa, atmega165, atmega165a, 
+atmega163, atmega164a, atmega164p, atmega164pa, atmega165, atmega165a,
 atmega165p, atmega165pa, atmega168, atmega168a, atmega168p, atmega168pa,
 atmega169, atmega169a, atmega169p, atmega169pa, atmega32, atmega323, atmega324a,
 atmega324p, atmega324pa, atmega325, atmega325a, atmega32, atmega32a, atmega323,
 atmega324a, atmega324p, atmega324pa, atmega325, atmega325a, atmega325p,
-atmega325p, atmega325pa, atmega3250, atmega3250a, atmega3250p, atmega3250pa, 
-atmega328, atmega328p, atmega329, atmega329a, atmega329p, atmega329pa, 
-atmega3290a, atmega3290p, atmega3290pa, atmega406, atmega64, atmega64a, 
+atmega325p, atmega325pa, atmega3250, atmega3250a, atmega3250p, atmega3250pa,
+atmega328, atmega328p, atmega329, atmega329a, atmega329p, atmega329pa,
+atmega3290a, atmega3290p, atmega3290pa, atmega406, atmega64, atmega64a,
 atmega64rfr2, atmega644rfr2, atmega640, atmega644, atmega644a, atmega644p,
 atmega644pa, atmega645, atmega645a, atmega645p, atmega6450, atmega6450a,
 atmega6450p, atmega649, atmega649a, atmega649p, atmega6490, atmega6490a,
-atmega6490p, atmega16hva, atmega16hva2, atmega16hvb, atmega16hvbrevb, 
+atmega6490p, atmega16hva, atmega16hva2, atmega16hvb, atmega16hvbrevb,
 atmega32hvb, atmega32hvbrevb, atmega64hve, at90can32, at90can64, at90pwm161,
 at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1,
 atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646, at90usb647, at94k,
 at90scr100, ata5790, ata5795).
 
-Instruction set avr51 is for the enhanced AVR core with exactly 128K program
-memory space (MCU types: atmega128, atmega128a, atmega1280, atmega1281, 
-atmega1284, atmega1284p, atmega128rfa1, atmega128rfr2, atmega1284rfr2,
-at90can128, at90usb1286, at90usb1287, m3000).
-
-Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
-atmega2560, atmega2561, atmega256rfr2, atmega2564rfr2).
-
-Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K program
-memory space and less than 64K data space (MCU types: atxmega16a4, atxmega16a4u,
-atxmega16c4, atxmega16d4, atxmega16x1, atxmega32a4, atxmega32a4u, atxmega32c4, 
-atxmega32d4, atxmega16e5, atxmega8e5, atxmega32e5, atxmega32x1).
-
-Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K program
-memory space and greater than 64K data space (MCU types: none).
-
-Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K program
-memory space and less than 64K data space (MCU types: atxmega64a3, atxmega64a3u, 
-atxmega64a4u, atxmega64b1, atxmega64b3, atxmega64c3, atxmega64d3, atxmega64d4).
-
-Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K program
-memory space and greater than 64K data space (MCU types: atxmega64a1,
-atxmega64a1u).
-
-Instruction set avrxmega6 is for the XMEGA AVR core with larger than 64K program
-memory space and less than 64K data space (MCU types: atxmega128a3, 
-atxmega128a3u, atxmega128c3, atxmega128d3, atxmega128d4, atxmega192a3, 
-atxmega192a3u, atxmega128b1, atxmega128b3, atxmega192c3, atxmega192d3, 
-atxmega256a3, atxmega256a3u, atxmega256a3b, atxmega256a3bu, atxmega256c3, 
-atxmega256d3, atxmega384c3, atxmega256d3).
-
-Instruction set avrxmega7 is for the XMEGA AVR core with larger than 64K program
-memory space and greater than 64K data space (MCU types: atxmega128a1,
-atxmega128a1u, atxmega128a4u).
+Instruction set avr51 is for the enhanced AVR core with exactly 128K
+program memory space (MCU types: atmega128, atmega128a, atmega1280,
+atmega1281, atmega1284, atmega1284p, atmega128rfa1, atmega128rfr2,
+atmega1284rfr2, at90can128, at90usb1286, at90usb1287, m3000).
+
+Instruction set avr6 is for the enhanced AVR core with a 3-byte PC
+(MCU types: atmega2560, atmega2561, atmega256rfr2, atmega2564rfr2).
+
+Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K
+program memory space and less than 64K data space (MCU types:
+atxmega16a4, atxmega16a4u, atxmega16c4, atxmega16d4, atxmega16x1,
+atxmega32a4, atxmega32a4u, atxmega32c4, atxmega32d4, atxmega16e5,
+atxmega8e5, atxmega32e5, atxmega32x1).
+
+Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K
+program memory space and greater than 64K data space (MCU types:
+none).
+
+Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K
+program memory space and less than 64K data space (MCU types:
+atxmega64a3, atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3,
+atxmega64c3, atxmega64d3, atxmega64d4).
+
+Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K
+program memory space and greater than 64K data space (MCU types:
+atxmega64a1, atxmega64a1u).
+
+Instruction set avrxmega6 is for the XMEGA AVR core with larger than
+64K program memory space and less than 64K data space (MCU types:
+atxmega128a3, atxmega128a3u, atxmega128c3, atxmega128d3, atxmega128d4,
+atxmega192a3, atxmega192a3u, atxmega128b1, atxmega128b3, atxmega192c3,
+atxmega192d3, atxmega256a3, atxmega256a3u, atxmega256a3b,
+atxmega256a3bu, atxmega256c3, atxmega256d3, atxmega384c3,
+atxmega256d3).
+
+Instruction set avrxmega7 is for the XMEGA AVR core with larger than
+64K program memory space and greater than 64K data space (MCU types:
+atxmega128a1, atxmega128a1u, atxmega128a4u).
+
+Instruction set avrtiny is for the ATtiny4/5/9/10/20/40
+microcontrollers.
 
 @cindex @code{-mall-opcodes} command line option, AVR
 @item -mall-opcodes