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authorYufeng Zhang <yufeng.zhang@arm.com>2013-06-26 10:41:42 +0000
committerYufeng Zhang <yufeng.zhang@arm.com>2013-06-26 10:41:42 +0000
commitcec5225bd81f750984856603755854f0f5796ab1 (patch)
treeffb2ca80692dcd0fa3764f4042b7f515efa6f11e /gas
parent811971141320a4b6a6af86c9efc9a48418accaab (diff)
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[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld
and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog11
-rw-r--r--gas/config/tc-aarch64.c28
-rw-r--r--gas/config/tc-aarch64.h3
3 files changed, 39 insertions, 3 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index d6df18b..5270688 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,14 @@
+2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * config/tc-aarch64.c (ilp32_p): New static variable.
+ (elf64_aarch64_target_format): Return the target according to the
+ value of 'ilp32_p'.
+ (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
+ (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
+ (aarch64_dwarf2_addr_size): New function.
+ * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
+ (DWARF2_ADDR_SIZE): New define.
+
2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
* doc/c-mips.texi: Use ISA instead of @sc{isa}.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index f462dbd..239b9ee 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -60,6 +60,12 @@ static const aarch64_feature_set aarch64_arch_none = AARCH64_ARCH_NONE;
#ifdef OBJ_ELF
/* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
static symbolS *GOT_symbol;
+
+/* When non-zero, program to a 32-bit model, in which the C data types
+ int, long and all pointer types are 32-bit objects (ILP32); or to a
+ 64-bit model, in which the C int type is 32-bits but the C long type
+ and all pointer types are 64-bit objects (LP64). */
+static int ilp32_p = 0;
#endif
enum neon_el_type
@@ -5892,6 +5898,18 @@ tc_aarch64_regname_to_dw2regnum (char *regname)
return -1;
}
+/* Implement DWARF2_ADDR_SIZE. */
+
+int
+aarch64_dwarf2_addr_size (void)
+{
+#if defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF)
+ if (ilp32_p)
+ return 4;
+#endif
+ return bfd_arch_bits_per_address (stdoutput) / 8;
+}
+
/* MD interface: Symbol and relocation handling. */
/* Return the address within the segment that a PC-relative fixup is
@@ -6693,9 +6711,9 @@ const char *
elf64_aarch64_target_format (void)
{
if (target_big_endian)
- return "elf64-bigaarch64";
+ return ilp32_p ? "elf32-bigaarch64" : "elf64-bigaarch64";
else
- return "elf64-littleaarch64";
+ return ilp32_p ? "elf32-littleaarch64" : "elf64-littleaarch64";
}
void
@@ -6986,7 +7004,7 @@ md_begin (void)
cpu_variant = *mcpu_cpu_opt;
/* Record the CPU type. */
- mach = bfd_mach_aarch64;
+ mach = ilp32_p ? bfd_mach_aarch64_ilp32 : bfd_mach_aarch64;
bfd_set_arch_mach (stdoutput, TARGET_ARCH, mach);
}
@@ -7031,6 +7049,10 @@ static struct aarch64_option_table aarch64_opts[] = {
{"mbig-endian", N_("assemble for big-endian"), &target_big_endian, 1, NULL},
{"mlittle-endian", N_("assemble for little-endian"), &target_big_endian, 0,
NULL},
+#ifdef OBJ_ELF
+ {"mlp64", N_("select the LP64 model"), &ilp32_p, 0, NULL},
+ {"milp32", N_("select the ILP32 model"), &ilp32_p, 1, NULL},
+#endif /* OBJ_ELF */
#ifdef DEBUG_AARCH64
{"mdebug-dump", N_("temporary switch for dumping"), &debug_dump, 1, NULL},
#endif /* DEBUG_AARCH64 */
diff --git a/gas/config/tc-aarch64.h b/gas/config/tc-aarch64.h
index f6f3bc7..74a81d6 100644
--- a/gas/config/tc-aarch64.h
+++ b/gas/config/tc-aarch64.h
@@ -153,6 +153,9 @@ struct aarch64_frag_type
/* Registers are generally saved at negative offsets to the CFA. */
#define DWARF2_CIE_DATA_ALIGNMENT (-4)
+extern int aarch64_dwarf2_addr_size (void);
+#define DWARF2_ADDR_SIZE(bfd) aarch64_dwarf2_addr_size ()
+
#ifdef OBJ_ELF
# define obj_frob_symbol(sym, punt) aarch64elf_frob_symbol ((sym), & (punt))