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| author | Nick Clifton <nickc@redhat.com> | 2009-03-02 10:33:08 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2009-03-02 10:33:08 +0000 |
| commit | c3b7224ae49a815ca1e60d058acc980530832881 (patch) | |
| tree | 5c6fbdaaf1f119828e423512f1b9d8431894596c /gas | |
| parent | 9af17804e939a7d07adb86d8c16992e4c92b46ff (diff) | |
| download | gdb-c3b7224ae49a815ca1e60d058acc980530832881.zip gdb-c3b7224ae49a815ca1e60d058acc980530832881.tar.gz gdb-c3b7224ae49a815ca1e60d058acc980530832881.tar.bz2 | |
Add support for Score7 architecture.
Diffstat (limited to 'gas')
42 files changed, 15066 insertions, 3392 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 8b8db8e..bcf762d 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,17 @@ +2009-03-02 Qinwei <qinwei@sunnorth.com.cn> + + * config/tc-score7.c: New file. + * doc/c-score.texi: New file. + * Makefile.am: Update dependencies for tc-score.c. + * Makefile.in: Regenerate. + * NEWS: Mention support for Score7 architecture. + * config/tc-score.c: Add support for Score7 architecture. + * config/tc-score.h: Likewise. + * doc/Makefile.am: Add c-score.texi. + * doc/Makefile.in: Regenerate. + * doc/all.texi: Add Score7. + * doc/as.texinfo: Add Score7. + 2009-03-01 Mark Mitchell <mark@codesourcery.com> * config/tc-arm.c (md_assemble): Allow barrier instructions on diff --git a/gas/Makefile.am b/gas/Makefile.am index 228624e..3d18cf0 100644 --- a/gas/Makefile.am +++ b/gas/Makefile.am @@ -1396,8 +1396,9 @@ DEPTC_score_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \ $(INCDIR)/elf/common.h $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h \ $(INCDIR)/bfdlink.h $(srcdir)/config/tc-score.h dwarf2dbg.h \ subsegs.h $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h \ - $(INCDIR)/opcode/score-inst.h $(INCDIR)/opcode/score-datadep.h \ - struc-symbol.h $(INCDIR)/elf/score.h $(INCDIR)/elf/reloc-macros.h + $(INCDIR)/opcode/score-inst.h $(srcdir)/config/tc-score7.c \ + struc-symbol.h $(INCDIR)/elf/score.h $(INCDIR)/elf/reloc-macros.h \ + dwarf2dbg.h DEPTC_sh_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-sh.h \ $(INCDIR)/coff/internal.h $(INCDIR)/coff/sh.h $(INCDIR)/coff/external.h \ $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \ @@ -1786,8 +1787,8 @@ DEPOBJ_s390_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \ DEPOBJ_score_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \ $(INCDIR)/elf/common.h $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h \ $(INCDIR)/bfdlink.h $(srcdir)/config/tc-score.h dwarf2dbg.h \ - $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \ - struc-symbol.h $(INCDIR)/aout/aout64.h + $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/config/tc-score7.c \ + $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h DEPOBJ_sh_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-sh.h \ $(INCDIR)/coff/internal.h $(INCDIR)/coff/sh.h $(INCDIR)/coff/external.h \ $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \ @@ -2116,7 +2117,7 @@ DEP_score_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \ $(INCDIR)/elf/common.h $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h \ $(INCDIR)/bfdlink.h $(srcdir)/config/tc-score.h dwarf2dbg.h \ $(srcdir)/config/obj-coff.h $(INCDIR)/coff/internal.h \ - $(BFDDIR)/libcoff.h + $(BFDDIR)/libcoff.h $(srcdir)/config/tc-score7.c DEP_sh_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-sh.h \ $(INCDIR)/coff/internal.h $(INCDIR)/coff/sh.h $(INCDIR)/coff/external.h \ $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h diff --git a/gas/Makefile.in b/gas/Makefile.in index 2cf670d..711701c 100644 --- a/gas/Makefile.in +++ b/gas/Makefile.in @@ -1200,7 +1200,7 @@ DEPTC_score_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \ $(INCDIR)/elf/common.h $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h \ $(INCDIR)/bfdlink.h $(srcdir)/config/tc-score.h dwarf2dbg.h \ subsegs.h $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h \ - $(INCDIR)/opcode/score-inst.h $(INCDIR)/opcode/score-datadep.h \ + $(INCDIR)/opcode/score-inst.h dwarf2dbg.h $(srcdir)/config/tc-score7.c \ struc-symbol.h $(INCDIR)/elf/score.h $(INCDIR)/elf/reloc-macros.h DEPTC_sh_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-sh.h \ @@ -1671,8 +1671,8 @@ DEPOBJ_s390_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \ DEPOBJ_score_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \ $(INCDIR)/elf/common.h $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h \ $(INCDIR)/bfdlink.h $(srcdir)/config/tc-score.h dwarf2dbg.h \ - $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \ - struc-symbol.h $(INCDIR)/aout/aout64.h + $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/config/tc-score7.c \ + $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h DEPOBJ_sh_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-sh.h \ $(INCDIR)/coff/internal.h $(INCDIR)/coff/sh.h $(INCDIR)/coff/external.h \ @@ -1,5 +1,7 @@ -*- text -*- +* Add support for Sunplus score architecture. + * Add support for Lattice Mico32 (lm32) architecture. Changes in 2.19: diff --git a/gas/config/tc-score.c b/gas/config/tc-score.c index 5c12bd5..3b04508 100644 --- a/gas/config/tc-score.c +++ b/gas/config/tc-score.c @@ -1,6 +1,7 @@ /* tc-score.c -- Assembler for Score - Copyright 2006, 2007 Free Software Foundation, Inc. + Copyright 2006, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by: + Brain.lin (brain.lin@sunplusct.com) Mei Ligang (ligang@sunnorth.com.cn) Pei-Lin Tsai (pltsai@sunplus.com) @@ -21,44 +22,251 @@ Software Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ -#include "as.h" -#include "config.h" -#include "subsegs.h" -#include "safe-ctype.h" -#include "opcode/score-inst.h" -#include "opcode/score-datadep.h" -#include "struc-symbol.h" +#include "tc-score7.c" + +static void s3_s_score_bss (int ignore ATTRIBUTE_UNUSED); +static void s3_s_score_text (int ignore); +static void s3_score_s_section (int ignore); +static void s3_s_change_sec (int sec); +static void s3_s_score_mask (int reg_type ATTRIBUTE_UNUSED); +static void s3_s_score_ent (int aent); +static void s3_s_score_frame (int ignore ATTRIBUTE_UNUSED); +static void s3_s_score_end (int x ATTRIBUTE_UNUSED); +static void s3_s_score_set (int x ATTRIBUTE_UNUSED); +static void s3_s_score_cpload (int ignore ATTRIBUTE_UNUSED); +static void s3_s_score_cprestore (int ignore ATTRIBUTE_UNUSED); +static void s3_s_score_gpword (int ignore ATTRIBUTE_UNUSED); +static void s3_s_score_cpadd (int ignore ATTRIBUTE_UNUSED); +static void s3_s_score_lcomm (int bytes_p); + +static void s_score_bss (int ignore ATTRIBUTE_UNUSED); +static void s_score_text (int ignore); +static void s_section (int ignore); +static void s_change_sec (int sec); +static void s_score_mask (int reg_type ATTRIBUTE_UNUSED); +static void s_score_ent (int aent); +static void s_score_frame (int ignore ATTRIBUTE_UNUSED); +static void s_score_end (int x ATTRIBUTE_UNUSED); +static void s_score_set (int x ATTRIBUTE_UNUSED); +static void s_score_cpload (int ignore ATTRIBUTE_UNUSED); +static void s_score_cprestore (int ignore ATTRIBUTE_UNUSED); +static void s_score_gpword (int ignore ATTRIBUTE_UNUSED); +static void s_score_cpadd (int ignore ATTRIBUTE_UNUSED); +static void s_score_lcomm (int bytes_p); + +/* s3: hooks. */ +static void s3_md_number_to_chars (char *buf, valueT val, int n); +static valueT s3_md_chars_to_number (char *buf, int n); +static void s3_assemble (char *str); +static void s3_operand (expressionS * expr); +static void s3_begin (void); +static void s3_number_to_chars (char *buf, valueT val, int n); +static char *s3_atof (int type, char *litP, int *sizeP); +static void s3_frag_check (fragS * fragp ATTRIBUTE_UNUSED); +static void s3_validate_fix (fixS *fixP); +static int s3_force_relocation (struct fix *fixp); +static bfd_boolean s3_fix_adjustable (fixS * fixP); +static void s3_elf_final_processing (void); +static int s3_estimate_size_before_relax (fragS * fragp, asection * sec ATTRIBUTE_UNUSED); +static int s3_relax_frag (asection * sec ATTRIBUTE_UNUSED, fragS * fragp, long stretch ATTRIBUTE_UNUSED); +static void s3_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, segT sec ATTRIBUTE_UNUSED, fragS * fragp); +static long s3_pcrel_from (fixS * fixP); +static valueT s3_section_align (segT segment ATTRIBUTE_UNUSED, valueT size); +static void s3_apply_fix (fixS *fixP, valueT *valP, segT seg); +static arelent **s3_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp); + +/* s3: utils. */ +static void s3_do_ldst_insn (char *); +static void s3_do_crdcrscrsimm5 (char *); +static void s3_do_ldst_unalign (char *); +static void s3_do_ldst_atomic (char *); +static void s3_do_ldst_cop (char *); +static void s3_do_macro_li_rdi32 (char *); +static void s3_do_macro_la_rdi32 (char *); +static void s3_do_macro_rdi32hi (char *); +static void s3_do_macro_rdi32lo (char *); +static void s3_do_macro_mul_rdrsrs (char *); +static void s3_do_macro_bcmp (char *); +static void s3_do_macro_bcmpz (char *); +static void s3_do_macro_ldst_label (char *); +static void s3_do_branch (char *); +static void s3_do_jump (char *); +static void s3_do_empty (char *); +static void s3_do16_int (char *); +static void s3_do_rdrsrs (char *); +static void s3_do_rdsi16 (char *); +static void s3_do_rdrssi14 (char *); +static void s3_do_sub_rdsi16 (char *); +static void s3_do_sub_rdi16 (char *); +static void s3_do_sub_rdrssi14 (char *); +static void s3_do_rdrsi5 (char *); +static void s3_do_rdrsi14 (char *); +static void s3_do_rdi16 (char *); +static void s3_do_ldis (char *); +static void s3_do_xrsi5 (char *); +static void s3_do_rdrs (char *); +static void s3_do_rdxrs (char *); +static void s3_do_rsrs (char *); +static void s3_do_rdcrs (char *); +static void s3_do_rdsrs (char *); +static void s3_do_rd (char *); +static void s3_do16_dsp (char *); +static void s3_do16_dsp2 (char *); +static void s3_do_dsp (char *); +static void s3_do_dsp2 (char *); +static void s3_do_dsp3 (char *); +static void s3_do_rs (char *); +static void s3_do_i15 (char *); +static void s3_do_xi5x (char *); +static void s3_do_ceinst (char *); +static void s3_do_cache (char *); +static void s3_do16_rdrs2 (char *); +static void s3_do16_br (char *); +static void s3_do16_brr (char *); +static void s3_do_ltb (char *); +static void s3_do16_mv_cmp (char *); +static void s3_do16_addi (char *); +static void s3_do16_cmpi (char *); +static void s3_do16_rdi5 (char *); +static void s3_do16_xi5 (char *); +static void s3_do16_ldst_insn (char *); +static void s3_do16_slli_srli(char *); +static void s3_do16_ldiu(char *); +static void s3_do16_push_pop (char *); +static void s3_do16_rpush (char *); +static void s3_do16_rpop (char *); +static void s3_do16_branch (char *); +static void s3_do_lw48 (char *); +static void s3_do_sw48 (char *); +static void s3_do_ldi48 (char *); +static void s3_do_sdbbp48 (char *); +static void s3_do_and48 (char *); +static void s3_do_or48 (char *); +static void s3_do_mbitclr (char *); +static void s3_do_mbitset (char *); +static void s3_do_rdi16_pic (char *); +static void s3_do_addi_s_pic (char *); +static void s3_do_addi_u_pic (char *); +static void s3_do_lw_pic (char *); + +#define MARCH_SCORE3 "score3" +#define MARCH_SCORE3D "score3d" +#define MARCH_SCORE7 "score7" +#define MARCH_SCORE7D "score7d" +#define MARCH_SCORE5 "score5" +#define MARCH_SCORE5U "score5u" + +#define SCORE_BI_ENDIAN + +#ifdef SCORE_BI_ENDIAN +#define OPTION_EB (OPTION_MD_BASE + 0) +#define OPTION_EL (OPTION_MD_BASE + 1) +#else +#if TARGET_BYTES_BIG_ENDIAN +#define OPTION_EB (OPTION_MD_BASE + 0) +#else +#define OPTION_EL (OPTION_MD_BASE + 1) +#endif +#endif +#define OPTION_FIXDD (OPTION_MD_BASE + 2) +#define OPTION_NWARN (OPTION_MD_BASE + 3) +#define OPTION_SCORE5 (OPTION_MD_BASE + 4) +#define OPTION_SCORE5U (OPTION_MD_BASE + 5) +#define OPTION_SCORE7 (OPTION_MD_BASE + 6) +#define OPTION_R1 (OPTION_MD_BASE + 7) +#define OPTION_O0 (OPTION_MD_BASE + 8) +#define OPTION_SCORE_VERSION (OPTION_MD_BASE + 9) +#define OPTION_PIC (OPTION_MD_BASE + 10) +#define OPTION_MARCH (OPTION_MD_BASE + 11) +#define OPTION_SCORE3 (OPTION_MD_BASE + 12) + +/* This array holds the chars that always start a comment. If the + pre-processor is disabled, these aren't very useful. */ +const char comment_chars[] = "#"; +const char line_comment_chars[] = "#"; +const char line_separator_chars[] = ";"; +/* Chars that can be used to separate mant from exp in floating point numbers. */ +const char EXP_CHARS[] = "eE"; +const char FLT_CHARS[] = "rRsSfFdDxXeEpP"; #ifdef OBJ_ELF -#include "elf/score.h" -#include "dwarf2dbg.h" +/* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ +symbolS *GOT_symbol; #endif -#define GP 28 -#define PIC_CALL_REG 29 -#define MAX_LITERAL_POOL_SIZE 1024 -#define FAIL 0x80000000 -#define SUCCESS 0 -#define INSN_SIZE 4 -#define INSN16_SIZE 2 -#define RELAX_INST_NUM 3 +const pseudo_typeS md_pseudo_table[] = +{ + {"bss", s_score_bss, 0}, + {"text", s_score_text, 0}, + {"word", cons, 4}, + {"long", cons, 4}, + {"extend", float_cons, 'x'}, + {"ldouble", float_cons, 'x'}, + {"packed", float_cons, 'p'}, + {"end", s_score_end, 0}, + {"ent", s_score_ent, 0}, + {"frame", s_score_frame, 0}, + {"rdata", s_change_sec, 'r'}, + {"sdata", s_change_sec, 's'}, + {"set", s_score_set, 0}, + {"mask", s_score_mask, 'R'}, + {"dword", cons, 8}, + {"lcomm", s_score_lcomm, 1}, + {"section", s_section, 0}, + {"cpload", s_score_cpload, 0}, + {"cprestore", s_score_cprestore, 0}, + {"gpword", s_score_gpword, 0}, + {"cpadd", s_score_cpadd, 0}, + {0, 0, 0} +}; + +const char *md_shortopts = "nO::g::G:"; +struct option md_longopts[] = +{ +#ifdef OPTION_EB + {"EB" , no_argument, NULL, OPTION_EB}, +#endif +#ifdef OPTION_EL + {"EL" , no_argument, NULL, OPTION_EL}, +#endif + {"FIXDD" , no_argument, NULL, OPTION_FIXDD}, + {"NWARN" , no_argument, NULL, OPTION_NWARN}, + {"SCORE5" , no_argument, NULL, OPTION_SCORE5}, + {"SCORE5U", no_argument, NULL, OPTION_SCORE5U}, + {"SCORE7" , no_argument, NULL, OPTION_SCORE7}, + {"USE_R1" , no_argument, NULL, OPTION_R1}, + {"O0" , no_argument, NULL, OPTION_O0}, + {"V" , no_argument, NULL, OPTION_SCORE_VERSION}, + {"KPIC" , no_argument, NULL, OPTION_PIC}, + {"march=" , required_argument, NULL, OPTION_MARCH}, + {"SCORE3" , no_argument, NULL, OPTION_SCORE3}, + {NULL , no_argument, NULL, 0} +}; + +size_t md_longopts_size = sizeof (md_longopts); + +#define s3_GP 28 +#define s3_PIC_CALL_REG 29 +#define s3_MAX_LITERAL_POOL_SIZE 1024 +#define s3_FAIL 0x80000000 +#define s3_SUCCESS 0 +#define s3_INSN48_SIZE 6 +#define s3_INSN_SIZE 4 +#define s3_INSN16_SIZE 2 +#define s3_RELAX_INST_NUM 3 /* For score5u : div/mul will pop warning message, mmu/alw/asw will pop error message. */ -#define BAD_ARGS _("bad arguments to instruction") -#define BAD_PC _("r15 not allowed here") -#define BAD_COND _("instruction is not conditional") -#define ERR_NO_ACCUM _("acc0 expected") -#define ERR_FOR_SCORE5U_MUL_DIV _("div / mul are reserved instructions") -#define ERR_FOR_SCORE5U_MMU _("This architecture doesn't support mmu") -#define ERR_FOR_SCORE5U_ATOMIC _("This architecture doesn't support atomic instruction") -#define LONG_LABEL_LEN _("the label length is longer than 1024"); -#define BAD_SKIP_COMMA BAD_ARGS -#define BAD_GARBAGE _("garbage following instruction"); - -#define skip_whitespace(str) while (*(str) == ' ') ++(str) +#define s3_BAD_ARGS _("bad arguments to instruction") +#define s3_ERR_FOR_SCORE5U_MUL_DIV _("div / mul are reserved instructions") +#define s3_ERR_FOR_SCORE5U_MMU _("This architecture doesn't support mmu") +#define s3_ERR_FOR_SCORE5U_ATOMIC _("This architecture doesn't support atomic instruction") +#define s3_BAD_SKIP_COMMA s3_BAD_ARGS +#define s3_BAD_GARBAGE _("garbage following instruction"); + +#define s3_skip_whitespace(str) while (*(str) == ' ') ++(str) /* The name of the readonly data section. */ -#define RDATA_SECTION_NAME (OUTPUT_FLAVOR == bfd_target_aout_flavour \ +#define s3_RDATA_SECTION_NAME (OUTPUT_FLAVOR == bfd_target_aout_flavour \ ? ".data" \ : OUTPUT_FLAVOR == bfd_target_ecoff_flavour \ ? ".rdata" \ @@ -68,7 +276,7 @@ ? ".rodata" \ : (abort (), "")) -#define RELAX_ENCODE(old, new, type, reloc1, reloc2, opt) \ +#define s3_RELAX_ENCODE(old, new, type, reloc1, reloc2, opt) \ ((relax_substateT) \ (((old) << 23) \ | ((new) << 16) \ @@ -77,76 +285,113 @@ | ((reloc2) << 1) \ | ((opt) ? 1 : 0))) -#define RELAX_OLD(i) (((i) >> 23) & 0x7f) -#define RELAX_NEW(i) (((i) >> 16) & 0x7f) -#define RELAX_TYPE(i) (((i) >> 9) & 0x7f) -#define RELAX_RELOC1(i) ((valueT) ((i) >> 5) & 0xf) -#define RELAX_RELOC2(i) ((valueT) ((i) >> 1) & 0xf) -#define RELAX_OPT(i) ((i) & 1) -#define RELAX_OPT_CLEAR(i) ((i) & ~1) +#define s3_RELAX_OLD(i) (((i) >> 23) & 0x7f) +#define s3_RELAX_NEW(i) (((i) >> 16) & 0x7f) +#define s3_RELAX_TYPE(i) (((i) >> 9) & 0x7f) +#define s3_RELAX_RELOC1(i) ((valueT) ((i) >> 5) & 0xf) +#define s3_RELAX_RELOC2(i) ((valueT) ((i) >> 1) & 0xf) +#define s3_RELAX_OPT(i) ((i) & 1) + +#define s3_SET_INSN_ERROR(s) (s3_inst.error = (s)) +#define s3_INSN_IS_PCE_P(s) (strstr (str, "||") != NULL) +#define s3_INSN_IS_48_P(s) (strstr (str, "48") != NULL) +#define s3_GET_INSN_CLASS(type) (s3_get_insn_class_from_type (type)) +#define s3_GET_INSN_SIZE(type) ((s3_GET_INSN_CLASS (type) == INSN_CLASS_16) \ + ? s3_INSN16_SIZE : (s3_GET_INSN_CLASS (type) == INSN_CLASS_48) \ + ? s3_INSN48_SIZE : s3_INSN_SIZE) -#define SET_INSN_ERROR(s) (inst.error = (s)) -#define INSN_IS_PCE_P(s) (strstr (str, "||") != NULL) +#define s3_MAX_LITTLENUMS 6 +#define s3_INSN_NAME_LEN 16 -#define GET_INSN_CLASS(type) (get_insn_class_from_type (type)) +/* Relax will need some padding for alignment. */ +#define s3_RELAX_PAD_BYTE 3 -#define GET_INSN_SIZE(type) ((GET_INSN_CLASS (type) == INSN_CLASS_16) \ - ? INSN16_SIZE : INSN_SIZE) -/* This array holds the chars that always start a comment. If the - pre-processor is disabled, these aren't very useful. */ -const char comment_chars[] = "#"; -const char line_comment_chars[] = "#"; -const char line_separator_chars[] = ";"; +#define s3_USE_GLOBAL_POINTER_OPT 1 -/* Chars that can be used to separate mant from exp in floating point numbers. */ -const char EXP_CHARS[] = "eE"; -const char FLT_CHARS[] = "rRsSfFdDxXeEpP"; +/* Enumeration matching entries in table above. */ +enum s3_score_reg_type +{ + s3_REG_TYPE_SCORE = 0, +#define s3_REG_TYPE_FIRST s3_REG_TYPE_SCORE + s3_REG_TYPE_SCORE_SR = 1, + s3_REG_TYPE_SCORE_CR = 2, + s3_REG_TYPE_MAX = 3 +}; -/* Used to contain constructed error messages. */ -static char err_msg[255]; +enum s3_score_pic_level +{ + s3_NO_PIC, + s3_PIC +}; +static enum s3_score_pic_level s3_score_pic = s3_NO_PIC; -fragS *score_fragp = 0; -static int fix_data_dependency = 0; -static int warn_fix_data_dependency = 1; -static int score7 = 1; -static int university_version = 0; +enum s3_insn_type_for_dependency +{ + s3_D_mtcr, + s3_D_all_insn +}; -static int in_my_get_expression = 0; +struct s3_insn_to_dependency +{ + char *insn_name; + enum s3_insn_type_for_dependency type; +}; -#define USE_GLOBAL_POINTER_OPT 1 -#define SCORE_BI_ENDIAN +struct s3_data_dependency +{ + enum s3_insn_type_for_dependency pre_insn_type; + char pre_reg[6]; + enum s3_insn_type_for_dependency cur_insn_type; + char cur_reg[6]; + int bubblenum_7; + int bubblenum_3; + int warn_or_error; /* warning - 0; error - 1 */ +}; + +static const struct s3_insn_to_dependency s3_insn_to_dependency_table[] = +{ + /* move spectial instruction. */ + {"mtcr", s3_D_mtcr}, +}; + +static const struct s3_data_dependency s3_data_dependency_table[] = +{ + /* Status regiser. */ + {s3_D_mtcr, "cr0", s3_D_all_insn, "", 5, 1, 0}, +}; + +/* Used to contain constructed error messages. */ +static char s3_err_msg[255]; + +static int s3_fix_data_dependency = 0; +static int s3_warn_fix_data_dependency = 1; + +static int s3_in_my_get_expression = 0; /* Default, pop warning message when using r1. */ -static int nor1 = 1; +static int s3_nor1 = 1; -/* Default will do instruction relax, -O0 will set g_opt = 0. */ -static unsigned int g_opt = 1; +/* Default will do instruction relax, -O0 will set s3_g_opt = 0. */ +static unsigned int s3_g_opt = 1; /* The size of the small data section. */ -static unsigned int g_switch_value = 8; +static unsigned int s3_g_switch_value = 8; -#ifdef OBJ_ELF -/* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ -symbolS *GOT_symbol; -#endif -static segT pdr_seg; - -enum score_pic_level score_pic = NO_PIC; +static segT s3_pdr_seg; -#define INSN_NAME_LEN 16 -struct score_it +struct s3_score_it { - char name[INSN_NAME_LEN]; - unsigned long instruction; - unsigned long relax_inst; + char name[s3_INSN_NAME_LEN]; + bfd_vma instruction; + bfd_vma relax_inst; int size; int relax_size; enum score_insn_type type; - char str[MAX_LITERAL_POOL_SIZE]; + char str[s3_MAX_LITERAL_POOL_SIZE]; const char *error; int bwarn; - char reg[INSN_NAME_LEN]; + char reg[s3_INSN_NAME_LEN]; struct { bfd_reloc_code_real_type type; @@ -154,9 +399,9 @@ struct score_it int pc_rel; }reloc; }; -struct score_it inst; +static struct s3_score_it s3_inst; -typedef struct proc +typedef struct s3_proc { symbolS *isym; unsigned long reg_mask; @@ -166,29 +411,20 @@ typedef struct proc unsigned long frame_offset; unsigned long frame_reg; unsigned long pc_reg; -} -procS; - -static procS cur_proc; -static procS *cur_proc_ptr; -static int numprocs; +} s3_procS; +static s3_procS s3_cur_proc; +static s3_procS *s3_cur_proc_ptr; +static int s3_numprocs; -#define SCORE7_PIPELINE 7 -#define SCORE5_PIPELINE 5 -static int vector_size = SCORE7_PIPELINE; -struct score_it dependency_vector[SCORE7_PIPELINE]; - -/* Relax will need some padding for alignment. */ -#define RELAX_PAD_BYTE 3 /* Structure for a hash table entry for a register. */ -struct reg_entry +struct s3_reg_entry { const char *name; int number; }; -static const struct reg_entry score_rn_table[] = +static const struct s3_reg_entry s3_score_rn_table[] = { {"r0", 0}, {"r1", 1}, {"r2", 2}, {"r3", 3}, {"r4", 4}, {"r5", 5}, {"r6", 6}, {"r7", 7}, @@ -201,13 +437,13 @@ static const struct reg_entry score_rn_table[] = {NULL, 0} }; -static const struct reg_entry score_srn_table[] = +static const struct s3_reg_entry s3_score_srn_table[] = { {"sr0", 0}, {"sr1", 1}, {"sr2", 2}, {NULL, 0} }; -static const struct reg_entry score_crn_table[] = +static const struct s3_reg_entry s3_score_crn_table[] = { {"cr0", 0}, {"cr1", 1}, {"cr2", 2}, {"cr3", 3}, {"cr4", 4}, {"cr5", 5}, {"cr6", 6}, {"cr7", 7}, @@ -220,603 +456,588 @@ static const struct reg_entry score_crn_table[] = {NULL, 0} }; -struct reg_map +struct s3_reg_map { - const struct reg_entry *names; + const struct s3_reg_entry *names; int max_regno; struct hash_control *htab; const char *expected; }; -struct reg_map all_reg_maps[] = +static struct s3_reg_map s3_all_reg_maps[] = { - {score_rn_table, 31, NULL, N_("S+core register expected")}, - {score_srn_table, 2, NULL, N_("S+core special-register expected")}, - {score_crn_table, 31, NULL, N_("S+core co-processor register expected")}, + {s3_score_rn_table, 31, NULL, N_("S+core register expected")}, + {s3_score_srn_table, 2, NULL, N_("S+core special-register expected")}, + {s3_score_crn_table, 31, NULL, N_("S+core co-processor register expected")}, }; -static struct hash_control *score_ops_hsh = NULL; +static struct hash_control *s3_score_ops_hsh = NULL; +static struct hash_control *s3_dependency_insn_hsh = NULL; -static struct hash_control *dependency_insn_hsh = NULL; -/* Enumeration matching entries in table above. */ -enum score_reg_type +struct s3_datafield_range { - REG_TYPE_SCORE = 0, -#define REG_TYPE_FIRST REG_TYPE_SCORE - REG_TYPE_SCORE_SR = 1, - REG_TYPE_SCORE_CR = 2, - REG_TYPE_MAX = 3 + int data_type; + int bits; + int range[2]; }; -typedef struct literalS -{ - struct expressionS exp; - struct score_it *inst; -} -literalT; - -literalT literals[MAX_LITERAL_POOL_SIZE]; - -static void do_ldst_insn (char *); -static void do_crdcrscrsimm5 (char *); -static void do_ldst_unalign (char *); -static void do_ldst_atomic (char *); -static void do_ldst_cop (char *); -static void do_macro_li_rdi32 (char *); -static void do_macro_la_rdi32 (char *); -static void do_macro_rdi32hi (char *); -static void do_macro_rdi32lo (char *); -static void do_macro_mul_rdrsrs (char *); -static void do_macro_ldst_label (char *); -static void do_branch (char *); -static void do_jump (char *); -static void do_empty (char *); -static void do_rdrsrs (char *); -static void do_rdsi16 (char *); -static void do_rdrssi14 (char *); -static void do_sub_rdsi16 (char *); -static void do_sub_rdrssi14 (char *); -static void do_rdrsi5 (char *); -static void do_rdrsi14 (char *); -static void do_rdi16 (char *); -static void do_xrsi5 (char *); -static void do_rdrs (char *); -static void do_rdxrs (char *); -static void do_rsrs (char *); -static void do_rdcrs (char *); -static void do_rdsrs (char *); -static void do_rd (char *); -static void do_rs (char *); -static void do_i15 (char *); -static void do_xi5x (char *); -static void do_ceinst (char *); -static void do_cache (char *); -static void do16_rdrs (char *); -static void do16_rs (char *); -static void do16_xrs (char *); -static void do16_mv_rdrs (char *); -static void do16_hrdrs (char *); -static void do16_rdhrs (char *); -static void do16_rdi4 (char *); -static void do16_rdi5 (char *); -static void do16_xi5 (char *); -static void do16_ldst_insn (char *); -static void do16_ldst_imm_insn (char *); -static void do16_push_pop (char *); -static void do16_branch (char *); -static void do16_jump (char *); -static void do_rdi16_pic (char *); -static void do_addi_s_pic (char *); -static void do_addi_u_pic (char *); -static void do_lw_pic (char *); - -static const struct asm_opcode score_ldst_insns[] = -{ - {"lw", 0x20000000, 0x3e000000, 0x2008, Rd_rvalueRs_SI15, do_ldst_insn}, - {"lw", 0x06000000, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, do_ldst_insn}, - {"lw", 0x0e000000, 0x3e000007, 0x200a, Rd_rvalueRs_postSI12, do_ldst_insn}, - {"lh", 0x22000000, 0x3e000000, 0x2009, Rd_rvalueRs_SI15, do_ldst_insn}, - {"lh", 0x06000001, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, do_ldst_insn}, - {"lh", 0x0e000001, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, do_ldst_insn}, - {"lhu", 0x24000000, 0x3e000000, 0x8000, Rd_rvalueRs_SI15, do_ldst_insn}, - {"lhu", 0x06000002, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, do_ldst_insn}, - {"lhu", 0x0e000002, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, do_ldst_insn}, - {"lb", 0x26000000, 0x3e000000, 0x8000, Rd_rvalueRs_SI15, do_ldst_insn}, - {"lb", 0x06000003, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, do_ldst_insn}, - {"lb", 0x0e000003, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, do_ldst_insn}, - {"sw", 0x28000000, 0x3e000000, 0x200c, Rd_lvalueRs_SI15, do_ldst_insn}, - {"sw", 0x06000004, 0x3e000007, 0x200e, Rd_lvalueRs_preSI12, do_ldst_insn}, - {"sw", 0x0e000004, 0x3e000007, 0x8000, Rd_lvalueRs_postSI12, do_ldst_insn}, - {"sh", 0x2a000000, 0x3e000000, 0x200d, Rd_lvalueRs_SI15, do_ldst_insn}, - {"sh", 0x06000005, 0x3e000007, 0x8000, Rd_lvalueRs_preSI12, do_ldst_insn}, - {"sh", 0x0e000005, 0x3e000007, 0x8000, Rd_lvalueRs_postSI12, do_ldst_insn}, - {"lbu", 0x2c000000, 0x3e000000, 0x200b, Rd_rvalueRs_SI15, do_ldst_insn}, - {"lbu", 0x06000006, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, do_ldst_insn}, - {"lbu", 0x0e000006, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, do_ldst_insn}, - {"sb", 0x2e000000, 0x3e000000, 0x200f, Rd_lvalueRs_SI15, do_ldst_insn}, - {"sb", 0x06000007, 0x3e000007, 0x8000, Rd_lvalueRs_preSI12, do_ldst_insn}, - {"sb", 0x0e000007, 0x3e000007, 0x8000, Rd_lvalueRs_postSI12, do_ldst_insn}, +static struct s3_datafield_range s3_score_df_range[] = +{ + {_IMM4, 4, {0, (1 << 4) - 1}}, /* ( 0 ~ 15 ) */ + {_IMM5, 5, {0, (1 << 5) - 1}}, /* ( 0 ~ 31 ) */ + {_IMM8, 8, {0, (1 << 8) - 1}}, /* ( 0 ~ 255 ) */ + {_IMM14, 14, {0, (1 << 14) - 1}}, /* ( 0 ~ 16383) */ + {_IMM15, 15, {0, (1 << 15) - 1}}, /* ( 0 ~ 32767) */ + {_IMM16, 16, {0, (1 << 16) - 1}}, /* ( 0 ~ 65535) */ + {_SIMM10, 10, {-(1 << 9), (1 << 9) - 1}}, /* ( -512 ~ 511 ) */ + {_SIMM12, 12, {-(1 << 11), (1 << 11) - 1}}, /* ( -2048 ~ 2047 ) */ + {_SIMM14, 14, {-(1 << 13), (1 << 13) - 1}}, /* ( -8192 ~ 8191 ) */ + {_SIMM15, 15, {-(1 << 14), (1 << 14) - 1}}, /* (-16384 ~ 16383) */ + {_SIMM16, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */ + {_SIMM14_NEG, 14, {-(1 << 13), (1 << 13) - 1}}, /* ( -8191 ~ 8192 ) */ + {_IMM16_NEG, 16, {0, (1 << 16) - 1}}, /* (-65535 ~ 0 ) */ + {_SIMM16_NEG, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */ + {_IMM20, 20, {0, (1 << 20) - 1}}, + {_IMM25, 25, {0, (1 << 25) - 1}}, + {_DISP8div2, 8, {-(1 << 8), (1 << 8) - 1}}, /* ( -256 ~ 255 ) */ + {_DISP11div2, 11, {0, 0}}, + {_DISP19div2, 19, {-(1 << 19), (1 << 19) - 1}}, /* (-524288 ~ 524287) */ + {_DISP24div2, 24, {0, 0}}, + {_VALUE, 32, {0, ((unsigned int)1 << 31) - 1}}, + {_VALUE_HI16, 16, {0, (1 << 16) - 1}}, + {_VALUE_LO16, 16, {0, (1 << 16) - 1}}, + {_VALUE_LDST_LO16, 16, {0, (1 << 16) - 1}}, + {_SIMM16_LA, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */ + {_IMM5_RSHIFT_1, 5, {0, (1 << 6) - 1}}, /* ( 0 ~ 63 ) */ + {_IMM5_RSHIFT_2, 5, {0, (1 << 7) - 1}}, /* ( 0 ~ 127 ) */ + {_SIMM16_LA_POS, 16, {0, (1 << 15) - 1}}, /* ( 0 ~ 32767) */ + {_IMM5_RANGE_8_31, 5, {8, 31}}, /* But for cop0 the valid data : (8 ~ 31). */ + {_IMM10_RSHIFT_2, 10, {-(1 << 11), (1 << 11) - 1}}, /* For ldc#, stc#. */ + {_SIMM10, 10, {0, (1 << 10) - 1}}, /* ( -1024 ~ 1023 ) */ + {_SIMM12, 12, {0, (1 << 12) - 1}}, /* ( -2048 ~ 2047 ) */ + {_SIMM14, 14, {0, (1 << 14) - 1}}, /* ( -8192 ~ 8191 ) */ + {_SIMM15, 15, {0, (1 << 15) - 1}}, /* (-16384 ~ 16383) */ + {_SIMM16, 16, {0, (1 << 16) - 1}}, /* (-65536 ~ 65536) */ + {_SIMM14_NEG, 14, {0, (1 << 16) - 1}}, /* ( -8191 ~ 8192 ) */ + {_IMM16_NEG, 16, {0, (1 << 16) - 1}}, /* ( 65535 ~ 0 ) */ + {_SIMM16_NEG, 16, {0, (1 << 16) - 1}}, /* ( 65535 ~ 0 ) */ + {_IMM20, 20, {0, (1 << 20) - 1}}, /* (-32768 ~ 32767) */ + {_IMM25, 25, {0, (1 << 25) - 1}}, /* (-32768 ~ 32767) */ + {_GP_IMM15, 15, {0, (1 << 15) - 1}}, /* ( 0 ~ 65535) */ + {_GP_IMM14, 14, {0, (1 << 14) - 1}}, /* ( 0 ~ 65535) */ + {_SIMM16_pic, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */ + {_IMM16_LO16_pic, 16, {0, (1 << 16) - 1}}, /* ( 65535 ~ 0 ) */ + {_IMM16_pic, 16, {0, (1 << 16) - 1}}, /* ( 0 ~ 65535) */ + {_SIMM5, 5, {-(1 << 4), (1 << 4) - 1}}, /* ( -16 ~ 15 ) */ + {_SIMM6, 6, {-(1 << 5), (1 << 5) - 1}}, /* ( -32 ~ 31 ) */ + {_IMM32, 32, {0, 0xfffffff}}, + {_SIMM32, 32, {-0x80000000, 0x7fffffff}}, + {_IMM11, 11, {0, (1 << 11) - 1}}, }; -static const struct asm_opcode score_insns[] = -{ - {"abs", 0x3800000a, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"abs.s", 0x3800004b, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"add", 0x00000010, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"add.c", 0x00000011, 0x3e0003ff, 0x2000, Rd_Rs_Rs, do_rdrsrs}, - {"add.s", 0x38000048, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"addc", 0x00000012, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"addc.c", 0x00000013, 0x3e0003ff, 0x0009, Rd_Rs_Rs, do_rdrsrs}, - {"addi", 0x02000000, 0x3e0e0001, 0x8000, Rd_SI16, do_rdsi16}, - {"addi.c", 0x02000001, 0x3e0e0001, 0x8000, Rd_SI16, do_rdsi16}, - {"addis", 0x0a000000, 0x3e0e0001, 0x8000, Rd_SI16, do_rdi16}, - {"addis.c", 0x0a000001, 0x3e0e0001, 0x8000, Rd_SI16, do_rdi16}, - {"addri", 0x10000000, 0x3e000001, 0x8000, Rd_Rs_SI14, do_rdrssi14}, - {"addri.c", 0x10000001, 0x3e000001, 0x8000, Rd_Rs_SI14, do_rdrssi14}, - {"addc!", 0x0009, 0x700f, 0x00000013, Rd_Rs, do16_rdrs}, - {"add!", 0x2000, 0x700f, 0x00000011, Rd_Rs, do16_rdrs}, - {"addei!", 0x6000 , 0x7087, 0x02000001, Rd_I4, do16_rdi4}, - {"subi", 0x02000000, 0x3e0e0001, 0x8000, Rd_SI16, do_sub_rdsi16}, - {"subi.c", 0x02000001, 0x3e0e0001, 0x8000, Rd_SI16, do_sub_rdsi16}, - {"subri", 0x10000000, 0x3e000001, 0x8000, Rd_Rs_SI14, do_sub_rdrssi14}, - {"subri.c", 0x10000001, 0x3e000001, 0x8000, Rd_Rs_SI14, do_sub_rdrssi14}, - {"and", 0x00000020, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"and.c", 0x00000021, 0x3e0003ff, 0x2004, Rd_Rs_Rs, do_rdrsrs}, - {"andi", 0x02080000, 0x3e0e0001, 0x8000, Rd_I16, do_rdi16}, - {"andi.c", 0x02080001, 0x3e0e0001, 0x8000, Rd_I16, do_rdi16}, - {"andis", 0x0a080000, 0x3e0e0001, 0x8000, Rd_I16, do_rdi16}, - {"andis.c", 0x0a080001, 0x3e0e0001, 0x8000, Rd_I16, do_rdi16}, - {"andri", 0x18000000, 0x3e000001, 0x8000, Rd_Rs_I14, do_rdrsi14}, - {"andri.c", 0x18000001, 0x3e000001, 0x8000, Rd_Rs_I14, do_rdrsi14}, - {"and!", 0x2004, 0x700f, 0x00000021, Rd_Rs, do16_rdrs}, - {"bcs", 0x08000000, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"bcc", 0x08000400, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"bcnz", 0x08003800, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"bcsl", 0x08000001, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bccl", 0x08000401, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bcnzl", 0x08003801, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bcs!", 0x4000, 0x7f00, 0x08000000, PC_DISP8div2, do16_branch}, - {"bcc!", 0x4100, 0x7f00, 0x08000400, PC_DISP8div2, do16_branch}, - {"bcnz!", 0x4e00, 0x7f00, 0x08003800, PC_DISP8div2, do16_branch}, - {"beq", 0x08001000, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"beql", 0x08001001, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"beq!", 0x4400, 0x7f00, 0x08001000, PC_DISP8div2, do16_branch}, - {"bgtu", 0x08000800, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"bgt", 0x08001800, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"bge", 0x08002000, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"bgtul", 0x08000801, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bgtl", 0x08001801, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bgel", 0x08002001, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bgtu!", 0x4200, 0x7f00, 0x08000800, PC_DISP8div2, do16_branch}, - {"bgt!", 0x4600, 0x7f00, 0x08001800, PC_DISP8div2, do16_branch}, - {"bge!", 0x4800, 0x7f00, 0x08002000, PC_DISP8div2, do16_branch}, - {"bitclr.c", 0x00000029, 0x3e0003ff, 0x6004, Rd_Rs_I5, do_rdrsi5}, - {"bitrev", 0x3800000c, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"bitset.c", 0x0000002b, 0x3e0003ff, 0x6005, Rd_Rs_I5, do_rdrsi5}, - {"bittst.c", 0x0000002d, 0x3e0003ff, 0x6006, x_Rs_I5, do_xrsi5}, - {"bittgl.c", 0x0000002f, 0x3e0003ff, 0x6007, Rd_Rs_I5, do_rdrsi5}, - {"bitclr!", 0x6004, 0x7007, 0x00000029, Rd_I5, do16_rdi5}, - {"bitset!", 0x6005, 0x7007, 0x0000002b, Rd_I5, do16_rdi5}, - {"bittst!", 0x6006, 0x7007, 0x0000002d, Rd_I5, do16_rdi5}, - {"bittgl!", 0x6007, 0x7007, 0x0000002f, Rd_I5, do16_rdi5}, - {"bleu", 0x08000c00, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"ble", 0x08001c00, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"blt", 0x08002400, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"bleul", 0x08000c01, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"blel", 0x08001c01, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bltl", 0x08002401, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bl", 0x08003c01, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bleu!", 0x4300, 0x7f00, 0x08000c00, PC_DISP8div2, do16_branch}, - {"ble!", 0x4700, 0x7f00, 0x08001c00, PC_DISP8div2, do16_branch}, - {"blt!", 0x4900, 0x7f00, 0x08002400, PC_DISP8div2, do16_branch}, - {"bmi", 0x08002800, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"bmil", 0x08002801, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bmi!", 0x00004a00, 0x00007f00, 0x08002800, PC_DISP8div2, do16_branch}, - {"bne", 0x08001400, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"bnel", 0x08001401, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bne!", 0x4500, 0x7f00, 0x08001400, PC_DISP8div2, do16_branch}, - {"bpl", 0x08002c00, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"bpll", 0x08002c01, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bpl!", 0x4b00, 0x7f00, 0x08002c00, PC_DISP8div2, do16_branch}, - {"brcs", 0x00000008, 0x3e007fff, 0x0004, x_Rs_x, do_rs}, - {"brcc", 0x00000408, 0x3e007fff, 0x0104, x_Rs_x, do_rs}, - {"brgtu", 0x00000808, 0x3e007fff, 0x0204, x_Rs_x, do_rs}, - {"brleu", 0x00000c08, 0x3e007fff, 0x0304, x_Rs_x, do_rs}, - {"breq", 0x00001008, 0x3e007fff, 0x0404, x_Rs_x, do_rs}, - {"brne", 0x00001408, 0x3e007fff, 0x0504, x_Rs_x, do_rs}, - {"brgt", 0x00001808, 0x3e007fff, 0x0604, x_Rs_x, do_rs}, - {"brle", 0x00001c08, 0x3e007fff, 0x0704, x_Rs_x, do_rs}, - {"brge", 0x00002008, 0x3e007fff, 0x0804, x_Rs_x, do_rs}, - {"brlt", 0x00002408, 0x3e007fff, 0x0904, x_Rs_x, do_rs}, - {"brmi", 0x00002808, 0x3e007fff, 0x0a04, x_Rs_x, do_rs}, - {"brpl", 0x00002c08, 0x3e007fff, 0x0b04, x_Rs_x, do_rs}, - {"brvs", 0x00003008, 0x3e007fff, 0x0c04, x_Rs_x, do_rs}, - {"brvc", 0x00003408, 0x3e007fff, 0x0d04, x_Rs_x, do_rs}, - {"brcnz", 0x00003808, 0x3e007fff, 0x0e04, x_Rs_x, do_rs}, - {"br", 0x00003c08, 0x3e007fff, 0x0f04, x_Rs_x, do_rs}, - {"brcsl", 0x00000009, 0x3e007fff, 0x000c, x_Rs_x, do_rs}, - {"brccl", 0x00000409, 0x3e007fff, 0x010c, x_Rs_x, do_rs}, - {"brgtul", 0x00000809, 0x3e007fff, 0x020c, x_Rs_x, do_rs}, - {"brleul", 0x00000c09, 0x3e007fff, 0x030c, x_Rs_x, do_rs}, - {"breql", 0x00001009, 0x3e007fff, 0x040c, x_Rs_x, do_rs}, - {"brnel", 0x00001409, 0x3e007fff, 0x050c, x_Rs_x, do_rs}, - {"brgtl", 0x00001809, 0x3e007fff, 0x060c, x_Rs_x, do_rs}, - {"brlel", 0x00001c09, 0x3e007fff, 0x070c, x_Rs_x, do_rs}, - {"brgel", 0x00002009, 0x3e007fff, 0x080c, x_Rs_x, do_rs}, - {"brltl", 0x00002409, 0x3e007fff, 0x090c, x_Rs_x, do_rs}, - {"brmil", 0x00002809, 0x3e007fff, 0x0a0c, x_Rs_x, do_rs}, - {"brpll", 0x00002c09, 0x3e007fff, 0x0b0c, x_Rs_x, do_rs}, - {"brvsl", 0x00003009, 0x3e007fff, 0x0c0c, x_Rs_x, do_rs}, - {"brvcl", 0x00003409, 0x3e007fff, 0x0d0c, x_Rs_x, do_rs}, - {"brcnzl", 0x00003809, 0x3e007fff, 0x0e0c, x_Rs_x, do_rs}, - {"brl", 0x00003c09, 0x3e007fff, 0x0f0c, x_Rs_x, do_rs}, - {"brcs!", 0x0004, 0x7f0f, 0x00000008, x_Rs, do16_xrs}, - {"brcc!", 0x0104, 0x7f0f, 0x00000408, x_Rs, do16_xrs}, - {"brgtu!", 0x0204, 0x7f0f, 0x00000808, x_Rs, do16_xrs}, - {"brleu!", 0x0304, 0x7f0f, 0x00000c08, x_Rs, do16_xrs}, - {"breq!", 0x0404, 0x7f0f, 0x00001008, x_Rs, do16_xrs}, - {"brne!", 0x0504, 0x7f0f, 0x00001408, x_Rs, do16_xrs}, - {"brgt!", 0x0604, 0x7f0f, 0x00001808, x_Rs, do16_xrs}, - {"brle!", 0x0704, 0x7f0f, 0x00001c08, x_Rs, do16_xrs}, - {"brge!", 0x0804, 0x7f0f, 0x00002008, x_Rs, do16_xrs}, - {"brlt!", 0x0904, 0x7f0f, 0x00002408, x_Rs, do16_xrs}, - {"brmi!", 0x0a04, 0x7f0f, 0x00002808, x_Rs, do16_xrs}, - {"brpl!", 0x0b04, 0x7f0f, 0x00002c08, x_Rs, do16_xrs}, - {"brvs!", 0x0c04, 0x7f0f, 0x00003008, x_Rs, do16_xrs}, - {"brvc!", 0x0d04, 0x7f0f, 0x00003408, x_Rs, do16_xrs}, - {"brcnz!", 0x0e04, 0x7f0f, 0x00003808, x_Rs, do16_xrs}, - {"br!", 0x0f04, 0x7f0f, 0x00003c08, x_Rs, do16_xrs}, - {"brcsl!", 0x000c, 0x7f0f, 0x00000009, x_Rs, do16_xrs}, - {"brccl!", 0x010c, 0x7f0f, 0x00000409, x_Rs, do16_xrs}, - {"brgtul!", 0x020c, 0x7f0f, 0x00000809, x_Rs, do16_xrs}, - {"brleul!", 0x030c, 0x7f0f, 0x00000c09, x_Rs, do16_xrs}, - {"breql!", 0x040c, 0x7f0f, 0x00001009, x_Rs, do16_xrs}, - {"brnel!", 0x050c, 0x7f0f, 0x00001409, x_Rs, do16_xrs}, - {"brgtl!", 0x060c, 0x7f0f, 0x00001809, x_Rs, do16_xrs}, - {"brlel!", 0x070c, 0x7f0f, 0x00001c09, x_Rs, do16_xrs}, - {"brgel!", 0x080c, 0x7f0f, 0x00002009, x_Rs, do16_xrs}, - {"brltl!", 0x090c, 0x7f0f, 0x00002409, x_Rs, do16_xrs}, - {"brmil!", 0x0a0c, 0x7f0f, 0x00002809, x_Rs, do16_xrs}, - {"brpll!", 0x0b0c, 0x7f0f, 0x00002c09, x_Rs, do16_xrs}, - {"brvsl!", 0x0c0c, 0x7f0f, 0x00003009, x_Rs, do16_xrs}, - {"brvcl!", 0x0d0c, 0x7f0f, 0x00003409, x_Rs, do16_xrs}, - {"brcnzl!", 0x0e0c, 0x7f0f, 0x00003809, x_Rs, do16_xrs}, - {"brl!", 0x0f0c, 0x7f0f, 0x00003c09, x_Rs, do16_xrs}, - {"bvs", 0x08003000, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"bvc", 0x08003400, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"bvsl", 0x08003001, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bvcl", 0x08003401, 0x3e007c01, 0x8000, PC_DISP19div2, do_branch}, - {"bvs!", 0x4c00, 0x7f00, 0x08003000, PC_DISP8div2, do16_branch}, - {"bvc!", 0x4d00, 0x7f00, 0x08003400, PC_DISP8div2, do16_branch}, - {"b!", 0x4f00, 0x7f00, 0x08003c00, PC_DISP8div2, do16_branch}, - {"b", 0x08003c00, 0x3e007c01, 0x4000, PC_DISP19div2, do_branch}, - {"cache", 0x30000000, 0x3ff00000, 0x8000, OP5_rvalueRs_SI15, do_cache}, - {"ceinst", 0x38000000, 0x3e000000, 0x8000, I5_Rs_Rs_I5_OP5, do_ceinst}, - {"clz", 0x3800000d, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"cmpteq.c", 0x00000019, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"cmptmi.c", 0x00100019, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"cmp.c", 0x00300019, 0x3ff003ff, 0x2003, x_Rs_Rs, do_rsrs}, - {"cmpzteq.c", 0x0000001b, 0x3ff07fff, 0x8000, x_Rs_x, do_rs}, - {"cmpztmi.c", 0x0010001b, 0x3ff07fff, 0x8000, x_Rs_x, do_rs}, - {"cmpz.c", 0x0030001b, 0x3ff07fff, 0x8000, x_Rs_x, do_rs}, - {"cmpi.c", 0x02040001, 0x3e0e0001, 0x8000, Rd_SI16, do_rdsi16}, - {"cmp!", 0x2003, 0x700f, 0x00300019, Rd_Rs, do16_rdrs}, - {"cop1", 0x0c00000c, 0x3e00001f, 0x8000, Rd_Rs_Rs_imm, do_crdcrscrsimm5}, - {"cop2", 0x0c000014, 0x3e00001f, 0x8000, Rd_Rs_Rs_imm, do_crdcrscrsimm5}, - {"cop3", 0x0c00001c, 0x3e00001f, 0x8000, Rd_Rs_Rs_imm, do_crdcrscrsimm5}, - {"drte", 0x0c0000a4, 0x3e0003ff, 0x8000, NO_OPD, do_empty}, - {"extsb", 0x00000058, 0x3e0003ff, 0x8000, Rd_Rs_x, do_rdrs}, - {"extsb.c", 0x00000059, 0x3e0003ff, 0x8000, Rd_Rs_x, do_rdrs}, - {"extsh", 0x0000005a, 0x3e0003ff, 0x8000, Rd_Rs_x, do_rdrs}, - {"extsh.c", 0x0000005b, 0x3e0003ff, 0x8000, Rd_Rs_x, do_rdrs}, - {"extzb", 0x0000005c, 0x3e0003ff, 0x8000, Rd_Rs_x, do_rdrs}, - {"extzb.c", 0x0000005d, 0x3e0003ff, 0x8000, Rd_Rs_x, do_rdrs}, - {"extzh", 0x0000005e, 0x3e0003ff, 0x8000, Rd_Rs_x, do_rdrs}, - {"extzh.c", 0x0000005f, 0x3e0003ff, 0x8000, Rd_Rs_x, do_rdrs}, - {"jl", 0x04000001, 0x3e000001, 0x8000, PC_DISP24div2, do_jump}, - {"jl!", 0x3001, 0x7001, 0x04000001, PC_DISP11div2, do16_jump}, - {"j!", 0x3000, 0x7001, 0x04000000, PC_DISP11div2, do16_jump}, - {"j", 0x04000000, 0x3e000001, 0x8000, PC_DISP24div2, do_jump}, - {"lbu!", 0x200b, 0x0000700f, 0x2c000000, Rd_rvalueRs, do16_ldst_insn}, - {"lbup!", 0x7003, 0x7007, 0x2c000000, Rd_rvalueBP_I5, do16_ldst_imm_insn}, - {"alw", 0x0000000c, 0x3e0003ff, 0x8000, Rd_rvalue32Rs, do_ldst_atomic}, - {"lcb", 0x00000060, 0x3e0003ff, 0x8000, x_rvalueRs_post4, do_ldst_unalign}, - {"lcw", 0x00000062, 0x3e0003ff, 0x8000, Rd_rvalueRs_post4, do_ldst_unalign}, - {"lce", 0x00000066, 0x3e0003ff, 0x8000, Rd_rvalueRs_post4, do_ldst_unalign}, - {"ldc1", 0x0c00000a, 0x3e00001f, 0x8000, Rd_rvalueRs_SI10, do_ldst_cop}, - {"ldc2", 0x0c000012, 0x3e00001f, 0x8000, Rd_rvalueRs_SI10, do_ldst_cop}, - {"ldc3", 0x0c00001a, 0x3e00001f, 0x8000, Rd_rvalueRs_SI10, do_ldst_cop}, - {"lh!", 0x2009, 0x700f, 0x22000000, Rd_rvalueRs, do16_ldst_insn}, - {"lhp!", 0x7001, 0x7007, 0x22000000, Rd_rvalueBP_I5, do16_ldst_imm_insn}, - {"ldi", 0x020c0000, 0x3e0e0000, 0x5000, Rd_SI16, do_rdsi16}, - {"ldis", 0x0a0c0000, 0x3e0e0000, 0x8000, Rd_I16, do_rdi16}, - {"ldiu!", 0x5000, 0x7000, 0x020c0000, Rd_I8, do16_ldst_imm_insn}, - {"lw!", 0x2008, 0x700f, 0x20000000, Rd_rvalueRs, do16_ldst_insn}, - {"lwp!", 0x7000, 0x7007, 0x20000000, Rd_rvalueBP_I5, do16_ldst_imm_insn}, - {"mfcel", 0x00000448, 0x3e007fff, 0x8000, Rd_x_x, do_rd}, - {"mfcel!", 0x1001, 0x7f0f, 0x00000448, x_Rs, do16_rs}, - {"mad", 0x38000000, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"mad.f!", 0x1004, 0x700f, 0x38000080, Rd_Rs, do16_rdrs}, - {"madh", 0x38000203, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"madh.fs", 0x380002c3, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"madh.fs!", 0x100b, 0x700f, 0x380002c3, Rd_Rs, do16_rdrs}, - {"madl", 0x38000002, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"madl.fs", 0x380000c2, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"madl.fs!", 0x100a, 0x700f, 0x380000c2, Rd_Rs, do16_rdrs}, - {"madu", 0x38000020, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"madu!", 0x1005, 0x700f, 0x38000020, Rd_Rs, do16_rdrs}, - {"mad.f", 0x38000080, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"max", 0x38000007, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"mazh", 0x38000303, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"mazh.f", 0x38000383, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"mazh.f!", 0x1009, 0x700f, 0x3800038c, Rd_Rs, do16_rdrs}, - {"mazl", 0x38000102, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"mazl.f", 0x38000182, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"mazl.f!", 0x1008, 0x700f, 0x38000182, Rd_Rs, do16_rdrs}, - {"mfceh", 0x00000848, 0x3e007fff, 0x8000, Rd_x_x, do_rd}, - {"mfceh!", 0x1101, 0x7f0f, 0x00000848, x_Rs, do16_rs}, - {"mfcehl", 0x00000c48, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mfsr", 0x00000050, 0x3e0003ff, 0x8000, Rd_x_I5, do_rdsrs}, - {"mfcr", 0x0c000001, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mfc1", 0x0c000009, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mfc2", 0x0c000011, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mfc3", 0x0c000019, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mfcc1", 0x0c00000f, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mfcc2", 0x0c000017, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mfcc3", 0x0c00001f, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mhfl!", 0x0002, 0x700f, 0x00003c56, Rd_LowRs, do16_hrdrs}, - {"min", 0x38000006, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"mlfh!", 0x0001, 0x700f, 0x00003c56, Rd_HighRs, do16_rdhrs}, - {"msb", 0x38000001, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"msb.f!", 0x1006, 0x700f, 0x38000081, Rd_Rs, do16_rdrs}, - {"msbh", 0x38000205, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"msbh.fs", 0x380002c5, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"msbh.fs!", 0x100f, 0x700f, 0x380002c5, Rd_Rs, do16_rdrs}, - {"msbl", 0x38000004, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"msbl.fs", 0x380000c4, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"msbl.fs!", 0x100e, 0x700f, 0x380000c4, Rd_Rs, do16_rdrs}, - {"msbu", 0x38000021, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"msbu!", 0x1007, 0x700f, 0x38000021, Rd_Rs, do16_rdrs}, - {"msb.f", 0x38000081, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"mszh", 0x38000305, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"mszh.f", 0x38000385, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"mszh.f!", 0x100d, 0x700f, 0x38000385, Rd_Rs, do16_rdrs}, - {"mszl", 0x38000104, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"mszl.f", 0x38000184, 0x3ff003ff, 0x8000, x_Rs_Rs, do_rsrs}, - {"mszl.f!", 0x100c, 0x700f, 0x38000184, Rd_Rs, do16_rdrs}, - {"mtcel!", 0x1000, 0x7f0f, 0x0000044a, x_Rs, do16_rs}, - {"mtcel", 0x0000044a, 0x3e007fff, 0x8000, Rd_x_x, do_rd}, - {"mtceh", 0x0000084a, 0x3e007fff, 0x8000, Rd_x_x, do_rd}, - {"mtceh!", 0x1100, 0x7f0f, 0x0000084a, x_Rs, do16_rs}, - {"mtcehl", 0x00000c4a, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mtsr", 0x00000052, 0x3e0003ff, 0x8000, x_Rs_I5, do_rdsrs}, - {"mtcr", 0x0c000000, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mtc1", 0x0c000008, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mtc2", 0x0c000010, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mtc3", 0x0c000018, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mtcc1", 0x0c00000e, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mtcc2", 0x0c000016, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mtcc3", 0x0c00001e, 0x3e00001f, 0x8000, Rd_Rs_x, do_rdcrs}, - {"mul.f!", 0x1002, 0x700f, 0x00000041, Rd_Rs, do16_rdrs}, - {"mulu!", 0x1003, 0x700f, 0x00000042, Rd_Rs, do16_rdrs}, - {"mvcs", 0x00000056, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mvcc", 0x00000456, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mvgtu", 0x00000856, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mvleu", 0x00000c56, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mveq", 0x00001056, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mvne", 0x00001456, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mvgt", 0x00001856, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mvle", 0x00001c56, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mvge", 0x00002056, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mvlt", 0x00002456, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mvmi", 0x00002856, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mvpl", 0x00002c56, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mvvs", 0x00003056, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mvvc", 0x00003456, 0x3e007fff, 0x8000, Rd_Rs_x, do_rdrs}, - {"mv", 0x00003c56, 0x3e007fff, 0x0003, Rd_Rs_x, do_rdrs}, - {"mv!", 0x0003, 0x700f, 0x00003c56, Rd_Rs, do16_mv_rdrs}, - {"neg", 0x0000001e, 0x3e0003ff, 0x8000, Rd_x_Rs, do_rdxrs}, - {"neg.c", 0x0000001f, 0x3e0003ff, 0x2002, Rd_x_Rs, do_rdxrs}, - {"neg!", 0x2002, 0x700f, 0x0000001f, Rd_Rs, do16_rdrs}, - {"nop", 0x00000000, 0x3e0003ff, 0x0000, NO_OPD, do_empty}, - {"not", 0x00000024, 0x3e0003ff, 0x8000, Rd_Rs_x, do_rdrs}, - {"not.c", 0x00000025, 0x3e0003ff, 0x2006, Rd_Rs_x, do_rdrs}, - {"nop!", 0x0000, 0x700f, 0x00000000, NO16_OPD, do_empty}, - {"not!", 0x2006, 0x700f, 0x00000025, Rd_Rs, do16_rdrs}, - {"or", 0x00000022, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"or.c", 0x00000023, 0x3e0003ff, 0x2005, Rd_Rs_Rs, do_rdrsrs}, - {"ori", 0x020a0000, 0x3e0e0001, 0x8000, Rd_I16, do_rdi16}, - {"ori.c", 0x020a0001, 0x3e0e0001, 0x8000, Rd_I16, do_rdi16}, - {"oris", 0x0a0a0000, 0x3e0e0001, 0x8000, Rd_I16, do_rdi16}, - {"oris.c", 0x0a0a0001, 0x3e0e0001, 0x8000, Rd_I16, do_rdi16}, - {"orri", 0x1a000000, 0x3e000001, 0x8000, Rd_Rs_I14, do_rdrsi14}, - {"orri.c", 0x1a000001, 0x3e000001, 0x8000, Rd_Rs_I14, do_rdrsi14}, - {"or!", 0x2005, 0x700f, 0x00000023, Rd_Rs, do16_rdrs}, - {"pflush", 0x0000000a, 0x3e0003ff, 0x8000, NO_OPD, do_empty}, - {"pop!", 0x200a, 0x700f, 0x0e000000, Rd_rvalueRs, do16_push_pop}, - {"push!", 0x200e, 0x700f, 0x06000004, Rd_lvalueRs, do16_push_pop}, - {"ror", 0x00000038, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"ror.c", 0x00000039, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"rorc.c", 0x0000003b, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"rol", 0x0000003c, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"rol.c", 0x0000003d, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"rolc.c", 0x0000003f, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"rori", 0x00000078, 0x3e0003ff, 0x8000, Rd_Rs_I5, do_rdrsi5}, - {"rori.c", 0x00000079, 0x3e0003ff, 0x8000, Rd_Rs_I5, do_rdrsi5}, - {"roric.c", 0x0000007b, 0x3e0003ff, 0x8000, Rd_Rs_I5, do_rdrsi5}, - {"roli", 0x0000007c, 0x3e0003ff, 0x8000, Rd_Rs_I5, do_rdrsi5}, - {"roli.c", 0x0000007d, 0x3e0003ff, 0x8000, Rd_Rs_I5, do_rdrsi5}, - {"rolic.c", 0x0000007f, 0x3e0003ff, 0x8000, Rd_Rs_I5, do_rdrsi5}, - {"rte", 0x0c000084, 0x3e0003ff, 0x8000, NO_OPD, do_empty}, - {"sb!", 0x200f, 0x700f, 0x2e000000, Rd_lvalueRs, do16_ldst_insn}, - {"sbp!", 0x7007, 0x7007, 0x2e000000, Rd_lvalueBP_I5, do16_ldst_imm_insn}, - {"asw", 0x0000000e, 0x3e0003ff, 0x8000, Rd_lvalue32Rs, do_ldst_atomic}, - {"scb", 0x00000068, 0x3e0003ff, 0x8000, Rd_lvalueRs_post4, do_ldst_unalign}, - {"scw", 0x0000006a, 0x3e0003ff, 0x8000, Rd_lvalueRs_post4, do_ldst_unalign}, - {"sce", 0x0000006e, 0x3e0003ff, 0x8000, x_lvalueRs_post4, do_ldst_unalign}, - {"sdbbp", 0x00000006, 0x3e0003ff, 0x6002, x_I5_x, do_xi5x}, - {"sdbbp!", 0x6002, 0x7007, 0x00000006, Rd_I5, do16_xi5}, - {"sh!", 0x200d, 0x700f, 0x2a000000, Rd_lvalueRs, do16_ldst_insn}, - {"shp!", 0x7005, 0x7007, 0x2a000000, Rd_lvalueBP_I5, do16_ldst_imm_insn}, - {"sleep", 0x0c0000c4, 0x3e0003ff, 0x8000, NO_OPD, do_empty}, - {"sll", 0x00000030, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"sll.c", 0x00000031, 0x3e0003ff, 0x0008, Rd_Rs_Rs, do_rdrsrs}, - {"sll.s", 0x3800004e, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"slli", 0x00000070, 0x3e0003ff, 0x8000, Rd_Rs_I5, do_rdrsi5}, - {"slli.c", 0x00000071, 0x3e0003ff, 0x6001, Rd_Rs_I5, do_rdrsi5}, - {"sll!", 0x0008, 0x700f, 0x00000031, Rd_Rs, do16_rdrs}, - {"slli!", 0x6001, 0x7007, 0x00000071, Rd_I5, do16_rdi5}, - {"srl", 0x00000034, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"srl.c", 0x00000035, 0x3e0003ff, 0x000a, Rd_Rs_Rs, do_rdrsrs}, - {"sra", 0x00000036, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"sra.c", 0x00000037, 0x3e0003ff, 0x000b, Rd_Rs_Rs, do_rdrsrs}, - {"srli", 0x00000074, 0x3e0003ff, 0x8000, Rd_Rs_I5, do_rdrsi5}, - {"srli.c", 0x00000075, 0x3e0003ff, 0x6003, Rd_Rs_I5, do_rdrsi5}, - {"srai", 0x00000076, 0x3e0003ff, 0x8000, Rd_Rs_I5, do_rdrsi5}, - {"srai.c", 0x00000077, 0x3e0003ff, 0x8000, Rd_Rs_I5, do_rdrsi5}, - {"srl!", 0x000a, 0x700f, 0x00000035, Rd_Rs, do16_rdrs}, - {"sra!", 0x000b, 0x700f, 0x00000037, Rd_Rs, do16_rdrs}, - {"srli!", 0x6003, 0x7007, 0x00000075, Rd_Rs, do16_rdi5}, - {"stc1", 0x0c00000b, 0x3e00001f, 0x8000, Rd_lvalueRs_SI10, do_ldst_cop}, - {"stc2", 0x0c000013, 0x3e00001f, 0x8000, Rd_lvalueRs_SI10, do_ldst_cop}, - {"stc3", 0x0c00001b, 0x3e00001f, 0x8000, Rd_lvalueRs_SI10, do_ldst_cop}, - {"sub", 0x00000014, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"sub.c", 0x00000015, 0x3e0003ff, 0x2001, Rd_Rs_Rs, do_rdrsrs}, - {"sub.s", 0x38000049, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"subc", 0x00000016, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"subc.c", 0x00000017, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"sub!", 0x2001, 0x700f, 0x00000015, Rd_Rs, do16_rdrs}, - {"subei!", 0x6080, 0x7087, 0x02000001, Rd_I4, do16_rdi4}, - {"sw!", 0x200c, 0x700f, 0x28000000, Rd_lvalueRs, do16_ldst_insn}, - {"swp!", 0x7004, 0x7007, 0x28000000, Rd_lvalueBP_I5, do16_ldst_imm_insn}, - {"syscall", 0x00000002, 0x3e0003ff, 0x8000, I15, do_i15}, - {"tcs", 0x00000054, 0x3e007fff, 0x0005, NO_OPD, do_empty}, - {"tcc", 0x00000454, 0x3e007fff, 0x0105, NO_OPD, do_empty}, - {"tcnz", 0x00003854, 0x3e007fff, 0x0e05, NO_OPD, do_empty}, - {"tcs!", 0x0005, 0x7f0f, 0x00000054, NO16_OPD, do_empty}, - {"tcc!", 0x0105, 0x7f0f, 0x00000454, NO16_OPD, do_empty}, - {"tcnz!", 0x0e05, 0x7f0f, 0x00003854, NO16_OPD, do_empty}, - {"teq", 0x00001054, 0x3e007fff, 0x0405, NO_OPD, do_empty}, - {"teq!", 0x0405, 0x7f0f, 0x00001054, NO16_OPD, do_empty}, - {"tgtu", 0x00000854, 0x3e007fff, 0x0205, NO_OPD, do_empty}, - {"tgt", 0x00001854, 0x3e007fff, 0x0605, NO_OPD, do_empty}, - {"tge", 0x00002054, 0x3e007fff, 0x0805, NO_OPD, do_empty}, - {"tgtu!", 0x0205, 0x7f0f, 0x00000854, NO16_OPD, do_empty}, - {"tgt!", 0x0605, 0x7f0f, 0x00001854, NO16_OPD, do_empty}, - {"tge!", 0x0805, 0x7f0f, 0x00002054, NO16_OPD, do_empty}, - {"tleu", 0x00000c54, 0x3e007fff, 0x0305, NO_OPD, do_empty}, - {"tle", 0x00001c54, 0x3e007fff, 0x0705, NO_OPD, do_empty}, - {"tlt", 0x00002454, 0x3e007fff, 0x0905, NO_OPD, do_empty}, - {"stlb", 0x0c000004, 0x3e0003ff, 0x8000, NO_OPD, do_empty}, - {"mftlb", 0x0c000024, 0x3e0003ff, 0x8000, NO_OPD, do_empty}, - {"mtptlb", 0x0c000044, 0x3e0003ff, 0x8000, NO_OPD, do_empty}, - {"mtrtlb", 0x0c000064, 0x3e0003ff, 0x8000, NO_OPD, do_empty}, - {"tleu!", 0x0305, 0x7f0f, 0x00000c54, NO16_OPD, do_empty}, - {"tle!", 0x0705, 0x7f0f, 0x00001c54, NO16_OPD, do_empty}, - {"tlt!", 0x0905, 0x7f0f, 0x00002454, NO16_OPD, do_empty}, - {"tmi", 0x00002854, 0x3e007fff, 0x0a05, NO_OPD, do_empty}, - {"tmi!", 0x0a05, 0x7f0f, 0x00002854, NO16_OPD, do_empty}, - {"tne", 0x00001454, 0x3e007fff, 0x0505, NO_OPD, do_empty}, - {"tne!", 0x0505, 0x7f0f, 0x00001454, NO16_OPD, do_empty}, - {"tpl", 0x00002c54, 0x3e007fff, 0x0b05, NO_OPD, do_empty}, - {"tpl!", 0x0b05, 0x7f0f, 0x00002c54, NO16_OPD, do_empty}, - {"trapcs", 0x00000004, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"trapcc", 0x00000404, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"trapgtu", 0x00000804, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"trapleu", 0x00000c04, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"trapeq", 0x00001004, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"trapne", 0x00001404, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"trapgt", 0x00001804, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"traple", 0x00001c04, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"trapge", 0x00002004, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"traplt", 0x00002404, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"trapmi", 0x00002804, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"trappl", 0x00002c04, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"trapvs", 0x00003004, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"trapvc", 0x00003404, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"trap", 0x00003c04, 0x3e007fff, 0x8000, x_I5_x, do_xi5x}, - {"tset", 0x00003c54, 0x3e007fff, 0x0f05, NO_OPD, do_empty}, - {"tset!", 0x0f05, 0x00007f0f, 0x00003c54, NO16_OPD, do_empty}, - {"tvs", 0x00003054, 0x3e007fff, 0x0c05, NO_OPD, do_empty}, - {"tvc", 0x00003454, 0x3e007fff, 0x0d05, NO_OPD, do_empty}, - {"tvs!", 0x0c05, 0x7f0f, 0x00003054, NO16_OPD, do_empty}, - {"tvc!", 0x0d05, 0x7f0f, 0x00003454, NO16_OPD, do_empty}, - {"xor", 0x00000026, 0x3e0003ff, 0x8000, Rd_Rs_Rs, do_rdrsrs}, - {"xor.c", 0x00000027, 0x3e0003ff, 0x2007, Rd_Rs_Rs, do_rdrsrs}, - {"xor!", 0x2007, 0x700f, 0x00000027, Rd_Rs, do16_rdrs}, +struct s3_asm_opcode +{ + /* Instruction name. */ + const char *template; + + /* Instruction Opcode. */ + bfd_vma value; + + /* Instruction bit mask. */ + bfd_vma bitmask; + + /* Relax instruction opcode. 0x8000 imply no relaxation. */ + bfd_vma relax_value; + + /* Instruction type. */ + enum score_insn_type type; + + /* Function to call to parse args. */ + void (*parms) (char *); +}; + +static const struct s3_asm_opcode s3_score_ldst_insns[] = +{ + {"lw", 0x20000000, 0x3e000000, 0x1000, Rd_rvalueRs_SI15, s3_do_ldst_insn}, + {"lw", 0x06000000, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s3_do_ldst_insn}, + {"lw", 0x0e000000, 0x3e000007, 0x0040, Rd_rvalueRs_postSI12, s3_do_ldst_insn}, + {"lh", 0x22000000, 0x3e000000, 0x8000, Rd_rvalueRs_SI15, s3_do_ldst_insn}, + {"lh", 0x06000001, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s3_do_ldst_insn}, + {"lh", 0x0e000001, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, s3_do_ldst_insn}, + {"lhu", 0x24000000, 0x3e000000, 0x8000, Rd_rvalueRs_SI15, s3_do_ldst_insn}, + {"lhu", 0x06000002, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s3_do_ldst_insn}, + {"lhu", 0x0e000002, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, s3_do_ldst_insn}, + {"lb", 0x26000000, 0x3e000000, 0x8000, Rd_rvalueRs_SI15, s3_do_ldst_insn}, + {"lb", 0x06000003, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s3_do_ldst_insn}, + {"lb", 0x0e000003, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, s3_do_ldst_insn}, + {"sw", 0x28000000, 0x3e000000, 0x2000, Rd_lvalueRs_SI15, s3_do_ldst_insn}, + {"sw", 0x06000004, 0x3e000007, 0x0060, Rd_lvalueRs_preSI12, s3_do_ldst_insn}, + {"sw", 0x0e000004, 0x3e000007, 0x8000, Rd_lvalueRs_postSI12, s3_do_ldst_insn}, + {"sh", 0x2a000000, 0x3e000000, 0x8000, Rd_lvalueRs_SI15, s3_do_ldst_insn}, + {"sh", 0x06000005, 0x3e000007, 0x8000, Rd_lvalueRs_preSI12, s3_do_ldst_insn}, + {"sh", 0x0e000005, 0x3e000007, 0x8000, Rd_lvalueRs_postSI12, s3_do_ldst_insn}, + {"lbu", 0x2c000000, 0x3e000000, 0x8000, Rd_rvalueRs_SI15, s3_do_ldst_insn}, + {"lbu", 0x06000006, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s3_do_ldst_insn}, + {"lbu", 0x0e000006, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, s3_do_ldst_insn}, + {"sb", 0x2e000000, 0x3e000000, 0x8000, Rd_lvalueRs_SI15, s3_do_ldst_insn}, + {"sb", 0x06000007, 0x3e000007, 0x8000, Rd_lvalueRs_preSI12, s3_do_ldst_insn}, + {"sb", 0x0e000007, 0x3e000007, 0x8000, Rd_lvalueRs_postSI12, s3_do_ldst_insn}, +}; + +static const struct s3_asm_opcode s3_score_insns[] = +{ + {"abs", 0x3800000a, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_dsp3}, + {"abs.s", 0x3800004b, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_dsp3}, + {"add", 0x00000010, 0x3e0003ff, 0x4800, Rd_Rs_Rs, s3_do_rdrsrs}, + {"add.c", 0x00000011, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"add.s", 0x38000048, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_dsp2}, + {"addc", 0x00000012, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"addc.c", 0x00000013, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"addi", 0x02000000, 0x3e0e0001, 0x5c00, Rd_SI16, s3_do_rdsi16}, + {"addi.c", 0x02000001, 0x3e0e0001, 0x8000, Rd_SI16, s3_do_rdsi16}, + {"addis", 0x0a000000, 0x3e0e0001, 0x8000, Rd_SI16, s3_do_rdi16}, + {"addis.c", 0x0a000001, 0x3e0e0001, 0x8000, Rd_SI16, s3_do_rdi16}, + {"addi!", 0x5c00, 0x7c00, 0x8000, Rd_SI6, s3_do16_addi}, + {"addri", 0x10000000, 0x3e000001, 0x8000, Rd_Rs_SI14, s3_do_rdrssi14}, + {"addri.c", 0x10000001, 0x3e000001, 0x8000, Rd_Rs_SI14, s3_do_rdrssi14}, + + /* add.c <-> add!. */ + {"add!", 0x4800, 0x7f00, 0x8000, Rd_Rs, s3_do16_rdrs2}, + {"subi", 0x02000000, 0x3e0e0001, 0x8000, Rd_SI16, s3_do_sub_rdsi16}, + {"subi.c", 0x02000001, 0x3e0e0001, 0x8000, Rd_SI16, s3_do_sub_rdsi16}, + {"subis", 0x0a000000, 0x3e0e0001, 0x8000, Rd_SI16, s3_do_sub_rdi16}, + {"subis.c", 0x0a000001, 0x3e0e0001, 0x8000, Rd_SI16, s3_do_sub_rdi16}, + {"subri", 0x10000000, 0x3e000001, 0x8000, Rd_Rs_SI14, s3_do_sub_rdrssi14}, + {"subri.c", 0x10000001, 0x3e000001, 0x8000, Rd_Rs_SI14, s3_do_sub_rdrssi14}, + {"and", 0x00000020, 0x3e0003ff, 0x4b00, Rd_Rs_Rs, s3_do_rdrsrs}, + {"and.c", 0x00000021, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"andi", 0x02080000, 0x3e0e0001, 0x8000, Rd_I16, s3_do_rdi16}, + {"andi.c", 0x02080001, 0x3e0e0001, 0x8000, Rd_I16, s3_do_rdi16}, + {"andis", 0x0a080000, 0x3e0e0001, 0x8000, Rd_I16, s3_do_rdi16}, + {"andis.c", 0x0a080001, 0x3e0e0001, 0x8000, Rd_I16, s3_do_rdi16}, + {"andri", 0x18000000, 0x3e000001, 0x8000, Rd_Rs_I14, s3_do_rdrsi14}, + {"andri.c", 0x18000001, 0x3e000001, 0x8000, Rd_Rs_I14, s3_do_rdrsi14}, + + /* and.c <-> and!. */ + {"and!", 0x4b00, 0x7f00, 0x8000, Rd_Rs, s3_do16_rdrs2}, + {"bcs", 0x08000000, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bcc", 0x08000400, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bcnz", 0x08003800, 0x3e007c01, 0x3200, PC_DISP19div2, s3_do_branch}, + {"bcsl", 0x08000001, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bccl", 0x08000401, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bcnzl", 0x08003801, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bcnz!", 0x3200, 0x7f00, 0x08003800, PC_DISP8div2, s3_do16_branch}, + {"beq", 0x08001000, 0x3e007c01, 0x3800, PC_DISP19div2, s3_do_branch}, + {"beql", 0x08001001, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"beq!", 0x3800, 0x7e00, 0x08001000, PC_DISP8div2, s3_do16_branch}, + {"bgtu", 0x08000800, 0x3e007c01, 0x3400, PC_DISP19div2, s3_do_branch}, + {"bgt", 0x08001800, 0x3e007c01, 0x3c00, PC_DISP19div2, s3_do_branch}, + {"bge", 0x08002000, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bgtul", 0x08000801, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bgtl", 0x08001801, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bgel", 0x08002001, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bgtu!", 0x3400, 0x7e00, 0x08000800, PC_DISP8div2, s3_do16_branch}, + {"bgt!", 0x3c00, 0x7e00, 0x08001800, PC_DISP8div2, s3_do16_branch}, + {"bitclr", 0x00000028, 0x3e0003ff, 0x5000, Rd_Rs_I5, s3_do_rdrsi5}, + {"bitclr.c", 0x00000029, 0x3e0003ff, 0x8000, Rd_Rs_I5, s3_do_rdrsi5}, + + {"mbitclr", 0x00000064, 0x3e00007e, 0x8000, Ra_I9_I5, s3_do_mbitclr}, + {"mbitset", 0x0000006c, 0x3e00007e, 0x8000, Ra_I9_I5, s3_do_mbitset}, + + {"bitrev", 0x3800000c, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_dsp2}, + {"bitset", 0x0000002a, 0x3e0003ff, 0x5200, Rd_Rs_I5, s3_do_rdrsi5}, + {"bitset.c", 0x0000002b, 0x3e0003ff, 0x8000, Rd_Rs_I5, s3_do_rdrsi5}, + {"bittst.c", 0x0000002d, 0x3e0003ff, 0x5400, x_Rs_I5, s3_do_xrsi5}, + {"bittgl", 0x0000002e, 0x3e0003ff, 0x5600, Rd_Rs_I5, s3_do_rdrsi5}, + {"bittgl.c", 0x0000002f, 0x3e0003ff, 0x8000, Rd_Rs_I5, s3_do_rdrsi5}, + {"bitclr!", 0x5000, 0x7e00, 0x8000, Rd_I5, s3_do16_rdi5}, + {"bitset!", 0x5200, 0x7e00, 0x8000, Rd_I5, s3_do16_rdi5}, + {"bittst!", 0x5400, 0x7e00, 0x8000, Rd_I5, s3_do16_rdi5}, + {"bittgl!", 0x5600, 0x7e00, 0x8000, Rd_I5, s3_do16_rdi5}, + {"bleu", 0x08000c00, 0x3e007c01, 0x3600, PC_DISP19div2, s3_do_branch}, + {"ble", 0x08001c00, 0x3e007c01, 0x3e00, PC_DISP19div2, s3_do_branch}, + {"blt", 0x08002400, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bleul", 0x08000c01, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"blel", 0x08001c01, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bltl", 0x08002401, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bl", 0x08003c01, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bleu!", 0x3600, 0x7e00, 0x08000c00, PC_DISP8div2, s3_do16_branch}, + {"ble!", 0x3e00, 0x7e00, 0x08001c00, PC_DISP8div2, s3_do16_branch}, + {"bmi", 0x08002800, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bmil", 0x08002801, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bne", 0x08001400, 0x3e007c01, 0x3a00, PC_DISP19div2, s3_do_branch}, + {"bnel", 0x08001401, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bne!", 0x3a00, 0x7e00, 0x08001400, PC_DISP8div2, s3_do16_branch}, + {"bpl", 0x08002c00, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bpll", 0x08002c01, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"brcs", 0x00000008, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brcc", 0x00000408, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brgtu", 0x00000808, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brleu", 0x00000c08, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"breq", 0x00001008, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brne", 0x00001408, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brgt", 0x00001808, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brle", 0x00001c08, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brge", 0x00002008, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brlt", 0x00002408, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brmi", 0x00002808, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brpl", 0x00002c08, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brvs", 0x00003008, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brvc", 0x00003408, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brcnz", 0x00003808, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"br", 0x00003c08, 0x3e007fff, 0x0080, x_Rs_x, s3_do_rs}, + {"brcsl", 0x00000009, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brccl", 0x00000409, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brgtul", 0x00000809, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brleul", 0x00000c09, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"breql", 0x00001009, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brnel", 0x00001409, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brgtl", 0x00001809, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brlel", 0x00001c09, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brgel", 0x00002009, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brltl", 0x00002409, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brmil", 0x00002809, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brpll", 0x00002c09, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brvsl", 0x00003009, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brvcl", 0x00003409, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brcnzl", 0x00003809, 0x3e007fff, 0x8000, x_Rs_x, s3_do_rs}, + {"brl", 0x00003c09, 0x3e007fff, 0x00a0, x_Rs_x, s3_do_rs}, + {"br!", 0x0080, 0x7fe0, 0x8000, x_Rs, s3_do16_br}, + {"brl!", 0x00a0, 0x7fe0, 0x8000, x_Rs, s3_do16_br}, + {"brr!", 0x00c0, 0x7fe0, 0x8000, x_Rs, s3_do16_brr}, + {"bvs", 0x08003000, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bvc", 0x08003400, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bvsl", 0x08003001, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"bvcl", 0x08003401, 0x3e007c01, 0x8000, PC_DISP19div2, s3_do_branch}, + {"b!", 0x3000, 0x7e00, 0x08003c00, PC_DISP8div2, s3_do16_branch}, + {"b", 0x08003c00, 0x3e007c01, 0x3000, PC_DISP19div2, s3_do_branch}, + {"cache", 0x30000000, 0x3ff00000, 0x8000, OP5_rvalueRs_SI15, s3_do_cache}, + {"ceinst", 0x38000000, 0x3e000000, 0x8000, I5_Rs_Rs_I5_OP5, s3_do_ceinst}, + {"clz", 0x0000001c, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"cmp.c", 0x00300019, 0x3ff003ff, 0x4400, x_Rs_Rs, s3_do_rsrs}, + {"cmpz.c", 0x0030001b, 0x3ff07fff, 0x8000, x_Rs_x, s3_do_rs}, + {"cmpi.c", 0x02040001, 0x3e0e0001, 0x6000, Rd_SI16, s3_do_rdsi16}, + + /* cmp.c <-> cmp!. */ + {"cmp!", 0x4400, 0x7c00, 0x8000, Rd_Rs, s3_do16_mv_cmp}, + {"cmpi!", 0x6000, 0x7c00, 0x8000, Rd_SI5, s3_do16_cmpi}, + {"cop1", 0x0c00000c, 0x3e00001f, 0x8000, Rd_Rs_Rs_imm, s3_do_crdcrscrsimm5}, + {"cop2", 0x0c000014, 0x3e00001f, 0x8000, Rd_Rs_Rs_imm, s3_do_crdcrscrsimm5}, + {"cop3", 0x0c00001c, 0x3e00001f, 0x8000, Rd_Rs_Rs_imm, s3_do_crdcrscrsimm5}, + {"drte", 0x0c0000a4, 0x3e0003ff, 0x8000, NO_OPD, s3_do_empty}, + {"disint!", 0x00e0, 0xffe1, 0x8000, NO16_OPD, s3_do16_int}, + {"enint!", 0x00e1, 0xffe1, 0x8000, NO16_OPD, s3_do16_int}, + {"extsb", 0x00000058, 0x3e0003ff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"extsb.c", 0x00000059, 0x3e0003ff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"extsh", 0x0000005a, 0x3e0003ff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"extsh.c", 0x0000005b, 0x3e0003ff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"extzb", 0x0000005c, 0x3e0003ff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"extzb.c", 0x0000005d, 0x3e0003ff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"extzh", 0x0000005e, 0x3e0003ff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"extzh.c", 0x0000005f, 0x3e0003ff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"jl", 0x04000001, 0x3e000001, 0x8000, PC_DISP24div2, s3_do_jump}, + {"j", 0x04000000, 0x3e000001, 0x8000, PC_DISP24div2, s3_do_jump}, + {"alw", 0x0000000c, 0x3e0003ff, 0x8000, Rd_rvalue32Rs, s3_do_ldst_atomic}, + {"lcb", 0x00000060, 0x3e0003ff, 0x8000, x_rvalueRs_post4, s3_do_ldst_unalign}, + {"lcw", 0x00000062, 0x3e0003ff, 0x8000, Rd_rvalueRs_post4, s3_do_ldst_unalign}, + {"lce", 0x00000066, 0x3e0003ff, 0x8000, Rd_rvalueRs_post4, s3_do_ldst_unalign}, + {"ldc1", 0x0c00000a, 0x3e00001f, 0x8000, Rd_rvalueRs_SI10, s3_do_ldst_cop}, + {"ldc2", 0x0c000012, 0x3e00001f, 0x8000, Rd_rvalueRs_SI10, s3_do_ldst_cop}, + {"ldc3", 0x0c00001a, 0x3e00001f, 0x8000, Rd_rvalueRs_SI10, s3_do_ldst_cop}, + + /* s3_inst.relax */ + {"ldi", 0x020c0000, 0x3e0e0000, 0x6400, Rd_SI16, s3_do_rdsi16}, + {"ldis", 0x0a0c0000, 0x3e0e0000, 0x8000, Rd_I16, s3_do_ldis}, + + /* ldi <-> ldiu!. */ + {"ldiu!", 0x6400, 0x7c00, 0x8000, Rd_I5, s3_do16_ldiu}, + + /*ltbb! , ltbh! ltbw! */ + {"ltbw", 0x00000032, 0x03ff, 0x8000, Rd_Rs_Rs, s3_do_ltb}, + {"ltbh", 0x00000132, 0x03ff, 0x8000, Rd_Rs_Rs, s3_do_ltb}, + {"ltbb", 0x00000332, 0x03ff, 0x8000, Rd_Rs_Rs, s3_do_ltb}, + {"lw!", 0x1000, 0x7000, 0x8000, Rd_rvalueRs, s3_do16_ldst_insn}, + {"mfcel", 0x00000448, 0x3e007fff, 0x8000, Rd_x_x, s3_do_rd}, + {"mfcel!", 0x7100, 0x7ff0, 0x00000448, x_Rs, s3_do16_dsp}, + {"mad", 0x38000000, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"mad.f!", 0x7400, 0x7f00, 0x38000080, Rd_Rs, s3_do16_dsp2}, + {"madh", 0x38000203, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"madh.fs", 0x380002c3, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"madh.fs!", 0x7b00, 0x7f00, 0x380002c3, Rd_Rs, s3_do16_dsp2}, + {"madl", 0x38000002, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"madl.fs", 0x380000c2, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"madl.fs!", 0x7a00, 0x7f00, 0x380000c2, Rd_Rs, s3_do16_dsp2}, + {"madu", 0x38000020, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"madu!", 0x7500, 0x7f00, 0x38000020, Rd_Rs, s3_do16_dsp2}, + {"mad.f", 0x38000080, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"max", 0x38000007, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_dsp2}, + {"mazh", 0x38000303, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"mazh.f", 0x38000383, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"mazh.f!", 0x7900, 0x7f00, 0x3800038c, Rd_Rs, s3_do16_dsp2}, + {"mazl", 0x38000102, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"mazl.f", 0x38000182, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"mazl.f!", 0x7800, 0x7f00, 0x38000182, Rd_Rs, s3_do16_dsp2}, + {"mfceh", 0x00000848, 0x3e007fff, 0x8000, Rd_x_x, s3_do_rd}, + {"mfceh!", 0x7110, 0x7ff0, 0x00000848, x_Rs, s3_do16_dsp}, + {"mfcehl", 0x00000c48, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mfsr", 0x00000050, 0x3e0003ff, 0x8000, Rd_x_I5, s3_do_rdsrs}, + {"mfcr", 0x0c000001, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"mfc1", 0x0c000009, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"mfc2", 0x0c000011, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"mfc3", 0x0c000019, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"mfcc1", 0x0c00000f, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"mfcc2", 0x0c000017, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"mfcc3", 0x0c00001f, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"min", 0x38000006, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_dsp2}, + {"msb", 0x38000001, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"msb.f!", 0x7600, 0x7f00, 0x38000081, Rd_Rs, s3_do16_dsp2}, + {"msbh", 0x38000205, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"msbh.fs", 0x380002c5, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"msbh.fs!", 0x7f00, 0x7f00, 0x380002c5, Rd_Rs, s3_do16_dsp2}, + {"msbl", 0x38000004, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"msbl.fs", 0x380000c4, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"msbl.fs!", 0x7e00, 0x7f00, 0x380000c4, Rd_Rs, s3_do16_dsp2}, + {"msbu", 0x38000021, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"msbu!", 0x7700, 0x7f00, 0x38000021, Rd_Rs, s3_do16_dsp2}, + {"msb.f", 0x38000081, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"mszh", 0x38000305, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"mszh.f", 0x38000385, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"mszh.f!", 0x7d00, 0x7f00, 0x38000385, Rd_Rs, s3_do16_dsp2}, + {"mszl", 0x38000104, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"mszl.f", 0x38000184, 0x3ff003ff, 0x8000, x_Rs_Rs, s3_do_dsp}, + {"mszl.f!", 0x7c00, 0x7f00, 0x38000184, Rd_Rs, s3_do16_dsp2}, + {"mtcel!", 0x7000, 0x7ff0, 0x0000044a, x_Rs, s3_do16_dsp}, + {"mtcel", 0x0000044a, 0x3e007fff, 0x8000, Rd_x_x, s3_do_rd}, + {"mtceh", 0x0000084a, 0x3e007fff, 0x8000, Rd_x_x, s3_do_rd}, + {"mtceh!", 0x7010, 0x7ff0, 0x0000084a, x_Rs, s3_do16_dsp}, + {"mtcehl", 0x00000c4a, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mtsr", 0x00000052, 0x3e0003ff, 0x8000, x_Rs_I5, s3_do_rdsrs}, + {"mtcr", 0x0c000000, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"mtc1", 0x0c000008, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"mtc2", 0x0c000010, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"mtc3", 0x0c000018, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"mtcc1", 0x0c00000e, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"mtcc2", 0x0c000016, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"mtcc3", 0x0c00001e, 0x3e00001f, 0x8000, Rd_Rs_x, s3_do_rdcrs}, + {"mul.f!", 0x7200, 0x7f00, 0x00000041, Rd_Rs, s3_do16_dsp2}, + {"mulu!", 0x7300, 0x7f00, 0x00000042, Rd_Rs, s3_do16_dsp2}, + {"mulr.l", 0x00000140, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"mulr.h", 0x00000240, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"mulr", 0x00000340, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"mulr.lf", 0x00000141, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"mulr.hf", 0x00000241, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"mulr.f", 0x00000341, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"mulur.l", 0x00000142, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"mulur.h", 0x00000242, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"mulur", 0x00000342, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"divr.q", 0x00000144, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"divr.r", 0x00000244, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"divr", 0x00000344, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"divur.q", 0x00000146, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"divur.r", 0x00000246, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"divur", 0x00000346, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_rdrsrs}, + {"mvcs", 0x00000056, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mvcc", 0x00000456, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mvgtu", 0x00000856, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mvleu", 0x00000c56, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mveq", 0x00001056, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mvne", 0x00001456, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mvgt", 0x00001856, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mvle", 0x00001c56, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mvge", 0x00002056, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mvlt", 0x00002456, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mvmi", 0x00002856, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mvpl", 0x00002c56, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mvvs", 0x00003056, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"mvvc", 0x00003456, 0x3e007fff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + + /* mv <-> mv!. */ + {"mv", 0x00003c56, 0x3e007fff, 0x4000, Rd_Rs_x, s3_do_rdrs}, + {"mv!", 0x4000, 0x7c00, 0x8000, Rd_Rs, s3_do16_mv_cmp}, + {"neg", 0x0000001e, 0x3e0003ff, 0x8000, Rd_x_Rs, s3_do_rdxrs}, + {"neg.c", 0x0000001f, 0x3e0003ff, 0x8000, Rd_x_Rs, s3_do_rdxrs}, + {"nop", 0x00000000, 0x3e0003ff, 0x0000, NO_OPD, s3_do_empty}, + {"not", 0x00000024, 0x3e0003ff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"not.c", 0x00000025, 0x3e0003ff, 0x8000, Rd_Rs_x, s3_do_rdrs}, + {"nop!", 0x0000, 0x7fff, 0x8000, NO16_OPD, s3_do_empty}, + {"or", 0x00000022, 0x3e0003ff, 0x4a00, Rd_Rs_Rs, s3_do_rdrsrs}, + {"or.c", 0x00000023, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"ori", 0x020a0000, 0x3e0e0001, 0x8000, Rd_I16, s3_do_rdi16}, + {"ori.c", 0x020a0001, 0x3e0e0001, 0x8000, Rd_I16, s3_do_rdi16}, + {"oris", 0x0a0a0000, 0x3e0e0001, 0x8000, Rd_I16, s3_do_rdi16}, + {"oris.c", 0x0a0a0001, 0x3e0e0001, 0x8000, Rd_I16, s3_do_rdi16}, + {"orri", 0x1a000000, 0x3e000001, 0x8000, Rd_Rs_I14, s3_do_rdrsi14}, + {"orri.c", 0x1a000001, 0x3e000001, 0x8000, Rd_Rs_I14, s3_do_rdrsi14}, + + /* or.c <-> or!. */ + {"or!", 0x4a00, 0x7f00, 0x8000, Rd_Rs, s3_do16_rdrs2}, + {"pflush", 0x0000000a, 0x3e0003ff, 0x8000, NO_OPD, s3_do_empty}, + {"pop!", 0x0040, 0x7fe0, 0x8000, Rd_rvalueRs, s3_do16_push_pop}, + {"push!", 0x0060, 0x7fe0, 0x8000, Rd_lvalueRs, s3_do16_push_pop}, + + {"rpop!", 0x6800, 0x7c00, 0x8000, Rd_I5, s3_do16_rpop}, + {"rpush!", 0x6c00, 0x7c00, 0x8000, Rd_I5, s3_do16_rpush}, + + {"ror", 0x00000038, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"ror.c", 0x00000039, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"rorc.c", 0x0000003b, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"rol", 0x0000003c, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"rol.c", 0x0000003d, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"rolc.c", 0x0000003f, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"rori", 0x00000078, 0x3e0003ff, 0x8000, Rd_Rs_I5, s3_do_rdrsi5}, + {"rori.c", 0x00000079, 0x3e0003ff, 0x8000, Rd_Rs_I5, s3_do_rdrsi5}, + {"roric.c", 0x0000007b, 0x3e0003ff, 0x8000, Rd_Rs_I5, s3_do_rdrsi5}, + {"roli", 0x0000007c, 0x3e0003ff, 0x8000, Rd_Rs_I5, s3_do_rdrsi5}, + {"roli.c", 0x0000007d, 0x3e0003ff, 0x8000, Rd_Rs_I5, s3_do_rdrsi5}, + {"rolic.c", 0x0000007f, 0x3e0003ff, 0x8000, Rd_Rs_I5, s3_do_rdrsi5}, + {"rte", 0x0c000084, 0x3e0003ff, 0x8000, NO_OPD, s3_do_empty}, + {"asw", 0x0000000e, 0x3e0003ff, 0x8000, Rd_lvalue32Rs, s3_do_ldst_atomic}, + {"scb", 0x00000068, 0x3e0003ff, 0x8000, Rd_lvalueRs_post4, s3_do_ldst_unalign}, + {"scw", 0x0000006a, 0x3e0003ff, 0x8000, Rd_lvalueRs_post4, s3_do_ldst_unalign}, + {"sce", 0x0000006e, 0x3e0003ff, 0x8000, x_lvalueRs_post4, s3_do_ldst_unalign}, + {"sdbbp", 0x00000006, 0x3e0003ff, 0x0020, x_I5_x, s3_do_xi5x}, + {"sdbbp!", 0x0020, 0x7fe0, 0x8000, Rd_I5, s3_do16_xi5}, + {"sleep", 0x0c0000c4, 0x3e0003ff, 0x8000, NO_OPD, s3_do_empty}, + {"rti", 0x0c0000e4, 0x3e0003ff, 0x8000, NO_OPD, s3_do_empty}, + {"sll", 0x00000030, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"sll.c", 0x00000031, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"sll.s", 0x3800004e, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_dsp2}, + {"slli", 0x00000070, 0x3e0003ff, 0x5800, Rd_Rs_I5, s3_do_rdrsi5}, + {"slli.c", 0x00000071, 0x3e0003ff, 0x8000, Rd_Rs_I5, s3_do_rdrsi5}, + + /* slli.c <-> slli!. */ + {"slli!", 0x5800, 0x7e00, 0x8000, Rd_I5, s3_do16_slli_srli}, + {"srl", 0x00000034, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"srl.c", 0x00000035, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"sra", 0x00000036, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"sra.c", 0x00000037, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"srli", 0x00000074, 0x3e0003ff, 0x5a00, Rd_Rs_I5, s3_do_rdrsi5}, + {"srli.c", 0x00000075, 0x3e0003ff, 0x8000, Rd_Rs_I5, s3_do_rdrsi5}, + {"srai", 0x00000076, 0x3e0003ff, 0x8000, Rd_Rs_I5, s3_do_rdrsi5}, + {"srai.c", 0x00000077, 0x3e0003ff, 0x8000, Rd_Rs_I5, s3_do_rdrsi5}, + + /* srli.c <-> srli!. */ + {"srli!", 0x5a00, 0x7e00, 0x8000, Rd_Rs, s3_do16_slli_srli}, + {"stc1", 0x0c00000b, 0x3e00001f, 0x8000, Rd_lvalueRs_SI10, s3_do_ldst_cop}, + {"stc2", 0x0c000013, 0x3e00001f, 0x8000, Rd_lvalueRs_SI10, s3_do_ldst_cop}, + {"stc3", 0x0c00001b, 0x3e00001f, 0x8000, Rd_lvalueRs_SI10, s3_do_ldst_cop}, + {"sub", 0x00000014, 0x3e0003ff, 0x4900, Rd_Rs_Rs, s3_do_rdrsrs}, + {"sub.c", 0x00000015, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"sub.s", 0x38000049, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_dsp2}, + {"subc", 0x00000016, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"subc.c", 0x00000017, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + + /* sub.c <-> sub!. */ + {"sub!", 0x4900, 0x7f00, 0x8000, Rd_Rs, s3_do16_rdrs2}, + {"sw!", 0x2000, 0x7000, 0x8000, Rd_lvalueRs, s3_do16_ldst_insn}, + {"syscall", 0x00000002, 0x3e0003ff, 0x8000, I15, s3_do_i15}, + {"trapcs", 0x00000004, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"trapcc", 0x00000404, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"trapgtu", 0x00000804, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"trapleu", 0x00000c04, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"trapeq", 0x00001004, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"trapne", 0x00001404, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"trapgt", 0x00001804, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"traple", 0x00001c04, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"trapge", 0x00002004, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"traplt", 0x00002404, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"trapmi", 0x00002804, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"trappl", 0x00002c04, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"trapvs", 0x00003004, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"trapvc", 0x00003404, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"trap", 0x00003c04, 0x3e007fff, 0x8000, x_I5_x, s3_do_xi5x}, + {"xor", 0x00000026, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + {"xor.c", 0x00000027, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s3_do_rdrsrs}, + /* Macro instruction. */ - {"li", 0x020c0000, 0x3e0e0000, 0x8000, Insn_Type_SYN, do_macro_li_rdi32}, + {"li", 0x020c0000, 0x3e0e0000, 0x8000, Insn_Type_SYN, s3_do_macro_li_rdi32}, + /* la reg, imm32 -->(1) ldi reg, simm16 (2) ldis reg, %HI(imm32) ori reg, %LO(imm32) la reg, symbol -->(1) lis reg, %HI(imm32) ori reg, %LO(imm32) */ - {"la", 0x020c0000, 0x3e0e0000, 0x8000, Insn_Type_SYN, do_macro_la_rdi32}, - {"div", 0x00000044, 0x3e0003ff, 0x8000, Insn_Type_SYN, do_macro_mul_rdrsrs}, - {"divu", 0x00000046, 0x3e0003ff, 0x8000, Insn_Type_SYN, do_macro_mul_rdrsrs}, - {"rem", 0x00000044, 0x3e0003ff, 0x8000, Insn_Type_SYN, do_macro_mul_rdrsrs}, - {"remu", 0x00000046, 0x3e0003ff, 0x8000, Insn_Type_SYN, do_macro_mul_rdrsrs}, - {"mul", 0x00000040, 0x3e0003ff, 0x8000, Insn_Type_SYN, do_macro_mul_rdrsrs}, - {"mulu", 0x00000042, 0x3e0003ff, 0x8000, Insn_Type_SYN, do_macro_mul_rdrsrs}, - {"maz", 0x00000040, 0x3e0003ff, 0x8000, Insn_Type_SYN, do_macro_mul_rdrsrs}, - {"mazu", 0x00000042, 0x3e0003ff, 0x8000, Insn_Type_SYN, do_macro_mul_rdrsrs}, - {"mul.f", 0x00000041, 0x3e0003ff, 0x8000, Insn_Type_SYN, do_macro_mul_rdrsrs}, - {"maz.f", 0x00000041, 0x3e0003ff, 0x8000, Insn_Type_SYN, do_macro_mul_rdrsrs}, - {"lb", INSN_LB, 0x00000000, 0x8000, Insn_Type_SYN, do_macro_ldst_label}, - {"lbu", INSN_LBU, 0x00000000, 0x200b, Insn_Type_SYN, do_macro_ldst_label}, - {"lh", INSN_LH, 0x00000000, 0x2009, Insn_Type_SYN, do_macro_ldst_label}, - {"lhu", INSN_LHU, 0x00000000, 0x8000, Insn_Type_SYN, do_macro_ldst_label}, - {"lw", INSN_LW, 0x00000000, 0x2008, Insn_Type_SYN, do_macro_ldst_label}, - {"sb", INSN_SB, 0x00000000, 0x200f, Insn_Type_SYN, do_macro_ldst_label}, - {"sh", INSN_SH, 0x00000000, 0x200d, Insn_Type_SYN, do_macro_ldst_label}, - {"sw", INSN_SW, 0x00000000, 0x200c, Insn_Type_SYN, do_macro_ldst_label}, + {"la", 0x020c0000, 0x3e0e0000, 0x8000, Insn_Type_SYN, s3_do_macro_la_rdi32}, + {"bcmpeqz", 0x0000004c, 0x3e00007e, 0x8000, Insn_BCMP, s3_do_macro_bcmpz}, + {"bcmpeq", 0x0000004c, 0x3e00007e, 0x8000, Insn_BCMP, s3_do_macro_bcmp}, + {"bcmpnez", 0x0000004e, 0x3e00007e, 0x8000, Insn_BCMP, s3_do_macro_bcmpz}, + {"bcmpne", 0x0000004e, 0x3e00007e, 0x8000, Insn_BCMP, s3_do_macro_bcmp}, + {"div", 0x00000044, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_macro_mul_rdrsrs}, + {"divu", 0x00000046, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_macro_mul_rdrsrs}, + {"rem", 0x00000044, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_macro_mul_rdrsrs}, + {"remu", 0x00000046, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_macro_mul_rdrsrs}, + {"mul", 0x00000040, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_macro_mul_rdrsrs}, + {"mulu", 0x00000042, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_macro_mul_rdrsrs}, + {"maz", 0x00000040, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_macro_mul_rdrsrs}, + {"mazu", 0x00000042, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_macro_mul_rdrsrs}, + {"mul.f", 0x00000041, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_macro_mul_rdrsrs}, + {"maz.f", 0x00000041, 0x3e0003ff, 0x8000, Insn_Type_SYN, s3_do_macro_mul_rdrsrs}, + {"lb", INSN_LB, 0x00000000, 0x8000, Insn_Type_SYN, s3_do_macro_ldst_label}, + {"lbu", INSN_LBU, 0x00000000, 0x8000, Insn_Type_SYN, s3_do_macro_ldst_label}, + {"lh", INSN_LH, 0x00000000, 0x8000, Insn_Type_SYN, s3_do_macro_ldst_label}, + {"lhu", INSN_LHU, 0x00000000, 0x8000, Insn_Type_SYN, s3_do_macro_ldst_label}, + {"lw", INSN_LW, 0x00000000, 0x1000, Insn_Type_SYN, s3_do_macro_ldst_label}, + {"sb", INSN_SB, 0x00000000, 0x8000, Insn_Type_SYN, s3_do_macro_ldst_label}, + {"sh", INSN_SH, 0x00000000, 0x8000, Insn_Type_SYN, s3_do_macro_ldst_label}, + {"sw", INSN_SW, 0x00000000, 0x2000, Insn_Type_SYN, s3_do_macro_ldst_label}, + /* Assembler use internal. */ - {"ld_i32hi", 0x0a0c0000, 0x3e0e0000, 0x8000, Insn_internal, do_macro_rdi32hi}, - {"ld_i32lo", 0x020a0000, 0x3e0e0001, 0x8000, Insn_internal, do_macro_rdi32lo}, - {"ldis_pic", 0x0a0c0000, 0x3e0e0000, 0x5000, Insn_internal, do_rdi16_pic}, - {"addi_s_pic",0x02000000, 0x3e0e0001, 0x8000, Insn_internal, do_addi_s_pic}, - {"addi_u_pic",0x02000000, 0x3e0e0001, 0x8000, Insn_internal, do_addi_u_pic}, - {"lw_pic", 0x20000000, 0x3e000000, 0x8000, Insn_internal, do_lw_pic}, + {"ld_i32hi", 0x0a0c0000, 0x3e0e0000, 0x8000, Insn_internal, s3_do_macro_rdi32hi}, + {"ld_i32lo", 0x020a0000, 0x3e0e0001, 0x8000, Insn_internal, s3_do_macro_rdi32lo}, + {"ldis_pic", 0x0a0c0000, 0x3e0e0000, 0x8000, Insn_internal, s3_do_rdi16_pic}, + {"addi_s_pic",0x02000000, 0x3e0e0001, 0x8000, Insn_internal, s3_do_addi_s_pic}, + {"addi_u_pic",0x02000000, 0x3e0e0001, 0x8000, Insn_internal, s3_do_addi_u_pic}, + {"lw_pic", 0x20000000, 0x3e000000, 0x8000, Insn_internal, s3_do_lw_pic}, + + /* 48-bit instructions. */ + {"sdbbp48", 0x000000000000LL, 0x1c000000001fLL, 0x8000, Rd_I32, s3_do_sdbbp48}, + {"ldi48", 0x000000000001LL, 0x1c000000001fLL, 0x8000, Rd_I32, s3_do_ldi48}, + {"lw48", 0x000000000002LL, 0x1c000000001fLL, 0x8000, Rd_I30, s3_do_lw48}, + {"sw48", 0x000000000003LL, 0x1c000000001fLL, 0x8000, Rd_I30, s3_do_sw48}, + {"andri48", 0x040000000000LL, 0x1c0000000003LL, 0x8000, Rd_I32, s3_do_and48}, + {"andri48.c", 0x040000000001LL, 0x1c0000000003LL, 0x8000, Rd_I32, s3_do_and48}, + {"orri48", 0x040000000002LL, 0x1c0000000003LL, 0x8000, Rd_I32, s3_do_or48}, + {"orri48.c", 0x040000000003LL, 0x1c0000000003LL, 0x8000, Rd_I32, s3_do_or48}, }; -/* Next free entry in the pool. */ -int next_literal_pool_place = 0; +#define s3_SCORE3_PIPELINE 3 -/* Next literal pool number. */ -int lit_pool_num = 1; -symbolS *current_poolP = NULL; +static int s3_university_version = 0; +static int s3_vector_size = s3_SCORE3_PIPELINE; +static struct s3_score_it s3_dependency_vector[s3_SCORE3_PIPELINE]; +static int s3_score3d = 1; static int -end_of_line (char *str) +s3_end_of_line (char *str) { - int retval = SUCCESS; + int retval = s3_SUCCESS; - skip_whitespace (str); + s3_skip_whitespace (str); if (*str != '\0') { - retval = (int) FAIL; + retval = (int) s3_FAIL; - if (!inst.error) - inst.error = BAD_GARBAGE; + if (!s3_inst.error) + s3_inst.error = s3_BAD_GARBAGE; } return retval; } static int -score_reg_parse (char **ccp, struct hash_control *htab) +s3_score_reg_parse (char **ccp, struct hash_control *htab) { char *start = *ccp; char c; char *p; - struct reg_entry *reg; + struct s3_reg_entry *reg; p = start; if (!ISALPHA (*p) || !is_name_beginner (*p)) - return (int) FAIL; + return (int) s3_FAIL; c = *p++; @@ -824,7 +1045,7 @@ score_reg_parse (char **ccp, struct hash_control *htab) c = *p++; *--p = 0; - reg = (struct reg_entry *) hash_find (htab, start); + reg = (struct s3_reg_entry *) hash_find (htab, start); *p = c; if (reg) @@ -832,52 +1053,52 @@ score_reg_parse (char **ccp, struct hash_control *htab) *ccp = p; return reg->number; } - return (int) FAIL; + return (int) s3_FAIL; } /* If shift <= 0, only return reg. */ static int -reg_required_here (char **str, int shift, enum score_reg_type reg_type) +s3_reg_required_here (char **str, int shift, enum s3_score_reg_type reg_type) { - static char buff[MAX_LITERAL_POOL_SIZE]; - int reg = (int) FAIL; + static char buff[s3_MAX_LITERAL_POOL_SIZE]; + int reg = (int) s3_FAIL; char *start = *str; - if ((reg = score_reg_parse (str, all_reg_maps[reg_type].htab)) != (int) FAIL) + if ((reg = s3_score_reg_parse (str, s3_all_reg_maps[reg_type].htab)) != (int) s3_FAIL) { - if (reg_type == REG_TYPE_SCORE) + if (reg_type == s3_REG_TYPE_SCORE) { - if ((reg == 1) && (nor1 == 1) && (inst.bwarn == 0)) + if ((reg == 1) && (s3_nor1 == 1) && (s3_inst.bwarn == 0)) { as_warn (_("Using temp register(r1)")); - inst.bwarn = 1; + s3_inst.bwarn = 1; } } if (shift >= 0) { - if (reg_type == REG_TYPE_SCORE_CR) - strcpy (inst.reg, score_crn_table[reg].name); - else if (reg_type == REG_TYPE_SCORE_SR) - strcpy (inst.reg, score_srn_table[reg].name); + if (reg_type == s3_REG_TYPE_SCORE_CR) + strcpy (s3_inst.reg, s3_score_crn_table[reg].name); + else if (reg_type == s3_REG_TYPE_SCORE_SR) + strcpy (s3_inst.reg, s3_score_srn_table[reg].name); else - strcpy (inst.reg, ""); + strcpy (s3_inst.reg, ""); - inst.instruction |= reg << shift; + s3_inst.instruction |= (bfd_vma) reg << shift; } } else { *str = start; sprintf (buff, _("register expected, not '%.100s'"), start); - inst.error = buff; + s3_inst.error = buff; } return reg; } static int -skip_past_comma (char **str) +s3_skip_past_comma (char **str) { char *p = *str; char c; @@ -888,166 +1109,174 @@ skip_past_comma (char **str) p++; if (c == ',' && comma++) { - inst.error = BAD_SKIP_COMMA; - return (int) FAIL; + s3_inst.error = s3_BAD_SKIP_COMMA; + return (int) s3_FAIL; } } if ((c == '\0') || (comma == 0)) { - inst.error = BAD_SKIP_COMMA; - return (int) FAIL; + s3_inst.error = s3_BAD_SKIP_COMMA; + return (int) s3_FAIL; } *str = p; - return comma ? SUCCESS : (int) FAIL; + return comma ? s3_SUCCESS : (int) s3_FAIL; } static void -do_rdrsrs (char *str) +s3_do_rdrsrs (char *str) { - skip_whitespace (str); + int reg; + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || reg_required_here (&str, 15, REG_TYPE_SCORE) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || reg_required_here (&str, 10, REG_TYPE_SCORE) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if ((reg = s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE)) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 10, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) { return; } else { - if ((((inst.instruction >> 15) & 0x10) == 0) - && (((inst.instruction >> 10) & 0x10) == 0) - && (((inst.instruction >> 20) & 0x10) == 0) - && (inst.relax_inst != 0x8000) - && (((inst.instruction >> 20) & 0xf) == ((inst.instruction >> 15) & 0xf))) + /* Check mulr, mulur rd is even number. */ + if (((s3_inst.instruction & 0x3e0003ff) == 0x00000340 + || (s3_inst.instruction & 0x3e0003ff) == 0x00000342) + && (reg % 2)) + { + s3_inst.error = _("rd must be even number."); + return; + } + + if ((((s3_inst.instruction >> 15) & 0x10) == 0) + && (((s3_inst.instruction >> 10) & 0x10) == 0) + && (((s3_inst.instruction >> 20) & 0x10) == 0) + && (s3_inst.relax_inst != 0x8000) + && (((s3_inst.instruction >> 20) & 0xf) == ((s3_inst.instruction >> 15) & 0xf))) { - inst.relax_inst |= (((inst.instruction >> 10) & 0xf) << 4) - | (((inst.instruction >> 15) & 0xf) << 8); - inst.relax_size = 2; + s3_inst.relax_inst |= (((s3_inst.instruction >> 10) & 0xf) ) + | (((s3_inst.instruction >> 15) & 0xf) << 4); + s3_inst.relax_size = 2; } else { - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } } } static int -walk_no_bignums (symbolS * sp) +s3_walk_no_bignums (symbolS * sp) { if (symbol_get_value_expression (sp)->X_op == O_big) return 1; if (symbol_get_value_expression (sp)->X_add_symbol) - return (walk_no_bignums (symbol_get_value_expression (sp)->X_add_symbol) + return (s3_walk_no_bignums (symbol_get_value_expression (sp)->X_add_symbol) || (symbol_get_value_expression (sp)->X_op_symbol - && walk_no_bignums (symbol_get_value_expression (sp)->X_op_symbol))); + && s3_walk_no_bignums (symbol_get_value_expression (sp)->X_op_symbol))); return 0; } static int -my_get_expression (expressionS * ep, char **str) +s3_my_get_expression (expressionS * ep, char **str) { char *save_in; segT seg; save_in = input_line_pointer; input_line_pointer = *str; - in_my_get_expression = 1; + s3_in_my_get_expression = 1; seg = expression (ep); - in_my_get_expression = 0; + s3_in_my_get_expression = 0; if (ep->X_op == O_illegal) { *str = input_line_pointer; input_line_pointer = save_in; - inst.error = _("illegal expression"); - return (int) FAIL; + s3_inst.error = _("illegal expression"); + return (int) s3_FAIL; } /* Get rid of any bignums now, so that we don't generate an error for which we can't establish a line number later on. Big numbers are never valid in instructions, which is where this routine is always called. */ if (ep->X_op == O_big || (ep->X_add_symbol - && (walk_no_bignums (ep->X_add_symbol) - || (ep->X_op_symbol && walk_no_bignums (ep->X_op_symbol))))) + && (s3_walk_no_bignums (ep->X_add_symbol) + || (ep->X_op_symbol && s3_walk_no_bignums (ep->X_op_symbol))))) { - inst.error = _("invalid constant"); + s3_inst.error = _("invalid constant"); *str = input_line_pointer; input_line_pointer = save_in; - return (int) FAIL; + return (int) s3_FAIL; } if ((ep->X_add_symbol != NULL) - && (inst.type != PC_DISP19div2) - && (inst.type != PC_DISP8div2) - && (inst.type != PC_DISP24div2) - && (inst.type != PC_DISP11div2) - && (inst.type != Insn_Type_SYN) - && (inst.type != Rd_rvalueRs_SI15) - && (inst.type != Rd_lvalueRs_SI15) - && (inst.type != Insn_internal)) - { - inst.error = BAD_ARGS; + && (s3_inst.type != PC_DISP19div2) + && (s3_inst.type != PC_DISP8div2) + && (s3_inst.type != PC_DISP24div2) + && (s3_inst.type != PC_DISP11div2) + && (s3_inst.type != Insn_Type_SYN) + && (s3_inst.type != Rd_rvalueRs_SI15) + && (s3_inst.type != Rd_lvalueRs_SI15) + && (s3_inst.type != Insn_internal) + && (s3_inst.type != Rd_I30) + && (s3_inst.type != Rd_I32) + && (s3_inst.type != Insn_BCMP)) + { + s3_inst.error = s3_BAD_ARGS; *str = input_line_pointer; input_line_pointer = save_in; - return (int) FAIL; + return (int) s3_FAIL; } *str = input_line_pointer; input_line_pointer = save_in; - return SUCCESS; + return s3_SUCCESS; } /* Check if an immediate is valid. If so, convert it to the right format. */ - -static int -validate_immediate (int val, unsigned int data_type, int hex_p) +static bfd_signed_vma +s3_validate_immediate (bfd_signed_vma val, unsigned int data_type, int hex_p) { switch (data_type) { case _VALUE_HI16: { - int val_hi = ((val & 0xffff0000) >> 16); + bfd_signed_vma val_hi = ((val & 0xffff0000) >> 16); - if (score_df_range[data_type].range[0] <= val_hi - && val_hi <= score_df_range[data_type].range[1]) + if (s3_score_df_range[data_type].range[0] <= val_hi + && val_hi <= s3_score_df_range[data_type].range[1]) return val_hi; } break; case _VALUE_LO16: { - int val_lo = (val & 0xffff); + bfd_signed_vma val_lo = (val & 0xffff); - if (score_df_range[data_type].range[0] <= val_lo - && val_lo <= score_df_range[data_type].range[1]) + if (s3_score_df_range[data_type].range[0] <= val_lo + && val_lo <= s3_score_df_range[data_type].range[1]) return val_lo; } break; - case _VALUE: - return val; - break; - case _SIMM14: if (hex_p == 1) { if (!(val >= -0x2000 && val <= 0x3fff)) { - return (int) FAIL; + return (int) s3_FAIL; } } else { if (!(val >= -8192 && val <= 8191)) { - return (int) FAIL; + return (int) s3_FAIL; } } @@ -1059,14 +1288,14 @@ validate_immediate (int val, unsigned int data_type, int hex_p) { if (!(val >= -0x7fff && val <= 0xffff && val != 0x8000)) { - return (int) FAIL; + return (int) s3_FAIL; } } else { if (!(val >= -32767 && val <= 32768)) { - return (int) FAIL; + return (int) s3_FAIL; } } @@ -1074,37 +1303,62 @@ validate_immediate (int val, unsigned int data_type, int hex_p) return val; break; + case _IMM5_MULTI_LOAD: + if (val >= 2 && val <= 32) + { + if (val == 32) + { + val = 0; + } + return val; + } + else + { + return (int) s3_FAIL; + } + break; + + case _IMM32: + if (val >= 0 && val <= 0xffffffff) + { + return val; + } + else + { + return (int) s3_FAIL; + } + default: if (data_type == _SIMM14_NEG || data_type == _IMM16_NEG) val = -val; - if (score_df_range[data_type].range[0] <= val - && val <= score_df_range[data_type].range[1]) + if (s3_score_df_range[data_type].range[0] <= val + && val <= s3_score_df_range[data_type].range[1]) return val; break; } - return (int) FAIL; + return (int) s3_FAIL; } static int -data_op2 (char **str, int shift, enum score_data_type data_type) +s3_data_op2 (char **str, int shift, enum score_data_type data_type) { - int value; - char data_exp[MAX_LITERAL_POOL_SIZE]; + bfd_signed_vma value; + char data_exp[s3_MAX_LITERAL_POOL_SIZE]; char *dataptr; int cnt = 0; char *pp = NULL; - skip_whitespace (*str); - inst.error = NULL; + s3_skip_whitespace (*str); + s3_inst.error = NULL; dataptr = * str; /* Set hex_p to zero. */ int hex_p = 0; - while ((*dataptr != '\0') && (*dataptr != '|') && (cnt <= MAX_LITERAL_POOL_SIZE)) /* 0x7c = ='|' */ + while ((*dataptr != '\0') && (*dataptr != '|') && (cnt <= s3_MAX_LITERAL_POOL_SIZE)) /* 0x7c = ='|' */ { data_exp[cnt] = *dataptr; dataptr++; @@ -1116,18 +1370,18 @@ data_op2 (char **str, int shift, enum score_data_type data_type) if (*dataptr == '|') /* process PCE */ { - if (my_get_expression (&inst.reloc.exp, &pp) == (int) FAIL) - return (int) FAIL; - end_of_line (pp); - if (inst.error != 0) - return (int) FAIL; /* to ouptut_inst to printf out the error */ + if (s3_my_get_expression (&s3_inst.reloc.exp, &pp) == (int) s3_FAIL) + return (int) s3_FAIL; + s3_end_of_line (pp); + if (s3_inst.error != 0) + return (int) s3_FAIL; /* to ouptut_inst to printf out the error */ *str = dataptr; } else /* process 16 bit */ { - if (my_get_expression (&inst.reloc.exp, str) == (int) FAIL) + if (s3_my_get_expression (&s3_inst.reloc.exp, str) == (int) s3_FAIL) { - return (int) FAIL; + return (int) s3_FAIL; } dataptr = (char *)data_exp; @@ -1139,10 +1393,10 @@ data_op2 (char **str, int shift, enum score_data_type data_type) } dataptr = (char *)data_exp; - if ((dataptr != NULL) + if ((dataptr != NULL) && (((strstr (dataptr, "0x")) != NULL) || ((strstr (dataptr, "0X")) != NULL))) - { + { hex_p = 1; if ((data_type != _SIMM16_LA) && (data_type != _VALUE_HI16) @@ -1152,6 +1406,8 @@ data_op2 (char **str, int shift, enum score_data_type data_type) && (data_type != _IMM14) && (data_type != _IMM4) && (data_type != _IMM5) + && (data_type != _IMM5_MULTI_LOAD) + && (data_type != _IMM11) && (data_type != _IMM8) && (data_type != _IMM5_RSHIFT_1) && (data_type != _IMM5_RSHIFT_2) @@ -1159,70 +1415,76 @@ data_op2 (char **str, int shift, enum score_data_type data_type) && (data_type != _SIMM14_NEG) && (data_type != _SIMM16_NEG) && (data_type != _IMM10_RSHIFT_2) - && (data_type != _GP_IMM15)) + && (data_type != _GP_IMM15) + && (data_type != _SIMM5) + && (data_type != _SIMM6) + && (data_type != _IMM32) + && (data_type != _SIMM32)) { data_type += 24; } } - if ((inst.reloc.exp.X_add_number == 0) - && (inst.type != Insn_Type_SYN) - && (inst.type != Rd_rvalueRs_SI15) - && (inst.type != Rd_lvalueRs_SI15) - && (inst.type != Insn_internal) + if ((s3_inst.reloc.exp.X_add_number == 0) + && (s3_inst.type != Insn_Type_SYN) + && (s3_inst.type != Rd_rvalueRs_SI15) + && (s3_inst.type != Rd_lvalueRs_SI15) + && (s3_inst.type != Insn_internal) && (((*dataptr >= 'a') && (*dataptr <= 'z')) || ((*dataptr == '0') && (*(dataptr + 1) == 'x') && (*(dataptr + 2) != '0')) || ((*dataptr == '+') && (*(dataptr + 1) != '0')) || ((*dataptr == '-') && (*(dataptr + 1) != '0')))) { - inst.error = BAD_ARGS; - return (int) FAIL; + s3_inst.error = s3_BAD_ARGS; + return (int) s3_FAIL; } } - if ((inst.reloc.exp.X_add_symbol) + if ((s3_inst.reloc.exp.X_add_symbol) && ((data_type == _SIMM16) || (data_type == _SIMM16_NEG) || (data_type == _IMM16_NEG) || (data_type == _SIMM14) || (data_type == _SIMM14_NEG) || (data_type == _IMM5) + || (data_type == _IMM5_MULTI_LOAD) + || (data_type == _IMM11) || (data_type == _IMM14) || (data_type == _IMM20) || (data_type == _IMM16) || (data_type == _IMM15) || (data_type == _IMM4))) { - inst.error = BAD_ARGS; - return (int) FAIL; + s3_inst.error = s3_BAD_ARGS; + return (int) s3_FAIL; } - if (inst.reloc.exp.X_add_symbol) + if (s3_inst.reloc.exp.X_add_symbol) { switch (data_type) { case _SIMM16_LA: - return (int) FAIL; + return (int) s3_FAIL; case _VALUE_HI16: - inst.reloc.type = BFD_RELOC_HI16_S; - inst.reloc.pc_rel = 0; + s3_inst.reloc.type = BFD_RELOC_HI16_S; + s3_inst.reloc.pc_rel = 0; break; case _VALUE_LO16: - inst.reloc.type = BFD_RELOC_LO16; - inst.reloc.pc_rel = 0; + s3_inst.reloc.type = BFD_RELOC_LO16; + s3_inst.reloc.pc_rel = 0; break; case _GP_IMM15: - inst.reloc.type = BFD_RELOC_SCORE_GPREL15; - inst.reloc.pc_rel = 0; + s3_inst.reloc.type = BFD_RELOC_SCORE_GPREL15; + s3_inst.reloc.pc_rel = 0; break; case _SIMM16_pic: case _IMM16_LO16_pic: - inst.reloc.type = BFD_RELOC_SCORE_GOT_LO16; - inst.reloc.pc_rel = 0; + s3_inst.reloc.type = BFD_RELOC_SCORE_GOT_LO16; + s3_inst.reloc.pc_rel = 0; break; default: - inst.reloc.type = BFD_RELOC_32; - inst.reloc.pc_rel = 0; + s3_inst.reloc.type = BFD_RELOC_32; + s3_inst.reloc.pc_rel = 0; break; } } @@ -1230,533 +1492,591 @@ data_op2 (char **str, int shift, enum score_data_type data_type) { if (data_type == _IMM16_pic) { - inst.reloc.type = BFD_RELOC_SCORE_DUMMY_HI16; - inst.reloc.pc_rel = 0; + s3_inst.reloc.type = BFD_RELOC_SCORE_DUMMY_HI16; + s3_inst.reloc.pc_rel = 0; } - if (data_type == _SIMM16_LA && inst.reloc.exp.X_unsigned == 1) + if (data_type == _SIMM16_LA && s3_inst.reloc.exp.X_unsigned == 1) { - value = validate_immediate (inst.reloc.exp.X_add_number, _SIMM16_LA_POS, hex_p); - if (value == (int) FAIL) /* for advance to check if this is ldis */ - if ((inst.reloc.exp.X_add_number & 0xffff) == 0) + value = s3_validate_immediate (s3_inst.reloc.exp.X_add_number, _SIMM16_LA_POS, hex_p); + if (value == (int) s3_FAIL) /* for advance to check if this is ldis */ + if ((s3_inst.reloc.exp.X_add_number & 0xffff) == 0) { - inst.instruction |= 0x8000000; - inst.instruction |= ((inst.reloc.exp.X_add_number >> 16) << 1) & 0x1fffe; - return SUCCESS; + s3_inst.instruction |= 0x8000000; + s3_inst.instruction |= ((s3_inst.reloc.exp.X_add_number >> 16) << 1) & 0x1fffe; + return s3_SUCCESS; } } else { - value = validate_immediate (inst.reloc.exp.X_add_number, data_type, hex_p); + value = s3_validate_immediate (s3_inst.reloc.exp.X_add_number, data_type, hex_p); } - if (value == (int) FAIL) + if (value == (int) s3_FAIL) { - if ((data_type != _SIMM14_NEG) && (data_type != _SIMM16_NEG) && (data_type != _IMM16_NEG)) + if (data_type == _IMM32) + { + sprintf (s3_err_msg, + _("invalid constant: %d bit expression not in range %u..%u"), + s3_score_df_range[data_type].bits, + 0, (unsigned)0xffffffff); + } + else if (data_type == _IMM5_MULTI_LOAD) + { + sprintf (s3_err_msg, + _("invalid constant: %d bit expression not in range %u..%u"), + 5, 2, 32); + } + else if ((data_type != _SIMM14_NEG) && (data_type != _SIMM16_NEG) && (data_type != _IMM16_NEG)) { - sprintf (err_msg, + sprintf (s3_err_msg, _("invalid constant: %d bit expression not in range %d..%d"), - score_df_range[data_type].bits, - score_df_range[data_type].range[0], score_df_range[data_type].range[1]); + s3_score_df_range[data_type].bits, + s3_score_df_range[data_type].range[0], s3_score_df_range[data_type].range[1]); } else { - sprintf (err_msg, + sprintf (s3_err_msg, _("invalid constant: %d bit expression not in range %d..%d"), - score_df_range[data_type].bits, - -score_df_range[data_type].range[1], -score_df_range[data_type].range[0]); + s3_score_df_range[data_type].bits, + -s3_score_df_range[data_type].range[1], -s3_score_df_range[data_type].range[0]); } - inst.error = err_msg; - return (int) FAIL; + s3_inst.error = s3_err_msg; + return (int) s3_FAIL; } - if ((score_df_range[data_type].range[0] != 0) || (data_type == _IMM5_RANGE_8_31)) + if (((s3_score_df_range[data_type].range[0] != 0) || (data_type == _IMM5_RANGE_8_31)) + && data_type != _IMM5_MULTI_LOAD) { - value &= (1 << score_df_range[data_type].bits) - 1; + value &= (1 << s3_score_df_range[data_type].bits) - 1; } - inst.instruction |= value << shift; - } - - if ((inst.instruction & 0xf0000000) == 0x30000000) - { - if ((((inst.instruction >> 20) & 0x1F) != 0) - && (((inst.instruction >> 20) & 0x1F) != 1) - && (((inst.instruction >> 20) & 0x1F) != 2) - && (((inst.instruction >> 20) & 0x1F) != 3) - && (((inst.instruction >> 20) & 0x1F) != 4) - && (((inst.instruction >> 20) & 0x1F) != 8) - && (((inst.instruction >> 20) & 0x1F) != 9) - && (((inst.instruction >> 20) & 0x1F) != 0xa) - && (((inst.instruction >> 20) & 0x1F) != 0xb) - && (((inst.instruction >> 20) & 0x1F) != 0xc) - && (((inst.instruction >> 20) & 0x1F) != 0xd) - && (((inst.instruction >> 20) & 0x1F) != 0xe) - && (((inst.instruction >> 20) & 0x1F) != 0x10) - && (((inst.instruction >> 20) & 0x1F) != 0x11) - && (((inst.instruction >> 20) & 0x1F) != 0x18) - && (((inst.instruction >> 20) & 0x1F) != 0x1A) - && (((inst.instruction >> 20) & 0x1F) != 0x1B) - && (((inst.instruction >> 20) & 0x1F) != 0x1d) - && (((inst.instruction >> 20) & 0x1F) != 0x1e) - && (((inst.instruction >> 20) & 0x1F) != 0x1f)) + s3_inst.instruction |= value << shift; + } + + if ((s3_inst.instruction & 0x3e000000) == 0x30000000) + { + if ((((s3_inst.instruction >> 20) & 0x1F) != 0) + && (((s3_inst.instruction >> 20) & 0x1F) != 1) + && (((s3_inst.instruction >> 20) & 0x1F) != 2) + && (((s3_inst.instruction >> 20) & 0x1F) != 0x10)) { - inst.error = _("invalid constant: bit expression not defined"); - return (int) FAIL; + s3_inst.error = _("invalid constant: bit expression not defined"); + return (int) s3_FAIL; } } - return SUCCESS; + return s3_SUCCESS; } /* Handle addi/addi.c/addis.c/cmpi.c/addis.c/ldi. */ - static void -do_rdsi16 (char *str) +s3_do_rdsi16 (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || data_op2 (&str, 1, _SIMM16) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 1, _SIMM16) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) return; - /* ldi. */ - if ((inst.instruction & 0x20c0000) == 0x20c0000) + /* ldi.->ldiu! only for imm5 */ + if ((s3_inst.instruction & 0x20c0000) == 0x20c0000) { - if ((((inst.instruction >> 20) & 0x10) == 0x10) || ((inst.instruction & 0x1fe00) != 0)) + if ((s3_inst.instruction & 0x1ffc0) != 0) { - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } else { - inst.relax_inst |= (inst.instruction >> 1) & 0xff; - inst.relax_inst |= (((inst.instruction >> 20) & 0xf) << 8); - inst.relax_size = 2; + s3_inst.relax_inst |= (s3_inst.instruction >> 1) & 0x1f; + s3_inst.relax_inst |= (((s3_inst.instruction >> 20)& 0x1f) <<5); + s3_inst.relax_size = 2; } } - else if (((inst.instruction >> 20) & 0x10) == 0x10) + /*cmpi.c */ + else if ((s3_inst.instruction & 0x02040001) == 0x02040001) { - inst.relax_inst = 0x8000; + /* imm <=0x3f (5 bit<<1)*/ + if (((s3_inst.instruction & 0x1ffe0)==0)||(((s3_inst.instruction & 0x1ffe0) == 0x1ffe0)&&(s3_inst.instruction & 0x003e) !=0)) + { + s3_inst.relax_inst |= (s3_inst.instruction >> 1) & 0x1f; + s3_inst.relax_inst |= (((s3_inst.instruction >> 20) & 0x1f) << 5); + s3_inst.relax_size = 2; + } + else + { + s3_inst.relax_inst =0x8000; + + } } + /* addi */ + else if (((s3_inst.instruction & 0x2000000) == 0x02000000)&& (s3_inst.relax_inst!=0x8000)) + { + /* rd : 0-16 ; imm <=0x7f (6 bit<<1)*/ + if ((((s3_inst.instruction >> 20) & 0x10) != 0x10) && + (((s3_inst.instruction & 0x1ffc0)==0)||(((s3_inst.instruction & 0x1ffc0) == 0x1ffc0)&&(s3_inst.instruction & 0x007e) !=0))) + { + s3_inst.relax_inst |= (s3_inst.instruction >> 1) & 0x3f; + s3_inst.relax_inst |= (((s3_inst.instruction >> 20) & 0xf) << 6); + s3_inst.relax_size = 2; + } + else + { + s3_inst.relax_inst =0x8000; + + } + } + + else if (((s3_inst.instruction >> 20) & 0x10) == 0x10) + { + s3_inst.relax_inst = 0x8000; + } +} + +static void +s3_do_ldis (char *str) +{ + s3_skip_whitespace (str); + + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 1, _IMM16) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + return; } /* Handle subi/subi.c. */ +static void +s3_do_sub_rdsi16 (char *str) +{ + s3_skip_whitespace (str); + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL + && s3_data_op2 (&str, 1, _SIMM16_NEG) != (int) s3_FAIL) + s3_end_of_line (str); +} + +/* Handle subis/subis.c. */ static void -do_sub_rdsi16 (char *str) +s3_do_sub_rdi16 (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL - && data_op2 (&str, 1, _SIMM16_NEG) != (int) FAIL) - end_of_line (str); + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL + && s3_data_op2 (&str, 1, _IMM16_NEG) != (int) s3_FAIL) + s3_end_of_line (str); } /* Handle addri/addri.c. */ - static void -do_rdrssi14 (char *str) /* -(2^13)~((2^13)-1) */ +s3_do_rdrssi14 (char *str) /* -(2^13)~((2^13)-1) */ { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL - && reg_required_here (&str, 15, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL) - data_op2 (&str, 1, _SIMM14); + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL + && s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL) + s3_data_op2 (&str, 1, _SIMM14); } /* Handle subri.c/subri. */ static void -do_sub_rdrssi14 (char *str) /* -(2^13)~((2^13)-1) */ +s3_do_sub_rdrssi14 (char *str) /* -(2^13)~((2^13)-1) */ { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL - && reg_required_here (&str, 15, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL - && data_op2 (&str, 1, _SIMM14_NEG) != (int) FAIL) - end_of_line (str); + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL + && s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL + && s3_data_op2 (&str, 1, _SIMM14_NEG) != (int) s3_FAIL) + s3_end_of_line (str); } -/* Handle bitclr.c/bitset.c/bittgl.c/slli.c/srai.c/srli.c/roli.c/rori.c/rolic.c. */ +/* Handle bitclr.c/bitset.c/bittgl.c/slli.c/srai.c/srli.c/roli.c/rori.c/rolic.c. + 0~((2^14)-1) */ static void -do_rdrsi5 (char *str) /* 0~((2^14)-1) */ +s3_do_rdrsi5 (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || reg_required_here (&str, 15, REG_TYPE_SCORE) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || data_op2 (&str, 10, _IMM5) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 10, _IMM5) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) return; - if ((((inst.instruction >> 20) & 0x1f) == ((inst.instruction >> 15) & 0x1f)) - && (inst.relax_inst != 0x8000) && (((inst.instruction >> 15) & 0x10) == 0)) + if ((((s3_inst.instruction >> 20) & 0x1f) == ((s3_inst.instruction >> 15) & 0x1f)) + && (s3_inst.relax_inst != 0x8000) && (((s3_inst.instruction >> 15) & 0x10) == 0)) { - inst.relax_inst |= (((inst.instruction >> 10) & 0x1f) << 3) | (((inst.instruction >> 15) & 0xf) << 8); - inst.relax_size = 2; + s3_inst.relax_inst |= (((s3_inst.instruction >> 10) & 0x1f) ) | (((s3_inst.instruction >> 15) & 0xf) << 5); + s3_inst.relax_size = 2; } else - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } -/* Handle andri/orri/andri.c/orri.c. */ - +/* Handle andri/orri/andri.c/orri.c. + 0 ~ ((2^14)-1) */ static void -do_rdrsi14 (char *str) /* 0 ~ ((2^14)-1) */ +s3_do_rdrsi14 (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL - && reg_required_here (&str, 15, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL - && data_op2 (&str, 1, _IMM14) != (int) FAIL) - end_of_line (str); + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL + && s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL + && s3_data_op2 (&str, 1, _IMM14) != (int) s3_FAIL) + s3_end_of_line (str); } /* Handle bittst.c. */ static void -do_xrsi5 (char *str) +s3_do_xrsi5 (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 15, REG_TYPE_SCORE) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || data_op2 (&str, 10, _IMM5) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 10, _IMM5) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) return; - if ((inst.relax_inst != 0x8000) && (((inst.instruction >> 15) & 0x10) == 0)) + if ((s3_inst.relax_inst != 0x8000) && (((s3_inst.instruction >> 15) & 0x10) == 0)) { - inst.relax_inst |= (((inst.instruction >> 10) & 0x1f) << 3) | (((inst.instruction >> 15) & 0xf) << 8); - inst.relax_size = 2; + s3_inst.relax_inst |= ((s3_inst.instruction >> 10) & 0x1f) | (((s3_inst.instruction >> 15) & 0xf) << 5); + s3_inst.relax_size = 2; } else - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } /* Handle addis/andi/ori/andis/oris/ldis. */ static void -do_rdi16 (char *str) +s3_do_rdi16 (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || data_op2 (&str, 1, _IMM16) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 1, _IMM16) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) return; - /* - if (((inst.instruction & 0xa0dfffe) != 0xa0c0000) || ((((inst.instruction >> 20) & 0x1f) & 0x10) == 0x10)) - inst.relax_inst = 0x8000; - else - inst.relax_size = 2; - */ + + /* ldis */ + if ((s3_inst.instruction & 0x3e0e0000) == 0x0a0c0000) + { + /* rd : 0-16 ;imm =0 -> can transform to addi!*/ + if ((((s3_inst.instruction >> 20) & 0x10) != 0x10) && ((s3_inst.instruction & 0x1ffff)==0)) + { + s3_inst.relax_inst =0x5400; /* ldiu! */ + s3_inst.relax_inst |= (s3_inst.instruction >> 1) & 0x1f; + s3_inst.relax_inst |= (((s3_inst.instruction >> 20) & 0xf) << 5); + s3_inst.relax_size = 2; + } + else + { + s3_inst.relax_inst =0x8000; + + } + } + + /* addis */ + else if ((s3_inst.instruction & 0x3e0e0001) == 0x0a000000) + { + /* rd : 0-16 ;imm =0 -> can transform to addi!*/ + if ((((s3_inst.instruction >> 20) & 0x10) != 0x10) && ((s3_inst.instruction & 0x1ffff)==0)) + { + s3_inst.relax_inst =0x5c00; /* addi! */ + s3_inst.relax_inst |= (s3_inst.instruction >> 1) & 0x3f; + s3_inst.relax_inst |= (((s3_inst.instruction >> 20) & 0xf) << 6); + s3_inst.relax_size = 2; + } + else + { + s3_inst.relax_inst =0x8000; + + } + } } static void -do_macro_rdi32hi (char *str) +s3_do_macro_rdi32hi (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - /* Do not handle end_of_line(). */ - if (reg_required_here (&str, 20, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL) - data_op2 (&str, 1, _VALUE_HI16); + /* Do not handle s3_end_of_line(). */ + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL) + s3_data_op2 (&str, 1, _VALUE_HI16); } static void -do_macro_rdi32lo (char *str) +s3_do_macro_rdi32lo (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - /* Do not handle end_of_line(). */ - if (reg_required_here (&str, 20, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL) - data_op2 (&str, 1, _VALUE_LO16); + /* Do not handle s3_end_of_line(). */ + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL) + s3_data_op2 (&str, 1, _VALUE_LO16); } /* Handle ldis_pic. */ - static void -do_rdi16_pic (char *str) +s3_do_rdi16_pic (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL - && data_op2 (&str, 1, _IMM16_pic) != (int) FAIL) - end_of_line (str); + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL + && s3_data_op2 (&str, 1, _IMM16_pic) != (int) s3_FAIL) + s3_end_of_line (str); } /* Handle addi_s_pic to generate R_SCORE_GOT_LO16 . */ - static void -do_addi_s_pic (char *str) +s3_do_addi_s_pic (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL - && data_op2 (&str, 1, _SIMM16_pic) != (int) FAIL) - end_of_line (str); + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL + && s3_data_op2 (&str, 1, _SIMM16_pic) != (int) s3_FAIL) + s3_end_of_line (str); } /* Handle addi_u_pic to generate R_SCORE_GOT_LO16 . */ - static void -do_addi_u_pic (char *str) +s3_do_addi_u_pic (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL - && data_op2 (&str, 1, _IMM16_LO16_pic) != (int) FAIL) - end_of_line (str); + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL + && s3_data_op2 (&str, 1, _IMM16_LO16_pic) != (int) s3_FAIL) + s3_end_of_line (str); } /* Handle mfceh/mfcel/mtceh/mtchl. */ - static void -do_rd (char *str) +s3_do_rd (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) != (int) FAIL) - end_of_line (str); + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) != (int) s3_FAIL) + s3_end_of_line (str); } +/* Handle br{cond},cmpzteq.c ,cmpztmi.c ,cmpz.c */ static void -do_rs (char *str) +s3_do_rs (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 15, REG_TYPE_SCORE) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) return; - if ((inst.relax_inst != 0x8000) && (((inst.instruction >> 15) & 0x10) == 0)) + if ((s3_inst.relax_inst != 0x8000) ) { - inst.relax_inst |= (((inst.instruction >> 10) & 0xf) << 8) | (((inst.instruction >> 15) & 0xf) << 4); - inst.relax_size = 2; + s3_inst.relax_inst |= ((s3_inst.instruction >> 15) &0x1f); + s3_inst.relax_size = 2; } else - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } static void -do_i15 (char *str) +s3_do_i15 (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (data_op2 (&str, 10, _IMM15) != (int) FAIL) - end_of_line (str); + if (s3_data_op2 (&str, 10, _IMM15) != (int) s3_FAIL) + s3_end_of_line (str); } static void -do_xi5x (char *str) +s3_do_xi5x (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (data_op2 (&str, 15, _IMM5) == (int) FAIL || end_of_line (str) == (int) FAIL) + if (s3_data_op2 (&str, 15, _IMM5) == (int) s3_FAIL || s3_end_of_line (str) == (int) s3_FAIL) return; - if (inst.relax_inst != 0x8000) + if (s3_inst.relax_inst != 0x8000) { - inst.relax_inst |= (((inst.instruction >> 15) & 0x1f) << 3); - inst.relax_size = 2; + s3_inst.relax_inst |= ((s3_inst.instruction >> 15) & 0x1f) ; + s3_inst.relax_size = 2; } } static void -do_rdrs (char *str) +s3_do_rdrs (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || reg_required_here (&str, 15, REG_TYPE_SCORE) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) return; - if (inst.relax_inst != 0x8000) + if (s3_inst.relax_inst != 0x8000) { - if (((inst.instruction & 0x7f) == 0x56)) /* adjust mv -> mv! / mlfh! / mhfl! */ + if (((s3_inst.instruction & 0x7f) == 0x56)) /* adjust mv -> mv!*/ { - /* mlfh */ - if ((((inst.instruction >> 15) & 0x10) != 0x0) && (((inst.instruction >> 20) & 0x10) == 0)) - { - inst.relax_inst = 0x00000001 | (((inst.instruction >> 15) & 0xf) << 4) - | (((inst.instruction >> 20) & 0xf) << 8); - inst.relax_size = 2; - } - /* mhfl */ - else if ((((inst.instruction >> 15) & 0x10) == 0x0) && ((inst.instruction >> 20) & 0x10) != 0) - { - inst.relax_inst = 0x00000002 | (((inst.instruction >> 15) & 0xf) << 4) - | (((inst.instruction >> 20) & 0xf) << 8); - inst.relax_size = 2; - } - else if ((((inst.instruction >> 15) & 0x10) == 0x0) && (((inst.instruction >> 20) & 0x10) == 0)) - { - inst.relax_inst |= (((inst.instruction >> 15) & 0xf) << 4) - | (((inst.instruction >> 20) & 0xf) << 8); - inst.relax_size = 2; - } - else - { - inst.relax_inst = 0x8000; - } + /* mv! rd : 5bit , ra : 5bit */ + s3_inst.relax_inst |= ((s3_inst.instruction >> 15) & 0x1f) | (((s3_inst.instruction >> 20) & 0x1f) << 5); + s3_inst.relax_size = 2; + } - else if ((((inst.instruction >> 15) & 0x10) == 0x0) && (((inst.instruction >> 20) & 0x10) == 0)) + else if ((((s3_inst.instruction >> 15) & 0x10) == 0x0) && (((s3_inst.instruction >> 20) & 0x10) == 0)) { - inst.relax_inst |= (((inst.instruction >> 15) & 0xf) << 4) - | (((inst.instruction >> 20) & 0xf) << 8); - inst.relax_size = 2; + s3_inst.relax_inst |= (((s3_inst.instruction >> 15) & 0xf) << 4) + | (((s3_inst.instruction >> 20) & 0xf) << 8); + s3_inst.relax_size = 2; } else { - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } } } /* Handle mfcr/mtcr. */ static void -do_rdcrs (char *str) +s3_do_rdcrs (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL - && reg_required_here (&str, 15, REG_TYPE_SCORE_CR) != (int) FAIL) - end_of_line (str); + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL + && s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE_CR) != (int) s3_FAIL) + s3_end_of_line (str); } /* Handle mfsr/mtsr. */ - static void -do_rdsrs (char *str) +s3_do_rdsrs (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); /* mfsr */ - if ((inst.instruction & 0xff) == 0x50) + if ((s3_inst.instruction & 0xff) == 0x50) { - if (reg_required_here (&str, 20, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL - && reg_required_here (&str, 10, REG_TYPE_SCORE_SR) != (int) FAIL) - end_of_line (str); + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL + && s3_reg_required_here (&str, 10, s3_REG_TYPE_SCORE_SR) != (int) s3_FAIL) + s3_end_of_line (str); } else { - if (reg_required_here (&str, 15, REG_TYPE_SCORE) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL) - reg_required_here (&str, 10, REG_TYPE_SCORE_SR); + if (s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) != (int) s3_FAIL + && s3_skip_past_comma (&str) != (int) s3_FAIL) + s3_reg_required_here (&str, 10, s3_REG_TYPE_SCORE_SR); } } /* Handle neg. */ - static void -do_rdxrs (char *str) +s3_do_rdxrs (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || reg_required_here (&str, 10, REG_TYPE_SCORE) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 10, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) return; - if ((inst.relax_inst != 0x8000) && (((inst.instruction >> 10) & 0x10) == 0) - && (((inst.instruction >> 20) & 0x10) == 0)) + if ((s3_inst.relax_inst != 0x8000) && (((s3_inst.instruction >> 10) & 0x10) == 0) + && (((s3_inst.instruction >> 20) & 0x10) == 0)) { - inst.relax_inst |= (((inst.instruction >> 10) & 0xf) << 4) | (((inst.instruction >> 20) & 0xf) << 8); - inst.relax_size = 2; + s3_inst.relax_inst |= (((s3_inst.instruction >> 10) & 0xf) << 4) | (((s3_inst.instruction >> 20) & 0xf) << 8); + s3_inst.relax_size = 2; } else - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } /* Handle cmp.c/cmp<cond>. */ static void -do_rsrs (char *str) +s3_do_rsrs (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 15, REG_TYPE_SCORE) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || reg_required_here (&str, 10, REG_TYPE_SCORE) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 10, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) return; - if ((inst.relax_inst != 0x8000) && (((inst.instruction >> 20) & 0x1f) == 3) - && (((inst.instruction >> 10) & 0x10) == 0) && (((inst.instruction >> 15) & 0x10) == 0)) + if ((s3_inst.relax_inst != 0x8000) && (((s3_inst.instruction >> 20) & 0x1f) == 3) ) { - inst.relax_inst |= (((inst.instruction >> 10) & 0xf) << 4) | (((inst.instruction >> 15) & 0xf) << 8); - inst.relax_size = 2; + s3_inst.relax_inst |= (((s3_inst.instruction >> 10) & 0x1f)) | (((s3_inst.instruction >> 15) & 0x1f) << 5); + s3_inst.relax_size = 2; } else - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } static void -do_ceinst (char *str) +s3_do_ceinst (char *str) { char *strbak; strbak = str; - skip_whitespace (str); - - if (data_op2 (&str, 20, _IMM5) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || reg_required_here (&str, 15, REG_TYPE_SCORE) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || reg_required_here (&str, 10, REG_TYPE_SCORE) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || data_op2 (&str, 5, _IMM5) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || data_op2 (&str, 0, _IMM5) == (int) FAIL - || end_of_line (str) == (int) FAIL) + s3_skip_whitespace (str); + + if (s3_data_op2 (&str, 20, _IMM5) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 10, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 5, _IMM5) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 0, _IMM5) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) { return; } else { str = strbak; - if (data_op2 (&str, 0, _IMM25) == (int) FAIL) + if (s3_data_op2 (&str, 0, _IMM25) == (int) s3_FAIL) return; } } static int -reglow_required_here (char **str, int shift) +s3_reglow_required_here (char **str, int shift) { - static char buff[MAX_LITERAL_POOL_SIZE]; + static char buff[s3_MAX_LITERAL_POOL_SIZE]; int reg; char *start = *str; - if ((reg = score_reg_parse (str, all_reg_maps[REG_TYPE_SCORE].htab)) != (int) FAIL) + if ((reg = s3_score_reg_parse (str, s3_all_reg_maps[s3_REG_TYPE_SCORE].htab)) != (int) s3_FAIL) { - if ((reg == 1) && (nor1 == 1) && (inst.bwarn == 0)) + if ((reg == 1) && (s3_nor1 == 1) && (s3_inst.bwarn == 0)) { as_warn (_("Using temp register(r1)")); - inst.bwarn = 1; + s3_inst.bwarn = 1; } if (reg < 16) { if (shift >= 0) - inst.instruction |= reg << shift; + s3_inst.instruction |= (bfd_vma) reg << shift; return reg; } @@ -1765,136 +2085,83 @@ reglow_required_here (char **str, int shift) /* Restore the start point, we may have got a reg of the wrong class. */ *str = start; sprintf (buff, _("low register(r0-r15)expected, not '%.100s'"), start); - inst.error = buff; - return (int) FAIL; + s3_inst.error = buff; + return (int) s3_FAIL; } -/* Handle addc!/add!/and!/cmp!/neg!/not!/or!/sll!/srl!/sra!/xor!/sub!. */ +/* Handle add!/and!/or!/sub!. */ static void -do16_rdrs (char *str) +s3_do16_rdrs2 (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reglow_required_here (&str, 8) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || reglow_required_here (&str, 4) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_reglow_required_here (&str, 4) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reglow_required_here (&str, 0) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) { return; } - else - { - if ((inst.instruction & 0x700f) == 0x2003) /* cmp! */ - { - inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 15) - | (((inst.instruction >> 4) & 0xf) << 10); - } - else if ((inst.instruction & 0x700f) == 0x2006) /* not! */ - { - inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 20) - | (((inst.instruction >> 4) & 0xf) << 15); - } - else - { - inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 20) - | (((inst.instruction >> 8) & 0xf) << 15) | (((inst.instruction >> 4) & 0xf) << 10); - } - inst.relax_size = 4; - } } +/* Handle br!/brl!. */ static void -do16_rs (char *str) +s3_do16_br (char *str) { - int rd = 0; - - skip_whitespace (str); + s3_skip_whitespace (str); - if ((rd = reglow_required_here (&str, 4)) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_reg_required_here (&str, 0, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) { return; } - else - { - inst.relax_inst |= rd << 20; - inst.relax_size = 4; - } } -/* Handle br!/brl!. */ +/* Handle brr!. */ static void -do16_xrs (char *str) +s3_do16_brr (char *str) { - skip_whitespace (str); + int rd = 0; - if (reglow_required_here (&str, 4) == (int) FAIL || end_of_line (str) == (int) FAIL) + s3_skip_whitespace (str); + + if ((rd = s3_reg_required_here (&str, 0,s3_REG_TYPE_SCORE)) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) { return; } - else - { - inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 10) - | (((inst.instruction >> 4) & 0xf) << 15); - inst.relax_size = 4; - } } -static int -reghigh_required_here (char **str, int shift) +/*Handle ltbw / ltbh / ltbb */ +static void +s3_do_ltb (char *str) { - static char buff[MAX_LITERAL_POOL_SIZE]; - int reg; - char *start = *str; - - if ((reg = score_reg_parse (str, all_reg_maps[REG_TYPE_SCORE].htab)) != (int) FAIL) + s3_skip_whitespace (str); + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL) { - if (15 < reg && reg < 32) - { - if (shift >= 0) - inst.instruction |= (reg & 0xf) << shift; - - return reg; - } + return; } - *str = start; - sprintf (buff, _("high register(r16-r31)expected, not '%.100s'"), start); - inst.error = buff; - return (int) FAIL; -} - -/* Handle mhfl!. */ -static void -do16_hrdrs (char *str) -{ - skip_whitespace (str); - - if (reghigh_required_here (&str, 8) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL - && reglow_required_here (&str, 4) != (int) FAIL - && end_of_line (str) != (int) FAIL) + s3_skip_whitespace (str); + if (*str++ != '[') { - inst.relax_inst |= ((((inst.instruction >> 8) & 0xf) | 0x10) << 20) - | (((inst.instruction >> 4) & 0xf) << 15) | (0xf << 10); - inst.relax_size = 4; + s3_inst.error = _("missing ["); + return; } -} -/* Handle mlfh!. */ -static void -do16_rdhrs (char *str) -{ - skip_whitespace (str); + if (s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 10, s3_REG_TYPE_SCORE) == (int) s3_FAIL) + { + return; + } - if (reglow_required_here (&str, 8) != (int) FAIL - && skip_past_comma (&str) != (int) FAIL - && reghigh_required_here (&str, 4) != (int) FAIL - && end_of_line (str) != (int) FAIL) + s3_skip_whitespace (str); + if (*str++ != ']') { - inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 20) - | ((((inst.instruction >> 4) & 0xf) | 0x10) << 15) | (0xf << 10); - inst.relax_size = 4; + s3_inst.error = _("missing ]"); + return; } } @@ -1905,7 +2172,7 @@ do16_rdhrs (char *str) a data instruction. We do this by pushing the expression into a symbol in the expr_section, and creating a fix for that. */ static fixS * -fix_new_score (fragS * frag, int where, short int size, expressionS * exp, int pc_rel, int reloc) +s3_fix_new_score (fragS * frag, int where, short int size, expressionS * exp, int pc_rel, int reloc) { fixS *new_fix; @@ -1925,55 +2192,55 @@ fix_new_score (fragS * frag, int where, short int size, expressionS * exp, int p } static void -init_dependency_vector (void) +s3_init_dependency_vector (void) { int i; - for (i = 0; i < vector_size; i++) - memset (&dependency_vector[i], '\0', sizeof (dependency_vector[i])); + for (i = 0; i < s3_vector_size; i++) + memset (&s3_dependency_vector[i], '\0', sizeof (s3_dependency_vector[i])); return; } -static enum insn_type_for_dependency -dependency_type_from_insn (char *insn_name) +static enum s3_insn_type_for_dependency +s3_dependency_type_from_insn (char *insn_name) { - char name[INSN_NAME_LEN]; - const struct insn_to_dependency *tmp; + char name[s3_INSN_NAME_LEN]; + const struct s3_insn_to_dependency *tmp; strcpy (name, insn_name); - tmp = (const struct insn_to_dependency *) hash_find (dependency_insn_hsh, name); + tmp = (const struct s3_insn_to_dependency *) hash_find (s3_dependency_insn_hsh, name); if (tmp) return tmp->type; - return D_all_insn; + return s3_D_all_insn; } static int -check_dependency (char *pre_insn, char *pre_reg, +s3_check_dependency (char *pre_insn, char *pre_reg, char *cur_insn, char *cur_reg, int *warn_or_error) { int bubbles = 0; unsigned int i; - enum insn_type_for_dependency pre_insn_type; - enum insn_type_for_dependency cur_insn_type; + enum s3_insn_type_for_dependency pre_insn_type; + enum s3_insn_type_for_dependency cur_insn_type; - pre_insn_type = dependency_type_from_insn (pre_insn); - cur_insn_type = dependency_type_from_insn (cur_insn); + pre_insn_type = s3_dependency_type_from_insn (pre_insn); + cur_insn_type = s3_dependency_type_from_insn (cur_insn); - for (i = 0; i < sizeof (data_dependency_table) / sizeof (data_dependency_table[0]); i++) + for (i = 0; i < sizeof (s3_data_dependency_table) / sizeof (s3_data_dependency_table[0]); i++) { - if ((pre_insn_type == data_dependency_table[i].pre_insn_type) - && (D_all_insn == data_dependency_table[i].cur_insn_type - || cur_insn_type == data_dependency_table[i].cur_insn_type) - && (strcmp (data_dependency_table[i].pre_reg, "") == 0 - || strcmp (data_dependency_table[i].pre_reg, pre_reg) == 0) - && (strcmp (data_dependency_table[i].cur_reg, "") == 0 - || strcmp (data_dependency_table[i].cur_reg, cur_reg) == 0)) + if ((pre_insn_type == s3_data_dependency_table[i].pre_insn_type) + && (s3_D_all_insn == s3_data_dependency_table[i].cur_insn_type + || cur_insn_type == s3_data_dependency_table[i].cur_insn_type) + && (strcmp (s3_data_dependency_table[i].pre_reg, "") == 0 + || strcmp (s3_data_dependency_table[i].pre_reg, pre_reg) == 0) + && (strcmp (s3_data_dependency_table[i].cur_reg, "") == 0 + || strcmp (s3_data_dependency_table[i].cur_reg, cur_reg) == 0)) { - bubbles = (score7) ? data_dependency_table[i].bubblenum_7 : data_dependency_table[i].bubblenum_5; - *warn_or_error = data_dependency_table[i].warn_or_error; + bubbles = s3_data_dependency_table[i].bubblenum_3; + *warn_or_error = s3_data_dependency_table[i].warn_or_error; break; } } @@ -1982,10 +2249,10 @@ check_dependency (char *pre_insn, char *pre_reg, } static void -build_one_frag (struct score_it one_inst) +s3_build_one_frag (struct s3_score_it one_inst) { char *p; - int relaxable_p = g_opt; + int relaxable_p = s3_g_opt; int relax_size = 0; /* Start a new frag if frag_now is not empty. */ @@ -1999,7 +2266,7 @@ build_one_frag (struct score_it one_inst) frag_grow (20); p = frag_more (one_inst.size); - md_number_to_chars (p, one_inst.instruction, one_inst.size); + s3_md_number_to_chars (p, one_inst.instruction, one_inst.size); #ifdef OBJ_ELF dwarf2_emit_insn (one_inst.size); @@ -2008,26 +2275,26 @@ build_one_frag (struct score_it one_inst) relaxable_p &= (one_inst.relax_size != 0); relax_size = relaxable_p ? one_inst.relax_size : 0; - p = frag_var (rs_machine_dependent, relax_size + RELAX_PAD_BYTE, 0, - RELAX_ENCODE (one_inst.size, one_inst.relax_size, + p = frag_var (rs_machine_dependent, relax_size + s3_RELAX_PAD_BYTE, 0, + s3_RELAX_ENCODE (one_inst.size, one_inst.relax_size, one_inst.type, 0, 0, relaxable_p), NULL, 0, NULL); if (relaxable_p) - md_number_to_chars (p, one_inst.relax_inst, relax_size); + s3_md_number_to_chars (p, one_inst.relax_inst, relax_size); } static void -handle_dependency (struct score_it *theinst) +s3_handle_dependency (struct s3_score_it *theinst) { int i; int warn_or_error = 0; /* warn - 0; error - 1 */ int bubbles = 0; int remainder_bubbles = 0; - char cur_insn[INSN_NAME_LEN]; - char pre_insn[INSN_NAME_LEN]; - struct score_it nop_inst; - struct score_it pflush_inst; + char cur_insn[s3_INSN_NAME_LEN]; + char pre_insn[s3_INSN_NAME_LEN]; + struct s3_score_it nop_inst; + struct s3_score_it pflush_inst; nop_inst.instruction = 0x0000; nop_inst.size = 2; @@ -2044,82 +2311,73 @@ handle_dependency (struct score_it *theinst) /* pflush will clear all data dependency. */ if (strcmp (theinst->name, "pflush") == 0) { - init_dependency_vector (); + s3_init_dependency_vector (); return; } - /* Push current instruction to dependency_vector[0]. */ - for (i = vector_size - 1; i > 0; i--) - memcpy (&dependency_vector[i], &dependency_vector[i - 1], sizeof (dependency_vector[i])); + /* Push current instruction to s3_dependency_vector[0]. */ + for (i = s3_vector_size - 1; i > 0; i--) + memcpy (&s3_dependency_vector[i], &s3_dependency_vector[i - 1], sizeof (s3_dependency_vector[i])); - memcpy (&dependency_vector[0], theinst, sizeof (dependency_vector[i])); + memcpy (&s3_dependency_vector[0], theinst, sizeof (s3_dependency_vector[i])); /* There is no dependency between nop and any instruction. */ - if (strcmp (dependency_vector[0].name, "nop") == 0 - || strcmp (dependency_vector[0].name, "nop!") == 0) + if (strcmp (s3_dependency_vector[0].name, "nop") == 0 + || strcmp (s3_dependency_vector[0].name, "nop!") == 0) return; - /* "pce" is defined in insn_to_dependency_table. */ -#define PCE_NAME "pce" - - if (dependency_vector[0].type == Insn_Type_PCE) - strcpy (cur_insn, PCE_NAME); - else - strcpy (cur_insn, dependency_vector[0].name); + strcpy (cur_insn, s3_dependency_vector[0].name); - for (i = 1; i < vector_size; i++) + for (i = 1; i < s3_vector_size; i++) { - /* The element of dependency_vector is NULL. */ - if (dependency_vector[i].name[0] == '\0') + /* The element of s3_dependency_vector is NULL. */ + if (s3_dependency_vector[i].name[0] == '\0') continue; - if (dependency_vector[i].type == Insn_Type_PCE) - strcpy (pre_insn, PCE_NAME); - else - strcpy (pre_insn, dependency_vector[i].name); + strcpy (pre_insn, s3_dependency_vector[i].name); - bubbles = check_dependency (pre_insn, dependency_vector[i].reg, - cur_insn, dependency_vector[0].reg, &warn_or_error); + bubbles = s3_check_dependency (pre_insn, s3_dependency_vector[i].reg, + cur_insn, s3_dependency_vector[0].reg, &warn_or_error); remainder_bubbles = bubbles - i + 1; if (remainder_bubbles > 0) { int j; - if (fix_data_dependency == 1) + if (s3_fix_data_dependency == 1) { if (remainder_bubbles <= 2) { - if (warn_fix_data_dependency) + if (s3_warn_fix_data_dependency) as_warn (_("Fix data dependency: %s %s -- %s %s (insert %d nop!/%d)"), - dependency_vector[i].name, dependency_vector[i].reg, - dependency_vector[0].name, dependency_vector[0].reg, + s3_dependency_vector[i].name, s3_dependency_vector[i].reg, + s3_dependency_vector[0].name, s3_dependency_vector[0].reg, remainder_bubbles, bubbles); - for (j = (vector_size - 1); (j - remainder_bubbles) > 0; j--) - memcpy (&dependency_vector[j], &dependency_vector[j - remainder_bubbles], - sizeof (dependency_vector[j])); + for (j = (s3_vector_size - 1); (j - remainder_bubbles) > 0; j--) + memcpy (&s3_dependency_vector[j], &s3_dependency_vector[j - remainder_bubbles], + sizeof (s3_dependency_vector[j])); for (j = 1; j <= remainder_bubbles; j++) { - memset (&dependency_vector[j], '\0', sizeof (dependency_vector[j])); + memset (&s3_dependency_vector[j], '\0', sizeof (s3_dependency_vector[j])); /* Insert nop!. */ - build_one_frag (nop_inst); + s3_build_one_frag (nop_inst); } } else { - if (warn_fix_data_dependency) + if (s3_warn_fix_data_dependency) as_warn (_("Fix data dependency: %s %s -- %s %s (insert 1 pflush/%d)"), - dependency_vector[i].name, dependency_vector[i].reg, - dependency_vector[0].name, dependency_vector[0].reg, + s3_dependency_vector[i].name, s3_dependency_vector[i].reg, + s3_dependency_vector[0].name, s3_dependency_vector[0].reg, bubbles); - for (j = 1; j < vector_size; j++) - memset (&dependency_vector[j], '\0', sizeof (dependency_vector[j])); + for (j = 1; j < s3_vector_size; j++) + memset (&s3_dependency_vector[j], '\0', sizeof (s3_dependency_vector[j])); /* Insert pflush. */ - build_one_frag (pflush_inst); + s3_build_one_frag (pflush_inst); } } else @@ -2127,15 +2385,15 @@ handle_dependency (struct score_it *theinst) if (warn_or_error) { as_bad (_("data dependency: %s %s -- %s %s (%d/%d bubble)"), - dependency_vector[i].name, dependency_vector[i].reg, - dependency_vector[0].name, dependency_vector[0].reg, + s3_dependency_vector[i].name, s3_dependency_vector[i].reg, + s3_dependency_vector[0].name, s3_dependency_vector[0].reg, remainder_bubbles, bubbles); } else { as_warn (_("data dependency: %s %s -- %s %s (%d/%d bubble)"), - dependency_vector[i].name, dependency_vector[i].reg, - dependency_vector[0].name, dependency_vector[0].reg, + s3_dependency_vector[i].name, s3_dependency_vector[i].reg, + s3_dependency_vector[0].name, s3_dependency_vector[0].reg, remainder_bubbles, bubbles); } } @@ -2144,9 +2402,9 @@ handle_dependency (struct score_it *theinst) } static enum insn_class -get_insn_class_from_type (enum score_insn_type type) +s3_get_insn_class_from_type (enum score_insn_type type) { - enum insn_class retval = (int) FAIL; + enum insn_class retval = (int) s3_FAIL; switch (type) { @@ -2164,6 +2422,8 @@ get_insn_class_from_type (enum score_insn_type type) case x_Rs: case Rd_LowRs: case NO16_OPD: + case Rd_SI5: + case Rd_SI6: retval = INSN_CLASS_16; break; case Rd_Rs_I5: @@ -2204,6 +2464,8 @@ get_insn_class_from_type (enum score_insn_type type) case Insn_GP: case Insn_PIC: case Insn_internal: + case Insn_BCMP: + case Ra_I9_I5: retval = INSN_CLASS_32; break; case Insn_Type_PCE: @@ -2212,6 +2474,10 @@ get_insn_class_from_type (enum score_insn_type type) case Insn_Type_SYN: retval = INSN_CLASS_SYN; break; + case Rd_I30: + case Rd_I32: + retval = INSN_CLASS_48; + break; default: abort (); break; @@ -2219,90 +2485,107 @@ get_insn_class_from_type (enum score_insn_type type) return retval; } -static unsigned long -adjust_paritybit (unsigned long m_code, enum insn_class class) +/* Type of p-bits: + 48-bit instruction: 1, 1, 0. + 32-bit instruction: 1, 0. + 16-bit instruction: 0. */ +static bfd_vma +s3_adjust_paritybit (bfd_vma m_code, enum insn_class class) { - unsigned long result = 0; - unsigned long m_code_high = 0; + bfd_vma result = 0; + bfd_vma m_code_high = 0; + unsigned long m_code_middle = 0; unsigned long m_code_low = 0; - unsigned long pb_high = 0; + bfd_vma pb_high = 0; + unsigned long pb_middle = 0; unsigned long pb_low = 0; - if (class == INSN_CLASS_32) + if (class == INSN_CLASS_48) + { + pb_high = 0x800000000000LL; + pb_middle = 0x80000000; + pb_low = 0x00000000; + m_code_high = m_code & 0x1fffc0000000LL; + m_code_middle = m_code & 0x3fff8000; + m_code_low = m_code & 0x00007fff; + result = pb_high | (m_code_high << 2) | + pb_middle | (m_code_middle << 1) | + pb_low | m_code_low; + } + else if (class == INSN_CLASS_32 || class == INSN_CLASS_SYN) { pb_high = 0x80000000; - pb_low = 0x00008000; + pb_low = 0x00000000; + m_code_high = m_code & 0x3fff8000; + m_code_low = m_code & 0x00007fff; + result = pb_high | (m_code_high << 1) | pb_low | m_code_low; } else if (class == INSN_CLASS_16) { pb_high = 0; pb_low = 0; + m_code_high = m_code & 0x3fff8000; + m_code_low = m_code & 0x00007fff; + result = pb_high | (m_code_high << 1) | pb_low | m_code_low; } else if (class == INSN_CLASS_PCE) { + /* Keep original. */ pb_high = 0; pb_low = 0x00008000; - } - else if (class == INSN_CLASS_SYN) - { - /* FIXME. at this time, INSN_CLASS_SYN must be 32 bit, but, instruction type should - be changed if macro instruction has been expanded. */ - pb_high = 0x80000000; - pb_low = 0x00008000; + m_code_high = m_code & 0x3fff8000; + m_code_low = m_code & 0x00007fff; + result = pb_high | (m_code_high << 1) | pb_low | m_code_low; } else { abort (); } - m_code_high = m_code & 0x3fff8000; - m_code_low = m_code & 0x00007fff; - result = pb_high | (m_code_high << 1) | pb_low | m_code_low; return result; - } static void -gen_insn_frag (struct score_it *part_1, struct score_it *part_2) +s3_gen_insn_frag (struct s3_score_it *part_1, struct s3_score_it *part_2) { char *p; bfd_boolean pce_p = FALSE; - int relaxable_p = g_opt; + int relaxable_p = s3_g_opt; int relax_size = 0; - struct score_it *inst1 = part_1; - struct score_it *inst2 = part_2; - struct score_it backup_inst1; + struct s3_score_it *inst1 = part_1; + struct s3_score_it *inst2 = part_2; + struct s3_score_it backup_inst1; pce_p = (inst2) ? TRUE : FALSE; - memcpy (&backup_inst1, inst1, sizeof (struct score_it)); + memcpy (&backup_inst1, inst1, sizeof (struct s3_score_it)); /* Adjust instruction opcode and to be relaxed instruction opcode. */ if (pce_p) { backup_inst1.instruction = ((backup_inst1.instruction & 0x7FFF) << 15) | (inst2->instruction & 0x7FFF); - backup_inst1.instruction = adjust_paritybit (backup_inst1.instruction, INSN_CLASS_PCE); + backup_inst1.instruction = s3_adjust_paritybit (backup_inst1.instruction, INSN_CLASS_PCE); backup_inst1.relax_inst = 0x8000; - backup_inst1.size = INSN_SIZE; + backup_inst1.size = s3_INSN_SIZE; backup_inst1.relax_size = 0; backup_inst1.type = Insn_Type_PCE; } else { - backup_inst1.instruction = adjust_paritybit (backup_inst1.instruction, - GET_INSN_CLASS (backup_inst1.type)); + backup_inst1.instruction = s3_adjust_paritybit (backup_inst1.instruction, + s3_GET_INSN_CLASS (backup_inst1.type)); } if (backup_inst1.relax_size != 0) { enum insn_class tmp; - tmp = (backup_inst1.size == INSN_SIZE) ? INSN_CLASS_16 : INSN_CLASS_32; - backup_inst1.relax_inst = adjust_paritybit (backup_inst1.relax_inst, tmp); + tmp = (backup_inst1.size == s3_INSN_SIZE) ? INSN_CLASS_16 : INSN_CLASS_32; + backup_inst1.relax_inst = s3_adjust_paritybit (backup_inst1.relax_inst, tmp); } /* Check data dependency. */ - handle_dependency (&backup_inst1); + s3_handle_dependency (&backup_inst1); /* Start a new frag if frag_now is not empty and is not instruction frag, maybe it contains data produced by .ascii etc. Doing this is to make one instruction per frag. */ @@ -2323,7 +2606,7 @@ gen_insn_frag (struct score_it *part_1, struct score_it *part_2) frag_grow (20); p = frag_more (backup_inst1.size); - md_number_to_chars (p, backup_inst1.instruction, backup_inst1.size); + s3_md_number_to_chars (p, backup_inst1.instruction, backup_inst1.size); #ifdef OBJ_ELF dwarf2_emit_insn (backup_inst1.size); @@ -2333,18 +2616,18 @@ gen_insn_frag (struct score_it *part_1, struct score_it *part_2) if (pce_p) { if (inst1->reloc.type != BFD_RELOC_NONE) - fix_new_score (frag_now, p - frag_now->fr_literal, + s3_fix_new_score (frag_now, p - frag_now->fr_literal, inst1->size, &inst1->reloc.exp, inst1->reloc.pc_rel, inst1->reloc.type); if (inst2->reloc.type != BFD_RELOC_NONE) - fix_new_score (frag_now, p - frag_now->fr_literal + 2, + s3_fix_new_score (frag_now, p - frag_now->fr_literal + 2, inst2->size, &inst2->reloc.exp, inst2->reloc.pc_rel, inst2->reloc.type); } else { if (backup_inst1.reloc.type != BFD_RELOC_NONE) - fix_new_score (frag_now, p - frag_now->fr_literal, + s3_fix_new_score (frag_now, p - frag_now->fr_literal, backup_inst1.size, &backup_inst1.reloc.exp, backup_inst1.reloc.pc_rel, backup_inst1.reloc.type); } @@ -2353,27 +2636,27 @@ gen_insn_frag (struct score_it *part_1, struct score_it *part_2) relaxable_p &= (backup_inst1.relax_size != 0); relax_size = relaxable_p ? backup_inst1.relax_size : 0; - p = frag_var (rs_machine_dependent, relax_size + RELAX_PAD_BYTE, 0, - RELAX_ENCODE (backup_inst1.size, backup_inst1.relax_size, + p = frag_var (rs_machine_dependent, relax_size + s3_RELAX_PAD_BYTE, 0, + s3_RELAX_ENCODE (backup_inst1.size, backup_inst1.relax_size, backup_inst1.type, 0, 0, relaxable_p), backup_inst1.reloc.exp.X_add_symbol, 0, NULL); if (relaxable_p) - md_number_to_chars (p, backup_inst1.relax_inst, relax_size); + s3_md_number_to_chars (p, backup_inst1.relax_inst, relax_size); - memcpy (inst1, &backup_inst1, sizeof (struct score_it)); + memcpy (inst1, &backup_inst1, sizeof (struct s3_score_it)); } static void -parse_16_32_inst (char *insnstr, bfd_boolean gen_frag_p) +s3_parse_16_32_inst (char *insnstr, bfd_boolean gen_frag_p) { char c; char *p; char *operator = insnstr; - const struct asm_opcode *opcode; + const struct s3_asm_opcode *opcode; /* Parse operator and operands. */ - skip_whitespace (operator); + s3_skip_whitespace (operator); for (p = operator; *p != '\0'; p++) if ((*p == ' ') || (*p == '!')) @@ -2385,219 +2668,196 @@ parse_16_32_inst (char *insnstr, bfd_boolean gen_frag_p) c = *p; *p = '\0'; - opcode = (const struct asm_opcode *) hash_find (score_ops_hsh, operator); + opcode = (const struct s3_asm_opcode *) hash_find (s3_score_ops_hsh, operator); + *p = c; + + memset (&s3_inst, '\0', sizeof (s3_inst)); + sprintf (s3_inst.str, "%s", insnstr); + if (opcode) + { + s3_inst.instruction = opcode->value; + s3_inst.relax_inst = opcode->relax_value; + s3_inst.type = opcode->type; + s3_inst.size = s3_GET_INSN_SIZE (s3_inst.type); + s3_inst.relax_size = 0; + s3_inst.bwarn = 0; + sprintf (s3_inst.name, "%s", opcode->template); + strcpy (s3_inst.reg, ""); + s3_inst.error = NULL; + s3_inst.reloc.type = BFD_RELOC_NONE; + + (*opcode->parms) (p); + + /* It indicates current instruction is a macro instruction if s3_inst.bwarn equals -1. */ + if ((s3_inst.bwarn != -1) && (!s3_inst.error) && (gen_frag_p)) + s3_gen_insn_frag (&s3_inst, NULL); + } + else + s3_inst.error = _("unrecognized opcode"); +} + +static void +s3_parse_48_inst (char *insnstr, bfd_boolean gen_frag_p) +{ + char c; + char *p; + char *operator = insnstr; + const struct s3_asm_opcode *opcode; + + /* Parse operator and operands. */ + s3_skip_whitespace (operator); + + for (p = operator; *p != '\0'; p++) + if (*p == ' ') + break; + + c = *p; + *p = '\0'; + + opcode = (const struct s3_asm_opcode *) hash_find (s3_score_ops_hsh, operator); *p = c; - memset (&inst, '\0', sizeof (inst)); - sprintf (inst.str, "%s", insnstr); + memset (&s3_inst, '\0', sizeof (s3_inst)); + sprintf (s3_inst.str, "%s", insnstr); if (opcode) { - inst.instruction = opcode->value; - inst.relax_inst = opcode->relax_value; - inst.type = opcode->type; - inst.size = GET_INSN_SIZE (inst.type); - inst.relax_size = 0; - inst.bwarn = 0; - sprintf (inst.name, "%s", opcode->template); - strcpy (inst.reg, ""); - inst.error = NULL; - inst.reloc.type = BFD_RELOC_NONE; + s3_inst.instruction = opcode->value; + s3_inst.relax_inst = opcode->relax_value; + s3_inst.type = opcode->type; + s3_inst.size = s3_GET_INSN_SIZE (s3_inst.type); + s3_inst.relax_size = 0; + s3_inst.bwarn = 0; + sprintf (s3_inst.name, "%s", opcode->template); + strcpy (s3_inst.reg, ""); + s3_inst.error = NULL; + s3_inst.reloc.type = BFD_RELOC_NONE; (*opcode->parms) (p); - /* It indicates current instruction is a macro instruction if inst.bwarn equals -1. */ - if ((inst.bwarn != -1) && (!inst.error) && (gen_frag_p)) - gen_insn_frag (&inst, NULL); + /* It indicates current instruction is a macro instruction if s3_inst.bwarn equals -1. */ + if ((s3_inst.bwarn != -1) && (!s3_inst.error) && (gen_frag_p)) + s3_gen_insn_frag (&s3_inst, NULL); } else - inst.error = _("unrecognized opcode"); + s3_inst.error = _("unrecognized opcode"); } static int -append_insn (char *str, bfd_boolean gen_frag_p) +s3_append_insn (char *str, bfd_boolean gen_frag_p) { - int retval = SUCCESS; + int retval = s3_SUCCESS; - parse_16_32_inst (str, gen_frag_p); + s3_parse_16_32_inst (str, gen_frag_p); - if (inst.error) + if (s3_inst.error) { - retval = (int) FAIL; - as_bad (_("%s -- `%s'"), inst.error, inst.str); - inst.error = NULL; + retval = (int) s3_FAIL; + as_bad (_("%s -- `%s'"), s3_inst.error, s3_inst.str); + s3_inst.error = NULL; } return retval; } -/* Handle mv! reg_high, reg_low; - mv! reg_low, reg_high; - mv! reg_low, reg_low; */ static void -do16_mv_rdrs (char *str) +s3_do16_mv_cmp (char *str) { - int reg_rd; - int reg_rs; - char *backupstr = NULL; + s3_skip_whitespace (str); - backupstr = str; - skip_whitespace (str); - - if ((reg_rd = reg_required_here (&str, 8, REG_TYPE_SCORE)) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || (reg_rs = reg_required_here (&str, 4, REG_TYPE_SCORE)) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_reg_required_here (&str, 5, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 0, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) { return; } - else - { - /* Case 1 : mv! or mlfh!. */ - if (reg_rd < 16) - { - if (reg_rs < 16) - { - inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 20) - | (((inst.instruction >> 4) & 0xf) << 15) | (0xf << 10); - inst.relax_size = 4; - } - else - { - char append_str[MAX_LITERAL_POOL_SIZE]; - - sprintf (append_str, "mlfh! %s", backupstr); - if (append_insn (append_str, TRUE) == (int) FAIL) - return; - /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ - inst.bwarn = -1; - } - } - /* Case 2 : mhfl!. */ - else - { - if (reg_rs > 16) - { - SET_INSN_ERROR (BAD_ARGS); - return; - } - else - { - char append_str[MAX_LITERAL_POOL_SIZE]; +} - sprintf (append_str, "mhfl! %s", backupstr); - if (append_insn (append_str, TRUE) == (int) FAIL) - return; +static void +s3_do16_cmpi (char *str) +{ + s3_skip_whitespace (str); - /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ - inst.bwarn = -1; - } - } + if (s3_reg_required_here (&str, 5, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 0, _SIMM5) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + { + return; } } static void -do16_rdi4 (char *str) +s3_do16_addi (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reglow_required_here (&str, 8) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || data_op2 (&str, 3, _IMM4) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_reglow_required_here (&str, 6) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 0, _SIMM6) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) { return; } - else - { - if (((inst.instruction >> 3) & 0x10) == 0) /* for judge is addei or subei : bit 5 =0 : addei */ - { - if (((inst.instruction >> 3) & 0xf) != 0xf) - { - inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 20) - | ((1 << ((inst.instruction >> 3) & 0xf)) << 1); - inst.relax_size = 4; - } - else - { - inst.relax_inst = 0x8000; - } - } - else - { - if (((inst.instruction >> 3) & 0xf) != 0xf) - { - inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 20) - | (((-(1 << ((inst.instruction >> 3) & 0xf))) & 0xffff) << 1); - inst.relax_size = 4; - } - else - { - inst.relax_inst = 0x8000; - } - } - } } +/* Handle bitclr! / bitset! / bittst! / bittgl! */ static void -do16_rdi5 (char *str) +s3_do16_rdi5 (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (reglow_required_here (&str, 8) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || data_op2 (&str, 3, _IMM5) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_reglow_required_here (&str, 5) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 0, _IMM5) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) return; else { - inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 20) - | (((inst.instruction >> 8) & 0xf) << 15) | (((inst.instruction >> 3) & 0x1f) << 10); - inst.relax_size = 4; + s3_inst.relax_inst |= (((s3_inst.instruction >>5) & 0xf) << 20) + | (((s3_inst.instruction >> 5) & 0xf) << 15) | (((s3_inst.instruction ) & 0x1f) << 10); + s3_inst.relax_size = 4; } } -/* Handle sdbbp. */ + +/* Handle sdbbp!. */ static void -do16_xi5 (char *str) +s3_do16_xi5 (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if (data_op2 (&str, 3, _IMM5) == (int) FAIL || end_of_line (str) == (int) FAIL) + if (s3_data_op2 (&str, 0, _IMM5) == (int) s3_FAIL || s3_end_of_line (str) == (int) s3_FAIL) return; - else - { - inst.relax_inst |= (((inst.instruction >> 3) & 0x1f) << 15); - inst.relax_size = 4; - } } /* Check that an immediate is word alignment or half word alignment. If so, convert it to the right format. */ static int -validate_immediate_align (int val, unsigned int data_type) +s3_validate_immediate_align (int val, unsigned int data_type) { if (data_type == _IMM5_RSHIFT_1) { if (val % 2) { - inst.error = _("address offset must be half word alignment"); - return (int) FAIL; + s3_inst.error = _("address offset must be half word alignment"); + return (int) s3_FAIL; } } else if ((data_type == _IMM5_RSHIFT_2) || (data_type == _IMM10_RSHIFT_2)) { if (val % 4) { - inst.error = _("address offset must be word alignment"); - return (int) FAIL; + s3_inst.error = _("address offset must be word alignment"); + return (int) s3_FAIL; } } - return SUCCESS; + return s3_SUCCESS; } static int -exp_ldst_offset (char **str, int shift, unsigned int data_type) +s3_exp_ldst_offset (char **str, int shift, unsigned int data_type) { char *dataptr; @@ -2621,32 +2881,32 @@ exp_ldst_offset (char **str, int shift, unsigned int data_type) data_type += 24; } - if (my_get_expression (&inst.reloc.exp, str) == (int) FAIL) - return (int) FAIL; + if (s3_my_get_expression (&s3_inst.reloc.exp, str) == (int) s3_FAIL) + return (int) s3_FAIL; - if (inst.reloc.exp.X_op == O_constant) + if (s3_inst.reloc.exp.X_op == O_constant) { /* Need to check the immediate align. */ - int value = validate_immediate_align (inst.reloc.exp.X_add_number, data_type); + int value = s3_validate_immediate_align (s3_inst.reloc.exp.X_add_number, data_type); - if (value == (int) FAIL) - return (int) FAIL; + if (value == (int) s3_FAIL) + return (int) s3_FAIL; - value = validate_immediate (inst.reloc.exp.X_add_number, data_type, 0); - if (value == (int) FAIL) + value = s3_validate_immediate (s3_inst.reloc.exp.X_add_number, data_type, 0); + if (value == (int) s3_FAIL) { if (data_type < 30) - sprintf (err_msg, + sprintf (s3_err_msg, _("invalid constant: %d bit expression not in range %d..%d"), - score_df_range[data_type].bits, - score_df_range[data_type].range[0], score_df_range[data_type].range[1]); + s3_score_df_range[data_type].bits, + s3_score_df_range[data_type].range[0], s3_score_df_range[data_type].range[1]); else - sprintf (err_msg, + sprintf (s3_err_msg, _("invalid constant: %d bit expression not in range %d..%d"), - score_df_range[data_type - 24].bits, - score_df_range[data_type - 24].range[0], score_df_range[data_type - 24].range[1]); - inst.error = err_msg; - return (int) FAIL; + s3_score_df_range[data_type - 24].bits, + s3_score_df_range[data_type - 24].range[0], s3_score_df_range[data_type - 24].range[1]); + s3_inst.error = s3_err_msg; + return (int) s3_FAIL; } if (data_type == _IMM5_RSHIFT_1) @@ -2658,23 +2918,23 @@ exp_ldst_offset (char **str, int shift, unsigned int data_type) value >>= 2; } - if (score_df_range[data_type].range[0] != 0) + if (s3_score_df_range[data_type].range[0] != 0) { - value &= (1 << score_df_range[data_type].bits) - 1; + value &= (1 << s3_score_df_range[data_type].bits) - 1; } - inst.instruction |= value << shift; + s3_inst.instruction |= value << shift; } else { - inst.reloc.pc_rel = 0; + s3_inst.reloc.pc_rel = 0; } - return SUCCESS; + return s3_SUCCESS; } static void -do_ldst_insn (char *str) +s3_do_ldst_insn (char *str) { int pre_inc = 0; int conflict_reg; @@ -2686,24 +2946,24 @@ do_ldst_insn (char *str) int ldst_idx = 0; strbak = str; - skip_whitespace (str); + s3_skip_whitespace (str); - if (((conflict_reg = reg_required_here (&str, 20, REG_TYPE_SCORE)) == (int) FAIL) - || (skip_past_comma (&str) == (int) FAIL)) + if (((conflict_reg = s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE)) == (int) s3_FAIL) + || (s3_skip_past_comma (&str) == (int) s3_FAIL)) return; /* ld/sw rD, [rA, simm15] ld/sw rD, [rA]+, simm12 ld/sw rD, [rA, simm12]+. */ if (*str == '[') { str++; - skip_whitespace (str); + s3_skip_whitespace (str); - if ((reg = reg_required_here (&str, 15, REG_TYPE_SCORE)) == (int) FAIL) + if ((reg = s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE)) == (int) s3_FAIL) return; /* Conflicts can occur on stores as well as loads. */ conflict_reg = (conflict_reg == reg); - skip_whitespace (str); + s3_skip_whitespace (str); temp = str + 1; /* The latter will process decimal/hex expression. */ /* ld/sw rD, [rA]+, simm12 ld/sw rD, [rA]+. */ @@ -2714,15 +2974,15 @@ do_ldst_insn (char *str) { str++; /* ld/sw rD, [rA]+, simm12. */ - if (skip_past_comma (&str) == SUCCESS) + if (s3_skip_past_comma (&str) == s3_SUCCESS) { - if ((exp_ldst_offset (&str, 3, _SIMM12) == (int) FAIL) - || (end_of_line (str) == (int) FAIL)) + if ((s3_exp_ldst_offset (&str, 3, _SIMM12) == (int) s3_FAIL) + || (s3_end_of_line (str) == (int) s3_FAIL)) return; if (conflict_reg) { - unsigned int ldst_func = inst.instruction & OPC_PSEUDOLDST_MASK; + unsigned int ldst_func = s3_inst.instruction & OPC_PSEUDOLDST_MASK; if ((ldst_func == INSN_LH) || (ldst_func == INSN_LHU) @@ -2730,37 +2990,25 @@ do_ldst_insn (char *str) || (ldst_func == INSN_LB) || (ldst_func == INSN_LBU)) { - inst.error = _("register same as write-back base"); + s3_inst.error = _("register same as write-back base"); return; } } - ldst_idx = inst.instruction & OPC_PSEUDOLDST_MASK; - inst.instruction &= ~OPC_PSEUDOLDST_MASK; - inst.instruction |= score_ldst_insns[ldst_idx * 3 + LDST_POST].value; + ldst_idx = s3_inst.instruction & OPC_PSEUDOLDST_MASK; + s3_inst.instruction &= ~OPC_PSEUDOLDST_MASK; + s3_inst.instruction |= s3_score_ldst_insns[ldst_idx * 3 + LDST_POST].value; /* lw rD, [rA]+, 4 convert to pop rD, [rA]. */ - if ((inst.instruction & 0x3e000007) == 0x0e000000) + if ((s3_inst.instruction & 0x3e000007) == 0x0e000000) { - /* rs = r0-r7, offset = 4 */ - if ((((inst.instruction >> 15) & 0x18) == 0) - && (((inst.instruction >> 3) & 0xfff) == 4)) + /* rs = r0, offset = 4 */ + if ((((s3_inst.instruction >> 15) & 0x1f) == 0) + && (((s3_inst.instruction >> 3) & 0xfff) == 4)) { - /* Relax to pophi. */ - if ((((inst.instruction >> 20) & 0x10) == 0x10)) - { - inst.relax_inst = 0x0000200a | (((inst.instruction >> 20) & 0xf) - << 8) | 1 << 7 | - (((inst.instruction >> 15) & 0x7) << 4); - } - /* Relax to pop. */ - else - { - inst.relax_inst = 0x0000200a | (((inst.instruction >> 20) & 0xf) - << 8) | 0 << 7 | - (((inst.instruction >> 15) & 0x7) << 4); - } - inst.relax_size = 2; + /* Relax to pop!. */ + s3_inst.relax_inst = 0x0040 | ((s3_inst.instruction >> 20) & 0x1f); + s3_inst.relax_size = 2; } } return; @@ -2768,74 +3016,76 @@ do_ldst_insn (char *str) /* ld/sw rD, [rA]+ convert to ld/sw rD, [rA, 0]+. */ else { - SET_INSN_ERROR (NULL); - if (end_of_line (str) == (int) FAIL) + s3_SET_INSN_ERROR (NULL); + if (s3_end_of_line (str) == (int) s3_FAIL) { return; } pre_inc = 1; - value = validate_immediate (inst.reloc.exp.X_add_number, _SIMM12, 0); - value &= (1 << score_df_range[_SIMM12].bits) - 1; - ldst_idx = inst.instruction & OPC_PSEUDOLDST_MASK; - inst.instruction &= ~OPC_PSEUDOLDST_MASK; - inst.instruction |= score_ldst_insns[ldst_idx * 3 + pre_inc].value; - inst.instruction |= value << 3; - inst.relax_inst = 0x8000; + value = s3_validate_immediate (s3_inst.reloc.exp.X_add_number, _SIMM12, 0); + value &= (1 << s3_score_df_range[_SIMM12].bits) - 1; + ldst_idx = s3_inst.instruction & OPC_PSEUDOLDST_MASK; + s3_inst.instruction &= ~OPC_PSEUDOLDST_MASK; + s3_inst.instruction |= s3_score_ldst_insns[ldst_idx * 3 + pre_inc].value; + s3_inst.instruction |= value << 3; + s3_inst.relax_inst = 0x8000; return; } } /* ld/sw rD, [rA] convert to ld/sw rD, [rA, simm15]. */ else { - if (end_of_line (str) == (int) FAIL) + if (s3_end_of_line (str) == (int) s3_FAIL) return; - ldst_idx = inst.instruction & OPC_PSEUDOLDST_MASK; - inst.instruction &= ~OPC_PSEUDOLDST_MASK; - inst.instruction |= score_ldst_insns[ldst_idx * 3 + LDST_NOUPDATE].value; + ldst_idx = s3_inst.instruction & OPC_PSEUDOLDST_MASK; + s3_inst.instruction &= ~OPC_PSEUDOLDST_MASK; + s3_inst.instruction |= s3_score_ldst_insns[ldst_idx * 3 + LDST_NOUPDATE].value; /* lbu rd, [rs] -> lbu! rd, [rs] */ if (ldst_idx == INSN_LBU) { - inst.relax_inst = INSN16_LBU; + s3_inst.relax_inst = INSN16_LBU; } else if (ldst_idx == INSN_LH) { - inst.relax_inst = INSN16_LH; + s3_inst.relax_inst = INSN16_LH; } else if (ldst_idx == INSN_LW) { - inst.relax_inst = INSN16_LW; + s3_inst.relax_inst = INSN16_LW; } else if (ldst_idx == INSN_SB) { - inst.relax_inst = INSN16_SB; + s3_inst.relax_inst = INSN16_SB; } else if (ldst_idx == INSN_SH) { - inst.relax_inst = INSN16_SH; + s3_inst.relax_inst = INSN16_SH; } else if (ldst_idx == INSN_SW) { - inst.relax_inst = INSN16_SW; + s3_inst.relax_inst = INSN16_SW; } else { - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } /* lw/lh/lbu/sw/sh/sb, offset = 0, relax to 16 bit instruction. */ - if ((ldst_idx == INSN_LBU) + /* if ((ldst_idx == INSN_LBU) || (ldst_idx == INSN_LH) || (ldst_idx == INSN_LW) - || (ldst_idx == INSN_SB) || (ldst_idx == INSN_SH) || (ldst_idx == INSN_SW)) + || (ldst_idx == INSN_SB) || (ldst_idx == INSN_SH) || (ldst_idx == INSN_SW))*/ + if ( (ldst_idx == INSN_LW)|| (ldst_idx == INSN_SW)) { - if ((((inst.instruction >> 15) & 0x10) == 0) && (((inst.instruction >> 20) & 0x10) == 0)) + /* ra only 3 bit , rd only 4 bit for lw! and sw! */ + if ((((s3_inst.instruction >> 15) & 0x18) == 0) && (((s3_inst.instruction >> 20) & 0x10) == 0)) { - inst.relax_inst |= (2 << 12) | (((inst.instruction >> 20) & 0xf) << 8) | - (((inst.instruction >> 15) & 0xf) << 4); - inst.relax_size = 2; + s3_inst.relax_inst |= (((s3_inst.instruction >> 20) & 0xf) << 8) | + (((s3_inst.instruction >> 15) & 0x7) << 5); + s3_inst.relax_size = 2; } } @@ -2845,23 +3095,23 @@ do_ldst_insn (char *str) /* ld/sw rD, [rA, simm15] ld/sw rD, [rA, simm12]+. */ else { - if (skip_past_comma (&str) == (int) FAIL) + if (s3_skip_past_comma (&str) == (int) s3_FAIL) { - inst.error = _("pre-indexed expression expected"); + s3_inst.error = _("pre-indexed expression expected"); return; } - if (my_get_expression (&inst.reloc.exp, &str) == (int) FAIL) + if (s3_my_get_expression (&s3_inst.reloc.exp, &str) == (int) s3_FAIL) return; - skip_whitespace (str); + s3_skip_whitespace (str); if (*str++ != ']') { - inst.error = _("missing ]"); + s3_inst.error = _("missing ]"); return; } - skip_whitespace (str); + s3_skip_whitespace (str); /* ld/sw rD, [rA, simm12]+. */ if (*str == '+') { @@ -2869,7 +3119,7 @@ do_ldst_insn (char *str) pre_inc = 1; if (conflict_reg) { - unsigned int ldst_func = inst.instruction & OPC_PSEUDOLDST_MASK; + unsigned int ldst_func = s3_inst.instruction & OPC_PSEUDOLDST_MASK; if ((ldst_func == INSN_LH) || (ldst_func == INSN_LHU) @@ -2877,16 +3127,16 @@ do_ldst_insn (char *str) || (ldst_func == INSN_LB) || (ldst_func == INSN_LBU)) { - inst.error = _("register same as write-back base"); + s3_inst.error = _("register same as write-back base"); return; } } } - if (end_of_line (str) == (int) FAIL) + if (s3_end_of_line (str) == (int) s3_FAIL) return; - if (inst.reloc.exp.X_op == O_constant) + if (s3_inst.reloc.exp.X_op == O_constant) { int value; unsigned int data_type; @@ -2915,254 +3165,100 @@ do_ldst_insn (char *str) data_type += 24; } - value = validate_immediate (inst.reloc.exp.X_add_number, data_type, 0); - if (value == (int) FAIL) + value = s3_validate_immediate (s3_inst.reloc.exp.X_add_number, data_type, 0); + if (value == (int) s3_FAIL) { if (data_type < 30) - sprintf (err_msg, + sprintf (s3_err_msg, _("invalid constant: %d bit expression not in range %d..%d"), - score_df_range[data_type].bits, - score_df_range[data_type].range[0], score_df_range[data_type].range[1]); + s3_score_df_range[data_type].bits, + s3_score_df_range[data_type].range[0], s3_score_df_range[data_type].range[1]); else - sprintf (err_msg, + sprintf (s3_err_msg, _("invalid constant: %d bit expression not in range %d..%d"), - score_df_range[data_type - 24].bits, - score_df_range[data_type - 24].range[0], - score_df_range[data_type - 24].range[1]); - inst.error = err_msg; + s3_score_df_range[data_type - 24].bits, + s3_score_df_range[data_type - 24].range[0], + s3_score_df_range[data_type - 24].range[1]); + s3_inst.error = s3_err_msg; return; } - value &= (1 << score_df_range[data_type].bits) - 1; - ldst_idx = inst.instruction & OPC_PSEUDOLDST_MASK; - inst.instruction &= ~OPC_PSEUDOLDST_MASK; - inst.instruction |= score_ldst_insns[ldst_idx * 3 + pre_inc].value; + value &= (1 << s3_score_df_range[data_type].bits) - 1; + ldst_idx = s3_inst.instruction & OPC_PSEUDOLDST_MASK; + s3_inst.instruction &= ~OPC_PSEUDOLDST_MASK; + s3_inst.instruction |= s3_score_ldst_insns[ldst_idx * 3 + pre_inc].value; if (pre_inc == 1) - inst.instruction |= value << 3; + s3_inst.instruction |= value << 3; else - inst.instruction |= value; + s3_inst.instruction |= value; /* lw rD, [rA, simm15] */ - if ((inst.instruction & 0x3e000000) == 0x20000000) + if ((s3_inst.instruction & 0x3e000000) == 0x20000000) { - /* Both rD and rA are in [r0 - r15]. */ - if ((((inst.instruction >> 15) & 0x10) == 0) - && (((inst.instruction >> 20) & 0x10) == 0)) + /* rD in [r0 - r15]. , ra in [r0-r7] */ + if ((((s3_inst.instruction >> 15) & 0x18) == 0) + && (((s3_inst.instruction >> 20) & 0x10) == 0)) { - /* simm15 = 0, lw -> lw!. */ - if ((inst.instruction & 0x7fff) == 0) + /* simm = [bit 7], lw -> lw!. */ + if (((s3_inst.instruction & 0x7f80) == 0)&&((s3_inst.instruction &0x3)==0)) { - inst.relax_inst |= (((inst.instruction >> 15) & 0xf) << 4) - | (((inst.instruction >> 20) & 0xf) << 8); - inst.relax_size = 2; - } - /* rA = r2, lw -> lwp!. */ - else if ((((inst.instruction >> 15) & 0xf) == 2) - && ((inst.instruction & 0x3) == 0) - && ((inst.instruction & 0x7fff) < 128)) - { - inst.relax_inst = 0x7000 | (((inst.instruction >> 20) & 0xf) << 8) - | (((inst.instruction & 0x7fff) >> 2) << 3); - inst.relax_size = 2; + s3_inst.relax_inst |= (((s3_inst.instruction >> 15) & 0x7) << 5) + | (((s3_inst.instruction >> 20) & 0xf) << 8)|(value>>2); + s3_inst.relax_size = 2; } else { - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } } else { - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } } /* sw rD, [rA, simm15] */ - else if ((inst.instruction & 0x3e000000) == 0x28000000) + else if ((s3_inst.instruction & 0x3e000000) == 0x28000000) { - /* Both rD and rA are in [r0 - r15]. */ - if ((((inst.instruction >> 15) & 0x10) == 0) && (((inst.instruction >> 20) & 0x10) == 0)) + /* rD is in [r0 - r15] and ra in [r0-r7] */ + if ((((s3_inst.instruction >> 15) & 0x18) == 0) && (((s3_inst.instruction >> 20) & 0x10) == 0)) { - /* simm15 = 0, sw -> sw!. */ - if ((inst.instruction & 0x7fff) == 0) + /* simm15 =7 bit , sw -> sw!. */ + if (((s3_inst.instruction & 0x7f80) == 0)&&((s3_inst.instruction &0x3)==0)) { - inst.relax_inst |= (((inst.instruction >> 15) & 0xf) << 4) - | (((inst.instruction >> 20) & 0xf) << 8); - inst.relax_size = 2; + s3_inst.relax_inst |= (((s3_inst.instruction >> 15) & 0xf) << 5) + | (((s3_inst.instruction >> 20) & 0xf) << 8)|(value>>2); + s3_inst.relax_size = 2; } /* rA = r2, sw -> swp!. */ - else if ((((inst.instruction >> 15) & 0xf) == 2) - && ((inst.instruction & 0x3) == 0) - && ((inst.instruction & 0x7fff) < 128)) - { - inst.relax_inst = 0x7004 | (((inst.instruction >> 20) & 0xf) << 8) - | (((inst.instruction & 0x7fff) >> 2) << 3); - inst.relax_size = 2; - } else { - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } } else { - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } } /* sw rD, [rA, simm15]+ sw pre. */ - else if ((inst.instruction & 0x3e000007) == 0x06000004) + else if ((s3_inst.instruction & 0x3e000007) == 0x06000004) { - /* rA is in [r0 - r7], and simm15 = -4. */ - if ((((inst.instruction >> 15) & 0x18) == 0) - && (((inst.instruction >> 3) & 0xfff) == 0xffc)) + /* simm15 = -4. and ra==r0 */ + if ((((s3_inst.instruction >> 15) & 0x1f) == 0) + && (((s3_inst.instruction >> 3) & 0xfff) == 0xffc)) { - /* sw -> pushhi!. */ - if ((((inst.instruction >> 20) & 0x10) == 0x10)) - { - inst.relax_inst = 0x0000200e | (((inst.instruction >> 20) & 0xf) << 8) - | 1 << 7 | (((inst.instruction >> 15) & 0x7) << 4); - inst.relax_size = 2; - } /* sw -> push!. */ - else - { - inst.relax_inst = 0x0000200e | (((inst.instruction >> 20) & 0xf) << 8) - | 0 << 7 | (((inst.instruction >> 15) & 0x7) << 4); - inst.relax_size = 2; - } - } - else - { - inst.relax_inst = 0x8000; - } - } - /* lh rD, [rA, simm15] */ - else if ((inst.instruction & 0x3e000000) == 0x22000000) - { - /* Both rD and rA are in [r0 - r15]. */ - if ((((inst.instruction >> 15) & 0x10) == 0) && (((inst.instruction >> 20) & 0x10) == 0)) - { - /* simm15 = 0, lh -> lh!. */ - if ((inst.instruction & 0x7fff) == 0) - { - inst.relax_inst |= (((inst.instruction >> 15) & 0xf) << 4) - | (((inst.instruction >> 20) & 0xf) << 8); - inst.relax_size = 2; - } - /* rA = r2, lh -> lhp!. */ - else if ((((inst.instruction >> 15) & 0xf) == 2) - && ((inst.instruction & 0x1) == 0) - && ((inst.instruction & 0x7fff) < 64)) - { - inst.relax_inst = 0x7001 | (((inst.instruction >> 20) & 0xf) << 8) - | (((inst.instruction & 0x7fff) >> 1) << 3); - inst.relax_size = 2; - } - else - { - inst.relax_inst = 0x8000; - } - } - else - { - inst.relax_inst = 0x8000; - } - } - /* sh rD, [rA, simm15] */ - else if ((inst.instruction & 0x3e000000) == 0x2a000000) - { - /* Both rD and rA are in [r0 - r15]. */ - if ((((inst.instruction >> 15) & 0x10) == 0) && (((inst.instruction >> 20) & 0x10) == 0)) - { - /* simm15 = 0, sh -> sh!. */ - if ((inst.instruction & 0x7fff) == 0) - { - inst.relax_inst |= (((inst.instruction >> 15) & 0xf) << 4) - | (((inst.instruction >> 20) & 0xf) << 8); - inst.relax_size = 2; - } - /* rA = r2, sh -> shp!. */ - else if ((((inst.instruction >> 15) & 0xf) == 2) - && ((inst.instruction & 0x1) == 0) - && ((inst.instruction & 0x7fff) < 64)) - { - inst.relax_inst = 0x7005 | (((inst.instruction >> 20) & 0xf) << 8) - | (((inst.instruction & 0x7fff) >> 1) << 3); - inst.relax_size = 2; - } - else - { - inst.relax_inst = 0x8000; - } - } - else - { - inst.relax_inst = 0x8000; - } - } - /* lbu rD, [rA, simm15] */ - else if ((inst.instruction & 0x3e000000) == 0x2c000000) - { - /* Both rD and rA are in [r0 - r15]. */ - if ((((inst.instruction >> 15) & 0x10) == 0) && (((inst.instruction >> 20) & 0x10) == 0)) - { - /* simm15 = 0, lbu -> lbu!. */ - if ((inst.instruction & 0x7fff) == 0) - { - inst.relax_inst |= (((inst.instruction >> 15) & 0xf) << 4) - | (((inst.instruction >> 20) & 0xf) << 8); - inst.relax_size = 2; - } - /* rA = r2, lbu -> lbup!. */ - else if ((((inst.instruction >> 15) & 0xf) == 2) - && ((inst.instruction & 0x7fff) < 32)) - { - inst.relax_inst = 0x7003 | (((inst.instruction >> 20) & 0xf) << 8) - | ((inst.instruction & 0x7fff) << 3); - inst.relax_size = 2; - } - else - { - inst.relax_inst = 0x8000; - } + s3_inst.relax_inst = 0x0060 | ((s3_inst.instruction >> 20) & 0x1f); + s3_inst.relax_size = 2; } else { - inst.relax_inst = 0x8000; - } - } - /* sb rD, [rA, simm15] */ - else if ((inst.instruction & 0x3e000000) == 0x2e000000) - { - /* Both rD and rA are in [r0 - r15]. */ - if ((((inst.instruction >> 15) & 0x10) == 0) && (((inst.instruction >> 20) & 0x10) == 0)) - { - /* simm15 = 0, sb -> sb!. */ - if ((inst.instruction & 0x7fff) == 0) - { - inst.relax_inst |= (((inst.instruction >> 15) & 0xf) << 4) - | (((inst.instruction >> 20) & 0xf) << 8); - inst.relax_size = 2; - } - /* rA = r2, sb -> sb!. */ - else if ((((inst.instruction >> 15) & 0xf) == 2) - && ((inst.instruction & 0x7fff) < 32)) - { - inst.relax_inst = 0x7007 | (((inst.instruction >> 20) & 0xf) << 8) - | ((inst.instruction & 0x7fff) << 3); - inst.relax_size = 2; - } - else - { - inst.relax_inst = 0x8000; - } - } - else - { - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } } else { - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } return; @@ -3170,24 +3266,23 @@ do_ldst_insn (char *str) else { /* FIXME: may set error, for there is no ld/sw rD, [rA, label] */ - inst.reloc.pc_rel = 0; + s3_inst.reloc.pc_rel = 0; } } } else { - inst.error = BAD_ARGS; + s3_inst.error = s3_BAD_ARGS; } } /* Handle cache. */ - static void -do_cache (char *str) +s3_do_cache (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if ((data_op2 (&str, 20, _IMM5) == (int) FAIL) || (skip_past_comma (&str) == (int) FAIL)) + if ((s3_data_op2 (&str, 20, _IMM5) == (int) s3_FAIL) || (s3_skip_past_comma (&str) == (int) s3_FAIL)) { return; } @@ -3195,27 +3290,27 @@ do_cache (char *str) { int cache_op; - cache_op = (inst.instruction >> 20) & 0x1F; - sprintf (inst.name, "cache %d", cache_op); + cache_op = (s3_inst.instruction >> 20) & 0x1F; + sprintf (s3_inst.name, "cache %d", cache_op); } if (*str == '[') { str++; - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 15, REG_TYPE_SCORE) == (int) FAIL) + if (s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL) return; - skip_whitespace (str); + s3_skip_whitespace (str); /* cache op, [rA] */ - if (skip_past_comma (&str) == (int) FAIL) + if (s3_skip_past_comma (&str) == (int) s3_FAIL) { - SET_INSN_ERROR (NULL); + s3_SET_INSN_ERROR (NULL); if (*str != ']') { - inst.error = _("missing ]"); + s3_inst.error = _("missing ]"); return; } str++; @@ -3223,357 +3318,593 @@ do_cache (char *str) /* cache op, [rA, simm15] */ else { - if (exp_ldst_offset (&str, 0, _SIMM15) == (int) FAIL) + if (s3_exp_ldst_offset (&str, 0, _SIMM15) == (int) s3_FAIL) { return; } - skip_whitespace (str); + s3_skip_whitespace (str); if (*str++ != ']') { - inst.error = _("missing ]"); + s3_inst.error = _("missing ]"); return; } } - if (end_of_line (str) == (int) FAIL) + if (s3_end_of_line (str) == (int) s3_FAIL) return; } else { - inst.error = BAD_ARGS; + s3_inst.error = s3_BAD_ARGS; } } static void -do_crdcrscrsimm5 (char *str) +s3_do_crdcrscrsimm5 (char *str) { char *strbak; strbak = str; - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE_CR) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || reg_required_here (&str, 15, REG_TYPE_SCORE_CR) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL - || reg_required_here (&str, 10, REG_TYPE_SCORE_CR) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL) + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE_CR) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE_CR) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 10, s3_REG_TYPE_SCORE_CR) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL) { str = strbak; /* cop1 cop_code20. */ - if (data_op2 (&str, 5, _IMM20) == (int) FAIL) + if (s3_data_op2 (&str, 5, _IMM20) == (int) s3_FAIL) return; } else { - if (data_op2 (&str, 5, _IMM5) == (int) FAIL) + if (s3_data_op2 (&str, 5, _IMM5) == (int) s3_FAIL) return; } - end_of_line (str); + s3_end_of_line (str); } /* Handle ldc/stc. */ static void -do_ldst_cop (char *str) +s3_do_ldst_cop (char *str) { - skip_whitespace (str); + s3_skip_whitespace (str); - if ((reg_required_here (&str, 15, REG_TYPE_SCORE_CR) == (int) FAIL) - || (skip_past_comma (&str) == (int) FAIL)) + if ((s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE_CR) == (int) s3_FAIL) + || (s3_skip_past_comma (&str) == (int) s3_FAIL)) return; if (*str == '[') { str++; - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 20, REG_TYPE_SCORE) == (int) FAIL) + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) == (int) s3_FAIL) return; - skip_whitespace (str); + s3_skip_whitespace (str); if (*str++ != ']') { - if (exp_ldst_offset (&str, 5, _IMM10_RSHIFT_2) == (int) FAIL) + if (s3_exp_ldst_offset (&str, 5, _IMM10_RSHIFT_2) == (int) s3_FAIL) return; - skip_whitespace (str); + s3_skip_whitespace (str); if (*str++ != ']') { - inst.error = _("missing ]"); + s3_inst.error = _("missing ]"); return; } } - end_of_line (str); + s3_end_of_line (str); } else - inst.error = BAD_ARGS; + s3_inst.error = s3_BAD_ARGS; } static void -do16_ldst_insn (char *str) +s3_do16_ldst_insn (char *str) { - skip_whitespace (str); + int conflict_reg=0; + char * temp; + s3_skip_whitespace (str); - if ((reglow_required_here (&str, 8) == (int) FAIL) || (skip_past_comma (&str) == (int) FAIL)) + if ((s3_reglow_required_here (&str, 8) == (int) s3_FAIL) || (s3_skip_past_comma (&str) == (int) s3_FAIL)) return; if (*str == '[') { - int reg; str++; - skip_whitespace (str); + s3_skip_whitespace (str); - if ((reg = reglow_required_here (&str, 4)) == (int) FAIL) + if ((conflict_reg = s3_reglow_required_here (&str, 5)) == (int) s3_FAIL) return; + if (conflict_reg&0x8) + { + sprintf (s3_err_msg, _("invalid register number: %d is not in [r0--r7]"),conflict_reg); + s3_inst.error=s3_err_msg; + return ; + } - skip_whitespace (str); - if (*str++ == ']') + s3_skip_whitespace (str); + temp = str + 1; /* The latter will process decimal/hex expression. */ + if (*str == ']') { - if (end_of_line (str) == (int) FAIL) + str++; + if (s3_end_of_line (str) == (int) s3_FAIL) return; - else - { - inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 20) - | (((inst.instruction >> 4) & 0xf) << 15); - inst.relax_size = 4; - } } else { - inst.error = _("missing ]"); + if (s3_skip_past_comma (&str) == (int) s3_FAIL) + { + s3_inst.error = _("comma is expected"); + return; + } + if (s3_my_get_expression (&s3_inst.reloc.exp, &str) == (int) s3_FAIL) + return; + s3_skip_whitespace (str); + if (*str++ != ']') + { + s3_inst.error = _("missing ]"); + return; + } + if (s3_end_of_line (str) == (int) s3_FAIL) + return; + if (s3_inst.reloc.exp.X_op == O_constant) + { + int value; + unsigned int data_type; + data_type = _IMM5_RSHIFT_2; + value = s3_validate_immediate (s3_inst.reloc.exp.X_add_number, data_type, 0); + if (value == (int) s3_FAIL) + { + if (data_type < 30) + sprintf (s3_err_msg, + _("invalid constant: %d bit expression not in range %d..%d"), + s3_score_df_range[data_type].bits, + s3_score_df_range[data_type].range[0], s3_score_df_range[data_type].range[1]); + s3_inst.error = s3_err_msg; + return; + } + if (value &0x3) + { + sprintf (s3_err_msg, _("invalid constant: %d is not word align integer"),value); + s3_inst.error=s3_err_msg; + return ; + } + + value >>=2; + s3_inst.instruction |= value; + } } + } else { - inst.error = BAD_ARGS; + sprintf (s3_err_msg, _("missing [")); + s3_inst.error=s3_err_msg; + return ; } } -/* Handle lbup!/lhp!/ldiu!/lwp!/sbp!/shp!/swp!. */ static void -do16_ldst_imm_insn (char *str) +s3_do_lw48 (char *str) { - char data_exp[MAX_LITERAL_POOL_SIZE]; - int reg_rd; - char *dataptr = NULL, *pp = NULL; - int cnt = 0; - int assign_data = (int) FAIL; - unsigned int ldst_func; + bfd_signed_vma val = 0; - skip_whitespace (str); + s3_skip_whitespace (str); - if (((reg_rd = reglow_required_here (&str, 8)) == (int) FAIL) - || (skip_past_comma (&str) == (int) FAIL)) + if ((s3_reg_required_here (&str, 37, s3_REG_TYPE_SCORE) == (int) s3_FAIL) + || (s3_skip_past_comma (&str) == (int) s3_FAIL)) return; - skip_whitespace (str); - dataptr = str; + if (s3_my_get_expression (&s3_inst.reloc.exp, &str) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + { + return; + } - while ((*dataptr != '\0') && (*dataptr != '|') && (cnt <= MAX_LITERAL_POOL_SIZE)) + /* Check word align for lw48 rd, value. */ + if ((s3_inst.reloc.exp.X_add_symbol == NULL) + && ((s3_inst.reloc.exp.X_add_number & 0x3) != 0)) { - data_exp[cnt] = *dataptr; - dataptr++; - cnt++; + s3_inst.error = _("invalid constant: 32 bit expression not word align"); + return; } - data_exp[cnt] = '\0'; - pp = &data_exp[0]; + /* Check and set offset. */ + val = s3_inst.reloc.exp.X_add_number; + if ((s3_inst.reloc.exp.X_add_symbol == NULL) + && (!(val >= 0 && val <= 0xffffffffLL))) + { + s3_inst.error = _("invalid constant: 32 bit expression not in range [0, 0xffffffff]"); + return; + } - str = dataptr; + val &= 0xffffffff; + val >>= 2; + s3_inst.instruction |= (val << 7); - ldst_func = inst.instruction & LDST16_RI_MASK; - if (ldst_func == N16_LIU) - assign_data = exp_ldst_offset (&pp, 0, _IMM8); - else if (ldst_func == N16_LHP || ldst_func == N16_SHP) - assign_data = exp_ldst_offset (&pp, 3, _IMM5_RSHIFT_1); - else if (ldst_func == N16_LWP || ldst_func == N16_SWP) - assign_data = exp_ldst_offset (&pp, 3, _IMM5_RSHIFT_2); - else - assign_data = exp_ldst_offset (&pp, 3, _IMM5); + /* Set reloc type. */ + s3_inst.reloc.type = BFD_RELOC_SCORE_IMM30; + +} + +static void +s3_do_sw48 (char *str) +{ + bfd_signed_vma val = 0; + + s3_skip_whitespace (str); - if ((assign_data == (int) FAIL) || (end_of_line (pp) == (int) FAIL)) + if ((s3_reg_required_here (&str, 37, s3_REG_TYPE_SCORE) == (int) s3_FAIL) + || (s3_skip_past_comma (&str) == (int) s3_FAIL)) return; - else + + if (s3_my_get_expression (&s3_inst.reloc.exp, &str) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) { - if ((inst.instruction & 0x7000) == N16_LIU) - { - inst.relax_inst |= ((inst.instruction >> 8) & 0xf) << 20 - | ((inst.instruction & 0xff) << 1); - } - else if (((inst.instruction & 0x7007) == N16_LHP) - || ((inst.instruction & 0x7007) == N16_SHP)) - { - inst.relax_inst |= ((inst.instruction >> 8) & 0xf) << 20 | 2 << 15 - | (((inst.instruction >> 3) & 0x1f) << 1); - } - else if (((inst.instruction & 0x7007) == N16_LWP) - || ((inst.instruction & 0x7007) == N16_SWP)) - { - inst.relax_inst |= ((inst.instruction >> 8) & 0xf) << 20 | 2 << 15 - | (((inst.instruction >> 3) & 0x1f) << 2); - } - else if (((inst.instruction & 0x7007) == N16_LBUP) - || ((inst.instruction & 0x7007) == N16_SBP)) - { - inst.relax_inst |= ((inst.instruction >> 8) & 0xf) << 20 | 2 << 15 - | (((inst.instruction >> 3) & 0x1f)); - } + return; + } + + /* Check word align for lw48 rd, value. */ + if ((s3_inst.reloc.exp.X_add_symbol == NULL) + && ((s3_inst.reloc.exp.X_add_number & 0x3) != 0)) + { + s3_inst.error = _("invalid constant: 32 bit expression not word align"); + return; + } - inst.relax_size = 4; + /* Check and set offset. */ + val = s3_inst.reloc.exp.X_add_number; + if ((s3_inst.reloc.exp.X_add_symbol == NULL) + && (!(val >= 0 && val <= 0xffffffffLL))) + { + s3_inst.error = _("invalid constant: 32 bit expression not in range [0, 0xffffffff]"); + return; } + + val &= 0xffffffff; + val >>= 2; + s3_inst.instruction |= (val << 7); + + /* Set reloc type. */ + s3_inst.reloc.type = BFD_RELOC_SCORE_IMM30; } static void -do16_push_pop (char *str) +s3_do_ldi48 (char *str) { - int reg_rd; - int H_bit_mask = 0; + bfd_signed_vma val; - skip_whitespace (str); - if (((reg_rd = reg_required_here (&str, 8, REG_TYPE_SCORE)) == (int) FAIL) - || (skip_past_comma (&str) == (int) FAIL)) + s3_skip_whitespace (str); + + if (s3_reg_required_here (&str, 37, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL) return; - if (reg_rd >= 16) - H_bit_mask = 1; + if (s3_my_get_expression (&s3_inst.reloc.exp, &str) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + { + return; + } - /* reg_required_here will change bit 12 of opcode, so we must restore bit 12. */ - inst.instruction &= ~(1 << 12); + /* Check and set offset. */ + val = s3_inst.reloc.exp.X_add_number; + if (!(val >= -0xffffffffLL && val <= 0xffffffffLL)) + { + s3_inst.error = _("invalid constant: 32 bit expression not in range [-0x80000000, 0x7fffffff]"); + return; + } - inst.instruction |= H_bit_mask << 7; + val &= 0xffffffff; + s3_inst.instruction |= (val << 5); - if (*str == '[') + /* Set reloc type. */ + s3_inst.reloc.type = BFD_RELOC_SCORE_IMM32; +} + +static void +s3_do_sdbbp48 (char *str) +{ + s3_skip_whitespace (str); + + if (s3_data_op2 (&str, 5, _IMM5) == (int) s3_FAIL || s3_end_of_line (str) == (int) s3_FAIL) + return; +} + +static void +s3_do_and48 (char *str) +{ + s3_skip_whitespace (str); + + if (s3_reglow_required_here (&str, 38) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reglow_required_here (&str, 34) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 2, _IMM32) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + return; +} + +static void +s3_do_or48 (char *str) +{ + s3_skip_whitespace (str); + + if (s3_reglow_required_here (&str, 38) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reglow_required_here (&str, 34) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 2, _IMM32) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + return; +} + +static void +s3_do_mbitclr (char *str) +{ + int val; + s3_skip_whitespace (str); + + if (*str != '[') { - int reg; + sprintf (s3_err_msg, _("missing [")); + s3_inst.error=s3_err_msg; + return; + } + str++; - str++; - skip_whitespace (str); - if ((reg = reg_required_here (&str, 4, REG_TYPE_SCORE)) == (int) FAIL) - return; - else if (reg > 7) - { - if (!inst.error) - inst.error = _("base register nums are over 3 bit"); + s3_inst.instruction &= 0x0; - return; - } + if ((s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL) + || (s3_skip_past_comma (&str) == (int) s3_FAIL) + || (s3_data_op2 (&str, 0, _IMM11) == (int) s3_FAIL)) + return; - skip_whitespace (str); - if ((*str++ != ']') || (end_of_line (str) == (int) FAIL)) - { - if (!inst.error) - inst.error = _("missing ]"); + /* Get imm11 and refill opcode. */ + val = s3_inst.instruction & 0x7ff; + val >>= 2; + s3_inst.instruction &= 0x000f8000; + s3_inst.instruction |= 0x00000064; - return; - } + if (*str != ']') + { + sprintf (s3_err_msg, _("missing ]")); + s3_inst.error=s3_err_msg; + return; + } + str++; - /* pop! */ - if ((inst.instruction & 0xf) == 0xa) - { - if (H_bit_mask) - { - inst.relax_inst |= ((((inst.instruction >> 8) & 0xf) | 0x10) << 20) - | (((inst.instruction >> 4) & 0x7) << 15) | (4 << 3); - } - else - { - inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 20) - | (((inst.instruction >> 4) & 0x7) << 15) | (4 << 3); - } - } - /* push! */ - else - { - if (H_bit_mask) - { - inst.relax_inst |= ((((inst.instruction >> 8) & 0xf) | 0x10) << 20) - | (((inst.instruction >> 4) & 0x7) << 15) | (((-4) & 0xfff) << 3); - } - else - { - inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 20) - | (((inst.instruction >> 4) & 0x7) << 15) | (((-4) & 0xfff) << 3); - } - } - inst.relax_size = 4; + if ((s3_skip_past_comma (&str) == (int) s3_FAIL) + || (s3_data_op2 (&str, 10, _IMM5) == (int) s3_FAIL)) + return; + + /* Set imm11 to opcode. */ + s3_inst.instruction |= (val & 0x1) + | (((val >> 1 ) & 0x7) << 7) + | (((val >> 4 ) & 0x1f) << 20); +} + +static void +s3_do_mbitset (char *str) +{ + int val; + s3_skip_whitespace (str); + + if (*str != '[') + { + sprintf (s3_err_msg, _("missing [")); + s3_inst.error=s3_err_msg; + return; } - else + str++; + + s3_inst.instruction &= 0x0; + + if ((s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL) + || (s3_skip_past_comma (&str) == (int) s3_FAIL) + || (s3_data_op2 (&str, 0, _IMM11) == (int) s3_FAIL)) + return; + + /* Get imm11 and refill opcode. */ + val = s3_inst.instruction & 0x7ff; + val >>= 2; + s3_inst.instruction &= 0x000f8000; + s3_inst.instruction |= 0x0000006c; + + if (*str != ']') { - inst.error = BAD_ARGS; + sprintf (s3_err_msg, _("missing ]")); + s3_inst.error=s3_err_msg; + return; + } + str++; + + if ((s3_skip_past_comma (&str) == (int) s3_FAIL) + || (s3_data_op2 (&str, 10, _IMM5) == (int) s3_FAIL)) + return; + + /* Set imm11 to opcode. */ + s3_inst.instruction |= (val & 0x1) + | (((val >> 1 ) & 0x7) << 7) + | (((val >> 4 ) & 0x1f) << 20); +} + +static void +s3_do16_slli_srli (char *str) +{ + s3_skip_whitespace (str); + + if ((s3_reglow_required_here (&str, 5) == (int) s3_FAIL) + || (s3_skip_past_comma (&str) == (int) s3_FAIL) + || s3_data_op2 (&str, 0, _IMM5) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + return; +} + +static void +s3_do16_ldiu (char *str) +{ + s3_skip_whitespace (str); + + if ((s3_reg_required_here (&str, 5,s3_REG_TYPE_SCORE) == (int) s3_FAIL) + || (s3_skip_past_comma (&str) == (int) s3_FAIL) + || s3_data_op2 (&str, 0, _IMM5) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + return; +} + +static void +s3_do16_push_pop (char *str) +{ + s3_skip_whitespace (str); + if ((s3_reg_required_here (&str, 0, s3_REG_TYPE_SCORE)) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + return; +} + +static void +s3_do16_rpush (char *str) +{ + int reg; + int val; + s3_skip_whitespace (str); + if ((reg = (s3_reg_required_here (&str, 5, s3_REG_TYPE_SCORE))) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 0, _IMM5_MULTI_LOAD) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + return; + + /* 0: indicate 32. + 1: invalide value. + 2: to 31: normal value. */ + val = s3_inst.instruction & 0x1f; + if (val == 1) + { + s3_inst.error = _("imm5 should >= 2"); + return; + } + if (reg >= 32) + { + s3_inst.error = _("reg should <= 31"); + return; + } +} + +static void +s3_do16_rpop (char *str) +{ + int reg; + int val; + s3_skip_whitespace (str); + if ((reg = (s3_reg_required_here (&str, 5, s3_REG_TYPE_SCORE))) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_data_op2 (&str, 0, _IMM5_MULTI_LOAD) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + return; + + /* 0: indicate 32. + 1: invalide value. + 2: to 31: normal value. */ + val = s3_inst.instruction & 0x1f; + if (val == 1) + { + s3_inst.error = _("imm5 should >= 2"); + return; + } + + if (reg >= 32) + { + s3_inst.error = _("reg should <= 31"); + return; + } + else + { + if ((reg + val) <= 32) + reg = reg + val - 1; + else + reg = reg + val - 33; + s3_inst.instruction &= 0x7c1f; + s3_inst.instruction |= (reg << 5); + return; } } /* Handle lcb/lcw/lce/scb/scw/sce. */ static void -do_ldst_unalign (char *str) +s3_do_ldst_unalign (char *str) { int conflict_reg; - if (university_version == 1) + if (s3_university_version == 1) { - inst.error = ERR_FOR_SCORE5U_ATOMIC; + s3_inst.error = s3_ERR_FOR_SCORE5U_ATOMIC; return; } - skip_whitespace (str); + s3_skip_whitespace (str); /* lcb/scb [rA]+. */ if (*str == '[') { str++; - skip_whitespace (str); + s3_skip_whitespace (str); - if (reg_required_here (&str, 15, REG_TYPE_SCORE) == (int) FAIL) + if (s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL) return; if (*str++ == ']') { if (*str++ != '+') { - inst.error = _("missing +"); + s3_inst.error = _("missing +"); return; } } else { - inst.error = _("missing ]"); + s3_inst.error = _("missing ]"); return; } - if (end_of_line (str) == (int) FAIL) + if (s3_end_of_line (str) == (int) s3_FAIL) return; } /* lcw/lce/scb/sce rD, [rA]+. */ else { - if (((conflict_reg = reg_required_here (&str, 20, REG_TYPE_SCORE)) == (int) FAIL) - || (skip_past_comma (&str) == (int) FAIL)) + if (((conflict_reg = s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE)) == (int) s3_FAIL) + || (s3_skip_past_comma (&str) == (int) s3_FAIL)) { return; } - skip_whitespace (str); + s3_skip_whitespace (str); if (*str++ == '[') { int reg; - skip_whitespace (str); - if ((reg = reg_required_here (&str, 15, REG_TYPE_SCORE)) == (int) FAIL) + s3_skip_whitespace (str); + if ((reg = s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE)) == (int) s3_FAIL) { return; } /* Conflicts can occur on stores as well as loads. */ conflict_reg = (conflict_reg == reg); - skip_whitespace (str); + s3_skip_whitespace (str); if (*str++ == ']') { - unsigned int ldst_func = inst.instruction & LDST_UNALIGN_MASK; + unsigned int ldst_func = s3_inst.instruction & LDST_UNALIGN_MASK; if (*str++ == '+') { @@ -3586,22 +3917,22 @@ do_ldst_unalign (char *str) } else { - inst.error = _("missing +"); + s3_inst.error = _("missing +"); return; } - if (end_of_line (str) == (int) FAIL) + if (s3_end_of_line (str) == (int) s3_FAIL) return; } else { - inst.error = _("missing ]"); + s3_inst.error = _("missing ]"); return; } } else { - inst.error = BAD_ARGS; + s3_inst.error = s3_BAD_ARGS; return; } } @@ -3609,52 +3940,52 @@ do_ldst_unalign (char *str) /* Handle alw/asw. */ static void -do_ldst_atomic (char *str) +s3_do_ldst_atomic (char *str) { - if (university_version == 1) + if (s3_university_version == 1) { - inst.error = ERR_FOR_SCORE5U_ATOMIC; + s3_inst.error = s3_ERR_FOR_SCORE5U_ATOMIC; return; } - skip_whitespace (str); + s3_skip_whitespace (str); - if ((reg_required_here (&str, 20, REG_TYPE_SCORE) == (int) FAIL) - || (skip_past_comma (&str) == (int) FAIL)) + if ((s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) == (int) s3_FAIL) + || (s3_skip_past_comma (&str) == (int) s3_FAIL)) { return; } else { - skip_whitespace (str); + s3_skip_whitespace (str); if (*str++ == '[') { int reg; - skip_whitespace (str); - if ((reg = reg_required_here (&str, 15, REG_TYPE_SCORE)) == (int) FAIL) + s3_skip_whitespace (str); + if ((reg = s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE)) == (int) s3_FAIL) { return; } - skip_whitespace (str); + s3_skip_whitespace (str); if (*str++ != ']') { - inst.error = _("missing ]"); + s3_inst.error = _("missing ]"); return; } - end_of_line (str); + s3_end_of_line (str); } else - inst.error = BAD_ARGS; + s3_inst.error = s3_BAD_ARGS; } } static void -build_relax_frag (struct score_it fix_insts[RELAX_INST_NUM], int fix_num ATTRIBUTE_UNUSED, - struct score_it var_insts[RELAX_INST_NUM], int var_num, +s3_build_relax_frag (struct s3_score_it fix_insts[s3_RELAX_INST_NUM], int fix_num ATTRIBUTE_UNUSED, + struct s3_score_it var_insts[s3_RELAX_INST_NUM], int var_num, symbolS *add_symbol) { int i; @@ -3662,23 +3993,23 @@ build_relax_frag (struct score_it fix_insts[RELAX_INST_NUM], int fix_num ATTRIBU fixS *fixp = NULL; fixS *cur_fixp = NULL; long where; - struct score_it inst_main; + struct s3_score_it inst_main; - memcpy (&inst_main, &fix_insts[0], sizeof (struct score_it)); + memcpy (&inst_main, &fix_insts[0], sizeof (struct s3_score_it)); /* Adjust instruction opcode and to be relaxed instruction opcode. */ - inst_main.instruction = adjust_paritybit (inst_main.instruction, GET_INSN_CLASS (inst_main.type)); + inst_main.instruction = s3_adjust_paritybit (inst_main.instruction, s3_GET_INSN_CLASS (inst_main.type)); inst_main.type = Insn_PIC; for (i = 0; i < var_num; i++) { inst_main.relax_size += var_insts[i].size; - var_insts[i].instruction = adjust_paritybit (var_insts[i].instruction, - GET_INSN_CLASS (var_insts[i].type)); + var_insts[i].instruction = s3_adjust_paritybit (var_insts[i].instruction, + s3_GET_INSN_CLASS (var_insts[i].type)); } /* Check data dependency. */ - handle_dependency (&inst_main); + s3_handle_dependency (&inst_main); /* Start a new frag if frag_now is not empty. */ if (frag_now_fix () != 0) @@ -3693,10 +4024,10 @@ build_relax_frag (struct score_it fix_insts[RELAX_INST_NUM], int fix_num ATTRIBU /* Write fr_fix part. */ p = frag_more (inst_main.size); - md_number_to_chars (p, inst_main.instruction, inst_main.size); + s3_md_number_to_chars (p, inst_main.instruction, inst_main.size); if (inst_main.reloc.type != BFD_RELOC_NONE) - fixp = fix_new_score (frag_now, p - frag_now->fr_literal, inst_main.size, + fixp = s3_fix_new_score (frag_now, p - frag_now->fr_literal, inst_main.size, &inst_main.reloc.exp, inst_main.reloc.pc_rel, inst_main.reloc.type); frag_now->tc_frag_data.fixp = fixp; @@ -3714,7 +4045,7 @@ build_relax_frag (struct score_it fix_insts[RELAX_INST_NUM], int fix_num ATTRIBU if (var_insts[i].reloc.type != BFD_RELOC_NONE) { - fixp = fix_new_score (frag_now, where, var_insts[i].size, + fixp = s3_fix_new_score (frag_now, where, var_insts[i].size, &var_insts[i].reloc.exp, var_insts[i].reloc.pc_rel, var_insts[i].reloc.type); if (fixp) @@ -3733,38 +4064,37 @@ build_relax_frag (struct score_it fix_insts[RELAX_INST_NUM], int fix_num ATTRIBU } } - p = frag_var (rs_machine_dependent, inst_main.relax_size + RELAX_PAD_BYTE, 0, - RELAX_ENCODE (inst_main.size, inst_main.relax_size, inst_main.type, + p = frag_var (rs_machine_dependent, inst_main.relax_size + s3_RELAX_PAD_BYTE, 0, + s3_RELAX_ENCODE (inst_main.size, inst_main.relax_size, inst_main.type, 0, inst_main.size, 0), add_symbol, 0, NULL); /* Write fr_var part. - no calling gen_insn_frag, no fixS will be generated. */ + no calling s3_gen_insn_frag, no fixS will be generated. */ for (i = 0; i < var_num; i++) { - md_number_to_chars (p, var_insts[i].instruction, var_insts[i].size); + s3_md_number_to_chars (p, var_insts[i].instruction, var_insts[i].size); p += var_insts[i].size; } /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ - inst.bwarn = -1; + s3_inst.bwarn = -1; } -/* Build a relax frag for la instruction when generating PIC, +/* Build a relax frag for la instruction when generating s3_PIC, external symbol first and local symbol second. */ - static void -build_la_pic (int reg_rd, expressionS exp) +s3_build_la_pic (int reg_rd, expressionS exp) { symbolS *add_symbol = exp.X_add_symbol; offsetT add_number = exp.X_add_number; - struct score_it fix_insts[RELAX_INST_NUM]; - struct score_it var_insts[RELAX_INST_NUM]; + struct s3_score_it fix_insts[s3_RELAX_INST_NUM]; + struct s3_score_it var_insts[s3_RELAX_INST_NUM]; int fix_num = 0; int var_num = 0; - char tmp[MAX_LITERAL_POOL_SIZE]; + char tmp[s3_MAX_LITERAL_POOL_SIZE]; int r1_bak; - r1_bak = nor1; - nor1 = 0; + r1_bak = s3_nor1; + s3_nor1 = 0; if (add_number == 0) { @@ -3777,31 +4107,31 @@ build_la_pic (int reg_rd, expressionS exp) For an external symbol: lw rD, <sym>($gp) (BFD_RELOC_SCORE_GOT15 or BFD_RELOC_SCORE_CALL15) */ sprintf (tmp, "lw_pic r%d, %s", reg_rd, add_symbol->bsym->name); - if (append_insn (tmp, FALSE) == (int) FAIL) + if (s3_append_insn (tmp, FALSE) == (int) s3_FAIL) return; - if (reg_rd == PIC_CALL_REG) - inst.reloc.type = BFD_RELOC_SCORE_CALL15; - memcpy (&fix_insts[0], &inst, sizeof (struct score_it)); + if (reg_rd == s3_PIC_CALL_REG) + s3_inst.reloc.type = BFD_RELOC_SCORE_CALL15; + memcpy (&fix_insts[0], &s3_inst, sizeof (struct s3_score_it)); /* Var part For a local symbol : lw rD, <sym>($gp) (BFD_RELOC_SCORE_GOT15) addi rD, <sym> (BFD_RELOC_GOT_LO16) */ - inst.reloc.type = BFD_RELOC_SCORE_GOT15; - memcpy (&var_insts[0], &inst, sizeof (struct score_it)); + s3_inst.reloc.type = BFD_RELOC_SCORE_GOT15; + memcpy (&var_insts[0], &s3_inst, sizeof (struct s3_score_it)); sprintf (tmp, "addi_s_pic r%d, %s", reg_rd, add_symbol->bsym->name); - if (append_insn (tmp, FALSE) == (int) FAIL) + if (s3_append_insn (tmp, FALSE) == (int) s3_FAIL) return; - memcpy (&var_insts[1], &inst, sizeof (struct score_it)); - build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); + memcpy (&var_insts[1], &s3_inst, sizeof (struct s3_score_it)); + s3_build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); } else if (add_number >= -0x8000 && add_number <= 0x7fff) { /* Insn 1: lw rD, <sym>($gp) (BFD_RELOC_SCORE_GOT15) */ sprintf (tmp, "lw_pic r%d, %s", reg_rd, add_symbol->bsym->name); - if (append_insn (tmp, TRUE) == (int) FAIL) + if (s3_append_insn (tmp, TRUE) == (int) s3_FAIL) return; /* Insn 2 */ @@ -3810,19 +4140,19 @@ build_la_pic (int reg_rd, expressionS exp) /* Fix part For an external symbol: addi rD, <constant> */ sprintf (tmp, "addi r%d, %d", reg_rd, (int)add_number); - if (append_insn (tmp, FALSE) == (int) FAIL) + if (s3_append_insn (tmp, FALSE) == (int) s3_FAIL) return; - memcpy (&fix_insts[0], &inst, sizeof (struct score_it)); + memcpy (&fix_insts[0], &s3_inst, sizeof (struct s3_score_it)); /* Var part For a local symbol: addi rD, <sym>+<constant> (BFD_RELOC_GOT_LO16) */ sprintf (tmp, "addi_s_pic r%d, %s + %d", reg_rd, add_symbol->bsym->name, (int)add_number); - if (append_insn (tmp, FALSE) == (int) FAIL) + if (s3_append_insn (tmp, FALSE) == (int) s3_FAIL) return; - memcpy (&var_insts[0], &inst, sizeof (struct score_it)); - build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); + memcpy (&var_insts[0], &s3_inst, sizeof (struct s3_score_it)); + s3_build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); } else { @@ -3831,7 +4161,7 @@ build_la_pic (int reg_rd, expressionS exp) /* Insn 1: lw rD, <sym>($gp) (BFD_RELOC_SCORE_GOT15) */ sprintf (tmp, "lw_pic r%d, %s", reg_rd, add_symbol->bsym->name); - if (append_insn (tmp, TRUE) == (int) FAIL) + if (s3_append_insn (tmp, TRUE) == (int) s3_FAIL) return; /* Insn 2 */ @@ -3840,10 +4170,10 @@ build_la_pic (int reg_rd, expressionS exp) /* Fix part For an external symbol: ldis r1, HI%<constant> */ sprintf (tmp, "ldis r1, %d", hi); - if (append_insn (tmp, FALSE) == (int) FAIL) + if (s3_append_insn (tmp, FALSE) == (int) s3_FAIL) return; - memcpy (&fix_insts[0], &inst, sizeof (struct score_it)); + memcpy (&fix_insts[0], &s3_inst, sizeof (struct s3_score_it)); /* Var part For a local symbol: ldis r1, HI%<constant> @@ -3853,11 +4183,11 @@ build_la_pic (int reg_rd, expressionS exp) hi += 1; } sprintf (tmp, "ldis_pic r1, %d", hi); - if (append_insn (tmp, FALSE) == (int) FAIL) + if (s3_append_insn (tmp, FALSE) == (int) s3_FAIL) return; - memcpy (&var_insts[0], &inst, sizeof (struct score_it)); - build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); + memcpy (&var_insts[0], &s3_inst, sizeof (struct s3_score_it)); + s3_build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); /* Insn 3 */ fix_num = 1; @@ -3865,85 +4195,103 @@ build_la_pic (int reg_rd, expressionS exp) /* Fix part For an external symbol: ori r1, LO%<constant> */ sprintf (tmp, "ori r1, %d", lo); - if (append_insn (tmp, FALSE) == (int) FAIL) + if (s3_append_insn (tmp, FALSE) == (int) s3_FAIL) return; - memcpy (&fix_insts[0], &inst, sizeof (struct score_it)); + memcpy (&fix_insts[0], &s3_inst, sizeof (struct s3_score_it)); /* Var part For a local symbol: addi r1, <sym>+LO%<constant> (BFD_RELOC_GOT_LO16) */ sprintf (tmp, "addi_u_pic r1, %s + %d", add_symbol->bsym->name, lo); - if (append_insn (tmp, FALSE) == (int) FAIL) + if (s3_append_insn (tmp, FALSE) == (int) s3_FAIL) return; - memcpy (&var_insts[0], &inst, sizeof (struct score_it)); - build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); + memcpy (&var_insts[0], &s3_inst, sizeof (struct s3_score_it)); + s3_build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); /* Insn 4: add rD, rD, r1 */ sprintf (tmp, "add r%d, r%d, r1", reg_rd, reg_rd); - if (append_insn (tmp, TRUE) == (int) FAIL) + if (s3_append_insn (tmp, TRUE) == (int) s3_FAIL) return; /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ - inst.bwarn = -1; + s3_inst.bwarn = -1; } - nor1 = r1_bak; + s3_nor1 = r1_bak; } /* Handle la. */ static void -do_macro_la_rdi32 (char *str) +s3_do_macro_la_rdi32 (char *str) { int reg_rd; - skip_whitespace (str); - if ((reg_rd = reg_required_here (&str, 20, REG_TYPE_SCORE)) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL) + s3_skip_whitespace (str); + if ((reg_rd = s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE)) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL) { return; } else { - char append_str[MAX_LITERAL_POOL_SIZE]; + /* Save str. */ char *keep_data = str; + char append_str[s3_MAX_LITERAL_POOL_SIZE]; + + /* Check immediate value. */ + if (s3_my_get_expression (&s3_inst.reloc.exp, &str) == (int) s3_FAIL) + { + s3_inst.error = _("expression error"); + return; + } + else if ((s3_inst.reloc.exp.X_add_symbol == NULL) + && (s3_validate_immediate (s3_inst.reloc.exp.X_add_number, _IMM32, 0) == (int) s3_FAIL)) + { + s3_inst.error = _("value not in range [0, 0xffffffff]"); + return; + } + + /* Reset str. */ + str = keep_data; /* la rd, simm16. */ - if (data_op2 (&str, 1, _SIMM16_LA) != (int) FAIL) + if (s3_data_op2 (&str, 1, _SIMM16_LA) != (int) s3_FAIL) { - end_of_line (str); + s3_end_of_line (str); return; } /* la rd, imm32 or la rd, label. */ else { - SET_INSN_ERROR (NULL); + s3_SET_INSN_ERROR (NULL); + /* Reset str. */ str = keep_data; - if ((data_op2 (&str, 1, _VALUE_HI16) == (int) FAIL) - || (end_of_line (str) == (int) FAIL)) + if ((s3_data_op2 (&str, 1, _VALUE_HI16) == (int) s3_FAIL) + || (s3_end_of_line (str) == (int) s3_FAIL)) { return; } else { - if ((score_pic == NO_PIC) || (!inst.reloc.exp.X_add_symbol)) + if ((s3_score_pic == s3_NO_PIC) || (!s3_inst.reloc.exp.X_add_symbol)) { sprintf (append_str, "ld_i32hi r%d, %s", reg_rd, keep_data); - if (append_insn (append_str, TRUE) == (int) FAIL) + if (s3_append_insn (append_str, TRUE) == (int) s3_FAIL) return; sprintf (append_str, "ld_i32lo r%d, %s", reg_rd, keep_data); - if (append_insn (append_str, TRUE) == (int) FAIL) + if (s3_append_insn (append_str, TRUE) == (int) s3_FAIL) return; } else { - assert (inst.reloc.exp.X_add_symbol); - build_la_pic (reg_rd, inst.reloc.exp); + assert (s3_inst.reloc.exp.X_add_symbol); + s3_build_la_pic (reg_rd, s3_inst.reloc.exp); } /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ - inst.bwarn = -1; + s3_inst.bwarn = -1; } } } @@ -3951,57 +4299,76 @@ do_macro_la_rdi32 (char *str) /* Handle li. */ static void -do_macro_li_rdi32 (char *str){ +s3_do_macro_li_rdi32 (char *str) +{ int reg_rd; - skip_whitespace (str); - if ((reg_rd = reg_required_here (&str, 20, REG_TYPE_SCORE)) == (int) FAIL - || skip_past_comma (&str) == (int) FAIL) + s3_skip_whitespace (str); + if ((reg_rd = s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE)) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL) { return; } else { + /* Save str. */ char *keep_data = str; + /* Check immediate value. */ + if (s3_my_get_expression (&s3_inst.reloc.exp, &str) == (int) s3_FAIL) + { + s3_inst.error = _("expression error"); + return; + } + else if (!(s3_inst.reloc.exp.X_add_number >= -0xffffffffLL + && s3_inst.reloc.exp.X_add_number <= 0xffffffffLL)) + { + s3_inst.error = _("value not in range [-0xffffffff, 0xffffffff]"); + return; + } + + /* Reset str. */ + str = keep_data; + /* li rd, simm16. */ - if (data_op2 (&str, 1, _SIMM16_LA) != (int) FAIL) + if (s3_data_op2 (&str, 1, _SIMM16_LA) != (int) s3_FAIL) { - end_of_line (str); + s3_end_of_line (str); return; } /* li rd, imm32. */ else { - char append_str[MAX_LITERAL_POOL_SIZE]; + char append_str[s3_MAX_LITERAL_POOL_SIZE]; + /* Reset str. */ str = keep_data; - if ((data_op2 (&str, 1, _VALUE_HI16) == (int) FAIL) - || (end_of_line (str) == (int) FAIL)) + if ((s3_data_op2 (&str, 1, _VALUE_HI16) == (int) s3_FAIL) + || (s3_end_of_line (str) == (int) s3_FAIL)) { return; } - else if (inst.reloc.exp.X_add_symbol) + else if (s3_inst.reloc.exp.X_add_symbol) { - inst.error = _("li rd label isn't correct instruction form"); + s3_inst.error = _("li rd label isn't correct instruction form"); return; } else { sprintf (append_str, "ld_i32hi r%d, %s", reg_rd, keep_data); - if (append_insn (append_str, TRUE) == (int) FAIL) + if (s3_append_insn (append_str, TRUE) == (int) s3_FAIL) return; else { sprintf (append_str, "ld_i32lo r%d, %s", reg_rd, keep_data); - if (append_insn (append_str, TRUE) == (int) FAIL) + if (s3_append_insn (append_str, TRUE) == (int) s3_FAIL) return; /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ - inst.bwarn = -1; + s3_inst.bwarn = -1; } } } @@ -4010,125 +4377,425 @@ do_macro_li_rdi32 (char *str){ /* Handle mul/mulu/div/divu/rem/remu. */ static void -do_macro_mul_rdrsrs (char *str) +s3_do_macro_mul_rdrsrs (char *str) { int reg_rd; int reg_rs1; int reg_rs2; char *backupstr; - char append_str[MAX_LITERAL_POOL_SIZE]; + char append_str[s3_MAX_LITERAL_POOL_SIZE]; - if (university_version == 1) - as_warn ("%s", ERR_FOR_SCORE5U_MUL_DIV); + if (s3_university_version == 1) + as_warn ("%s", s3_ERR_FOR_SCORE5U_MUL_DIV); strcpy (append_str, str); backupstr = append_str; - skip_whitespace (backupstr); - if (((reg_rd = reg_required_here (&backupstr, -1, REG_TYPE_SCORE)) == (int) FAIL) - || (skip_past_comma (&backupstr) == (int) FAIL) - || ((reg_rs1 = reg_required_here (&backupstr, -1, REG_TYPE_SCORE)) == (int) FAIL)) + s3_skip_whitespace (backupstr); + if (((reg_rd = s3_reg_required_here (&backupstr, -1, s3_REG_TYPE_SCORE)) == (int) s3_FAIL) + || (s3_skip_past_comma (&backupstr) == (int) s3_FAIL) + || ((reg_rs1 = s3_reg_required_here (&backupstr, -1, s3_REG_TYPE_SCORE)) == (int) s3_FAIL)) { - inst.error = BAD_ARGS; + s3_inst.error = s3_BAD_ARGS; return; } - if (skip_past_comma (&backupstr) == (int) FAIL) + if (s3_skip_past_comma (&backupstr) == (int) s3_FAIL) { /* rem/remu rA, rB is error format. */ - if (strcmp (inst.name, "rem") == 0 || strcmp (inst.name, "remu") == 0) + if (strcmp (s3_inst.name, "rem") == 0 || strcmp (s3_inst.name, "remu") == 0) { - SET_INSN_ERROR (BAD_ARGS); + s3_SET_INSN_ERROR (s3_BAD_ARGS); } else { - SET_INSN_ERROR (NULL); - do_rsrs (str); + s3_SET_INSN_ERROR (NULL); + s3_do_rsrs (str); } return; } else { - SET_INSN_ERROR (NULL); - if (((reg_rs2 = reg_required_here (&backupstr, -1, REG_TYPE_SCORE)) == (int) FAIL) - || (end_of_line (backupstr) == (int) FAIL)) + s3_SET_INSN_ERROR (NULL); + if (((reg_rs2 = s3_reg_required_here (&backupstr, -1, s3_REG_TYPE_SCORE)) == (int) s3_FAIL) + || (s3_end_of_line (backupstr) == (int) s3_FAIL)) { return; } else { - char append_str1[MAX_LITERAL_POOL_SIZE]; + char append_str1[s3_MAX_LITERAL_POOL_SIZE]; - if (strcmp (inst.name, "rem") == 0) + if (strcmp (s3_inst.name, "rem") == 0) { sprintf (append_str, "mul r%d, r%d", reg_rs1, reg_rs2); sprintf (append_str1, "mfceh r%d", reg_rd); } - else if (strcmp (inst.name, "remu") == 0) + else if (strcmp (s3_inst.name, "remu") == 0) { sprintf (append_str, "mulu r%d, r%d", reg_rs1, reg_rs2); sprintf (append_str1, "mfceh r%d", reg_rd); } else { - sprintf (append_str, "%s r%d, r%d", inst.name, reg_rs1, reg_rs2); + sprintf (append_str, "%s r%d, r%d", s3_inst.name, reg_rs1, reg_rs2); sprintf (append_str1, "mfcel r%d", reg_rd); } /* Output mul/mulu or div/divu or rem/remu. */ - if (append_insn (append_str, TRUE) == (int) FAIL) + if (s3_append_insn (append_str, TRUE) == (int) s3_FAIL) return; /* Output mfcel or mfceh. */ - if (append_insn (append_str1, TRUE) == (int) FAIL) + if (s3_append_insn (append_str1, TRUE) == (int) s3_FAIL) return; /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ - inst.bwarn = -1; + s3_inst.bwarn = -1; } } } static void -exp_macro_ldst_abs (char *str) +s3_exp_macro_ldst_abs (char *str) { int reg_rd; char *backupstr, *tmp; - char append_str[MAX_LITERAL_POOL_SIZE]; - char verifystr[MAX_LITERAL_POOL_SIZE]; - struct score_it inst_backup; + char append_str[s3_MAX_LITERAL_POOL_SIZE]; + char verifystr[s3_MAX_LITERAL_POOL_SIZE]; + struct s3_score_it inst_backup; int r1_bak = 0; - r1_bak = nor1; - nor1 = 0; - memcpy (&inst_backup, &inst, sizeof (struct score_it)); + r1_bak = s3_nor1; + s3_nor1 = 0; + memcpy (&inst_backup, &s3_inst, sizeof (struct s3_score_it)); strcpy (verifystr, str); backupstr = verifystr; - skip_whitespace (backupstr); - if ((reg_rd = reg_required_here (&backupstr, -1, REG_TYPE_SCORE)) == (int) FAIL) + s3_skip_whitespace (backupstr); + if ((reg_rd = s3_reg_required_here (&backupstr, -1, s3_REG_TYPE_SCORE)) == (int) s3_FAIL) return; tmp = backupstr; - if (skip_past_comma (&backupstr) == (int) FAIL) + if (s3_skip_past_comma (&backupstr) == (int) s3_FAIL) return; backupstr = tmp; sprintf (append_str, "li r1 %s", backupstr); - append_insn (append_str, TRUE); + s3_append_insn (append_str, TRUE); - memcpy (&inst, &inst_backup, sizeof (struct score_it)); + memcpy (&s3_inst, &inst_backup, sizeof (struct s3_score_it)); sprintf (append_str, " r%d, [r1,0]", reg_rd); - do_ldst_insn (append_str); + s3_do_ldst_insn (append_str); + + s3_nor1 = r1_bak; +} +/* Handle bcmpeq / bcmpne */ +static void +s3_do_macro_bcmp (char *str) +{ + int reg_a , reg_b; + char keep_data[s3_MAX_LITERAL_POOL_SIZE]; + char* ptemp; + int i=0; + struct s3_score_it inst_expand[2]; + struct s3_score_it inst_main; + + + s3_skip_whitespace (str); + if (( reg_a = s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE)) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + ||(reg_b = s3_reg_required_here (&str, 10, s3_REG_TYPE_SCORE)) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL) + return; + ptemp =str; + while(*ptemp!=0) + { + keep_data[i]=*ptemp; + i++; + ptemp++; + } + keep_data[i]=0; + if (s3_my_get_expression (&s3_inst.reloc.exp, &str) == (int) s3_FAIL + ||reg_b ==0 + || s3_end_of_line (str) == (int) s3_FAIL) + return ; + else if (s3_inst.reloc.exp.X_add_symbol == 0) + { + s3_inst.error = _("lacking label "); + return; + } + else + { + char append_str[s3_MAX_LITERAL_POOL_SIZE]; + s3_SET_INSN_ERROR (NULL); + + s3_inst.reloc.type = BFD_RELOC_SCORE_BCMP; + s3_inst.reloc.pc_rel = 1; + bfd_signed_vma val = s3_inst.reloc.exp.X_add_number; + + /* Branch 32 offset field : 20 bit, 16 bit branch offset field : 8 bit. */ + s3_inst.instruction |= ((s3_inst.reloc.exp.X_add_number>>1) & 0x1) | ((s3_inst.reloc.exp.X_add_number>>2) & 0x7)<<7 |((s3_inst.reloc.exp.X_add_number>>5) & 0x1f)<<20; + + /* Check and set offset. */ + if (((val & 0xfffffe00) != 0) + && ((val & 0xfffffe00) != 0xfffffe00)) + { + /* support bcmp --> cmp!+beq (bne) */ + if (s3_score_pic == s3_NO_PIC) + { + sprintf (&append_str[0], "cmp! r%d, r%d", reg_a, reg_b); + if (s3_append_insn (&append_str[0], TRUE) == (int) s3_FAIL) + return; + if ((inst_main.instruction & 0x3e00007e) == 0x0000004c) + sprintf (&append_str[1], "beq %s", keep_data); + else + sprintf (&append_str[1], "bne %s", keep_data); + if (s3_append_insn (&append_str[1], TRUE) == (int) s3_FAIL) + return; + } + else + { + assert (s3_inst.reloc.exp.X_add_symbol); + } + /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ + s3_inst.bwarn = -1; + return; + } + else + { + val >>= 1; + s3_inst.instruction |= (val & 0x1) + | (((val >> 1) & 0x7) << 7) + | (((val >> 4) & 0x1f) << 20); + } + + /* Backup s3_inst. */ + memcpy (&inst_main, &s3_inst, sizeof (struct s3_score_it)); - nor1 = r1_bak; + if (s3_score_pic == s3_NO_PIC) + { + sprintf (&append_str[0], "cmp! r%d, r%d", reg_a, reg_b); + if (s3_append_insn (&append_str[0], FALSE) == (int) s3_FAIL) + return; + memcpy (&inst_expand[0], &s3_inst, sizeof (struct s3_score_it)); + + if ((inst_main.instruction & 0x3e00007e) == 0x0000004c) + sprintf (&append_str[1], "beq %s", keep_data); + else + sprintf (&append_str[1], "bne %s", keep_data); + if (s3_append_insn (&append_str[1], FALSE) == (int) s3_FAIL) + return; + memcpy (&inst_expand[1], &s3_inst, sizeof (struct s3_score_it)); + } + else + { + assert (s3_inst.reloc.exp.X_add_symbol); + } + inst_main.relax_size = inst_expand[0].size + inst_expand[1].size; + inst_main.type = Insn_BCMP; + + /* Adjust instruction opcode and to be relaxed instruction opcode. */ + inst_main.instruction = s3_adjust_paritybit (inst_main.instruction, s3_GET_INSN_CLASS (inst_main.type)); + + for (i = 0; i < 2; i++) + inst_expand[i].instruction = s3_adjust_paritybit (inst_expand[i].instruction, + s3_GET_INSN_CLASS (inst_expand[i].type)); + /* Check data dependency. */ + s3_handle_dependency (&inst_main); + /* Start a new frag if frag_now is not empty. */ + if (frag_now_fix () != 0) + { + if (!frag_now->tc_frag_data.is_insn) + frag_wane (frag_now); + frag_new (0); + } + frag_grow (20); + + /* Write fr_fix part. */ + char *p; + p = frag_more (inst_main.size); + s3_md_number_to_chars (p, inst_main.instruction, inst_main.size); + + if (inst_main.reloc.type != BFD_RELOC_NONE) + { + s3_fix_new_score (frag_now, p - frag_now->fr_literal, inst_main.size, + &inst_main.reloc.exp, inst_main.reloc.pc_rel, inst_main.reloc.type); + } +#ifdef OBJ_ELF + dwarf2_emit_insn (inst_main.size); +#endif + + /* s3_GP instruction can not do optimization, only can do relax between + 1 instruction and 3 instructions. */ + p = frag_var (rs_machine_dependent, inst_main.relax_size + s3_RELAX_PAD_BYTE, 0, + s3_RELAX_ENCODE (inst_main.size, inst_main.relax_size, inst_main.type, 0, 4, 1), + inst_main.reloc.exp.X_add_symbol, 0, NULL); + + /* Write fr_var part. + no calling s3_gen_insn_frag, no fixS will be generated. */ + s3_md_number_to_chars (p, inst_expand[0].instruction, inst_expand[0].size); + p += inst_expand[0].size; + s3_md_number_to_chars (p, inst_expand[1].instruction, inst_expand[1].size); + p += inst_expand[1].size; + + /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ + s3_inst.bwarn = -1; + } +} + +/* Handle bcmpeqz / bcmpnez */ +static void +s3_do_macro_bcmpz (char *str) +{ + int reg_a ; + char keep_data[s3_MAX_LITERAL_POOL_SIZE]; + char* ptemp; + int i=0; + struct s3_score_it inst_expand[2]; + struct s3_score_it inst_main; + + s3_skip_whitespace (str); + if (( reg_a = s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE)) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL ) + return; + ptemp =str; + while(*ptemp!=0) + { + keep_data[i]=*ptemp; + i++; + ptemp++; + } + keep_data[i]=0; + if ( s3_my_get_expression (&s3_inst.reloc.exp, &str) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + return ; + + else if (s3_inst.reloc.exp.X_add_symbol == 0) + { + s3_inst.error = _("lacking label "); + return; + } + else + { + char append_str[s3_MAX_LITERAL_POOL_SIZE]; + s3_SET_INSN_ERROR (NULL); + s3_inst.reloc.type = BFD_RELOC_SCORE_BCMP; + s3_inst.reloc.pc_rel = 1; + bfd_signed_vma val = s3_inst.reloc.exp.X_add_number; + + /* Branch 32 offset field : 20 bit, 16 bit branch offset field : 8 bit. */ + s3_inst.instruction |= ((s3_inst.reloc.exp.X_add_number>>1) & 0x1) | ((s3_inst.reloc.exp.X_add_number>>2) & 0x7)<<7 |((s3_inst.reloc.exp.X_add_number>>5) & 0x1f)<<20; + + /* Check and set offset. */ + if (((val & 0xfffffe00) != 0) + && ((val & 0xfffffe00) != 0xfffffe00)) + { + if (s3_score_pic == s3_NO_PIC) + { + sprintf (&append_str[0], "cmpi! r%d,0", reg_a); + if (s3_append_insn (&append_str[0], TRUE) == (int) s3_FAIL) + return; + if ((inst_main.instruction & 0x3e00007e) == 0x0000004c) + sprintf (&append_str[1], "beq %s", keep_data); + else + sprintf (&append_str[1], "bne %s", keep_data); + if (s3_append_insn (&append_str[1], TRUE) == (int) s3_FAIL) + return; + } + else + { + assert (s3_inst.reloc.exp.X_add_symbol); + } + /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ + s3_inst.bwarn = -1; + return; + } + else + { + val >>= 1; + s3_inst.instruction |= (val & 0x1) + | (((val >> 1) & 0x7) << 7) + | (((val >> 4) & 0x1f) << 20); + } + + /* Backup s3_inst. */ + memcpy (&inst_main, &s3_inst, sizeof (struct s3_score_it)); + + if (s3_score_pic == s3_NO_PIC) + { + sprintf (&append_str[0], "cmpi! r%d, 0", reg_a); + if (s3_append_insn (&append_str[0], FALSE) == (int) s3_FAIL) + return; + memcpy (&inst_expand[0], &s3_inst, sizeof (struct s3_score_it)); + if ((inst_main.instruction & 0x3e00007e) == 0x0000004c) + sprintf (&append_str[1], "beq %s", keep_data); + else + sprintf (&append_str[1], "bne %s", keep_data); + if (s3_append_insn (&append_str[1], FALSE) == (int) s3_FAIL) + return; + memcpy (&inst_expand[1], &s3_inst, sizeof (struct s3_score_it)); + } + else + { + assert (s3_inst.reloc.exp.X_add_symbol); + } + inst_main.relax_size = inst_expand[0].size + inst_expand[1].size; + inst_main.type = Insn_BCMP; + + /* Adjust instruction opcode and to be relaxed instruction opcode. */ + inst_main.instruction = s3_adjust_paritybit (inst_main.instruction, s3_GET_INSN_CLASS (inst_main.type)); + + for (i = 0; i < 2; i++) + inst_expand[i].instruction = s3_adjust_paritybit (inst_expand[i].instruction , s3_GET_INSN_CLASS (inst_expand[i].type)); + /* Check data dependency. */ + s3_handle_dependency (&inst_main); + /* Start a new frag if frag_now is not empty. */ + if (frag_now_fix () != 0) + { + if (!frag_now->tc_frag_data.is_insn) + frag_wane (frag_now); + frag_new (0); + } + frag_grow (20); + + /* Write fr_fix part. */ + char *p; + p = frag_more (inst_main.size); + s3_md_number_to_chars (p, inst_main.instruction, inst_main.size); + + if (inst_main.reloc.type != BFD_RELOC_NONE) + { + s3_fix_new_score (frag_now, p - frag_now->fr_literal, inst_main.size, + &inst_main.reloc.exp, inst_main.reloc.pc_rel, inst_main.reloc.type); + } +#ifdef OBJ_ELF + dwarf2_emit_insn (inst_main.size); +#endif + + /* s3_GP instruction can not do optimization, only can do relax between + 1 instruction and 3 instructions. */ + p = frag_var (rs_machine_dependent, inst_main.relax_size + s3_RELAX_PAD_BYTE, 0, + s3_RELAX_ENCODE (inst_main.size, inst_main.relax_size, inst_main.type, 0, 4, 1), + inst_main.reloc.exp.X_add_symbol, 0, NULL); + + /* Write fr_var part. + no calling s3_gen_insn_frag, no fixS will be generated. */ + s3_md_number_to_chars (p, inst_expand[0].instruction, inst_expand[0].size); + p += inst_expand[0].size; + s3_md_number_to_chars (p, inst_expand[1].instruction, inst_expand[1].size); + p += inst_expand[1].size; + + /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ + s3_inst.bwarn = -1; + } } static int -nopic_need_relax (symbolS * sym, int before_relaxing) +s3_nopic_need_relax (symbolS * sym, int before_relaxing) { if (sym == NULL) return 0; - else if (USE_GLOBAL_POINTER_OPT && g_switch_value > 0) + else if (s3_USE_GLOBAL_POINTER_OPT && s3_g_switch_value > 0) { const char *symname; const char *segname; @@ -4158,7 +4825,7 @@ nopic_need_relax (symbolS * sym, int before_relaxing) || (before_relaxing && S_GET_VALUE (sym) == 0) || (S_GET_VALUE (sym) != 0 - && S_GET_VALUE (sym) <= g_switch_value))) + && S_GET_VALUE (sym) <= s3_g_switch_value))) { return 0; } @@ -4174,23 +4841,22 @@ nopic_need_relax (symbolS * sym, int before_relaxing) return 1; } -/* Build a relax frag for lw/st instruction when generating PIC, +/* Build a relax frag for lw/st instruction when generating s3_PIC, external symbol first and local symbol second. */ - static void -build_lwst_pic (int reg_rd, expressionS exp, const char *insn_name) +s3_build_lwst_pic (int reg_rd, expressionS exp, const char *insn_name) { symbolS *add_symbol = exp.X_add_symbol; int add_number = exp.X_add_number; - struct score_it fix_insts[RELAX_INST_NUM]; - struct score_it var_insts[RELAX_INST_NUM]; + struct s3_score_it fix_insts[s3_RELAX_INST_NUM]; + struct s3_score_it var_insts[s3_RELAX_INST_NUM]; int fix_num = 0; int var_num = 0; - char tmp[MAX_LITERAL_POOL_SIZE]; + char tmp[s3_MAX_LITERAL_POOL_SIZE]; int r1_bak; - r1_bak = nor1; - nor1 = 0; + r1_bak = s3_nor1; + s3_nor1 = 0; if ((add_number == 0) || (add_number >= -0x8000 && add_number <= 0x7fff)) { @@ -4203,43 +4869,43 @@ build_lwst_pic (int reg_rd, expressionS exp, const char *insn_name) For an external symbol: lw rD, <sym>($gp) (BFD_RELOC_SCORE_GOT15) */ sprintf (tmp, "lw_pic r1, %s", add_symbol->bsym->name); - if (append_insn (tmp, FALSE) == (int) FAIL) + if (s3_append_insn (tmp, FALSE) == (int) s3_FAIL) return; - memcpy (&fix_insts[0], &inst, sizeof (struct score_it)); + memcpy (&fix_insts[0], &s3_inst, sizeof (struct s3_score_it)); /* Var part For a local symbol : lw rD, <sym>($gp) (BFD_RELOC_SCORE_GOT15) addi rD, <sym> (BFD_RELOC_GOT_LO16) */ - inst.reloc.type = BFD_RELOC_SCORE_GOT15; - memcpy (&var_insts[0], &inst, sizeof (struct score_it)); + s3_inst.reloc.type = BFD_RELOC_SCORE_GOT15; + memcpy (&var_insts[0], &s3_inst, sizeof (struct s3_score_it)); sprintf (tmp, "addi_s_pic r1, %s", add_symbol->bsym->name); - if (append_insn (tmp, FALSE) == (int) FAIL) + if (s3_append_insn (tmp, FALSE) == (int) s3_FAIL) return; - memcpy (&var_insts[1], &inst, sizeof (struct score_it)); - build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); + memcpy (&var_insts[1], &s3_inst, sizeof (struct s3_score_it)); + s3_build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); /* Insn 2 or Insn 3: lw/st rD, [r1, constant] */ sprintf (tmp, "%s r%d, [r1, %d]", insn_name, reg_rd, add_number); - if (append_insn (tmp, TRUE) == (int) FAIL) + if (s3_append_insn (tmp, TRUE) == (int) s3_FAIL) return; /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ - inst.bwarn = -1; + s3_inst.bwarn = -1; } else { - inst.error = _("PIC code offset overflow (max 16 signed bits)"); + s3_inst.error = _("s3_PIC code offset overflow (max 16 signed bits)"); return; } - nor1 = r1_bak; + s3_nor1 = r1_bak; } static void -do_macro_ldst_label (char *str) +s3_do_macro_ldst_label (char *str) { int i; int ldst_gp_p = 0; @@ -4248,21 +4914,21 @@ do_macro_ldst_label (char *str) char *backup_str; char *label_str; char *absolute_value; - char append_str[3][MAX_LITERAL_POOL_SIZE]; - char verifystr[MAX_LITERAL_POOL_SIZE]; - struct score_it inst_backup; - struct score_it inst_expand[3]; - struct score_it inst_main; + char append_str[3][s3_MAX_LITERAL_POOL_SIZE]; + char verifystr[s3_MAX_LITERAL_POOL_SIZE]; + struct s3_score_it inst_backup; + struct s3_score_it inst_expand[3]; + struct s3_score_it inst_main; - memcpy (&inst_backup, &inst, sizeof (struct score_it)); + memcpy (&inst_backup, &s3_inst, sizeof (struct s3_score_it)); strcpy (verifystr, str); backup_str = verifystr; - skip_whitespace (backup_str); - if ((reg_rd = reg_required_here (&backup_str, -1, REG_TYPE_SCORE)) == (int) FAIL) + s3_skip_whitespace (backup_str); + if ((reg_rd = s3_reg_required_here (&backup_str, -1, s3_REG_TYPE_SCORE)) == (int) s3_FAIL) return; - if (skip_past_comma (&backup_str) == (int) FAIL) + if (s3_skip_past_comma (&backup_str) == (int) s3_FAIL) return; label_str = backup_str; @@ -4270,80 +4936,91 @@ do_macro_ldst_label (char *str) /* Ld/st rD, [rA, imm] ld/st rD, [rA]+, imm ld/st rD, [rA, imm]+. */ if (*backup_str == '[') { - inst.type = Rd_rvalueRs_preSI12; - do_ldst_insn (str); + s3_inst.type = Rd_rvalueRs_preSI12; + s3_do_ldst_insn (str); return; } /* Ld/st rD, imm. */ absolute_value = backup_str; - inst.type = Rd_rvalueRs_SI15; - if ((my_get_expression (&inst.reloc.exp, &backup_str) == (int) FAIL) - || (validate_immediate (inst.reloc.exp.X_add_number, _VALUE, 0) == (int) FAIL) - || (end_of_line (backup_str) == (int) FAIL)) + s3_inst.type = Rd_rvalueRs_SI15; + + if (s3_my_get_expression (&s3_inst.reloc.exp, &backup_str) == (int) s3_FAIL) + { + s3_inst.error = _("expression error"); + return; + } + else if ((s3_inst.reloc.exp.X_add_symbol == NULL) + && (s3_validate_immediate (s3_inst.reloc.exp.X_add_number, _VALUE, 0) == (int) s3_FAIL)) { + s3_inst.error = _("value not in range [0, 0x7fffffff]"); + return; + } + else if (s3_end_of_line (backup_str) == (int) s3_FAIL) + { + s3_inst.error = _("end on line error"); return; } else { - if (inst.reloc.exp.X_add_symbol == 0) + if (s3_inst.reloc.exp.X_add_symbol == 0) { - memcpy (&inst, &inst_backup, sizeof (struct score_it)); - exp_macro_ldst_abs (str); + memcpy (&s3_inst, &inst_backup, sizeof (struct s3_score_it)); + s3_exp_macro_ldst_abs (str); return; } } /* Ld/st rD, label. */ - inst.type = Rd_rvalueRs_SI15; + s3_inst.type = Rd_rvalueRs_SI15; backup_str = absolute_value; - if ((data_op2 (&backup_str, 1, _GP_IMM15) == (int) FAIL) - || (end_of_line (backup_str) == (int) FAIL)) + if ((s3_data_op2 (&backup_str, 1, _GP_IMM15) == (int) s3_FAIL) + || (s3_end_of_line (backup_str) == (int) s3_FAIL)) { return; } else { - if (inst.reloc.exp.X_add_symbol == 0) + if (s3_inst.reloc.exp.X_add_symbol == 0) { - if (!inst.error) - inst.error = BAD_ARGS; + if (!s3_inst.error) + s3_inst.error = s3_BAD_ARGS; return; } - if (score_pic == PIC) + if (s3_score_pic == s3_PIC) { int ldst_idx = 0; - ldst_idx = inst.instruction & OPC_PSEUDOLDST_MASK; - build_lwst_pic (reg_rd, inst.reloc.exp, score_ldst_insns[ldst_idx * 3 + 0].template); + ldst_idx = s3_inst.instruction & OPC_PSEUDOLDST_MASK; + s3_build_lwst_pic (reg_rd, s3_inst.reloc.exp, s3_score_ldst_insns[ldst_idx * 3 + 0].template); return; } else { - if ((inst.reloc.exp.X_add_number <= 0x3fff) - && (inst.reloc.exp.X_add_number >= -0x4000) - && (!nopic_need_relax (inst.reloc.exp.X_add_symbol, 1))) + if ((s3_inst.reloc.exp.X_add_number <= 0x3fff) + && (s3_inst.reloc.exp.X_add_number >= -0x4000) + && (!s3_nopic_need_relax (s3_inst.reloc.exp.X_add_symbol, 1))) { int ldst_idx = 0; /* Assign the real opcode. */ - ldst_idx = inst.instruction & OPC_PSEUDOLDST_MASK; - inst.instruction &= ~OPC_PSEUDOLDST_MASK; - inst.instruction |= score_ldst_insns[ldst_idx * 3 + 0].value; - inst.instruction |= reg_rd << 20; - inst.instruction |= GP << 15; - inst.relax_inst = 0x8000; - inst.relax_size = 0; + ldst_idx = s3_inst.instruction & OPC_PSEUDOLDST_MASK; + s3_inst.instruction &= ~OPC_PSEUDOLDST_MASK; + s3_inst.instruction |= s3_score_ldst_insns[ldst_idx * 3 + 0].value; + s3_inst.instruction |= reg_rd << 20; + s3_inst.instruction |= s3_GP << 15; + s3_inst.relax_inst = 0x8000; + s3_inst.relax_size = 0; ldst_gp_p = 1; } } } - /* Backup inst. */ - memcpy (&inst_main, &inst, sizeof (struct score_it)); - r1_bak = nor1; - nor1 = 0; + /* Backup s3_inst. */ + memcpy (&inst_main, &s3_inst, sizeof (struct s3_score_it)); + r1_bak = s3_nor1; + s3_nor1 = 0; /* Determine which instructions should be output. */ sprintf (append_str[0], "ld_i32hi r1, %s", label_str); @@ -4355,10 +5032,10 @@ do_macro_ldst_label (char *str) ld/st rd, [r1, 0] */ for (i = 0; i < 3; i++) { - if (append_insn (append_str[i], FALSE) == (int) FAIL) + if (s3_append_insn (append_str[i], FALSE) == (int) s3_FAIL) return; - memcpy (&inst_expand[i], &inst, sizeof (struct score_it)); + memcpy (&inst_expand[i], &s3_inst, sizeof (struct s3_score_it)); } if (ldst_gp_p) @@ -4366,16 +5043,24 @@ do_macro_ldst_label (char *str) char *p; /* Adjust instruction opcode and to be relaxed instruction opcode. */ - inst_main.instruction = adjust_paritybit (inst_main.instruction, GET_INSN_CLASS (inst_main.type)); - inst_main.relax_size = inst_expand[0].size + inst_expand[1].size + inst_expand[2].size; + inst_main.instruction = s3_adjust_paritybit (inst_main.instruction, s3_GET_INSN_CLASS (inst_main.type)); + + /* relax lw rd, label -> ldis rs, imm16 + ori rd, imm16 + lw rd, [rs, imm15] or lw! rd, [rs, imm5]. */ + if (inst_expand[2].relax_size == 0) + inst_main.relax_size = inst_expand[0].size + inst_expand[1].size + inst_expand[2].size; + else + inst_main.relax_size = inst_expand[0].size + inst_expand[1].size + inst_expand[2].relax_size; + inst_main.type = Insn_GP; for (i = 0; i < 3; i++) - inst_expand[i].instruction = adjust_paritybit (inst_expand[i].instruction - , GET_INSN_CLASS (inst_expand[i].type)); + inst_expand[i].instruction = s3_adjust_paritybit (inst_expand[i].instruction, + s3_GET_INSN_CLASS (inst_expand[i].type)); /* Check data dependency. */ - handle_dependency (&inst_main); + s3_handle_dependency (&inst_main); /* Start a new frag if frag_now is not empty. */ if (frag_now_fix () != 0) @@ -4389,11 +5074,11 @@ do_macro_ldst_label (char *str) /* Write fr_fix part. */ p = frag_more (inst_main.size); - md_number_to_chars (p, inst_main.instruction, inst_main.size); + s3_md_number_to_chars (p, inst_main.instruction, inst_main.size); if (inst_main.reloc.type != BFD_RELOC_NONE) { - fix_new_score (frag_now, p - frag_now->fr_literal, inst_main.size, + s3_fix_new_score (frag_now, p - frag_now->fr_literal, inst_main.size, &inst_main.reloc.exp, inst_main.reloc.pc_rel, inst_main.reloc.type); } @@ -4401,314 +5086,204 @@ do_macro_ldst_label (char *str) dwarf2_emit_insn (inst_main.size); #endif - /* GP instruction can not do optimization, only can do relax between + /* s3_GP instruction can not do optimization, only can do relax between 1 instruction and 3 instructions. */ - p = frag_var (rs_machine_dependent, inst_main.relax_size + RELAX_PAD_BYTE, 0, - RELAX_ENCODE (inst_main.size, inst_main.relax_size, inst_main.type, 0, 4, 0), + p = frag_var (rs_machine_dependent, inst_main.relax_size + s3_RELAX_PAD_BYTE, 0, + s3_RELAX_ENCODE (inst_main.size, inst_main.relax_size, inst_main.type, 0, 4, 0), inst_main.reloc.exp.X_add_symbol, 0, NULL); /* Write fr_var part. - no calling gen_insn_frag, no fixS will be generated. */ - md_number_to_chars (p, inst_expand[0].instruction, inst_expand[0].size); + no calling s3_gen_insn_frag, no fixS will be generated. */ + s3_md_number_to_chars (p, inst_expand[0].instruction, inst_expand[0].size); p += inst_expand[0].size; - md_number_to_chars (p, inst_expand[1].instruction, inst_expand[1].size); + s3_md_number_to_chars (p, inst_expand[1].instruction, inst_expand[1].size); p += inst_expand[1].size; - md_number_to_chars (p, inst_expand[2].instruction, inst_expand[2].size); + + /* relax lw rd, label -> ldis rs, imm16 + ori rd, imm16 + lw rd, [rs, imm15] or lw! rd, [rs, imm5]. */ + if (inst_expand[2].relax_size == 0) + s3_md_number_to_chars (p, inst_expand[2].instruction, inst_expand[2].size); + else + s3_md_number_to_chars (p, inst_expand[2].relax_inst, inst_expand[2].relax_size); } else { - gen_insn_frag (&inst_expand[0], NULL); - gen_insn_frag (&inst_expand[1], NULL); - gen_insn_frag (&inst_expand[2], NULL); + s3_gen_insn_frag (&inst_expand[0], NULL); + s3_gen_insn_frag (&inst_expand[1], NULL); + s3_gen_insn_frag (&inst_expand[2], NULL); } - nor1 = r1_bak; + s3_nor1 = r1_bak; /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ - inst.bwarn = -1; + s3_inst.bwarn = -1; } static void -do_lw_pic (char *str) +s3_do_lw_pic (char *str) { int reg_rd; - skip_whitespace (str); - if (((reg_rd = reg_required_here (&str, 20, REG_TYPE_SCORE)) == (int) FAIL) - || (skip_past_comma (&str) == (int) FAIL) - || (my_get_expression (&inst.reloc.exp, &str) == (int) FAIL) - || (end_of_line (str) == (int) FAIL)) + s3_skip_whitespace (str); + if (((reg_rd = s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE)) == (int) s3_FAIL) + || (s3_skip_past_comma (&str) == (int) s3_FAIL) + || (s3_my_get_expression (&s3_inst.reloc.exp, &str) == (int) s3_FAIL) + || (s3_end_of_line (str) == (int) s3_FAIL)) { return; } else { - if (inst.reloc.exp.X_add_symbol == 0) + if (s3_inst.reloc.exp.X_add_symbol == 0) { - if (!inst.error) - inst.error = BAD_ARGS; + if (!s3_inst.error) + s3_inst.error = s3_BAD_ARGS; return; } - inst.instruction |= GP << 15; - inst.reloc.type = BFD_RELOC_SCORE_GOT15; + s3_inst.instruction |= s3_GP << 15; + s3_inst.reloc.type = BFD_RELOC_SCORE_GOT15; } } static void -do_empty (char *str) +s3_do_empty (char *str) { str = str; - if (university_version == 1) + if (s3_university_version == 1) { - if (((inst.instruction & 0x3e0003ff) == 0x0c000004) - || ((inst.instruction & 0x3e0003ff) == 0x0c000024) - || ((inst.instruction & 0x3e0003ff) == 0x0c000044) - || ((inst.instruction & 0x3e0003ff) == 0x0c000064)) + if (((s3_inst.instruction & 0x3e0003ff) == 0x0c000004) + || ((s3_inst.instruction & 0x3e0003ff) == 0x0c000024) + || ((s3_inst.instruction & 0x3e0003ff) == 0x0c000044) + || ((s3_inst.instruction & 0x3e0003ff) == 0x0c000064)) { - inst.error = ERR_FOR_SCORE5U_MMU; + s3_inst.error = s3_ERR_FOR_SCORE5U_MMU; return; } } - if (end_of_line (str) == (int) FAIL) + if (s3_end_of_line (str) == (int) s3_FAIL) return; - if (inst.relax_inst != 0x8000) + if (s3_inst.relax_inst != 0x8000) { - if (inst.type == NO_OPD) + if (s3_inst.type == NO_OPD) { - inst.relax_size = 2; + s3_inst.relax_size = 2; } else { - inst.relax_size = 4; + s3_inst.relax_size = 4; } } } static void -do_jump (char *str) +s3_do16_int (char *str) +{ + s3_skip_whitespace (str); + return; +} + +static void +s3_do_jump (char *str) { char *save_in; - skip_whitespace (str); - if (my_get_expression (&inst.reloc.exp, &str) == (int) FAIL - || end_of_line (str) == (int) FAIL) + s3_skip_whitespace (str); + if (s3_my_get_expression (&s3_inst.reloc.exp, &str) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) return; - if (inst.reloc.exp.X_add_symbol == 0) + if (s3_inst.reloc.exp.X_add_symbol == 0) { - inst.error = _("lacking label "); + s3_inst.error = _("lacking label "); return; } - if (((inst.reloc.exp.X_add_number & 0xff000000) != 0) - && ((inst.reloc.exp.X_add_number & 0xff000000) != 0xff000000)) + if (!(s3_inst.reloc.exp.X_add_number >= -16777216 + && s3_inst.reloc.exp.X_add_number <= 16777215)) { - inst.error = _("invalid constant: 25 bit expression not in range -2^24..2^24"); + s3_inst.error = _("invalid constant: 25 bit expression not in range [-16777216, 16777215]"); return; } save_in = input_line_pointer; input_line_pointer = str; - inst.reloc.type = BFD_RELOC_SCORE_JMP; - inst.reloc.pc_rel = 1; + s3_inst.reloc.type = BFD_RELOC_SCORE_JMP; + s3_inst.reloc.pc_rel = 1; input_line_pointer = save_in; } static void -do16_jump (char *str) +s3_do_branch (char *str) { - skip_whitespace (str); - if (my_get_expression (&inst.reloc.exp, &str) == (int) FAIL - || end_of_line (str) == (int) FAIL) + if (s3_my_get_expression (&s3_inst.reloc.exp, &str) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) { return; } - else if (inst.reloc.exp.X_add_symbol == 0) + else if (s3_inst.reloc.exp.X_add_symbol == 0) { - inst.error = _("lacking label "); + s3_inst.error = _("lacking label "); return; } - else if (((inst.reloc.exp.X_add_number & 0xfffff800) != 0) - && ((inst.reloc.exp.X_add_number & 0xfffff800) != 0xfffff800)) + else if (!(s3_inst.reloc.exp.X_add_number >= -524288 + && s3_inst.reloc.exp.X_add_number <= 524287)) { - inst.error = _("invalid constant: 12 bit expression not in range -2^11..2^11"); + s3_inst.error = _("invalid constant: 20 bit expression not in range -2^19..2^19"); return; } - inst.reloc.type = BFD_RELOC_SCORE16_JMP; - inst.reloc.pc_rel = 1; -} - -static void -do_branch (char *str) -{ - unsigned long abs_value = 0; - - if (my_get_expression (&inst.reloc.exp, &str) == (int) FAIL - || end_of_line (str) == (int) FAIL) - { - return; - } - else if (inst.reloc.exp.X_add_symbol == 0) - { - inst.error = _("lacking label "); - return; - } - else if (((inst.reloc.exp.X_add_number & 0xff000000) != 0) - && ((inst.reloc.exp.X_add_number & 0xff000000) != 0xff000000)) - { - inst.error = _("invalid constant: 20 bit expression not in range -2^19..2^19"); - return; - } - - inst.reloc.type = BFD_RELOC_SCORE_BRANCH; - inst.reloc.pc_rel = 1; + s3_inst.reloc.type = BFD_RELOC_SCORE_BRANCH; + s3_inst.reloc.pc_rel = 1; /* Branch 32 offset field : 20 bit, 16 bit branch offset field : 8 bit. */ - inst.instruction |= (inst.reloc.exp.X_add_number & 0x3fe) | ((inst.reloc.exp.X_add_number & 0xffc00) << 5); + s3_inst.instruction |= (s3_inst.reloc.exp.X_add_number & 0x3fe) | ((s3_inst.reloc.exp.X_add_number & 0xffc00) << 5); /* Compute 16 bit branch instruction. */ - if ((inst.relax_inst != 0x8000) && (abs_value & 0xfffffe00) == 0) + if ((s3_inst.relax_inst != 0x8000) + && (s3_inst.reloc.exp.X_add_number >= -512 && s3_inst.reloc.exp.X_add_number <= 511)) { - inst.relax_inst |= (((inst.instruction >> 10) & 0xf) << 8); - inst.relax_inst |= ((inst.reloc.exp.X_add_number >> 1) & 0xff); - inst.relax_size = 2; + s3_inst.relax_inst |= ((s3_inst.reloc.exp.X_add_number >> 1) & 0x1ff);/*b! :disp 9 bit */ + s3_inst.relax_size = 2; } else { - inst.relax_inst = 0x8000; + s3_inst.relax_inst = 0x8000; } } static void -do16_branch (char *str) +s3_do16_branch (char *str) { - if ((my_get_expression (&inst.reloc.exp, &str) == (int) FAIL - || end_of_line (str) == (int) FAIL)) + if ((s3_my_get_expression (&s3_inst.reloc.exp, &str) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL)) { ; } - else if (inst.reloc.exp.X_add_symbol == 0) + else if (s3_inst.reloc.exp.X_add_symbol == 0) { - inst.error = _("lacking label"); + s3_inst.error = _("lacking label"); } - else if (((inst.reloc.exp.X_add_number & 0xffffff00) != 0) - && ((inst.reloc.exp.X_add_number & 0xffffff00) != 0xffffff00)) + else if (!(s3_inst.reloc.exp.X_add_number >= -512 + && s3_inst.reloc.exp.X_add_number <= 511)) { - inst.error = _("invalid constant: 9 bit expression not in range -2^8..2^8"); + s3_inst.error = _("invalid constant: 10 bit expression not in range [-2^9, 2^9-1]"); } else { - inst.reloc.type = BFD_RELOC_SCORE16_BRANCH; - inst.reloc.pc_rel = 1; - inst.instruction |= ((inst.reloc.exp.X_add_number >> 1) & 0xff); - } -} - -/* Iterate over the base tables to create the instruction patterns. */ -static void -build_score_ops_hsh (void) -{ - unsigned int i; - static struct obstack insn_obstack; - - obstack_begin (&insn_obstack, 4000); - for (i = 0; i < sizeof (score_insns) / sizeof (struct asm_opcode); i++) - { - const struct asm_opcode *insn = score_insns + i; - unsigned len = strlen (insn->template); - struct asm_opcode *new; - char *template; - new = obstack_alloc (&insn_obstack, sizeof (struct asm_opcode)); - template = obstack_alloc (&insn_obstack, len + 1); - - strcpy (template, insn->template); - new->template = template; - new->parms = insn->parms; - new->value = insn->value; - new->relax_value = insn->relax_value; - new->type = insn->type; - new->bitmask = insn->bitmask; - hash_insert (score_ops_hsh, new->template, (void *) new); - } -} - -static void -build_dependency_insn_hsh (void) -{ - unsigned int i; - static struct obstack dependency_obstack; - - obstack_begin (&dependency_obstack, 4000); - for (i = 0; i < sizeof (insn_to_dependency_table) / sizeof (insn_to_dependency_table[0]); i++) - { - const struct insn_to_dependency *tmp = insn_to_dependency_table + i; - unsigned len = strlen (tmp->insn_name); - struct insn_to_dependency *new; - - new = obstack_alloc (&dependency_obstack, sizeof (struct insn_to_dependency)); - new->insn_name = obstack_alloc (&dependency_obstack, len + 1); - - strcpy (new->insn_name, tmp->insn_name); - new->type = tmp->type; - hash_insert (dependency_insn_hsh, new->insn_name, (void *) new); + s3_inst.reloc.type = BFD_RELOC_SCORE16_BRANCH; + s3_inst.reloc.pc_rel = 1; + s3_inst.instruction |= ((s3_inst.reloc.exp.X_add_number >> 1) & 0x1ff); + s3_inst.relax_inst |= ((s3_inst.reloc.exp.X_add_number ) & 0x1ff); + s3_inst.relax_size = 4; } } -/* Turn an integer of n bytes (in val) into a stream of bytes appropriate - for use in the a.out file, and stores them in the array pointed to by buf. - This knows about the endian-ness of the target machine and does - THE RIGHT THING, whatever it is. Possible values for n are 1 (byte) - 2 (short) and 4 (long) Floating numbers are put out as a series of - LITTLENUMS (shorts, here at least). */ - -void -md_number_to_chars (char *buf, valueT val, int n) -{ - if (target_big_endian) - number_to_chars_bigendian (buf, val, n); - else - number_to_chars_littleendian (buf, val, n); -} - -static valueT -md_chars_to_number (char *buf, int n) -{ - valueT result = 0; - unsigned char *where = (unsigned char *)buf; - - if (target_big_endian) - { - while (n--) - { - result <<= 8; - result |= (*where++ & 255); - } - } - else - { - while (n--) - { - result <<= 8; - result |= (where[n] & 255); - } - } - - return result; -} - -char * -md_atof (int type, char *litP, int *sizeP) -{ - return ieee_md_atof (type, litP, sizeP, target_big_endian); -} - -/* Return true if the given symbol should be considered local for PIC. */ - +/* Return true if the given symbol should be considered local for s3_PIC. */ static bfd_boolean -pic_need_relax (symbolS *sym, asection *segtype) +s3_pic_need_relax (symbolS *sym, asection *segtype) { asection *symsec; bfd_boolean linkonce; @@ -4756,1016 +5331,226 @@ pic_need_relax (symbolS *sym, asection *segtype) ); } -static int -judge_size_before_relax (fragS * fragp, asection *sec) -{ - int change = 0; - - if (score_pic == NO_PIC) - change = nopic_need_relax (fragp->fr_symbol, 0); - else - change = pic_need_relax (fragp->fr_symbol, sec); - - if (change == 1) - { - /* Only at the first time determining whether GP instruction relax should be done, - return the difference between insntruction size and instruction relax size. */ - if (fragp->fr_opcode == NULL) - { - fragp->fr_fix = RELAX_NEW (fragp->fr_subtype); - fragp->fr_opcode = fragp->fr_literal + RELAX_RELOC1 (fragp->fr_subtype); - return RELAX_NEW (fragp->fr_subtype) - RELAX_OLD (fragp->fr_subtype); - } - } - - return 0; -} - -/* In this function, we determine whether GP instruction should do relaxation, - for the label being against was known now. - Doing this here but not in md_relax_frag() can induce iteration times - in stage of doing relax. */ -int -md_estimate_size_before_relax (fragS * fragp, asection * sec ATTRIBUTE_UNUSED) -{ - if ((RELAX_TYPE (fragp->fr_subtype) == Insn_GP) - || (RELAX_TYPE (fragp->fr_subtype) == Insn_PIC)) - return judge_size_before_relax (fragp, sec); - - return 0; -} - -static int -b32_relax_to_b16 (fragS * fragp) +static void +s3_parse_pce_inst (char *insnstr) { - int grows = 0; - int relaxable_p = 0; - int old; - int new; - int frag_addr = fragp->fr_address + fragp->insn_addr; - - addressT symbol_address = 0; - symbolS *s; - offsetT offset; - unsigned long value; - unsigned long abs_value; - - /* FIXME : here may be able to modify better . - I don't know how to get the fragp's section , - so in relax stage , it may be wrong to calculate the symbol's offset when the frag's section - is different from the symbol's. */ + char c; + char *p; + char first[s3_MAX_LITERAL_POOL_SIZE]; + char second[s3_MAX_LITERAL_POOL_SIZE]; + struct s3_score_it pec_part_1; - old = RELAX_OLD (fragp->fr_subtype); - new = RELAX_NEW (fragp->fr_subtype); - relaxable_p = RELAX_OPT (fragp->fr_subtype); + /* Get first part string of PCE. */ + p = strstr (insnstr, "||"); + c = *p; + *p = '\0'; + sprintf (first, "%s", insnstr); - s = fragp->fr_symbol; - /* b/bl immediate */ - if (s == NULL) - frag_addr = 0; - else - { - if (s->bsym != 0) - symbol_address = (addressT) s->sy_frag->fr_address; - } + /* Get second part string of PCE. */ + *p = c; + p += 2; + sprintf (second, "%s", p); - value = md_chars_to_number (fragp->fr_literal, INSN_SIZE); + s3_parse_16_32_inst (first, FALSE); + if (s3_inst.error) + return; - /* b 32's offset : 20 bit, b 16's tolerate field : 0xff. */ - offset = ((value & 0x3ff0000) >> 6) | (value & 0x3fe); - if ((offset & 0x80000) == 0x80000) - offset |= 0xfff00000; + memcpy (&pec_part_1, &s3_inst, sizeof (s3_inst)); - abs_value = offset + symbol_address - frag_addr; - if ((abs_value & 0x80000000) == 0x80000000) - abs_value = 0xffffffff - abs_value + 1; + s3_parse_16_32_inst (second, FALSE); + if (s3_inst.error) + return; - /* Relax branch 32 to branch 16. */ - if (relaxable_p && (s->bsym != NULL) && ((abs_value & 0xffffff00) == 0) - && (S_IS_DEFINED (s) && !S_IS_COMMON (s) && !S_IS_EXTERNAL (s))) + if ( ((pec_part_1.size == s3_INSN_SIZE) && (s3_inst.size == s3_INSN_SIZE)) + || ((pec_part_1.size == s3_INSN_SIZE) && (s3_inst.size == s3_INSN16_SIZE)) + || ((pec_part_1.size == s3_INSN16_SIZE) && (s3_inst.size == s3_INSN_SIZE))) { - /* do nothing. */ - } - else - { - /* Branch 32 can not be relaxed to b 16, so clear OPT bit. */ - fragp->fr_opcode = NULL; - fragp->fr_subtype = RELAX_OPT_CLEAR (fragp->fr_subtype); + s3_inst.error = _("pce instruction error (16 bit || 16 bit)'"); + sprintf (s3_inst.str, insnstr); + return; } - return grows; + if (!s3_inst.error) + s3_gen_insn_frag (&pec_part_1, &s3_inst); } -/* Main purpose is to determine whether one frag should do relax. - frag->fr_opcode indicates this point. */ - -int -score_relax_frag (asection * sec ATTRIBUTE_UNUSED, fragS * fragp, long stretch ATTRIBUTE_UNUSED) +/* s3: dsp. */ +static void +s3_do16_dsp (char *str) { - int grows = 0; - int insn_size; - int insn_relax_size; - int do_relax_p = 0; /* Indicate doing relaxation for this frag. */ - int relaxable_p = 0; - bfd_boolean word_align_p = FALSE; - fragS *next_fragp; + int rd = 0; - /* If the instruction address is odd, make it half word align first. */ - if ((fragp->fr_address) % 2 != 0) + /* Check 3d. */ + if (s3_score3d == 0) { - if ((fragp->fr_address + fragp->insn_addr) % 2 != 0) - { - fragp->insn_addr = 1; - grows += 1; - } + s3_inst.error = _("score3d instruction."); + return; } - word_align_p = ((fragp->fr_address + fragp->insn_addr) % 4 == 0) ? TRUE : FALSE; + s3_skip_whitespace (str); - /* Get instruction size and relax size after the last relaxation. */ - if (fragp->fr_opcode) - { - insn_size = RELAX_NEW (fragp->fr_subtype); - insn_relax_size = RELAX_OLD (fragp->fr_subtype); - } - else + if ((rd = s3_reglow_required_here (&str, 0)) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) { - insn_size = RELAX_OLD (fragp->fr_subtype); - insn_relax_size = RELAX_NEW (fragp->fr_subtype); - } - - /* Handle specially for GP instruction. for, judge_size_before_relax() has already determine - whether the GP instruction should do relax. */ - if ((RELAX_TYPE (fragp->fr_subtype) == Insn_GP) - || (RELAX_TYPE (fragp->fr_subtype) == Insn_PIC)) - { - if (!word_align_p) - { - if (fragp->insn_addr < 2) - { - fragp->insn_addr += 2; - grows += 2; - } - else - { - fragp->insn_addr -= 2; - grows -= 2; - } - } - - if (fragp->fr_opcode) - fragp->fr_fix = RELAX_NEW (fragp->fr_subtype) + fragp->insn_addr; - else - fragp->fr_fix = RELAX_OLD (fragp->fr_subtype) + fragp->insn_addr; + return; } else { - if (RELAX_TYPE (fragp->fr_subtype) == PC_DISP19div2) - b32_relax_to_b16 (fragp); - - relaxable_p = RELAX_OPT (fragp->fr_subtype); - next_fragp = fragp->fr_next; - while ((next_fragp) && (next_fragp->fr_type != rs_machine_dependent)) - { - next_fragp = next_fragp->fr_next; - } - - if (next_fragp) - { - int n_insn_size; - int n_relaxable_p = 0; - - if (next_fragp->fr_opcode) - { - n_insn_size = RELAX_NEW (next_fragp->fr_subtype); - } - else - { - n_insn_size = RELAX_OLD (next_fragp->fr_subtype); - } - - if (RELAX_TYPE (next_fragp->fr_subtype) == PC_DISP19div2) - b32_relax_to_b16 (next_fragp); - n_relaxable_p = RELAX_OPT (next_fragp->fr_subtype); - - if (word_align_p) - { - if (insn_size == 4) - { - /* 32 -> 16. */ - if (relaxable_p && ((n_insn_size == 2) || n_relaxable_p)) - { - grows -= 2; - do_relax_p = 1; - } - } - else if (insn_size == 2) - { - /* 16 -> 32. */ - if (relaxable_p && (((n_insn_size == 4) && !n_relaxable_p) || (n_insn_size > 4))) - { - grows += 2; - do_relax_p = 1; - } - } - else - { - abort (); - } - } - else - { - if (insn_size == 4) - { - /* 32 -> 16. */ - if (relaxable_p) - { - grows -= 2; - do_relax_p = 1; - } - /* Make the 32 bit insturction word align. */ - else - { - fragp->insn_addr += 2; - grows += 2; - } - } - else if (insn_size == 2) - { - /* Do nothing. */ - } - else - { - abort (); - } - } - } - else - { - /* Here, try best to do relax regardless fragp->fr_next->fr_type. */ - if (word_align_p == FALSE) - { - if (insn_size % 4 == 0) - { - /* 32 -> 16. */ - if (relaxable_p) - { - grows -= 2; - do_relax_p = 1; - } - else - { - fragp->insn_addr += 2; - grows += 2; - } - } - } - else - { - /* Do nothing. */ - } - } - - /* fragp->fr_opcode indicates whether this frag should be relaxed. */ - if (do_relax_p) - { - if (fragp->fr_opcode) - { - fragp->fr_opcode = NULL; - /* Guarantee estimate stage is correct. */ - fragp->fr_fix = RELAX_OLD (fragp->fr_subtype); - fragp->fr_fix += fragp->insn_addr; - } - else - { - fragp->fr_opcode = fragp->fr_literal + RELAX_RELOC1 (fragp->fr_subtype); - /* Guarantee estimate stage is correct. */ - fragp->fr_fix = RELAX_NEW (fragp->fr_subtype); - fragp->fr_fix += fragp->insn_addr; - } - } - else - { - if (fragp->fr_opcode) - { - /* Guarantee estimate stage is correct. */ - fragp->fr_fix = RELAX_NEW (fragp->fr_subtype); - fragp->fr_fix += fragp->insn_addr; - } - else - { - /* Guarantee estimate stage is correct. */ - fragp->fr_fix = RELAX_OLD (fragp->fr_subtype); - fragp->fr_fix += fragp->insn_addr; - } - } + s3_inst.relax_inst |= rd << 20; + s3_inst.relax_size = 4; } - - return grows; } -void -md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, segT sec ATTRIBUTE_UNUSED, fragS * fragp) +static void +s3_do16_dsp2 (char *str) { - int old; - int new; - char backup[20]; - fixS *fixp; - - old = RELAX_OLD (fragp->fr_subtype); - new = RELAX_NEW (fragp->fr_subtype); - - /* fragp->fr_opcode indicates whether this frag should be relaxed. */ - if (fragp->fr_opcode == NULL) + /* Check 3d. */ + if (s3_score3d == 0) { - memcpy (backup, fragp->fr_literal, old); - fragp->fr_fix = old; - } - else - { - memcpy (backup, fragp->fr_literal + old, new); - fragp->fr_fix = new; + s3_inst.error = _("score3d instruction."); + return; } - fixp = fragp->tc_frag_data.fixp; - while (fixp && fixp->fx_frag == fragp && fixp->fx_where < old) - { - if (fragp->fr_opcode) - fixp->fx_done = 1; - fixp = fixp->fx_next; - } - while (fixp && fixp->fx_frag == fragp) + s3_skip_whitespace (str); + + if (s3_reglow_required_here (&str, 4) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reglow_required_here (&str, 0) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) { - if (fragp->fr_opcode) - fixp->fx_where -= old + fragp->insn_addr; - else - fixp->fx_done = 1; - fixp = fixp->fx_next; + return; } - - if (fragp->insn_addr) + else { - md_number_to_chars (fragp->fr_literal, 0x0, fragp->insn_addr); + s3_inst.relax_inst |= (((s3_inst.instruction >> 8) & 0xf) << 20) + | (((s3_inst.instruction >> 8) & 0xf) << 15) | (((s3_inst.instruction >> 4) & 0xf) << 10); + s3_inst.relax_size = 4; } - memcpy (fragp->fr_literal + fragp->insn_addr, backup, fragp->fr_fix); - fragp->fr_fix += fragp->insn_addr; } -/* Implementation of md_frag_check. - Called after md_convert_frag(). */ - -void -score_frag_check (fragS * fragp ATTRIBUTE_UNUSED) -{ - know (fragp->insn_addr <= RELAX_PAD_BYTE); -} - -bfd_boolean -score_fix_adjustable (fixS * fixP) +static void +s3_do_dsp (char *str) { - if (fixP->fx_addsy == NULL) - { - return 1; - } - else if (OUTPUT_FLAVOR == bfd_target_elf_flavour - && (S_IS_EXTERNAL (fixP->fx_addsy) || S_IS_WEAK (fixP->fx_addsy))) + /* Check 3d. */ + if (s3_score3d == 0) { - return 0; - } - else if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT - || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) - { - return 0; + s3_inst.error = _("score3d instruction."); + return; } - return 1; -} + s3_skip_whitespace (str); -/* Implementation of TC_VALIDATE_FIX. - Called before md_apply_fix() and after md_convert_frag(). */ -void -score_validate_fix (fixS *fixP) -{ - fixP->fx_where += fixP->fx_frag->insn_addr; -} - -long -md_pcrel_from (fixS * fixP) -{ - long retval = 0; + if (s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 10, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + return; - if (fixP->fx_addsy - && (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) - && (fixP->fx_subsy == NULL)) + if ((s3_inst.relax_inst != 0x8000) && (((s3_inst.instruction >> 20) & 0x1f) == 3) ) { - retval = 0; + s3_inst.relax_inst |= (((s3_inst.instruction >> 10) & 0x1f)) | (((s3_inst.instruction >> 15) & 0x1f) << 5); + s3_inst.relax_size = 2; } else - { - retval = fixP->fx_where + fixP->fx_frag->fr_address; - } - - return retval; + s3_inst.relax_inst = 0x8000; } -int -score_force_relocation (struct fix *fixp) +static void +s3_do_dsp2 (char *str) { - int retval = 0; + int reg; - if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT - || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY - || fixp->fx_r_type == BFD_RELOC_SCORE_JMP - || fixp->fx_r_type == BFD_RELOC_SCORE_BRANCH - || fixp->fx_r_type == BFD_RELOC_SCORE16_JMP - || fixp->fx_r_type == BFD_RELOC_SCORE16_BRANCH) + /* Check 3d. */ + if (s3_score3d == 0) { - retval = 1; + s3_inst.error = _("score3d instruction."); + return; } - return retval; -} - -/* Round up a section size to the appropriate boundary. */ -valueT -md_section_align (segT segment ATTRIBUTE_UNUSED, valueT size) -{ - int align = bfd_get_section_alignment (stdoutput, segment); - - return ((size + (1 << align) - 1) & (-1 << align)); -} + s3_skip_whitespace (str); -void -md_apply_fix (fixS *fixP, valueT *valP, segT seg) -{ - offsetT value = *valP; - offsetT abs_value = 0; - offsetT newval; - offsetT content; - unsigned short HI, LO; - - char *buf = fixP->fx_frag->fr_literal + fixP->fx_where; - - assert (fixP->fx_r_type < BFD_RELOC_UNUSED); - if (fixP->fx_addsy == 0 && !fixP->fx_pcrel) + if ((reg = s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE)) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 10, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) { - if (fixP->fx_r_type != BFD_RELOC_SCORE_DUMMY_HI16) - fixP->fx_done = 1; - } - - /* If this symbol is in a different section then we need to leave it for - the linker to deal with. Unfortunately, md_pcrel_from can't tell, - so we have to undo it's effects here. */ - if (fixP->fx_pcrel) - { - if (fixP->fx_addsy != NULL - && S_IS_DEFINED (fixP->fx_addsy) - && S_GET_SEGMENT (fixP->fx_addsy) != seg) - value += md_pcrel_from (fixP); + return; } - - /* Remember value for emit_reloc. */ - fixP->fx_addnumber = value; - - switch (fixP->fx_r_type) + else { - case BFD_RELOC_HI16_S: - if (fixP->fx_done) - { /* For la rd, imm32. */ - newval = md_chars_to_number (buf, INSN_SIZE); - HI = (value) >> 16; /* mul to 2, then take the hi 16 bit. */ - newval |= (HI & 0x3fff) << 1; - newval |= ((HI >> 14) & 0x3) << 16; - md_number_to_chars (buf, newval, INSN_SIZE); - } - break; - case BFD_RELOC_LO16: - if (fixP->fx_done) /* For la rd, imm32. */ + /* Check mulr, mulur rd is even number. */ + if (((s3_inst.instruction & 0x3e0003ff) == 0x00000340 + || (s3_inst.instruction & 0x3e0003ff) == 0x00000342) + && (reg % 2)) { - newval = md_chars_to_number (buf, INSN_SIZE); - LO = (value) & 0xffff; - newval |= (LO & 0x3fff) << 1; /* 16 bit: imm -> 14 bit in lo, 2 bit in hi. */ - newval |= ((LO >> 14) & 0x3) << 16; - md_number_to_chars (buf, newval, INSN_SIZE); - } - break; - case BFD_RELOC_SCORE_JMP: - { - content = md_chars_to_number (buf, INSN_SIZE); - value = fixP->fx_offset; - content = (content & ~0x3ff7ffe) | ((value << 1) & 0x3ff0000) | (value & 0x7fff); - md_number_to_chars (buf, content, INSN_SIZE); - } - break; - case BFD_RELOC_SCORE_BRANCH: - if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) || (fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy))) - value = fixP->fx_offset; - else - fixP->fx_done = 1; - - content = md_chars_to_number (buf, INSN_SIZE); - if ((fixP->fx_frag->fr_opcode != 0) && ((content & 0x80008000) != 0x80008000)) - { - if ((value & 0x80000000) == 0x80000000) - abs_value = 0xffffffff - value + 1; - if ((abs_value & 0xffffff00) != 0) - { - as_bad_where (fixP->fx_file, fixP->fx_line, - _(" branch relocation truncate (0x%x) [-2^8 ~ 2^8]"), (unsigned int)value); - return; - } - content = md_chars_to_number (buf, INSN16_SIZE); - content &= 0xff00; - content = (content & 0xff00) | ((value >> 1) & 0xff); - md_number_to_chars (buf, content, INSN16_SIZE); - fixP->fx_r_type = BFD_RELOC_SCORE16_BRANCH; - fixP->fx_size = 2; - } - else - { - if ((value & 0x80000000) == 0x80000000) - abs_value = 0xffffffff - value + 1; - if ((abs_value & 0xfff80000) != 0) - { - as_bad_where (fixP->fx_file, fixP->fx_line, - _(" branch relocation truncate (0x%x) [-2^19 ~ 2^19]"), (unsigned int)value); - return; - } - content = md_chars_to_number (buf, INSN_SIZE); - content &= 0xfc00fc01; - content = (content & 0xfc00fc01) | (value & 0x3fe) | ((value << 6) & 0x3ff0000); - md_number_to_chars (buf, content, INSN_SIZE); - } - break; - case BFD_RELOC_SCORE16_JMP: - content = md_chars_to_number (buf, INSN16_SIZE); - content &= 0xf001; - value = fixP->fx_offset & 0xfff; - content = (content & 0xfc01) | (value & 0xffe); - md_number_to_chars (buf, content, INSN16_SIZE); - break; - case BFD_RELOC_SCORE16_BRANCH: - content = md_chars_to_number (buf, INSN_SIZE); - if ((fixP->fx_frag->fr_opcode != 0) && ((content & 0x80008000) == 0x80008000)) - { - if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) || - (fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy))) - value = fixP->fx_offset; - else - fixP->fx_done = 1; - if ((value & 0x80000000) == 0x80000000) - abs_value = 0xffffffff - value + 1; - if ((abs_value & 0xfff80000) != 0) - { - as_bad_where (fixP->fx_file, fixP->fx_line, - _(" branch relocation truncate (0x%x) [-2^19 ~ 2^19]"), (unsigned int)value); - return; - } - content = md_chars_to_number (buf, INSN_SIZE); - content = (content & 0xfc00fc01) | (value & 0x3fe) | ((value << 6) & 0x3ff0000); - md_number_to_chars (buf, content, INSN_SIZE); - fixP->fx_r_type = BFD_RELOC_SCORE_BRANCH; - fixP->fx_size = 4; - break; - } - else - { - /* In differnt section. */ - if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) || - (fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy))) - value = fixP->fx_offset; - else - fixP->fx_done = 1; - - if ((value & 0x80000000) == 0x80000000) - abs_value = 0xffffffff - value + 1; - if ((abs_value & 0xffffff00) != 0) - { - as_bad_where (fixP->fx_file, fixP->fx_line, - _(" branch relocation truncate (0x%x) [-2^8 ~ 2^8]"), (unsigned int)value); - return; - } - content = md_chars_to_number (buf, INSN16_SIZE); - content = (content & 0xff00) | ((value >> 1) & 0xff); - md_number_to_chars (buf, content, INSN16_SIZE); - break; - } - case BFD_RELOC_8: - if (fixP->fx_done || fixP->fx_pcrel) - md_number_to_chars (buf, value, 1); -#ifdef OBJ_ELF - else - { - value = fixP->fx_offset; - md_number_to_chars (buf, value, 1); + s3_inst.error = _("rd must be even number."); + return; } -#endif - break; - case BFD_RELOC_16: - if (fixP->fx_done || fixP->fx_pcrel) - md_number_to_chars (buf, value, 2); -#ifdef OBJ_ELF - else + if ((((s3_inst.instruction >> 15) & 0x10) == 0) + && (((s3_inst.instruction >> 10) & 0x10) == 0) + && (((s3_inst.instruction >> 20) & 0x10) == 0) + && (s3_inst.relax_inst != 0x8000) + && (((s3_inst.instruction >> 20) & 0xf) == ((s3_inst.instruction >> 15) & 0xf))) { - value = fixP->fx_offset; - md_number_to_chars (buf, value, 2); + s3_inst.relax_inst |= (((s3_inst.instruction >> 10) & 0xf) ) + | (((s3_inst.instruction >> 15) & 0xf) << 4); + s3_inst.relax_size = 2; } -#endif - break; - case BFD_RELOC_RVA: - case BFD_RELOC_32: - if (fixP->fx_done || fixP->fx_pcrel) - md_number_to_chars (buf, value, 4); -#ifdef OBJ_ELF else { - value = fixP->fx_offset; - md_number_to_chars (buf, value, 4); - } -#endif - break; - case BFD_RELOC_VTABLE_INHERIT: - fixP->fx_done = 0; - if (fixP->fx_addsy && !S_IS_DEFINED (fixP->fx_addsy) && !S_IS_WEAK (fixP->fx_addsy)) - S_SET_WEAK (fixP->fx_addsy); - break; - case BFD_RELOC_VTABLE_ENTRY: - fixP->fx_done = 0; - break; - case BFD_RELOC_SCORE_GPREL15: - content = md_chars_to_number (buf, INSN_SIZE); - if ((fixP->fx_frag->fr_opcode != 0) && ((content & 0xfc1c8000) != 0x94188000)) - fixP->fx_r_type = BFD_RELOC_NONE; - fixP->fx_done = 0; - break; - case BFD_RELOC_SCORE_GOT15: - case BFD_RELOC_SCORE_DUMMY_HI16: - case BFD_RELOC_SCORE_GOT_LO16: - case BFD_RELOC_SCORE_CALL15: - case BFD_RELOC_GPREL32: - break; - case BFD_RELOC_NONE: - default: - as_bad_where (fixP->fx_file, fixP->fx_line, _("bad relocation fixup type (%d)"), fixP->fx_r_type); - } -} - -/* Translate internal representation of relocation info to BFD target format. */ -arelent ** -tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) -{ - static arelent *retval[MAX_RELOC_EXPANSION + 1]; /* MAX_RELOC_EXPANSION equals 2. */ - arelent *reloc; - bfd_reloc_code_real_type code; - char *type; - fragS *f; - symbolS *s; - expressionS e; - - reloc = retval[0] = xmalloc (sizeof (arelent)); - retval[1] = NULL; - - reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); - *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); - reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; - reloc->addend = fixp->fx_offset; - - /* If this is a variant frag, we may need to adjust the existing - reloc and generate a new one. */ - if (fixp->fx_frag->fr_opcode != NULL && (fixp->fx_r_type == BFD_RELOC_SCORE_GPREL15)) - { - /* Update instruction imm bit. */ - offsetT newval; - unsigned short off; - char *buf; - - buf = fixp->fx_frag->fr_literal + fixp->fx_frag->insn_addr; - newval = md_chars_to_number (buf, INSN_SIZE); - off = fixp->fx_offset >> 16; - newval |= (off & 0x3fff) << 1; - newval |= ((off >> 14) & 0x3) << 16; - md_number_to_chars (buf, newval, INSN_SIZE); - - buf += INSN_SIZE; - newval = md_chars_to_number (buf, INSN_SIZE); - off = fixp->fx_offset & 0xffff; - newval |= ((off & 0x3fff) << 1); - newval |= (((off >> 14) & 0x3) << 16); - md_number_to_chars (buf, newval, INSN_SIZE); - - retval[1] = xmalloc (sizeof (arelent)); - retval[2] = NULL; - retval[1]->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); - *retval[1]->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); - retval[1]->address = (reloc->address + RELAX_RELOC2 (fixp->fx_frag->fr_subtype)); - - f = fixp->fx_frag; - s = f->fr_symbol; - e = s->sy_value; - - retval[1]->addend = 0; - retval[1]->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_LO16); - assert (retval[1]->howto != NULL); - - fixp->fx_r_type = BFD_RELOC_HI16_S; - } - - code = fixp->fx_r_type; - switch (fixp->fx_r_type) - { - case BFD_RELOC_32: - if (fixp->fx_pcrel) - { - code = BFD_RELOC_32_PCREL; - break; + s3_inst.relax_inst = 0x8000; } - case BFD_RELOC_HI16_S: - case BFD_RELOC_LO16: - case BFD_RELOC_SCORE_JMP: - case BFD_RELOC_SCORE_BRANCH: - case BFD_RELOC_SCORE16_JMP: - case BFD_RELOC_SCORE16_BRANCH: - case BFD_RELOC_VTABLE_ENTRY: - case BFD_RELOC_VTABLE_INHERIT: - case BFD_RELOC_SCORE_GPREL15: - case BFD_RELOC_SCORE_GOT15: - case BFD_RELOC_SCORE_DUMMY_HI16: - case BFD_RELOC_SCORE_GOT_LO16: - case BFD_RELOC_SCORE_CALL15: - case BFD_RELOC_GPREL32: - case BFD_RELOC_NONE: - code = fixp->fx_r_type; - break; - default: - type = _("<unknown>"); - as_bad_where (fixp->fx_file, fixp->fx_line, - _("cannot represent %s relocation in this object file format"), type); - return NULL; - } - - reloc->howto = bfd_reloc_type_lookup (stdoutput, code); - if (reloc->howto == NULL) - { - as_bad_where (fixp->fx_file, fixp->fx_line, - _("cannot represent %s relocation in this object file format1"), - bfd_get_reloc_code_name (code)); - return NULL; - } - /* HACK: Since arm ELF uses Rel instead of Rela, encode the - vtable entry to be used in the relocation's section offset. */ - if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) - reloc->address = fixp->fx_offset; - - return retval; -} - -void -score_elf_final_processing (void) -{ - if (fix_data_dependency == 1) - { - elf_elfheader (stdoutput)->e_flags |= EF_SCORE_FIXDEP; - } - if (score_pic == PIC) - { - elf_elfheader (stdoutput)->e_flags |= EF_SCORE_PIC; } } static void -parse_pce_inst (char *insnstr) +s3_do_dsp3 (char *str) { - char c; - char *p; - char first[MAX_LITERAL_POOL_SIZE]; - char second[MAX_LITERAL_POOL_SIZE]; - struct score_it pec_part_1; - - /* Get first part string of PCE. */ - p = strstr (insnstr, "||"); - c = *p; - *p = '\0'; - sprintf (first, "%s", insnstr); - - /* Get second part string of PCE. */ - *p = c; - p += 2; - sprintf (second, "%s", p); - - parse_16_32_inst (first, FALSE); - if (inst.error) - return; - - memcpy (&pec_part_1, &inst, sizeof (inst)); - - parse_16_32_inst (second, FALSE); - if (inst.error) - return; - - if ( ((pec_part_1.size == INSN_SIZE) && (inst.size == INSN_SIZE)) - || ((pec_part_1.size == INSN_SIZE) && (inst.size == INSN16_SIZE)) - || ((pec_part_1.size == INSN16_SIZE) && (inst.size == INSN_SIZE))) + /* Check 3d. */ + if (s3_score3d == 0) { - inst.error = _("pce instruction error (16 bit || 16 bit)'"); - sprintf (inst.str, insnstr); + s3_inst.error = _("score3d instruction."); return; } - if (!inst.error) - gen_insn_frag (&pec_part_1, &inst); -} + s3_skip_whitespace (str); -void -md_assemble (char *str) -{ - know (str); - know (strlen (str) < MAX_LITERAL_POOL_SIZE); - - memset (&inst, '\0', sizeof (inst)); - if (INSN_IS_PCE_P (str)) - parse_pce_inst (str); - else - parse_16_32_inst (str, TRUE); - - if (inst.error) - as_bad (_("%s -- `%s'"), inst.error, inst.str); -} - -/* We handle all bad expressions here, so that we can report the faulty - instruction in the error message. */ -void -md_operand (expressionS * expr) -{ - if (in_my_get_expression) - { - expr->X_op = O_illegal; - if (inst.error == NULL) - { - inst.error = _("bad expression"); - } - } -} - -const char *md_shortopts = "nO::g::G:"; - -#ifdef SCORE_BI_ENDIAN -#define OPTION_EB (OPTION_MD_BASE + 0) -#define OPTION_EL (OPTION_MD_BASE + 1) -#else -#if TARGET_BYTES_BIG_ENDIAN -#define OPTION_EB (OPTION_MD_BASE + 0) -#else -#define OPTION_EL (OPTION_MD_BASE + 1) -#endif -#endif -#define OPTION_FIXDD (OPTION_MD_BASE + 2) -#define OPTION_NWARN (OPTION_MD_BASE + 3) -#define OPTION_SCORE5 (OPTION_MD_BASE + 4) -#define OPTION_SCORE5U (OPTION_MD_BASE + 5) -#define OPTION_SCORE7 (OPTION_MD_BASE + 6) -#define OPTION_R1 (OPTION_MD_BASE + 7) -#define OPTION_O0 (OPTION_MD_BASE + 8) -#define OPTION_SCORE_VERSION (OPTION_MD_BASE + 9) -#define OPTION_PIC (OPTION_MD_BASE + 10) - -struct option md_longopts[] = -{ -#ifdef OPTION_EB - {"EB" , no_argument, NULL, OPTION_EB}, -#endif -#ifdef OPTION_EL - {"EL" , no_argument, NULL, OPTION_EL}, -#endif - {"FIXDD" , no_argument, NULL, OPTION_FIXDD}, - {"NWARN" , no_argument, NULL, OPTION_NWARN}, - {"SCORE5" , no_argument, NULL, OPTION_SCORE5}, - {"SCORE5U", no_argument, NULL, OPTION_SCORE5U}, - {"SCORE7" , no_argument, NULL, OPTION_SCORE7}, - {"USE_R1" , no_argument, NULL, OPTION_R1}, - {"O0" , no_argument, NULL, OPTION_O0}, - {"V" , no_argument, NULL, OPTION_SCORE_VERSION}, - {"KPIC" , no_argument, NULL, OPTION_PIC}, - {NULL , no_argument, NULL, 0} -}; - -size_t md_longopts_size = sizeof (md_longopts); + if (s3_reg_required_here (&str, 20, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_skip_past_comma (&str) == (int) s3_FAIL + || s3_reg_required_here (&str, 15, s3_REG_TYPE_SCORE) == (int) s3_FAIL + || s3_end_of_line (str) == (int) s3_FAIL) + return; -int -md_parse_option (int c, char *arg) -{ - switch (c) + if ((s3_inst.relax_inst != 0x8000) && (((s3_inst.instruction >> 20) & 0x1f) == 3) ) { -#ifdef OPTION_EB - case OPTION_EB: - target_big_endian = 1; - break; -#endif -#ifdef OPTION_EL - case OPTION_EL: - target_big_endian = 0; - break; -#endif - case OPTION_FIXDD: - fix_data_dependency = 1; - break; - case OPTION_NWARN: - warn_fix_data_dependency = 0; - break; - case OPTION_SCORE5: - score7 = 0; - university_version = 0; - vector_size = SCORE5_PIPELINE; - break; - case OPTION_SCORE5U: - score7 = 0; - university_version = 1; - vector_size = SCORE5_PIPELINE; - break; - case OPTION_SCORE7: - score7 = 1; - university_version = 0; - vector_size = SCORE7_PIPELINE; - break; - case OPTION_R1: - nor1 = 0; - break; - case 'G': - g_switch_value = atoi (arg); - break; - case OPTION_O0: - g_opt = 0; - break; - case OPTION_SCORE_VERSION: - printf (_("Sunplus-v2-0-0-20060510\n")); - break; - case OPTION_PIC: - score_pic = PIC; - g_switch_value = 0; /* Must set -G num as 0 to generate PIC code. */ - break; - default: - /* as_bad (_("unrecognized option `-%c%s'"), c, arg ? arg : ""); */ - return 0; + s3_inst.relax_inst |= (((s3_inst.instruction >> 10) & 0x1f)) | (((s3_inst.instruction >> 15) & 0x1f) << 5); + s3_inst.relax_size = 2; } - return 1; -} - -void -md_show_usage (FILE * fp) -{ - fprintf (fp, _(" Score-specific assembler options:\n")); -#ifdef OPTION_EB - fprintf (fp, _("\ - -EB\t\tassemble code for a big-endian cpu\n")); -#endif - -#ifdef OPTION_EL - fprintf (fp, _("\ - -EL\t\tassemble code for a little-endian cpu\n")); -#endif - - fprintf (fp, _("\ - -FIXDD\t\tassemble code for fix data dependency\n")); - fprintf (fp, _("\ - -NWARN\t\tassemble code for no warning message for fix data dependency\n")); - fprintf (fp, _("\ - -SCORE5\t\tassemble code for target is SCORE5\n")); - fprintf (fp, _("\ - -SCORE5U\tassemble code for target is SCORE5U\n")); - fprintf (fp, _("\ - -SCORE7\t\tassemble code for target is SCORE7, this is default setting\n")); - fprintf (fp, _("\ - -USE_R1\t\tassemble code for no warning message when using temp register r1\n")); - fprintf (fp, _("\ - -KPIC\t\tassemble code for PIC\n")); - fprintf (fp, _("\ - -O0\t\tassembler will not perform any optimizations\n")); - fprintf (fp, _("\ - -G gpnum\tassemble code for setting gpsize and default is 8 byte\n")); - fprintf (fp, _("\ - -V \t\tSunplus release version \n")); + else + s3_inst.relax_inst = 0x8000; } -/* Pesudo handling functions. */ - /* If we change section we must dump the literal pool first. */ static void -s_score_bss (int ignore ATTRIBUTE_UNUSED) +s3_s_score_bss (int ignore ATTRIBUTE_UNUSED) { subseg_set (bss_section, (subsegT) get_absolute_expression ()); demand_empty_rest_of_line (); } static void -s_score_text (int ignore) +s3_s_score_text (int ignore) { obj_elf_text (ignore); record_alignment (now_seg, 2); } static void -score_s_section (int ignore) +s3_score_s_section (int ignore) { obj_elf_section (ignore); if ((bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0) @@ -5774,7 +5559,7 @@ score_s_section (int ignore) } static void -s_change_sec (int sec) +s3_s_change_sec (int sec) { segT seg; @@ -5790,7 +5575,7 @@ s_change_sec (int sec) switch (sec) { case 'r': - seg = subseg_new (RDATA_SECTION_NAME, (subsegT) get_absolute_expression ()); + seg = subseg_new (s3_RDATA_SECTION_NAME, (subsegT) get_absolute_expression ()); bfd_set_section_flags (stdoutput, seg, (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_RELOC | SEC_DATA)); if (strcmp (TARGET_OS, "elf") != 0) record_alignment (seg, 4); @@ -5807,11 +5592,11 @@ s_change_sec (int sec) } static void -s_score_mask (int reg_type ATTRIBUTE_UNUSED) +s3_s_score_mask (int reg_type ATTRIBUTE_UNUSED) { long mask, off; - if (cur_proc_ptr == (procS *) NULL) + if (s3_cur_proc_ptr == (s3_procS *) NULL) { as_warn (_(".mask outside of .ent")); demand_empty_rest_of_line (); @@ -5825,13 +5610,13 @@ s_score_mask (int reg_type ATTRIBUTE_UNUSED) return; } off = get_absolute_expression (); - cur_proc_ptr->reg_mask = mask; - cur_proc_ptr->reg_offset = off; + s3_cur_proc_ptr->reg_mask = mask; + s3_cur_proc_ptr->reg_offset = off; demand_empty_rest_of_line (); } static symbolS * -get_symbol (void) +s3_get_symbol (void) { int c; char *name; @@ -5845,7 +5630,7 @@ get_symbol (void) } static long -get_number (void) +s3_get_number (void) { int negative = 0; long val = 0; @@ -5895,19 +5680,18 @@ get_number (void) } /* The .aent and .ent directives. */ - static void -s_score_ent (int aent) +s3_s_score_ent (int aent) { symbolS *symbolP; int maybe_text; - symbolP = get_symbol (); + symbolP = s3_get_symbol (); if (*input_line_pointer == ',') ++input_line_pointer; SKIP_WHITESPACE (); if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-') - get_number (); + s3_get_number (); #ifdef BFD_ASSEMBLER if ((bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0) @@ -5922,21 +5706,21 @@ s_score_ent (int aent) #endif if (!maybe_text) as_warn (_(".ent or .aent not in text section.")); - if (!aent && cur_proc_ptr) + if (!aent && s3_cur_proc_ptr) as_warn (_("missing .end")); if (!aent) { - cur_proc_ptr = &cur_proc; - cur_proc_ptr->reg_mask = 0xdeadbeaf; - cur_proc_ptr->reg_offset = 0xdeadbeaf; - cur_proc_ptr->fpreg_mask = 0xdeafbeaf; - cur_proc_ptr->leaf = 0xdeafbeaf; - cur_proc_ptr->frame_offset = 0xdeafbeaf; - cur_proc_ptr->frame_reg = 0xdeafbeaf; - cur_proc_ptr->pc_reg = 0xdeafbeaf; - cur_proc_ptr->isym = symbolP; + s3_cur_proc_ptr = &s3_cur_proc; + s3_cur_proc_ptr->reg_mask = 0xdeadbeaf; + s3_cur_proc_ptr->reg_offset = 0xdeadbeaf; + s3_cur_proc_ptr->fpreg_mask = 0xdeafbeaf; + s3_cur_proc_ptr->leaf = 0xdeafbeaf; + s3_cur_proc_ptr->frame_offset = 0xdeafbeaf; + s3_cur_proc_ptr->frame_reg = 0xdeafbeaf; + s3_cur_proc_ptr->pc_reg = 0xdeafbeaf; + s3_cur_proc_ptr->isym = symbolP; symbol_get_bfdsym (symbolP)->flags |= BSF_FUNCTION; - ++numprocs; + ++s3_numprocs; if (debug_type == DEBUG_STABS) stabs_generate_asm_func (S_GET_NAME (symbolP), S_GET_NAME (symbolP)); } @@ -5944,7 +5728,7 @@ s_score_ent (int aent) } static void -s_score_frame (int ignore ATTRIBUTE_UNUSED) +s3_s_score_frame (int ignore ATTRIBUTE_UNUSED) { char *backupstr; char str[30]; @@ -5954,15 +5738,15 @@ s_score_frame (int ignore ATTRIBUTE_UNUSED) backupstr = input_line_pointer; #ifdef OBJ_ELF - if (cur_proc_ptr == (procS *) NULL) + if (s3_cur_proc_ptr == (s3_procS *) NULL) { as_warn (_(".frame outside of .ent")); demand_empty_rest_of_line (); return; } - cur_proc_ptr->frame_reg = reg_required_here ((&backupstr), 0, REG_TYPE_SCORE); + s3_cur_proc_ptr->frame_reg = s3_reg_required_here ((&backupstr), 0, s3_REG_TYPE_SCORE); SKIP_WHITESPACE (); - skip_past_comma (&backupstr); + s3_skip_past_comma (&backupstr); while (*backupstr != ',') { str[i] = *backupstr; @@ -5973,12 +5757,12 @@ s_score_frame (int ignore ATTRIBUTE_UNUSED) val = atoi (str); SKIP_WHITESPACE (); - skip_past_comma (&backupstr); - cur_proc_ptr->frame_offset = val; - cur_proc_ptr->pc_reg = reg_required_here ((&backupstr), 0, REG_TYPE_SCORE); + s3_skip_past_comma (&backupstr); + s3_cur_proc_ptr->frame_offset = val; + s3_cur_proc_ptr->pc_reg = s3_reg_required_here ((&backupstr), 0, s3_REG_TYPE_SCORE); SKIP_WHITESPACE (); - skip_past_comma (&backupstr); + s3_skip_past_comma (&backupstr); i = 0; while (*backupstr != '\n') { @@ -5988,9 +5772,9 @@ s_score_frame (int ignore ATTRIBUTE_UNUSED) } str[i] = '\0'; val = atoi (str); - cur_proc_ptr->leaf = val; + s3_cur_proc_ptr->leaf = val; SKIP_WHITESPACE (); - skip_past_comma (&backupstr); + s3_skip_past_comma (&backupstr); #endif /* OBJ_ELF */ while (input_line_pointer != backupstr) @@ -5999,7 +5783,7 @@ s_score_frame (int ignore ATTRIBUTE_UNUSED) /* The .end directive. */ static void -s_score_end (int x ATTRIBUTE_UNUSED) +s3_s_score_end (int x ATTRIBUTE_UNUSED) { symbolS *p; int maybe_text; @@ -6013,7 +5797,7 @@ s_score_end (int x ATTRIBUTE_UNUSED) if (!is_end_of_line[(unsigned char)*input_line_pointer]) { - p = get_symbol (); + p = s3_get_symbol (); demand_empty_rest_of_line (); } else @@ -6033,7 +5817,7 @@ s_score_end (int x ATTRIBUTE_UNUSED) if (!maybe_text) as_warn (_(".end not in text section")); - if (!cur_proc_ptr) + if (!s3_cur_proc_ptr) { as_warn (_(".end directive without a preceding .ent directive.")); demand_empty_rest_of_line (); @@ -6042,7 +5826,7 @@ s_score_end (int x ATTRIBUTE_UNUSED) if (p != NULL) { assert (S_GET_NAME (p)); - if (strcmp (S_GET_NAME (p), S_GET_NAME (cur_proc_ptr->isym))) + if (strcmp (S_GET_NAME (p), S_GET_NAME (s3_cur_proc_ptr->isym))) as_warn (_(".end symbol does not match .ent symbol.")); if (debug_type == DEBUG_STABS) stabs_generate_asm_endfunc (S_GET_NAME (p), S_GET_NAME (p)); @@ -6050,42 +5834,42 @@ s_score_end (int x ATTRIBUTE_UNUSED) else as_warn (_(".end directive missing or unknown symbol")); - if ((cur_proc_ptr->reg_mask == 0xdeadbeaf) || - (cur_proc_ptr->reg_offset == 0xdeadbeaf) || - (cur_proc_ptr->leaf == 0xdeafbeaf) || - (cur_proc_ptr->frame_offset == 0xdeafbeaf) || - (cur_proc_ptr->frame_reg == 0xdeafbeaf) || (cur_proc_ptr->pc_reg == 0xdeafbeaf)); + if ((s3_cur_proc_ptr->reg_mask == 0xdeadbeaf) || + (s3_cur_proc_ptr->reg_offset == 0xdeadbeaf) || + (s3_cur_proc_ptr->leaf == 0xdeafbeaf) || + (s3_cur_proc_ptr->frame_offset == 0xdeafbeaf) || + (s3_cur_proc_ptr->frame_reg == 0xdeafbeaf) || (s3_cur_proc_ptr->pc_reg == 0xdeafbeaf)); else { dot = frag_now_fix (); - assert (pdr_seg); - subseg_set (pdr_seg, 0); + assert (s3_pdr_seg); + subseg_set (s3_pdr_seg, 0); /* Write the symbol. */ exp.X_op = O_symbol; exp.X_add_symbol = p; exp.X_add_number = 0; emit_expr (&exp, 4); fragp = frag_more (7 * 4); - md_number_to_chars (fragp, (valueT) cur_proc_ptr->reg_mask, 4); - md_number_to_chars (fragp + 4, (valueT) cur_proc_ptr->reg_offset, 4); - md_number_to_chars (fragp + 8, (valueT) cur_proc_ptr->fpreg_mask, 4); - md_number_to_chars (fragp + 12, (valueT) cur_proc_ptr->leaf, 4); - md_number_to_chars (fragp + 16, (valueT) cur_proc_ptr->frame_offset, 4); - md_number_to_chars (fragp + 20, (valueT) cur_proc_ptr->frame_reg, 4); - md_number_to_chars (fragp + 24, (valueT) cur_proc_ptr->pc_reg, 4); + md_number_to_chars (fragp, (valueT) s3_cur_proc_ptr->reg_mask, 4); + md_number_to_chars (fragp + 4, (valueT) s3_cur_proc_ptr->reg_offset, 4); + md_number_to_chars (fragp + 8, (valueT) s3_cur_proc_ptr->fpreg_mask, 4); + md_number_to_chars (fragp + 12, (valueT) s3_cur_proc_ptr->leaf, 4); + md_number_to_chars (fragp + 16, (valueT) s3_cur_proc_ptr->frame_offset, 4); + md_number_to_chars (fragp + 20, (valueT) s3_cur_proc_ptr->frame_reg, 4); + md_number_to_chars (fragp + 24, (valueT) s3_cur_proc_ptr->pc_reg, 4); subseg_set (saved_seg, saved_subseg); } - cur_proc_ptr = NULL; + s3_cur_proc_ptr = NULL; } /* Handle the .set pseudo-op. */ static void -s_score_set (int x ATTRIBUTE_UNUSED) +s3_s_score_set (int x ATTRIBUTE_UNUSED) { int i = 0; - char name[MAX_LITERAL_POOL_SIZE]; + char name[s3_MAX_LITERAL_POOL_SIZE]; char * orig_ilp = input_line_pointer; while (!is_end_of_line[(unsigned char)*input_line_pointer]) @@ -6099,35 +5883,35 @@ s_score_set (int x ATTRIBUTE_UNUSED) if (strcmp (name, "nwarn") == 0) { - warn_fix_data_dependency = 0; + s3_warn_fix_data_dependency = 0; } else if (strcmp (name, "fixdd") == 0) { - fix_data_dependency = 1; + s3_fix_data_dependency = 1; } else if (strcmp (name, "nofixdd") == 0) { - fix_data_dependency = 0; + s3_fix_data_dependency = 0; } else if (strcmp (name, "r1") == 0) { - nor1 = 0; + s3_nor1 = 0; } else if (strcmp (name, "nor1") == 0) { - nor1 = 1; + s3_nor1 = 1; } else if (strcmp (name, "optimize") == 0) { - g_opt = 1; + s3_g_opt = 1; } else if (strcmp (name, "volatile") == 0) { - g_opt = 0; + s3_g_opt = 0; } else if (strcmp (name, "pic") == 0) { - score_pic = PIC; + s3_score_pic = s3_PIC; } else { @@ -6136,7 +5920,7 @@ s_score_set (int x ATTRIBUTE_UNUSED) } } -/* Handle the .cpload pseudo-op. This is used when generating PIC code. It sets the +/* Handle the .cpload pseudo-op. This is used when generating s3_PIC code. It sets the $gp register for the function based on the function address, which is in the register named in the argument. This uses a relocation against GP_DISP_LABEL, which is handled specially by the linker. The result is: @@ -6144,58 +5928,56 @@ s_score_set (int x ATTRIBUTE_UNUSED) ori gp, %low(GP_DISP_LABEL) add gp, gp, .cpload argument The .cpload argument is normally r29. */ - static void -s_score_cpload (int ignore ATTRIBUTE_UNUSED) +s3_s_score_cpload (int ignore ATTRIBUTE_UNUSED) { int reg; - char insn_str[MAX_LITERAL_POOL_SIZE]; + char insn_str[s3_MAX_LITERAL_POOL_SIZE]; - /* If we are not generating PIC code, .cpload is ignored. */ - if (score_pic == NO_PIC) + /* If we are not generating s3_PIC code, .cpload is ignored. */ + if (s3_score_pic == s3_NO_PIC) { s_ignore (0); return; } - if ((reg = reg_required_here (&input_line_pointer, -1, REG_TYPE_SCORE)) == (int) FAIL) + if ((reg = s3_reg_required_here (&input_line_pointer, -1, s3_REG_TYPE_SCORE)) == (int) s3_FAIL) return; demand_empty_rest_of_line (); - sprintf (insn_str, "ld_i32hi r%d, %s", GP, GP_DISP_LABEL); - if (append_insn (insn_str, TRUE) == (int) FAIL) + sprintf (insn_str, "ld_i32hi r%d, %s", s3_GP, GP_DISP_LABEL); + if (s3_append_insn (insn_str, TRUE) == (int) s3_FAIL) return; - sprintf (insn_str, "ld_i32lo r%d, %s", GP, GP_DISP_LABEL); - if (append_insn (insn_str, TRUE) == (int) FAIL) + sprintf (insn_str, "ld_i32lo r%d, %s", s3_GP, GP_DISP_LABEL); + if (s3_append_insn (insn_str, TRUE) == (int) s3_FAIL) return; - sprintf (insn_str, "add r%d, r%d, r%d", GP, GP, reg); - if (append_insn (insn_str, TRUE) == (int) FAIL) + sprintf (insn_str, "add r%d, r%d, r%d", s3_GP, s3_GP, reg); + if (s3_append_insn (insn_str, TRUE) == (int) s3_FAIL) return; } /* Handle the .cprestore pseudo-op. This stores $gp into a given - offset from $sp. The offset is remembered, and after making a PIC + offset from $sp. The offset is remembered, and after making a s3_PIC call $gp is restored from that location. */ - static void -s_score_cprestore (int ignore ATTRIBUTE_UNUSED) +s3_s_score_cprestore (int ignore ATTRIBUTE_UNUSED) { int reg; int cprestore_offset; - char insn_str[MAX_LITERAL_POOL_SIZE]; + char insn_str[s3_MAX_LITERAL_POOL_SIZE]; - /* If we are not generating PIC code, .cprestore is ignored. */ - if (score_pic == NO_PIC) + /* If we are not generating s3_PIC code, .cprestore is ignored. */ + if (s3_score_pic == s3_NO_PIC) { s_ignore (0); return; } - if ((reg = reg_required_here (&input_line_pointer, -1, REG_TYPE_SCORE)) == (int) FAIL - || skip_past_comma (&input_line_pointer) == (int) FAIL) + if ((reg = s3_reg_required_here (&input_line_pointer, -1, s3_REG_TYPE_SCORE)) == (int) s3_FAIL + || s3_skip_past_comma (&input_line_pointer) == (int) s3_FAIL) { return; } @@ -6204,45 +5986,45 @@ s_score_cprestore (int ignore ATTRIBUTE_UNUSED) if (cprestore_offset <= 0x3fff) { - sprintf (insn_str, "sw r%d, [r%d, %d]", GP, reg, cprestore_offset); - if (append_insn (insn_str, TRUE) == (int) FAIL) + sprintf (insn_str, "sw r%d, [r%d, %d]", s3_GP, reg, cprestore_offset); + if (s3_append_insn (insn_str, TRUE) == (int) s3_FAIL) return; } else { int r1_bak; - r1_bak = nor1; - nor1 = 0; + r1_bak = s3_nor1; + s3_nor1 = 0; sprintf (insn_str, "li r1, %d", cprestore_offset); - if (append_insn (insn_str, TRUE) == (int) FAIL) + if (s3_append_insn (insn_str, TRUE) == (int) s3_FAIL) return; sprintf (insn_str, "add r1, r1, r%d", reg); - if (append_insn (insn_str, TRUE) == (int) FAIL) + if (s3_append_insn (insn_str, TRUE) == (int) s3_FAIL) return; - sprintf (insn_str, "sw r%d, [r1]", GP); - if (append_insn (insn_str, TRUE) == (int) FAIL) + sprintf (insn_str, "sw r%d, [r1]", s3_GP); + if (s3_append_insn (insn_str, TRUE) == (int) s3_FAIL) return; - nor1 = r1_bak; + s3_nor1 = r1_bak; } demand_empty_rest_of_line (); } -/* Handle the .gpword pseudo-op. This is used when generating PIC - code. It generates a 32 bit GP relative reloc. */ +/* Handle the .gpword pseudo-op. This is used when generating s3_PIC + code. It generates a 32 bit s3_GP relative reloc. */ static void -s_score_gpword (int ignore ATTRIBUTE_UNUSED) +s3_s_score_gpword (int ignore ATTRIBUTE_UNUSED) { expressionS ex; char *p; - /* When not generating PIC code, this is treated as .word. */ - if (score_pic == NO_PIC) + /* When not generating s3_PIC code, this is treated as .word. */ + if (s3_score_pic == s3_NO_PIC) { cons (4); return; @@ -6254,36 +6036,35 @@ s_score_gpword (int ignore ATTRIBUTE_UNUSED) ignore_rest_of_line (); } p = frag_more (4); - md_number_to_chars (p, (valueT) 0, 4); + s3_md_number_to_chars (p, (valueT) 0, 4); fix_new_exp (frag_now, p - frag_now->fr_literal, 4, &ex, FALSE, BFD_RELOC_GPREL32); demand_empty_rest_of_line (); } /* Handle the .cpadd pseudo-op. This is used when dealing with switch - tables in PIC code. */ - + tables in s3_PIC code. */ static void -s_score_cpadd (int ignore ATTRIBUTE_UNUSED) +s3_s_score_cpadd (int ignore ATTRIBUTE_UNUSED) { int reg; - char insn_str[MAX_LITERAL_POOL_SIZE]; + char insn_str[s3_MAX_LITERAL_POOL_SIZE]; - /* If we are not generating PIC code, .cpload is ignored. */ - if (score_pic == NO_PIC) + /* If we are not generating s3_PIC code, .cpload is ignored. */ + if (s3_score_pic == s3_NO_PIC) { s_ignore (0); return; } - if ((reg = reg_required_here (&input_line_pointer, -1, REG_TYPE_SCORE)) == (int) FAIL) + if ((reg = s3_reg_required_here (&input_line_pointer, -1, s3_REG_TYPE_SCORE)) == (int) s3_FAIL) { return; } demand_empty_rest_of_line (); /* Add $gp to the register named as an argument. */ - sprintf (insn_str, "add r%d, r%d, r%d", reg, reg, GP); - if (append_insn (insn_str, TRUE) == (int) FAIL) + sprintf (insn_str, "add r%d, r%d, r%d", reg, reg, s3_GP); + if (s3_append_insn (insn_str, TRUE) == (int) s3_FAIL) return; } @@ -6304,7 +6085,7 @@ s_score_cpadd (int ignore ATTRIBUTE_UNUSED) #endif static void -s_score_lcomm (int bytes_p) +s3_s_score_lcomm (int bytes_p) { char *name; char c; @@ -6494,7 +6275,7 @@ s_score_lcomm (int bytes_p) } static void -insert_reg (const struct reg_entry *r, struct hash_control *htab) +s3_insert_reg (const struct s3_reg_entry *r, struct hash_control *htab) { int i = 0; int len = strlen (r->name) + 2; @@ -6513,9 +6294,9 @@ insert_reg (const struct reg_entry *r, struct hash_control *htab) } static void -build_reg_hsh (struct reg_map *map) +s3_build_reg_hsh (struct s3_reg_map *map) { - const struct reg_entry *r; + const struct s3_reg_entry *r; if ((map->htab = hash_new ()) == NULL) { @@ -6523,69 +6304,1539 @@ build_reg_hsh (struct reg_map *map) } for (r = map->names; r->name != NULL; r++) { - insert_reg (r, map->htab); + s3_insert_reg (r, map->htab); } } -void -md_begin (void) +/* Iterate over the base tables to create the instruction patterns. */ +static void +s3_build_score_ops_hsh (void) +{ + unsigned int i; + static struct obstack insn_obstack; + + obstack_begin (&insn_obstack, 4000); + for (i = 0; i < sizeof (s3_score_insns) / sizeof (struct s3_asm_opcode); i++) + { + const struct s3_asm_opcode *insn = s3_score_insns + i; + unsigned len = strlen (insn->template); + struct s3_asm_opcode *new; + char *template; + new = obstack_alloc (&insn_obstack, sizeof (struct s3_asm_opcode)); + template = obstack_alloc (&insn_obstack, len + 1); + + strcpy (template, insn->template); + new->template = template; + new->parms = insn->parms; + new->value = insn->value; + new->relax_value = insn->relax_value; + new->type = insn->type; + new->bitmask = insn->bitmask; + hash_insert (s3_score_ops_hsh, new->template, (void *) new); + } +} + +static void +s3_build_dependency_insn_hsh (void) +{ + unsigned int i; + static struct obstack dependency_obstack; + + obstack_begin (&dependency_obstack, 4000); + for (i = 0; i < sizeof (s3_insn_to_dependency_table) / sizeof (s3_insn_to_dependency_table[0]); i++) + { + const struct s3_insn_to_dependency *tmp = s3_insn_to_dependency_table + i; + unsigned len = strlen (tmp->insn_name); + struct s3_insn_to_dependency *new; + + new = obstack_alloc (&dependency_obstack, sizeof (struct s3_insn_to_dependency)); + new->insn_name = obstack_alloc (&dependency_obstack, len + 1); + + strcpy (new->insn_name, tmp->insn_name); + new->type = tmp->type; + hash_insert (s3_dependency_insn_hsh, new->insn_name, (void *) new); + } +} + +static void +s_score_bss (int ignore ATTRIBUTE_UNUSED) +{ + if (score3) + return s3_s_score_bss (ignore); + else + return s7_s_score_bss (ignore); +} + +static void +s_score_text (int ignore) +{ + if (score3) + return s3_s_score_text (ignore); + else + return s7_s_score_text (ignore); +} + +static void +s_section (int ignore) +{ + if (score3) + return s3_score_s_section (ignore); + else + return s7_s_section (ignore); +} + +static void +s_change_sec (int sec) +{ + if (score3) + return s3_s_change_sec (sec); + else + return s7_s_change_sec (sec); +} + +static void +s_score_mask (int reg_type ATTRIBUTE_UNUSED) +{ + if (score3) + return s3_s_score_mask (reg_type); + else + return s7_s_score_mask (reg_type); +} + +static void +s_score_ent (int aent) +{ + if (score3) + return s3_s_score_ent (aent); + else + return s7_s_score_ent (aent); +} + +static void +s_score_frame (int ignore ATTRIBUTE_UNUSED) +{ + if (score3) + return s3_s_score_frame (ignore); + else + return s7_s_score_frame (ignore); +} + +static void +s_score_end (int x ATTRIBUTE_UNUSED) +{ + if (score3) + return s3_s_score_end (x); + else + return s7_s_score_end (x); +} + +static void +s_score_set (int x ATTRIBUTE_UNUSED) +{ + if (score3) + return s3_s_score_set (x); + else + return s7_s_score_set (x); +} + +static void +s_score_cpload (int ignore ATTRIBUTE_UNUSED) +{ + if (score3) + return s3_s_score_cpload (ignore); + else + return s7_s_score_cpload (ignore); +} + +static void +s_score_cprestore (int ignore ATTRIBUTE_UNUSED) +{ + if (score3) + return s3_s_score_cprestore (ignore); + else + return s7_s_score_cprestore (ignore); +} + +static void +s_score_gpword (int ignore ATTRIBUTE_UNUSED) +{ + if (score3) + return s3_s_score_gpword (ignore); + else + return s7_s_score_gpword (ignore); +} + +static void +s_score_cpadd (int ignore ATTRIBUTE_UNUSED) +{ + if (score3) + return s3_s_score_cpadd (ignore); + else + return s7_s_score_cpadd (ignore); +} + +static void +s_score_lcomm (int bytes_p) +{ + if (score3) + return s3_s_score_lcomm (bytes_p); + else + return s7_s_score_lcomm (bytes_p); +} + +static void +s3_assemble (char *str) +{ + know (str); + know (strlen (str) < s3_MAX_LITERAL_POOL_SIZE); + + memset (&s3_inst, '\0', sizeof (s3_inst)); + if (s3_INSN_IS_PCE_P (str)) + s3_parse_pce_inst (str); + else if (s3_INSN_IS_48_P (str)) + s3_parse_48_inst (str, TRUE); + else + s3_parse_16_32_inst (str, TRUE); + + if (s3_inst.error) + as_bad (_("%s -- `%s'"), s3_inst.error, s3_inst.str); +} + +static void +s3_operand (expressionS * expr) +{ + if (s3_in_my_get_expression) + { + expr->X_op = O_illegal; + if (s3_inst.error == NULL) + { + s3_inst.error = _("bad expression"); + } + } +} + +static void +s3_begin (void) { unsigned int i; segT seg; subsegT subseg; - if ((score_ops_hsh = hash_new ()) == NULL) + if ((s3_score_ops_hsh = hash_new ()) == NULL) as_fatal (_("virtual memory exhausted")); - build_score_ops_hsh (); + s3_build_score_ops_hsh (); - if ((dependency_insn_hsh = hash_new ()) == NULL) + if ((s3_dependency_insn_hsh = hash_new ()) == NULL) as_fatal (_("virtual memory exhausted")); - build_dependency_insn_hsh (); + s3_build_dependency_insn_hsh (); - for (i = (int)REG_TYPE_FIRST; i < (int)REG_TYPE_MAX; i++) - build_reg_hsh (all_reg_maps + i); + for (i = (int)s3_REG_TYPE_FIRST; i < (int)s3_REG_TYPE_MAX; i++) + s3_build_reg_hsh (s3_all_reg_maps + i); /* Initialize dependency vector. */ - init_dependency_vector (); + s3_init_dependency_vector (); bfd_set_arch_mach (stdoutput, TARGET_ARCH, 0); seg = now_seg; subseg = now_subseg; - pdr_seg = subseg_new (".pdr", (subsegT) 0); - (void)bfd_set_section_flags (stdoutput, pdr_seg, SEC_READONLY | SEC_RELOC | SEC_DEBUGGING); - (void)bfd_set_section_alignment (stdoutput, pdr_seg, 2); + s3_pdr_seg = subseg_new (".pdr", (subsegT) 0); + (void)bfd_set_section_flags (stdoutput, s3_pdr_seg, SEC_READONLY | SEC_RELOC | SEC_DEBUGGING); + (void)bfd_set_section_alignment (stdoutput, s3_pdr_seg, 2); subseg_set (seg, subseg); - if (USE_GLOBAL_POINTER_OPT) - bfd_set_gp_size (stdoutput, g_switch_value); + if (s3_USE_GLOBAL_POINTER_OPT) + bfd_set_gp_size (stdoutput, s3_g_switch_value); } +static void +s3_number_to_chars (char *buf, valueT val, int n) +{ + if (target_big_endian) + number_to_chars_bigendian (buf, val, n); + else + number_to_chars_littleendian (buf, val, n); +} -const pseudo_typeS md_pseudo_table[] = +static valueT +s3_normal_chars_to_number (char *buf, int n) { - {"bss", s_score_bss, 0}, - {"text", s_score_text, 0}, - {"word", cons, 4}, - {"long", cons, 4}, - {"extend", float_cons, 'x'}, - {"ldouble", float_cons, 'x'}, - {"packed", float_cons, 'p'}, - {"end", s_score_end, 0}, - {"ent", s_score_ent, 0}, - {"frame", s_score_frame, 0}, - {"rdata", s_change_sec, 'r'}, - {"sdata", s_change_sec, 's'}, - {"set", s_score_set, 0}, - {"mask", s_score_mask, 'R'}, - {"dword", cons, 8}, - {"lcomm", s_score_lcomm, 1}, - {"section", score_s_section, 0}, - {"cpload", s_score_cpload, 0}, - {"cprestore", s_score_cprestore, 0}, - {"gpword", s_score_gpword, 0}, - {"cpadd", s_score_cpadd, 0}, - {0, 0, 0} -}; + valueT result = 0; + unsigned char *where = (unsigned char *)buf; + + if (target_big_endian) + { + while (n--) + { + result <<= 8; + result |= (*where++ & 255); + } + } + else + { + while (n--) + { + result <<= 8; + result |= (where[n] & 255); + } + } + + return result; +} + +static void +s3_number_to_chars_littleendian (void *p, valueT data, int n) +{ + char *buf = (char *) p; + + switch (n) + { + case 4: + md_number_to_chars (buf, data >> 16, 2); + md_number_to_chars (buf + 2, data, 2); + break; + case 6: + md_number_to_chars (buf, data >> 32, 2); + md_number_to_chars (buf + 2, data >> 16, 2); + md_number_to_chars (buf + 4, data, 2); + break; + default: + /* Error routine. */ + as_bad_where (__FILE__, __LINE__, _("size is not 4 or 6")); + break; + } +} + +static valueT +s3_chars_to_number_littleendian (const void *p, int n) +{ + char *buf = (char *) p; + valueT result = 0; + + switch (n) + { + case 4: + result = s3_normal_chars_to_number (buf, 2) << 16; + result |= s3_normal_chars_to_number (buf + 2, 2); + break; + case 6: + result = s3_normal_chars_to_number (buf, 2) << 32; + result |= s3_normal_chars_to_number (buf + 2, 2) << 16; + result |= s3_normal_chars_to_number (buf + 4, 2); + break; + default: + /* Error routine. */ + as_bad_where (__FILE__, __LINE__, _("size is not 4 or 6")); + break; + } + + return result; +} + +static void +s3_md_number_to_chars (char *buf, valueT val, int n) +{ + if (!target_big_endian && n >= 4) + s3_number_to_chars_littleendian (buf, val, n); + else + md_number_to_chars (buf, val, n); +} + +static valueT +s3_md_chars_to_number (char *buf, int n) +{ + valueT result = 0; + + if (!target_big_endian && n >= 4) + result = s3_chars_to_number_littleendian (buf, n); + else + result = s3_normal_chars_to_number (buf, n); + + return result; +} + +static char * +s3_atof (int type, char *litP, int *sizeP) +{ + int prec; + LITTLENUM_TYPE words[s3_MAX_LITTLENUMS]; + char *t; + int i; + + switch (type) + { + case 'f': + case 'F': + case 's': + case 'S': + prec = 2; + break; + case 'd': + case 'D': + case 'r': + case 'R': + prec = 4; + break; + case 'x': + case 'X': + case 'p': + case 'P': + prec = 6; + break; + default: + *sizeP = 0; + return _("bad call to MD_ATOF()"); + } + + t = atof_ieee (input_line_pointer, type, words); + if (t) + input_line_pointer = t; + *sizeP = prec * 2; + + if (target_big_endian) + { + for (i = 0; i < prec; i++) + { + s3_md_number_to_chars (litP, (valueT) words[i], 2); + litP += 2; + } + } + else + { + for (i = 0; i < prec; i += 2) + { + s3_md_number_to_chars (litP, (valueT) words[i + 1], 2); + s3_md_number_to_chars (litP + 2, (valueT) words[i], 2); + litP += 4; + } + } + + return 0; +} + +static void +s3_frag_check (fragS * fragp ATTRIBUTE_UNUSED) +{ + know (fragp->insn_addr <= s3_RELAX_PAD_BYTE); +} + +static void +s3_validate_fix (fixS *fixP) +{ + fixP->fx_where += fixP->fx_frag->insn_addr; +} + +static int +s3_force_relocation (struct fix *fixp) +{ + int retval = 0; + + if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT + || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY + || fixp->fx_r_type == BFD_RELOC_SCORE_JMP + || fixp->fx_r_type == BFD_RELOC_SCORE_BRANCH + || fixp->fx_r_type == BFD_RELOC_SCORE16_JMP + || fixp->fx_r_type == BFD_RELOC_SCORE16_BRANCH + || fixp->fx_r_type == BFD_RELOC_SCORE_BCMP) + { + retval = 1; + } + return retval; +} + +static bfd_boolean +s3_fix_adjustable (fixS * fixP) +{ + if (fixP->fx_addsy == NULL) + { + return 1; + } + else if (OUTPUT_FLAVOR == bfd_target_elf_flavour + && (S_IS_EXTERNAL (fixP->fx_addsy) || S_IS_WEAK (fixP->fx_addsy))) + { + return 0; + } + else if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT + || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY + || fixP->fx_r_type == BFD_RELOC_SCORE_JMP + || fixP->fx_r_type == BFD_RELOC_SCORE16_JMP) + { + return 0; + } + + return 1; +} + +static void +s3_elf_final_processing (void) +{ + unsigned long val = 0; + + if (score3) + val = E_SCORE_MACH_SCORE3; + else if (score7) + val = E_SCORE_MACH_SCORE7; + + elf_elfheader (stdoutput)->e_machine = EM_SCORE; + elf_elfheader (stdoutput)->e_flags &= ~EF_SCORE_MACH; + elf_elfheader (stdoutput)->e_flags |= val; + + if (s3_fix_data_dependency == 1) + { + elf_elfheader (stdoutput)->e_flags |= EF_SCORE_FIXDEP; + } + if (s3_score_pic == s3_PIC) + { + elf_elfheader (stdoutput)->e_flags |= EF_SCORE_PIC; + } +} + +static int +s3_judge_size_before_relax (fragS * fragp, asection *sec) +{ + int change = 0; + + if (s3_score_pic == s3_NO_PIC) + change = s3_nopic_need_relax (fragp->fr_symbol, 0); + else + change = s3_pic_need_relax (fragp->fr_symbol, sec); + + if (change == 1) + { + /* Only at the first time determining whether s3_GP instruction relax should be done, + return the difference between insntruction size and instruction relax size. */ + if (fragp->fr_opcode == NULL) + { + fragp->fr_fix = s3_RELAX_NEW (fragp->fr_subtype); + fragp->fr_opcode = fragp->fr_literal + s3_RELAX_RELOC1 (fragp->fr_subtype); + return s3_RELAX_NEW (fragp->fr_subtype) - s3_RELAX_OLD (fragp->fr_subtype); + } + } + + return 0; +} + +static int +s3_estimate_size_before_relax (fragS * fragp, asection * sec ATTRIBUTE_UNUSED) +{ + if ((s3_RELAX_TYPE (fragp->fr_subtype) == Insn_GP) + || (s3_RELAX_TYPE (fragp->fr_subtype) == Insn_PIC)) + return s3_judge_size_before_relax (fragp, sec); + + return 0; +} + +static int +s3_relax_branch_inst32 (fragS * fragp) +{ + fragp->fr_opcode = NULL; + return 0; +} + +static int +s3_relax_branch_inst16 (fragS * fragp) +{ + int relaxable_p = 0; + int frag_addr = fragp->fr_address + fragp->insn_addr; + addressT symbol_address = 0; + symbolS *s; + offsetT offset; + long value; + unsigned long inst_value; + + relaxable_p = s3_RELAX_OPT (fragp->fr_subtype); + + s = fragp->fr_symbol; + if (s == NULL) + frag_addr = 0; + else + { + if (s->bsym != 0) + symbol_address = (addressT) s->sy_frag->fr_address; + } + + inst_value = s3_md_chars_to_number (fragp->fr_literal, s3_INSN16_SIZE); + offset = (inst_value & 0x1ff) << 1; + if ((offset & 0x200) == 0x200) + offset |= 0xfffffc00; + + value = offset + symbol_address - frag_addr; + + if (relaxable_p + && (!((value & 0xfffffe00) == 0 || (value & 0xfffffe00) == 0xfffffe00)) + && fragp->fr_fix == 2 + && (s->bsym != NULL) + && (S_IS_DEFINED (s) + && !S_IS_COMMON (s) + && !S_IS_EXTERNAL (s))) + { + /* Relax branch 32 to branch 16. */ + fragp->fr_opcode = fragp->fr_literal + s3_RELAX_RELOC1 (fragp->fr_subtype); + fragp->fr_fix = 4; + return 2; + } + else + return 0; +} + +static int +s3_relax_cmpbranch_inst32 (fragS * fragp) +{ + int relaxable_p = 0; + symbolS *s; + /* For sign bit. */ + long offset; + long frag_addr = fragp->fr_address + fragp->insn_addr; + long symbol_address = 0; + long value; + unsigned long inst_value; + + relaxable_p = s3_RELAX_OPT (fragp->fr_subtype); + + s = fragp->fr_symbol; + if (s == NULL) + frag_addr = 0; + else + { + if (s->bsym != 0) + symbol_address = (addressT) s->sy_frag->fr_address; + } + + inst_value = s3_md_chars_to_number (fragp->fr_literal, s3_INSN_SIZE); + offset = (inst_value & 0x1) + | (((inst_value >> 7) & 0x7) << 1) + | (((inst_value >> 21) & 0x1f) << 4); + offset <<= 1; + if ((offset & 0x200) == 0x200) + offset |= 0xfffffe00; + + value = offset + symbol_address - frag_addr; + /* change the order of judging rule is because + 1.not defined symbol or common sysbol or external symbol will change + bcmp to cmp!+beq/bne ,here need to record fragp->fr_opcode + 2.if the flow is as before : it will results to recursive loop + */ + if (fragp->fr_fix == 6) + { + /* Have already relaxed! Just return 0 to terminate the loop. */ + return 0; + } + /* need to translate when extern or not defind or common sysbol */ + else if ((relaxable_p + && (!((value & 0xfffffe00) == 0 || (value & 0xfffffe00) == 0xfffffe00)) + && fragp->fr_fix == 4 + && (s->bsym != NULL)) + || !S_IS_DEFINED (s) + ||S_IS_COMMON (s) + ||S_IS_EXTERNAL (s)) + { + fragp->fr_opcode = fragp->fr_literal + s3_RELAX_RELOC1 (fragp->fr_subtype); + fragp->fr_fix = 6; + return 2; + } + + else + { + /* Never relax. Modify fr_opcode to NULL to verify it's value in + md_apply_fix. */ + fragp->fr_opcode = NULL; + return 0; + } +} + + +static int +s3_relax_other_inst32 (fragS * fragp) +{ + int relaxable_p = s3_RELAX_OPT (fragp->fr_subtype); + + if (relaxable_p + && fragp->fr_fix == 4) + { + fragp->fr_opcode = fragp->fr_literal + s3_RELAX_RELOC1 (fragp->fr_subtype); + fragp->fr_fix = 2; + return -2; + } + else + return 0; +} + +static int +s3_relax_gp_and_pic_inst32 (void) +{ + /* md_estimate_size_before_relax has already relaxed s3_GP and s3_PIC + instructions. We don't change relax size here. */ + return 0; +} + +static int +s3_relax_frag (asection * sec ATTRIBUTE_UNUSED, fragS * fragp, long stretch ATTRIBUTE_UNUSED) +{ + int grows = 0; + int adjust_align_p = 0; + + /* If the instruction address is odd, make it half word align first. */ + if ((fragp->fr_address) % 2 != 0) + { + if ((fragp->fr_address + fragp->insn_addr) % 2 != 0) + { + fragp->insn_addr = 1; + grows += 1; + adjust_align_p = 1; + } + } + + switch (s3_RELAX_TYPE (fragp->fr_subtype)) + { + case PC_DISP19div2: + grows += s3_relax_branch_inst32 (fragp); + break; + + case PC_DISP8div2: + grows += s3_relax_branch_inst16 (fragp); + break; + + case Insn_BCMP : + grows += s3_relax_cmpbranch_inst32 (fragp); + break; + + case Insn_GP: + case Insn_PIC: + grows += s3_relax_gp_and_pic_inst32 (); + break; + + default: + grows += s3_relax_other_inst32 (fragp); + break; + } + + /* newly added */ + if (adjust_align_p && fragp->insn_addr) + { + fragp->fr_fix += fragp->insn_addr; + } + + return grows; +} + +static void +s3_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, segT sec ATTRIBUTE_UNUSED, fragS * fragp) +{ + int old; + int new; + char backup[20]; + fixS *fixp; + + old = s3_RELAX_OLD (fragp->fr_subtype); + new = s3_RELAX_NEW (fragp->fr_subtype); + + /* fragp->fr_opcode indicates whether this frag should be relaxed. */ + if (fragp->fr_opcode == NULL) + { + memcpy (backup, fragp->fr_literal, old); + fragp->fr_fix = old; + } + else + { + memcpy (backup, fragp->fr_literal + old, new); + fragp->fr_fix = new; + } + + fixp = fragp->tc_frag_data.fixp; + while (fixp && fixp->fx_frag == fragp && fixp->fx_where < old) + { + if (fragp->fr_opcode) + fixp->fx_done = 1; + fixp = fixp->fx_next; + } + while (fixp && fixp->fx_frag == fragp) + { + if (fragp->fr_opcode) + fixp->fx_where -= old + fragp->insn_addr; + else + fixp->fx_done = 1; + fixp = fixp->fx_next; + } + + if (fragp->insn_addr) + { + s3_md_number_to_chars (fragp->fr_literal, 0x0, fragp->insn_addr); + } + memcpy (fragp->fr_literal + fragp->insn_addr, backup, fragp->fr_fix); + fragp->fr_fix += fragp->insn_addr; +} + +static long +s3_pcrel_from (fixS * fixP) +{ + long retval = 0; + + if (fixP->fx_addsy + && (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) + && (fixP->fx_subsy == NULL)) + { + retval = 0; + } + else + { + retval = fixP->fx_where + fixP->fx_frag->fr_address; + } + + return retval; +} + +static valueT +s3_section_align (segT segment ATTRIBUTE_UNUSED, valueT size) +{ + int align = bfd_get_section_alignment (stdoutput, segment); + return ((size + (1 << align) - 1) & (-1 << align)); +} + +static void +s3_apply_fix (fixS *fixP, valueT *valP, segT seg) +{ + offsetT value = *valP; + offsetT newval; + offsetT content; + unsigned short HI, LO; + + char *buf = fixP->fx_frag->fr_literal + fixP->fx_where; + + assert (fixP->fx_r_type < BFD_RELOC_UNUSED); + if (fixP->fx_addsy == 0 && !fixP->fx_pcrel) + { + if (fixP->fx_r_type != BFD_RELOC_SCORE_DUMMY_HI16) + fixP->fx_done = 1; + } + + /* If this symbol is in a different section then we need to leave it for + the linker to deal with. Unfortunately, md_pcrel_from can't tell, + so we have to undo it's effects here. */ + if (fixP->fx_pcrel) + { + if (fixP->fx_addsy != NULL + && S_IS_DEFINED (fixP->fx_addsy) + && S_GET_SEGMENT (fixP->fx_addsy) != seg) + value += md_pcrel_from (fixP); + } + + /* Remember value for emit_reloc. */ + fixP->fx_addnumber = value; + + switch (fixP->fx_r_type) + { + case BFD_RELOC_HI16_S: + if (fixP->fx_done) /* For la rd, imm32. */ + { + newval = s3_md_chars_to_number (buf, s3_INSN_SIZE); + HI = (value) >> 16; /* mul to 2, then take the hi 16 bit. */ + newval |= (HI & 0x3fff) << 1; + newval |= ((HI >> 14) & 0x3) << 16; + s3_md_number_to_chars (buf, newval, s3_INSN_SIZE); + } + break; + case BFD_RELOC_LO16: + if (fixP->fx_done) /* For la rd, imm32. */ + { + newval = s3_md_chars_to_number (buf, s3_INSN_SIZE); + LO = (value) & 0xffff; + newval |= (LO & 0x3fff) << 1; /* 16 bit: imm -> 14 bit in lo, 2 bit in hi. */ + newval |= ((LO >> 14) & 0x3) << 16; + s3_md_number_to_chars (buf, newval, s3_INSN_SIZE); + } + break; + case BFD_RELOC_SCORE_JMP: + { + content = s3_md_chars_to_number (buf, s3_INSN_SIZE); + value = fixP->fx_offset; + content = (content & ~0x3ff7ffe) | ((value << 1) & 0x3ff0000) | (value & 0x7fff); + s3_md_number_to_chars (buf, content, s3_INSN_SIZE); + } + break; + + case BFD_RELOC_SCORE_IMM30: + { + content = s3_md_chars_to_number (buf, s3_INSN48_SIZE); + value = fixP->fx_offset; + value >>= 2; + content = (content & ~0x7f7fff7f80LL) + | (((value & 0xff) >> 0) << 7) + | (((value & 0x7fff00) >> 8) << 16) + | (((value & 0x3f800000) >> 23) << 32); + s3_md_number_to_chars (buf, content, s3_INSN48_SIZE); + break; + } + + case BFD_RELOC_SCORE_IMM32: + { + content = s3_md_chars_to_number (buf, s3_INSN48_SIZE); + value = fixP->fx_offset; + content = (content & ~0x7f7fff7fe0LL) + | ((value & 0x3ff) << 5) + | (((value >> 10) & 0x7fff) << 16) + | (((value >> 25) & 0x7f) << 32); + s3_md_number_to_chars (buf, content, s3_INSN48_SIZE); + break; + } + + case BFD_RELOC_SCORE_BRANCH: + if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) || (fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy))) + value = fixP->fx_offset; + else + fixP->fx_done = 1; + + content = s3_md_chars_to_number (buf, s3_INSN_SIZE); + + /* Don't check c-bit. */ + if (fixP->fx_frag->fr_opcode != 0) + { + if ((value & 0xfffffe00) != 0 && (value & 0xfffffe00) != 0xfffffe00) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _(" branch relocation truncate (0x%x) [-2^9 ~ 2^9]"), (unsigned int)value); + return; + } + content = s3_md_chars_to_number (buf, s3_INSN16_SIZE); + content &= 0xfe00; + content = (content & 0xfe00) | ((value >> 1) & 0x1ff); + s3_md_number_to_chars (buf, content, s3_INSN16_SIZE); + fixP->fx_r_type = BFD_RELOC_SCORE16_BRANCH; + fixP->fx_size = 2; + } + else + { + if ((value & 0xfff80000) != 0 && (value & 0xfff80000) != 0xfff80000) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _(" branch relocation truncate (0x%x) [-2^19 ~ 2^19]"), (unsigned int)value); + return; + } + content = s3_md_chars_to_number (buf, s3_INSN_SIZE); + content &= 0xfc00fc01; + content = (content & 0xfc00fc01) | (value & 0x3fe) | ((value << 6) & 0x3ff0000); + s3_md_number_to_chars (buf, content, s3_INSN_SIZE); + } + break; + case BFD_RELOC_SCORE16_JMP: + content = s3_md_chars_to_number (buf, s3_INSN16_SIZE); + content &= 0xf001; + value = fixP->fx_offset & 0xfff; + content = (content & 0xfc01) | (value & 0xffe); + s3_md_number_to_chars (buf, content, s3_INSN16_SIZE); + break; + case BFD_RELOC_SCORE16_BRANCH: + content = s3_md_chars_to_number (buf, s3_INSN_SIZE); + /* Don't check c-bit. */ + if (fixP->fx_frag->fr_opcode != 0) + { + if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) || + (fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy))) + value = fixP->fx_offset; + else + fixP->fx_done = 1; + if ((value & 0xfff80000) != 0 && (value & 0xfff80000) != 0xfff80000) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _(" branch relocation truncate (0x%x) [-2^19 ~ 2^19]"), (unsigned int)value); + return; + } + content = s3_md_chars_to_number (buf, s3_INSN_SIZE); + content = (content & 0xfc00fc01) | (value & 0x3fe) | ((value << 6) & 0x3ff0000); + s3_md_number_to_chars (buf, content, s3_INSN_SIZE); + fixP->fx_r_type = BFD_RELOC_SCORE_BRANCH; + fixP->fx_size = 4; + break; + } + else + { + /* In differnt section. */ + if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) || + (fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy))) + value = fixP->fx_offset; + else + fixP->fx_done = 1; + + if ((value & 0xfffffe00) != 0 && (value & 0xfffffe00) != 0xfffffe00) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _(" branch relocation truncate (0x%x) [-2^9 ~ 2^9]"), (unsigned int)value); + return; + } + + content = s3_md_chars_to_number (buf, s3_INSN16_SIZE); + content = (content & 0xfe00) | ((value >> 1) & 0x1ff); + s3_md_number_to_chars (buf, content, s3_INSN16_SIZE); + break; + } + + break; + + case BFD_RELOC_SCORE_BCMP: + if (fixP->fx_frag->fr_opcode != 0) + { + char *buf_ptr = buf; + buf_ptr += 2; + + if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) || (fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy))) + value = fixP->fx_offset; + else + fixP->fx_done = 1; + + /* NOTE!!! + bcmp -> cmp! and branch, so value -= 2. */ + value -= 2; + + if ((value & 0xfff80000) != 0 && (value & 0xfff80000) != 0xfff80000) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _(" branch relocation truncate (0x%x) [-2^19 ~ 2^19]"), (unsigned int)value); + return; + } + + content = s3_md_chars_to_number (buf_ptr, s3_INSN_SIZE); + content &= 0xfc00fc01; + content = (content & 0xfc00fc01) | (value & 0x3fe) | ((value << 6) & 0x3ff0000); + s3_md_number_to_chars (buf_ptr, content, s3_INSN_SIZE); + /* change relocation type to BFD_RELOC_SCORE_BRANCH */ + fixP->fx_r_type = BFD_RELOC_SCORE_BRANCH; + fixP->fx_where+=2; /* first insn is cmp! , the second insn is beq/bne */ + break; + } + else + { + if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) || (fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy))) + value = fixP->fx_offset; + else + fixP->fx_done = 1; + + content = s3_md_chars_to_number (buf, s3_INSN_SIZE); + + if ((value & 0xfffffe00) != 0 && (value & 0xfffffe00) != 0xfffffe00) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _(" branch relocation truncate (0x%x) [-2^9 ~ 2^9]"), (unsigned int)value); + return; + } + + value >>= 1; + content &= ~0x03e00381; + content = content + | (value & 0x1) + | (((value & 0xe) >> 1) << 7) + | (((value & 0x1f0) >> 4) << 21); + + s3_md_number_to_chars (buf, content, s3_INSN_SIZE); + break; + } + + case BFD_RELOC_8: + if (fixP->fx_done || fixP->fx_pcrel) + s3_md_number_to_chars (buf, value, 1); +#ifdef OBJ_ELF + else + { + value = fixP->fx_offset; + s3_md_number_to_chars (buf, value, 1); + } +#endif + break; + + case BFD_RELOC_16: + if (fixP->fx_done || fixP->fx_pcrel) + s3_md_number_to_chars (buf, value, 2); +#ifdef OBJ_ELF + else + { + value = fixP->fx_offset; + s3_md_number_to_chars (buf, value, 2); + } +#endif + break; + case BFD_RELOC_RVA: + case BFD_RELOC_32: + if (fixP->fx_done || fixP->fx_pcrel) + md_number_to_chars (buf, value, 4); +#ifdef OBJ_ELF + else + { + value = fixP->fx_offset; + md_number_to_chars (buf, value, 4); + } +#endif + break; + case BFD_RELOC_VTABLE_INHERIT: + fixP->fx_done = 0; + if (fixP->fx_addsy && !S_IS_DEFINED (fixP->fx_addsy) && !S_IS_WEAK (fixP->fx_addsy)) + S_SET_WEAK (fixP->fx_addsy); + break; + case BFD_RELOC_VTABLE_ENTRY: + fixP->fx_done = 0; + break; + case BFD_RELOC_SCORE_GPREL15: + content = s3_md_chars_to_number (buf, s3_INSN_SIZE); + /* c-bit. */ + if ((fixP->fx_frag->fr_opcode != 0) && ((content & 0xfc1c8000) != 0x94180000)) + fixP->fx_r_type = BFD_RELOC_NONE; + fixP->fx_done = 0; + break; + case BFD_RELOC_SCORE_GOT15: + case BFD_RELOC_SCORE_DUMMY_HI16: + case BFD_RELOC_SCORE_GOT_LO16: + case BFD_RELOC_SCORE_CALL15: + case BFD_RELOC_GPREL32: + break; + case BFD_RELOC_NONE: + default: + as_bad_where (fixP->fx_file, fixP->fx_line, _("bad relocation fixup type (%d)"), fixP->fx_r_type); + } +} + +static arelent ** +s3_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) +{ + static arelent *retval[MAX_RELOC_EXPANSION + 1]; /* MAX_RELOC_EXPANSION equals 2. */ + arelent *reloc; + bfd_reloc_code_real_type code; + char *type; + fragS *f; + symbolS *s; + expressionS e; + + reloc = retval[0] = xmalloc (sizeof (arelent)); + retval[1] = NULL; + + reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); + *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); + reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; + reloc->addend = fixp->fx_offset; + + /* If this is a variant frag, we may need to adjust the existing + reloc and generate a new one. */ + if (fixp->fx_frag->fr_opcode != NULL && (fixp->fx_r_type == BFD_RELOC_SCORE_GPREL15)) + { + /* Update instruction imm bit. */ + offsetT newval; + unsigned short off; + char *buf; + + buf = fixp->fx_frag->fr_literal + fixp->fx_frag->insn_addr; + newval = s3_md_chars_to_number (buf, s3_INSN_SIZE); + off = fixp->fx_offset >> 16; + newval |= (off & 0x3fff) << 1; + newval |= ((off >> 14) & 0x3) << 16; + s3_md_number_to_chars (buf, newval, s3_INSN_SIZE); + + buf += s3_INSN_SIZE; + newval = s3_md_chars_to_number (buf, s3_INSN_SIZE); + off = fixp->fx_offset & 0xffff; + newval |= ((off & 0x3fff) << 1); + newval |= (((off >> 14) & 0x3) << 16); + s3_md_number_to_chars (buf, newval, s3_INSN_SIZE); + + retval[1] = xmalloc (sizeof (arelent)); + retval[2] = NULL; + retval[1]->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); + *retval[1]->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); + retval[1]->address = (reloc->address + s3_RELAX_RELOC2 (fixp->fx_frag->fr_subtype)); + + f = fixp->fx_frag; + s = f->fr_symbol; + e = s->sy_value; + + retval[1]->addend = 0; + retval[1]->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_LO16); + assert (retval[1]->howto != NULL); + + fixp->fx_r_type = BFD_RELOC_HI16_S; + } + + code = fixp->fx_r_type; + switch (fixp->fx_r_type) + { + case BFD_RELOC_32: + if (fixp->fx_pcrel) + { + code = BFD_RELOC_32_PCREL; + break; + } + case BFD_RELOC_HI16_S: + case BFD_RELOC_LO16: + case BFD_RELOC_SCORE_JMP: + case BFD_RELOC_SCORE_BRANCH: + case BFD_RELOC_SCORE16_JMP: + case BFD_RELOC_SCORE16_BRANCH: + case BFD_RELOC_SCORE_BCMP: + case BFD_RELOC_VTABLE_ENTRY: + case BFD_RELOC_VTABLE_INHERIT: + case BFD_RELOC_SCORE_GPREL15: + case BFD_RELOC_SCORE_GOT15: + case BFD_RELOC_SCORE_DUMMY_HI16: + case BFD_RELOC_SCORE_GOT_LO16: + case BFD_RELOC_SCORE_CALL15: + case BFD_RELOC_GPREL32: + case BFD_RELOC_NONE: + case BFD_RELOC_SCORE_IMM30: + case BFD_RELOC_SCORE_IMM32: + code = fixp->fx_r_type; + break; + default: + type = _("<unknown>"); + as_bad_where (fixp->fx_file, fixp->fx_line, + _("cannot represent %s relocation in this object file format"), type); + return NULL; + } + + reloc->howto = bfd_reloc_type_lookup (stdoutput, code); + if (reloc->howto == NULL) + { + as_bad_where (fixp->fx_file, fixp->fx_line, + _("cannot represent %s relocation in this object file format1"), + bfd_get_reloc_code_name (code)); + return NULL; + } + /* HACK: Since arm ELF uses Rel instead of Rela, encode the + vtable entry to be used in the relocation's section offset. */ + if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) + reloc->address = fixp->fx_offset; + + return retval; +} + +void +md_assemble (char *str) +{ + if (score3) + s3_assemble (str); + else + s7_assemble (str); +} +/* We handle all bad expressions here, so that we can report the faulty + instruction in the error message. */ +void +md_operand (expressionS * expr) +{ + if (score3) + s3_operand (expr); + else + s7_operand (expr); +} + +/* Turn an integer of n bytes (in val) into a stream of bytes appropriate + for use in the a.out file, and stores them in the array pointed to by buf. + This knows about the endian-ness of the target machine and does + THE RIGHT THING, whatever it is. Possible values for n are 1 (byte) + 2 (short) and 4 (long) Floating numbers are put out as a series of + LITTLENUMS (shorts, here at least). */ +void +md_number_to_chars (char *buf, valueT val, int n) +{ + if (score3) + s3_number_to_chars (buf, val, n); + else + s7_number_to_chars (buf, val, n); +} + +/* Turn a string in input_line_pointer into a floating point constant + of type TYPE, and store the appropriate bytes in *LITP. The number + of LITTLENUMS emitted is stored in *SIZEP. An error message is + returned, or NULL on OK. + + Note that fp constants aren't represent in the normal way on the ARM. + In big endian mode, things are as expected. However, in little endian + mode fp constants are big-endian word-wise, and little-endian byte-wise + within the words. For example, (double) 1.1 in big endian mode is + the byte sequence 3f f1 99 99 99 99 99 9a, and in little endian mode is + the byte sequence 99 99 f1 3f 9a 99 99 99. */ +char * +md_atof (int type, char *litP, int *sizeP) +{ + if (score3) + return s3_atof (type, litP, sizeP); + else + return s7_atof (type, litP, sizeP); +} + +void +score_frag_check (fragS * fragp ATTRIBUTE_UNUSED) +{ + if (score3) + s3_frag_check (fragp); + else + s7_frag_check (fragp); +} + +/* Implementation of TC_VALIDATE_FIX. + Called before md_apply_fix() and after md_convert_frag(). */ +void +score_validate_fix (fixS *fixP) +{ + if (score3) + s3_validate_fix (fixP); + else + s7_validate_fix (fixP); +} + +int +score_force_relocation (struct fix *fixp) +{ + if (score3) + return s3_force_relocation (fixp); + else + return s7_force_relocation (fixp); +} + +/* Implementation of md_frag_check. + Called after md_convert_frag(). */ +bfd_boolean +score_fix_adjustable (fixS * fixP) +{ + if (score3) + return s3_fix_adjustable (fixP); + else + return s7_fix_adjustable (fixP); +} + +void +score_elf_final_processing (void) +{ + if (score3) + s3_elf_final_processing (); + else + s7_elf_final_processing (); +} + +/* In this function, we determine whether s3_GP instruction should do relaxation, + for the label being against was known now. + Doing this here but not in md_relax_frag() can induce iteration times + in stage of doing relax. */ +int +md_estimate_size_before_relax (fragS * fragp, asection * sec ATTRIBUTE_UNUSED) +{ + if (score3) + return s3_estimate_size_before_relax (fragp, sec); + else + return s7_estimate_size_before_relax (fragp, sec); +} + +int +score_relax_frag (asection * sec ATTRIBUTE_UNUSED, fragS * fragp, long stretch ATTRIBUTE_UNUSED) +{ + if (score3) + return s3_relax_frag (sec, fragp, stretch); + else + return s7_relax_frag (sec, fragp, stretch); +} + +void +md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, segT sec ATTRIBUTE_UNUSED, fragS * fragp) +{ + if (score3) + return s3_convert_frag (abfd, sec, fragp); + else + return s7_convert_frag (abfd, sec, fragp); +} + +long +md_pcrel_from (fixS * fixP) +{ + if (score3) + return s3_pcrel_from (fixP); + else + return s7_pcrel_from (fixP); +} + +/* Round up a section size to the appropriate boundary. */ +valueT +md_section_align (segT segment ATTRIBUTE_UNUSED, valueT size) +{ + if (score3) + return s3_section_align (segment, size); + else + return s7_section_align (segment, size); +} + +void +md_apply_fix (fixS *fixP, valueT *valP, segT seg) +{ + if (score3) + return s3_apply_fix (fixP, valP, seg); + else + return s7_apply_fix (fixP, valP, seg); +} + +/* Translate internal representation of relocation info to BFD target format. */ +arelent ** +tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) +{ + if (score3) + return s3_gen_reloc (section, fixp); + else + return s7_gen_reloc (section, fixp); +} + +void +md_begin (void) +{ + s3_begin (); + s7_begin (); +} + +static void +score_set_mach (const char *arg) +{ + if (strcmp (arg, MARCH_SCORE3) == 0) + { + score3 = 1; + score7 = 0; + s3_score3d = 1; + } + else if (strcmp (arg, MARCH_SCORE7) == 0) + { + score3 = 0; + score7 = 1; + s7_score7d = 1; + s7_university_version = 0; + s7_vector_size = s7_SCORE7_PIPELINE; + } + else if (strcmp (arg, MARCH_SCORE5) == 0) + { + score3 = 0; + score7 = 1; + s7_score7d = 1; + s7_university_version = 0; + s7_vector_size = s7_SCORE5_PIPELINE; + } + else if (strcmp (arg, MARCH_SCORE5U) == 0) + { + score3 = 0; + score7 = 1; + s7_score7d = 1; + s7_university_version = 1; + s7_vector_size = s7_SCORE5_PIPELINE; + } + else + { + as_bad (_("unknown architecture `%s'\n"), arg); + } +} + +int +md_parse_option (int c, char *arg) +{ + switch (c) + { +#ifdef OPTION_EB + case OPTION_EB: + target_big_endian = 1; + break; +#endif +#ifdef OPTION_EL + case OPTION_EL: + target_big_endian = 0; + break; +#endif + case OPTION_FIXDD: + s3_fix_data_dependency = 1; + s7_fix_data_dependency = 1; + break; + case OPTION_NWARN: + s3_warn_fix_data_dependency = 0; + s7_warn_fix_data_dependency = 0; + break; + case OPTION_SCORE5: + score3 = 0; + score7 = 1; + s7_university_version = 0; + s7_vector_size = s7_SCORE5_PIPELINE; + break; + case OPTION_SCORE5U: + score3 = 0; + score7 = 1; + s7_university_version = 1; + s7_vector_size = s7_SCORE5_PIPELINE; + break; + case OPTION_SCORE7: + score3 = 0; + score7 = 1; + s7_score7d = 1; + s7_university_version = 0; + s7_vector_size = s7_SCORE7_PIPELINE; + break; + case OPTION_SCORE3: + score3 = 1; + score7 = 0; + s3_score3d = 1; + break; + case OPTION_R1: + s3_nor1 = 0; + s7_nor1 = 0; + break; + case 'G': + s3_g_switch_value = atoi (arg); + s7_g_switch_value = atoi (arg); + break; + case OPTION_O0: + s3_g_opt = 0; + s7_g_opt = 0; + break; + case OPTION_SCORE_VERSION: + printf (_("Sunplus-v2-0-0-20060510\n")); + break; + case OPTION_PIC: + s3_score_pic = s3_NO_PIC; /* Score3 doesn't support PIC now. */ + s7_score_pic = s7_PIC; + s3_g_switch_value = 0; /* Must set -G num as 0 to generate s3_PIC code. */ + s7_g_switch_value = 0; /* Must set -G num as 0 to generate s7_PIC code. */ + break; + case OPTION_MARCH: + score_set_mach (arg); + break; + default: + return 0; + } + return 1; +} + +void +md_show_usage (FILE * fp) +{ + fprintf (fp, _(" Score-specific assembler options:\n")); +#ifdef OPTION_EB + fprintf (fp, _("\ + -EB\t\tassemble code for a big-endian cpu\n")); +#endif + +#ifdef OPTION_EL + fprintf (fp, _("\ + -EL\t\tassemble code for a little-endian cpu\n")); +#endif + + fprintf (fp, _("\ + -FIXDD\t\tassemble code for fix data dependency\n")); + fprintf (fp, _("\ + -NWARN\t\tassemble code for no warning message for fix data dependency\n")); + fprintf (fp, _("\ + -SCORE5\t\tassemble code for target is SCORE5\n")); + fprintf (fp, _("\ + -SCORE5U\tassemble code for target is SCORE5U\n")); + fprintf (fp, _("\ + -SCORE7\t\tassemble code for target is SCORE7, this is default setting\n")); + fprintf (fp, _("\ + -SCORE3\t\tassemble code for target is SCORE3\n")); + fprintf (fp, _("\ + -march=score7\tassemble code for target is SCORE7, this is default setting\n")); + fprintf (fp, _("\ + -march=score3\tassemble code for target is SCORE3\n")); + fprintf (fp, _("\ + -USE_R1\t\tassemble code for no warning message when using temp register r1\n")); + fprintf (fp, _("\ + -KPIC\t\tassemble code for PIC\n")); + fprintf (fp, _("\ + -O0\t\tassembler will not perform any optimizations\n")); + fprintf (fp, _("\ + -G gpnum\tassemble code for setting gpsize and default is 8 byte\n")); + fprintf (fp, _("\ + -V \t\tSunplus release version \n")); +} diff --git a/gas/config/tc-score.h b/gas/config/tc-score.h index 1f3e0f3..b46ef79 100644 --- a/gas/config/tc-score.h +++ b/gas/config/tc-score.h @@ -1,6 +1,7 @@ /* tc-score.h -- Score specific file for assembler - Copyright 2006, 2007 Free Software Foundation, Inc. + Copyright 2006, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by: + Brain.lin (brain.lin@sunplusct.com) Mei Ligang (ligang@sunnorth.com.cn) Pei-Lin Tsai (pltsai@sunplus.com) @@ -38,7 +39,7 @@ #define md_relax_frag(segment, fragp, stretch) score_relax_frag (segment, fragp, stretch) extern int score_relax_frag (asection *, struct frag *, long); -#define md_frag_check(fragp) score_frag_check (fragp) +/* #define md_frag_check(fragp) score_frag_check (fragp) */ extern void score_frag_check (fragS *); #define TC_VALIDATE_FIX(FIXP, SEGTYPE, SKIP) score_validate_fix (FIXP) @@ -74,10 +75,4 @@ struct score_tc_frag_data #define GLOBAL_OFFSET_TABLE_NAME "__GLOBAL_OFFSET_TABLE_" #endif -enum score_pic_level -{ - NO_PIC, - PIC -}; - #endif /*TC_SCORE */ diff --git a/gas/config/tc-score7.c b/gas/config/tc-score7.c new file mode 100644 index 0000000..b282b1d --- /dev/null +++ b/gas/config/tc-score7.c @@ -0,0 +1,6987 @@ +/* tc-score7.c -- Assembler for Score7 + Copyright 2009 Free Software Foundation, Inc. + Contributed by: + Brain.lin (brain.lin@sunplusct.com) + Mei Ligang (ligang@sunnorth.com.cn) + Pei-Lin Tsai (pltsai@sunplus.com) + + This file is part of GAS, the GNU Assembler. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GAS; see the file COPYING. If not, write to the Free + Software Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "as.h" +#include "config.h" +#include "subsegs.h" +#include "safe-ctype.h" +#include "opcode/score-inst.h" +#include "struc-symbol.h" +#include "libiberty.h" + +#ifdef OBJ_ELF +#include "elf/score.h" +#include "dwarf2dbg.h" +#endif + +static void s7_do_ldst_insn (char *); +static void s7_do_crdcrscrsimm5 (char *); +static void s7_do_ldst_unalign (char *); +static void s7_do_ldst_atomic (char *); +static void s7_do_ldst_cop (char *); +static void s7_do_macro_li_rdi32 (char *); +static void s7_do_macro_la_rdi32 (char *); +static void s7_do_macro_rdi32hi (char *); +static void s7_do_macro_rdi32lo (char *); +static void s7_do_macro_mul_rdrsrs (char *); +static void s7_do_macro_ldst_label (char *); +static void s7_do_branch (char *); +static void s7_do_jump (char *); +static void s7_do_empty (char *); +static void s7_do_rdrsrs (char *); +static void s7_do_rdsi16 (char *); +static void s7_do_rdrssi14 (char *); +static void s7_do_sub_rdsi16 (char *); +static void s7_do_sub_rdrssi14 (char *); +static void s7_do_rdrsi5 (char *); +static void s7_do_rdrsi14 (char *); +static void s7_do_rdi16 (char *); +static void s7_do_xrsi5 (char *); +static void s7_do_rdrs (char *); +static void s7_do_rdxrs (char *); +static void s7_do_rsrs (char *); +static void s7_do_rdcrs (char *); +static void s7_do_rdsrs (char *); +static void s7_do_rd (char *); +static void s7_do_rs (char *); +static void s7_do_i15 (char *); +static void s7_do_xi5x (char *); +static void s7_do_ceinst (char *); +static void s7_do_cache (char *); +static void s7_do16_rdrs (char *); +static void s7_do16_rs (char *); +static void s7_do16_xrs (char *); +static void s7_do16_mv_rdrs (char *); +static void s7_do16_hrdrs (char *); +static void s7_do16_rdhrs (char *); +static void s7_do16_rdi4 (char *); +static void s7_do16_rdi5 (char *); +static void s7_do16_xi5 (char *); +static void s7_do16_ldst_insn (char *); +static void s7_do16_ldst_imm_insn (char *); +static void s7_do16_push_pop (char *); +static void s7_do16_branch (char *); +static void s7_do16_jump (char *); +static void s7_do_rdi16_pic (char *); +static void s7_do_addi_s_pic (char *); +static void s7_do_addi_u_pic (char *); +static void s7_do_lw_pic (char *); + +#define s7_GP 28 +#define s7_PIC_CALL_REG 29 +#define s7_MAX_LITERAL_POOL_SIZE 1024 +#define s7_FAIL 0x80000000 +#define s7_SUCCESS 0 +#define s7_INSN_SIZE 4 +#define s7_INSN16_SIZE 2 +#define s7_RELAX_INST_NUM 3 + +/* For score5u : div/mul will pop warning message, mmu/alw/asw will pop error message. */ +#define s7_BAD_ARGS _("bad arguments to instruction") +#define s7_ERR_FOR_SCORE5U_MUL_DIV _("div / mul are reserved instructions") +#define s7_ERR_FOR_SCORE5U_MMU _("This architecture doesn't support mmu") +#define s7_ERR_FOR_SCORE5U_ATOMIC _("This architecture doesn't support atomic instruction") +#define s7_BAD_SKIP_COMMA s7_BAD_ARGS +#define s7_BAD_GARBAGE _("garbage following instruction"); + +#define s7_skip_whitespace(str) while (*(str) == ' ') ++(str) + +/* The name of the readonly data section. */ +#define s7_RDATA_SECTION_NAME (OUTPUT_FLAVOR == bfd_target_aout_flavour \ + ? ".data" \ + : OUTPUT_FLAVOR == bfd_target_ecoff_flavour \ + ? ".rdata" \ + : OUTPUT_FLAVOR == bfd_target_coff_flavour \ + ? ".rdata" \ + : OUTPUT_FLAVOR == bfd_target_elf_flavour \ + ? ".rodata" \ + : (abort (), "")) + +#define s7_RELAX_ENCODE(old, new, type, reloc1, reloc2, opt) \ + ((relax_substateT) \ + (((old) << 23) \ + | ((new) << 16) \ + | ((type) << 9) \ + | ((reloc1) << 5) \ + | ((reloc2) << 1) \ + | ((opt) ? 1 : 0))) + +#define s7_RELAX_OLD(i) (((i) >> 23) & 0x7f) +#define s7_RELAX_NEW(i) (((i) >> 16) & 0x7f) +#define s7_RELAX_TYPE(i) (((i) >> 9) & 0x7f) +#define s7_RELAX_RELOC1(i) ((valueT) ((i) >> 5) & 0xf) +#define s7_RELAX_RELOC2(i) ((valueT) ((i) >> 1) & 0xf) +#define s7_RELAX_OPT(i) ((i) & 1) +#define s7_RELAX_OPT_CLEAR(i) ((i) & ~1) + +#define s7_SET_INSN_ERROR(s) (s7_inst.error = (s)) +#define s7_INSN_IS_PCE_P(s) (strstr (str, "||") != NULL) + +#define s7_GET_INSN_CLASS(type) (s7_get_insn_class_from_type (type)) + +#define s7_GET_INSN_SIZE(type) ((s7_GET_INSN_CLASS (type) == INSN_CLASS_16) \ + ? s7_INSN16_SIZE : s7_INSN_SIZE) + +#define s7_MAX_LITTLENUMS 6 +#define s7_INSN_NAME_LEN 16 + +/* Relax will need some padding for alignment. */ +#define s7_RELAX_PAD_BYTE 3 + +#define s7_USE_GLOBAL_POINTER_OPT 1 + + + +/* Enumeration matching entries in table above. */ +enum s7_score_reg_type +{ + s7_REG_TYPE_SCORE = 0, +#define REG_TYPE_FIRST s7_REG_TYPE_SCORE + s7_REG_TYPE_SCORE_SR = 1, + s7_REG_TYPE_SCORE_CR = 2, + s7_REG_TYPE_MAX = 3 +}; + +enum s7_score_pic_level +{ + s7_NO_PIC, + s7_PIC +}; +static enum s7_score_pic_level s7_score_pic = s7_NO_PIC; + +enum s7_insn_type_for_dependency +{ + s7_D_pce, + s7_D_cond_br, + s7_D_cond_mv, + s7_D_cached, + s7_D_cachei, + s7_D_ldst, + s7_D_ldcombine, + s7_D_mtcr, + s7_D_mfcr, + s7_D_mfsr, + s7_D_mftlb, + s7_D_mtptlb, + s7_D_mtrtlb, + s7_D_stlb, + s7_D_all_insn +}; + +struct s7_insn_to_dependency +{ + char *insn_name; + enum s7_insn_type_for_dependency type; +}; + +struct s7_data_dependency +{ + enum s7_insn_type_for_dependency pre_insn_type; + char pre_reg[6]; + enum s7_insn_type_for_dependency cur_insn_type; + char cur_reg[6]; + int bubblenum_7; + int bubblenum_5; + int warn_or_error; /* warning - 0; error - 1 */ +}; + +static const struct s7_insn_to_dependency s7_insn_to_dependency_table[] = +{ + /* pce instruction. */ + {"pce", s7_D_pce}, + /* conditional branch instruction. */ + {"bcs", s7_D_cond_br}, + {"bcc", s7_D_cond_br}, + {"bgtu", s7_D_cond_br}, + {"bleu", s7_D_cond_br}, + {"beq", s7_D_cond_br}, + {"bne", s7_D_cond_br}, + {"bgt", s7_D_cond_br}, + {"ble", s7_D_cond_br}, + {"bge", s7_D_cond_br}, + {"blt", s7_D_cond_br}, + {"bmi", s7_D_cond_br}, + {"bpl", s7_D_cond_br}, + {"bvs", s7_D_cond_br}, + {"bvc", s7_D_cond_br}, + {"bcsl", s7_D_cond_br}, + {"bccl", s7_D_cond_br}, + {"bgtul", s7_D_cond_br}, + {"bleul", s7_D_cond_br}, + {"beql", s7_D_cond_br}, + {"bnel", s7_D_cond_br}, + {"bgtl", s7_D_cond_br}, + {"blel", s7_D_cond_br}, + {"bgel", s7_D_cond_br}, + {"bltl", s7_D_cond_br}, + {"bmil", s7_D_cond_br}, + {"bpll", s7_D_cond_br}, + {"bvsl", s7_D_cond_br}, + {"bvcl", s7_D_cond_br}, + {"bcs!", s7_D_cond_br}, + {"bcc!", s7_D_cond_br}, + {"bgtu!", s7_D_cond_br}, + {"bleu!", s7_D_cond_br}, + {"beq!", s7_D_cond_br}, + {"bne!", s7_D_cond_br}, + {"bgt!", s7_D_cond_br}, + {"ble!", s7_D_cond_br}, + {"bge!", s7_D_cond_br}, + {"blt!", s7_D_cond_br}, + {"bmi!", s7_D_cond_br}, + {"bpl!", s7_D_cond_br}, + {"bvs!", s7_D_cond_br}, + {"bvc!", s7_D_cond_br}, + {"brcs", s7_D_cond_br}, + {"brcc", s7_D_cond_br}, + {"brgtu", s7_D_cond_br}, + {"brleu", s7_D_cond_br}, + {"breq", s7_D_cond_br}, + {"brne", s7_D_cond_br}, + {"brgt", s7_D_cond_br}, + {"brle", s7_D_cond_br}, + {"brge", s7_D_cond_br}, + {"brlt", s7_D_cond_br}, + {"brmi", s7_D_cond_br}, + {"brpl", s7_D_cond_br}, + {"brvs", s7_D_cond_br}, + {"brvc", s7_D_cond_br}, + {"brcsl", s7_D_cond_br}, + {"brccl", s7_D_cond_br}, + {"brgtul", s7_D_cond_br}, + {"brleul", s7_D_cond_br}, + {"breql", s7_D_cond_br}, + {"brnel", s7_D_cond_br}, + {"brgtl", s7_D_cond_br}, + {"brlel", s7_D_cond_br}, + {"brgel", s7_D_cond_br}, + {"brltl", s7_D_cond_br}, + {"brmil", s7_D_cond_br}, + {"brpll", s7_D_cond_br}, + {"brvsl", s7_D_cond_br}, + {"brvcl", s7_D_cond_br}, + {"brcs!", s7_D_cond_br}, + {"brcc!", s7_D_cond_br}, + {"brgtu!", s7_D_cond_br}, + {"brleu!", s7_D_cond_br}, + {"breq!", s7_D_cond_br}, + {"brne!", s7_D_cond_br}, + {"brgt!", s7_D_cond_br}, + {"brle!", s7_D_cond_br}, + {"brge!", s7_D_cond_br}, + {"brlt!", s7_D_cond_br}, + {"brmi!", s7_D_cond_br}, + {"brpl!", s7_D_cond_br}, + {"brvs!", s7_D_cond_br}, + {"brvc!", s7_D_cond_br}, + {"brcsl!", s7_D_cond_br}, + {"brccl!", s7_D_cond_br}, + {"brgtul!", s7_D_cond_br}, + {"brleul!", s7_D_cond_br}, + {"breql!", s7_D_cond_br}, + {"brnel!", s7_D_cond_br}, + {"brgtl!", s7_D_cond_br}, + {"brlel!", s7_D_cond_br}, + {"brgel!", s7_D_cond_br}, + {"brltl!", s7_D_cond_br}, + {"brmil!", s7_D_cond_br}, + {"brpll!", s7_D_cond_br}, + {"brvsl!", s7_D_cond_br}, + {"brvcl!", s7_D_cond_br}, + /* conditional move instruction. */ + {"mvcs", s7_D_cond_mv}, + {"mvcc", s7_D_cond_mv}, + {"mvgtu", s7_D_cond_mv}, + {"mvleu", s7_D_cond_mv}, + {"mveq", s7_D_cond_mv}, + {"mvne", s7_D_cond_mv}, + {"mvgt", s7_D_cond_mv}, + {"mvle", s7_D_cond_mv}, + {"mvge", s7_D_cond_mv}, + {"mvlt", s7_D_cond_mv}, + {"mvmi", s7_D_cond_mv}, + {"mvpl", s7_D_cond_mv}, + {"mvvs", s7_D_cond_mv}, + {"mvvc", s7_D_cond_mv}, + /* move spectial instruction. */ + {"mtcr", s7_D_mtcr}, + {"mftlb", s7_D_mftlb}, + {"mtptlb", s7_D_mtptlb}, + {"mtrtlb", s7_D_mtrtlb}, + {"stlb", s7_D_stlb}, + {"mfcr", s7_D_mfcr}, + {"mfsr", s7_D_mfsr}, + /* cache instruction. */ + {"cache 8", s7_D_cached}, + {"cache 9", s7_D_cached}, + {"cache 10", s7_D_cached}, + {"cache 11", s7_D_cached}, + {"cache 12", s7_D_cached}, + {"cache 13", s7_D_cached}, + {"cache 14", s7_D_cached}, + {"cache 24", s7_D_cached}, + {"cache 26", s7_D_cached}, + {"cache 27", s7_D_cached}, + {"cache 29", s7_D_cached}, + {"cache 30", s7_D_cached}, + {"cache 31", s7_D_cached}, + {"cache 0", s7_D_cachei}, + {"cache 1", s7_D_cachei}, + {"cache 2", s7_D_cachei}, + {"cache 3", s7_D_cachei}, + {"cache 4", s7_D_cachei}, + {"cache 16", s7_D_cachei}, + {"cache 17", s7_D_cachei}, + /* load/store instruction. */ + {"lb", s7_D_ldst}, + {"lbu", s7_D_ldst}, + {"lbu!", s7_D_ldst}, + {"lbup!", s7_D_ldst}, + {"lh", s7_D_ldst}, + {"lhu", s7_D_ldst}, + {"lh!", s7_D_ldst}, + {"lhp!", s7_D_ldst}, + {"lw", s7_D_ldst}, + {"lw!", s7_D_ldst}, + {"lwp!", s7_D_ldst}, + {"sb", s7_D_ldst}, + {"sb!", s7_D_ldst}, + {"sbp!", s7_D_ldst}, + {"sh", s7_D_ldst}, + {"sh!", s7_D_ldst}, + {"shp!", s7_D_ldst}, + {"sw", s7_D_ldst}, + {"sw!", s7_D_ldst}, + {"swp!", s7_D_ldst}, + {"alw", s7_D_ldst}, + {"asw", s7_D_ldst}, + {"push!", s7_D_ldst}, + {"pushhi!", s7_D_ldst}, + {"pop!", s7_D_ldst}, + {"pophi!", s7_D_ldst}, + {"ldc1", s7_D_ldst}, + {"ldc2", s7_D_ldst}, + {"ldc3", s7_D_ldst}, + {"stc1", s7_D_ldst}, + {"stc2", s7_D_ldst}, + {"stc3", s7_D_ldst}, + {"scb", s7_D_ldst}, + {"scw", s7_D_ldst}, + {"sce", s7_D_ldst}, + /* load combine instruction. */ + {"lcb", s7_D_ldcombine}, + {"lcw", s7_D_ldcombine}, + {"lce", s7_D_ldcombine}, +}; + +static const struct s7_data_dependency s7_data_dependency_table[] = +{ + /* Condition register. */ + {s7_D_mtcr, "cr1", s7_D_pce, "", 2, 1, 0}, + {s7_D_mtcr, "cr1", s7_D_cond_br, "", 1, 0, 1}, + {s7_D_mtcr, "cr1", s7_D_cond_mv, "", 1, 0, 1}, + /* Status regiser. */ + {s7_D_mtcr, "cr0", s7_D_all_insn, "", 5, 4, 0}, + /* CCR regiser. */ + {s7_D_mtcr, "cr4", s7_D_all_insn, "", 6, 5, 0}, + /* EntryHi/EntryLo register. */ + {s7_D_mftlb, "", s7_D_mtptlb, "", 1, 1, 1}, + {s7_D_mftlb, "", s7_D_mtrtlb, "", 1, 1, 1}, + {s7_D_mftlb, "", s7_D_stlb, "", 1, 1,1}, + {s7_D_mftlb, "", s7_D_mfcr, "cr11", 1, 1, 1}, + {s7_D_mftlb, "", s7_D_mfcr, "cr12", 1, 1, 1}, + /* Index register. */ + {s7_D_stlb, "", s7_D_mtptlb, "", 1, 1, 1}, + {s7_D_stlb, "", s7_D_mftlb, "", 1, 1, 1}, + {s7_D_stlb, "", s7_D_mfcr, "cr8", 2, 2, 1}, + /* Cache. */ + {s7_D_cached, "", s7_D_ldst, "", 1, 1, 0}, + {s7_D_cached, "", s7_D_ldcombine, "", 1, 1, 0}, + {s7_D_cachei, "", s7_D_all_insn, "", 5, 4, 0}, + /* Load combine. */ + {s7_D_ldcombine, "", s7_D_mfsr, "sr1", 3, 3, 1}, +}; + + + +/* Used to contain constructed error messages. */ +static char s7_err_msg[255]; +static int s7_fix_data_dependency = 0; +static int s7_warn_fix_data_dependency = 1; + +static int s7_in_my_get_expression = 0; + +/* Default, pop warning message when using r1. */ +static int s7_nor1 = 1; + +/* Default will do instruction relax, -O0 will set s7_g_opt = 0. */ +static unsigned int s7_g_opt = 1; + +/* The size of the small data section. */ +static unsigned int s7_g_switch_value = 8; + +static segT s7_pdr_seg; + +struct s7_score_it +{ + char name[s7_INSN_NAME_LEN]; + unsigned long instruction; + unsigned long relax_inst; + int size; + int relax_size; + enum score_insn_type type; + char str[s7_MAX_LITERAL_POOL_SIZE]; + const char *error; + int bwarn; + char reg[s7_INSN_NAME_LEN]; + struct + { + bfd_reloc_code_real_type type; + expressionS exp; + int pc_rel; + }reloc; +}; +static struct s7_score_it s7_inst; + +typedef struct proc +{ + symbolS *isym; + unsigned long reg_mask; + unsigned long reg_offset; + unsigned long fpreg_mask; + unsigned long leaf; + unsigned long frame_offset; + unsigned long frame_reg; + unsigned long pc_reg; +} s7_procS; +static s7_procS s7_cur_proc; +static s7_procS *s7_cur_proc_ptr; +static int s7_numprocs; + +/* Structure for a hash table entry for a register. */ +struct s7_reg_entry +{ + const char *name; + int number; +}; + +static const struct s7_reg_entry s7_score_rn_table[] = +{ + {"r0", 0}, {"r1", 1}, {"r2", 2}, {"r3", 3}, + {"r4", 4}, {"r5", 5}, {"r6", 6}, {"r7", 7}, + {"r8", 8}, {"r9", 9}, {"r10", 10}, {"r11", 11}, + {"r12", 12}, {"r13", 13}, {"r14", 14}, {"r15", 15}, + {"r16", 16}, {"r17", 17}, {"r18", 18}, {"r19", 19}, + {"r20", 20}, {"r21", 21}, {"r22", 22}, {"r23", 23}, + {"r24", 24}, {"r25", 25}, {"r26", 26}, {"r27", 27}, + {"r28", 28}, {"r29", 29}, {"r30", 30}, {"r31", 31}, + {NULL, 0} +}; + +static const struct s7_reg_entry s7_score_srn_table[] = +{ + {"sr0", 0}, {"sr1", 1}, {"sr2", 2}, + {NULL, 0} +}; + +static const struct s7_reg_entry s7_score_crn_table[] = +{ + {"cr0", 0}, {"cr1", 1}, {"cr2", 2}, {"cr3", 3}, + {"cr4", 4}, {"cr5", 5}, {"cr6", 6}, {"cr7", 7}, + {"cr8", 8}, {"cr9", 9}, {"cr10", 10}, {"cr11", 11}, + {"cr12", 12}, {"cr13", 13}, {"cr14", 14}, {"cr15", 15}, + {"cr16", 16}, {"cr17", 17}, {"cr18", 18}, {"cr19", 19}, + {"cr20", 20}, {"cr21", 21}, {"cr22", 22}, {"cr23", 23}, + {"cr24", 24}, {"cr25", 25}, {"cr26", 26}, {"cr27", 27}, + {"cr28", 28}, {"cr29", 29}, {"cr30", 30}, {"cr31", 31}, + {NULL, 0} +}; + +struct s7_reg_map +{ + const struct s7_reg_entry *names; + int max_regno; + struct hash_control *htab; + const char *expected; +}; + +static struct s7_reg_map s7_all_reg_maps[] = +{ + {s7_score_rn_table, 31, NULL, N_("S+core register expected")}, + {s7_score_srn_table, 2, NULL, N_("S+core special-register expected")}, + {s7_score_crn_table, 31, NULL, N_("S+core co-processor register expected")}, +}; + +static struct hash_control *s7_score_ops_hsh = NULL; +static struct hash_control *s7_dependency_insn_hsh = NULL; + + +struct s7_datafield_range +{ + int data_type; + int bits; + int range[2]; +}; + +static struct s7_datafield_range s7_score_df_range[] = +{ + {_IMM4, 4, {0, (1 << 4) - 1}}, /* ( 0 ~ 15 ) */ + {_IMM5, 5, {0, (1 << 5) - 1}}, /* ( 0 ~ 31 ) */ + {_IMM8, 8, {0, (1 << 8) - 1}}, /* ( 0 ~ 255 ) */ + {_IMM14, 14, {0, (1 << 14) - 1}}, /* ( 0 ~ 16383) */ + {_IMM15, 15, {0, (1 << 15) - 1}}, /* ( 0 ~ 32767) */ + {_IMM16, 16, {0, (1 << 16) - 1}}, /* ( 0 ~ 65535) */ + {_SIMM10, 10, {-(1 << 9), (1 << 9) - 1}}, /* ( -512 ~ 511 ) */ + {_SIMM12, 12, {-(1 << 11), (1 << 11) - 1}}, /* ( -2048 ~ 2047 ) */ + {_SIMM14, 14, {-(1 << 13), (1 << 13) - 1}}, /* ( -8192 ~ 8191 ) */ + {_SIMM15, 15, {-(1 << 14), (1 << 14) - 1}}, /* (-16384 ~ 16383) */ + {_SIMM16, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */ + {_SIMM14_NEG, 14, {-(1 << 13), (1 << 13) - 1}}, /* ( -8191 ~ 8192 ) */ + {_IMM16_NEG, 16, {0, (1 << 16) - 1}}, /* (-65535 ~ 0 ) */ + {_SIMM16_NEG, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */ + {_IMM20, 20, {0, (1 << 20) - 1}}, + {_IMM25, 25, {0, (1 << 25) - 1}}, + {_DISP8div2, 8, {-(1 << 8), (1 << 8) - 1}}, /* ( -256 ~ 255 ) */ + {_DISP11div2, 11, {0, 0}}, + {_DISP19div2, 19, {-(1 << 19), (1 << 19) - 1}}, /* (-524288 ~ 524287) */ + {_DISP24div2, 24, {0, 0}}, + {_VALUE, 32, {0, ((unsigned int)1 << 31) - 1}}, + {_VALUE_HI16, 16, {0, (1 << 16) - 1}}, + {_VALUE_LO16, 16, {0, (1 << 16) - 1}}, + {_VALUE_LDST_LO16, 16, {0, (1 << 16) - 1}}, + {_SIMM16_LA, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */ + {_IMM5_RSHIFT_1, 5, {0, (1 << 6) - 1}}, /* ( 0 ~ 63 ) */ + {_IMM5_RSHIFT_2, 5, {0, (1 << 7) - 1}}, /* ( 0 ~ 127 ) */ + {_SIMM16_LA_POS, 16, {0, (1 << 15) - 1}}, /* ( 0 ~ 32767) */ + {_IMM5_RANGE_8_31, 5, {8, 31}}, /* But for cop0 the valid data : (8 ~ 31). */ + {_IMM10_RSHIFT_2, 10, {-(1 << 11), (1 << 11) - 1}}, /* For ldc#, stc#. */ + {_SIMM10, 10, {0, (1 << 10) - 1}}, /* ( -1024 ~ 1023 ) */ + {_SIMM12, 12, {0, (1 << 12) - 1}}, /* ( -2048 ~ 2047 ) */ + {_SIMM14, 14, {0, (1 << 14) - 1}}, /* ( -8192 ~ 8191 ) */ + {_SIMM15, 15, {0, (1 << 15) - 1}}, /* (-16384 ~ 16383) */ + {_SIMM16, 16, {0, (1 << 16) - 1}}, /* (-65536 ~ 65536) */ + {_SIMM14_NEG, 14, {0, (1 << 16) - 1}}, /* ( -8191 ~ 8192 ) */ + {_IMM16_NEG, 16, {0, (1 << 16) - 1}}, /* ( 65535 ~ 0 ) */ + {_SIMM16_NEG, 16, {0, (1 << 16) - 1}}, /* ( 65535 ~ 0 ) */ + {_IMM20, 20, {0, (1 << 20) - 1}}, /* (-32768 ~ 32767) */ + {_IMM25, 25, {0, (1 << 25) - 1}}, /* (-32768 ~ 32767) */ + {_GP_IMM15, 15, {0, (1 << 15) - 1}}, /* ( 0 ~ 65535) */ + {_GP_IMM14, 14, {0, (1 << 14) - 1}}, /* ( 0 ~ 65535) */ + {_SIMM16_pic, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */ + {_IMM16_LO16_pic, 16, {0, (1 << 16) - 1}}, /* ( 65535 ~ 0 ) */ + {_IMM16_pic, 16, {0, (1 << 16) - 1}}, /* ( 0 ~ 65535) */ +}; + + +struct s7_asm_opcode +{ + /* Instruction name. */ + const char *template; + + /* Instruction Opcode. */ + bfd_vma value; + + /* Instruction bit mask. */ + bfd_vma bitmask; + + /* Relax instruction opcode. 0x8000 imply no relaxation. */ + bfd_vma relax_value; + + /* Instruction type. */ + enum score_insn_type type; + + /* Function to call to parse args. */ + void (*parms) (char *); +}; + +static const struct s7_asm_opcode s7_score_ldst_insns[] = +{ + {"lw", 0x20000000, 0x3e000000, 0x2008, Rd_rvalueRs_SI15, s7_do_ldst_insn}, + {"lw", 0x06000000, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s7_do_ldst_insn}, + {"lw", 0x0e000000, 0x3e000007, 0x200a, Rd_rvalueRs_postSI12, s7_do_ldst_insn}, + {"lh", 0x22000000, 0x3e000000, 0x2009, Rd_rvalueRs_SI15, s7_do_ldst_insn}, + {"lh", 0x06000001, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s7_do_ldst_insn}, + {"lh", 0x0e000001, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, s7_do_ldst_insn}, + {"lhu", 0x24000000, 0x3e000000, 0x8000, Rd_rvalueRs_SI15, s7_do_ldst_insn}, + {"lhu", 0x06000002, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s7_do_ldst_insn}, + {"lhu", 0x0e000002, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, s7_do_ldst_insn}, + {"lb", 0x26000000, 0x3e000000, 0x8000, Rd_rvalueRs_SI15, s7_do_ldst_insn}, + {"lb", 0x06000003, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s7_do_ldst_insn}, + {"lb", 0x0e000003, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, s7_do_ldst_insn}, + {"sw", 0x28000000, 0x3e000000, 0x200c, Rd_lvalueRs_SI15, s7_do_ldst_insn}, + {"sw", 0x06000004, 0x3e000007, 0x200e, Rd_lvalueRs_preSI12, s7_do_ldst_insn}, + {"sw", 0x0e000004, 0x3e000007, 0x8000, Rd_lvalueRs_postSI12, s7_do_ldst_insn}, + {"sh", 0x2a000000, 0x3e000000, 0x200d, Rd_lvalueRs_SI15, s7_do_ldst_insn}, + {"sh", 0x06000005, 0x3e000007, 0x8000, Rd_lvalueRs_preSI12, s7_do_ldst_insn}, + {"sh", 0x0e000005, 0x3e000007, 0x8000, Rd_lvalueRs_postSI12, s7_do_ldst_insn}, + {"lbu", 0x2c000000, 0x3e000000, 0x200b, Rd_rvalueRs_SI15, s7_do_ldst_insn}, + {"lbu", 0x06000006, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s7_do_ldst_insn}, + {"lbu", 0x0e000006, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, s7_do_ldst_insn}, + {"sb", 0x2e000000, 0x3e000000, 0x200f, Rd_lvalueRs_SI15, s7_do_ldst_insn}, + {"sb", 0x06000007, 0x3e000007, 0x8000, Rd_lvalueRs_preSI12, s7_do_ldst_insn}, + {"sb", 0x0e000007, 0x3e000007, 0x8000, Rd_lvalueRs_postSI12, s7_do_ldst_insn}, +}; + +static const struct s7_asm_opcode s7_score_insns[] = +{ + {"abs", 0x3800000a, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"abs.s", 0x3800004b, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"add", 0x00000010, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"add.c", 0x00000011, 0x3e0003ff, 0x2000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"add.s", 0x38000048, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"addc", 0x00000012, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"addc.c", 0x00000013, 0x3e0003ff, 0x0009, Rd_Rs_Rs, s7_do_rdrsrs}, + {"addi", 0x02000000, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_rdsi16}, + {"addi.c", 0x02000001, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_rdsi16}, + {"addis", 0x0a000000, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_rdi16}, + {"addis.c", 0x0a000001, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_rdi16}, + {"addri", 0x10000000, 0x3e000001, 0x8000, Rd_Rs_SI14, s7_do_rdrssi14}, + {"addri.c", 0x10000001, 0x3e000001, 0x8000, Rd_Rs_SI14, s7_do_rdrssi14}, + {"addc!", 0x0009, 0x700f, 0x00000013, Rd_Rs, s7_do16_rdrs}, + {"add!", 0x2000, 0x700f, 0x00000011, Rd_Rs, s7_do16_rdrs}, + {"addei!", 0x6000 , 0x7087, 0x02000001, Rd_I4, s7_do16_rdi4}, + {"subi", 0x02000000, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_sub_rdsi16}, + {"subi.c", 0x02000001, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_sub_rdsi16}, + {"subri", 0x10000000, 0x3e000001, 0x8000, Rd_Rs_SI14, s7_do_sub_rdrssi14}, + {"subri.c", 0x10000001, 0x3e000001, 0x8000, Rd_Rs_SI14, s7_do_sub_rdrssi14}, + {"and", 0x00000020, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"and.c", 0x00000021, 0x3e0003ff, 0x2004, Rd_Rs_Rs, s7_do_rdrsrs}, + {"andi", 0x02080000, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16}, + {"andi.c", 0x02080001, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16}, + {"andis", 0x0a080000, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16}, + {"andis.c", 0x0a080001, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16}, + {"andri", 0x18000000, 0x3e000001, 0x8000, Rd_Rs_I14, s7_do_rdrsi14}, + {"andri.c", 0x18000001, 0x3e000001, 0x8000, Rd_Rs_I14, s7_do_rdrsi14}, + {"and!", 0x2004, 0x700f, 0x00000021, Rd_Rs, s7_do16_rdrs}, + {"bcs", 0x08000000, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"bcc", 0x08000400, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"bcnz", 0x08003800, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"bcsl", 0x08000001, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bccl", 0x08000401, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bcnzl", 0x08003801, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bcs!", 0x4000, 0x7f00, 0x08000000, PC_DISP8div2, s7_do16_branch}, + {"bcc!", 0x4100, 0x7f00, 0x08000400, PC_DISP8div2, s7_do16_branch}, + {"bcnz!", 0x4e00, 0x7f00, 0x08003800, PC_DISP8div2, s7_do16_branch}, + {"beq", 0x08001000, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"beql", 0x08001001, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"beq!", 0x4400, 0x7f00, 0x08001000, PC_DISP8div2, s7_do16_branch}, + {"bgtu", 0x08000800, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"bgt", 0x08001800, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"bge", 0x08002000, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"bgtul", 0x08000801, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bgtl", 0x08001801, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bgel", 0x08002001, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bgtu!", 0x4200, 0x7f00, 0x08000800, PC_DISP8div2, s7_do16_branch}, + {"bgt!", 0x4600, 0x7f00, 0x08001800, PC_DISP8div2, s7_do16_branch}, + {"bge!", 0x4800, 0x7f00, 0x08002000, PC_DISP8div2, s7_do16_branch}, + {"bitclr.c", 0x00000029, 0x3e0003ff, 0x6004, Rd_Rs_I5, s7_do_rdrsi5}, + {"bitrev", 0x3800000c, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"bitset.c", 0x0000002b, 0x3e0003ff, 0x6005, Rd_Rs_I5, s7_do_rdrsi5}, + {"bittst.c", 0x0000002d, 0x3e0003ff, 0x6006, x_Rs_I5, s7_do_xrsi5}, + {"bittgl.c", 0x0000002f, 0x3e0003ff, 0x6007, Rd_Rs_I5, s7_do_rdrsi5}, + {"bitclr!", 0x6004, 0x7007, 0x00000029, Rd_I5, s7_do16_rdi5}, + {"bitset!", 0x6005, 0x7007, 0x0000002b, Rd_I5, s7_do16_rdi5}, + {"bittst!", 0x6006, 0x7007, 0x0000002d, Rd_I5, s7_do16_rdi5}, + {"bittgl!", 0x6007, 0x7007, 0x0000002f, Rd_I5, s7_do16_rdi5}, + {"bleu", 0x08000c00, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"ble", 0x08001c00, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"blt", 0x08002400, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"bleul", 0x08000c01, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"blel", 0x08001c01, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bltl", 0x08002401, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bl", 0x08003c01, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bleu!", 0x4300, 0x7f00, 0x08000c00, PC_DISP8div2, s7_do16_branch}, + {"ble!", 0x4700, 0x7f00, 0x08001c00, PC_DISP8div2, s7_do16_branch}, + {"blt!", 0x4900, 0x7f00, 0x08002400, PC_DISP8div2, s7_do16_branch}, + {"bmi", 0x08002800, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"bmil", 0x08002801, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bmi!", 0x00004a00, 0x00007f00, 0x08002800, PC_DISP8div2, s7_do16_branch}, + {"bne", 0x08001400, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"bnel", 0x08001401, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bne!", 0x4500, 0x7f00, 0x08001400, PC_DISP8div2, s7_do16_branch}, + {"bpl", 0x08002c00, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"bpll", 0x08002c01, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bpl!", 0x4b00, 0x7f00, 0x08002c00, PC_DISP8div2, s7_do16_branch}, + {"brcs", 0x00000008, 0x3e007fff, 0x0004, x_Rs_x, s7_do_rs}, + {"brcc", 0x00000408, 0x3e007fff, 0x0104, x_Rs_x, s7_do_rs}, + {"brgtu", 0x00000808, 0x3e007fff, 0x0204, x_Rs_x, s7_do_rs}, + {"brleu", 0x00000c08, 0x3e007fff, 0x0304, x_Rs_x, s7_do_rs}, + {"breq", 0x00001008, 0x3e007fff, 0x0404, x_Rs_x, s7_do_rs}, + {"brne", 0x00001408, 0x3e007fff, 0x0504, x_Rs_x, s7_do_rs}, + {"brgt", 0x00001808, 0x3e007fff, 0x0604, x_Rs_x, s7_do_rs}, + {"brle", 0x00001c08, 0x3e007fff, 0x0704, x_Rs_x, s7_do_rs}, + {"brge", 0x00002008, 0x3e007fff, 0x0804, x_Rs_x, s7_do_rs}, + {"brlt", 0x00002408, 0x3e007fff, 0x0904, x_Rs_x, s7_do_rs}, + {"brmi", 0x00002808, 0x3e007fff, 0x0a04, x_Rs_x, s7_do_rs}, + {"brpl", 0x00002c08, 0x3e007fff, 0x0b04, x_Rs_x, s7_do_rs}, + {"brvs", 0x00003008, 0x3e007fff, 0x0c04, x_Rs_x, s7_do_rs}, + {"brvc", 0x00003408, 0x3e007fff, 0x0d04, x_Rs_x, s7_do_rs}, + {"brcnz", 0x00003808, 0x3e007fff, 0x0e04, x_Rs_x, s7_do_rs}, + {"br", 0x00003c08, 0x3e007fff, 0x0f04, x_Rs_x, s7_do_rs}, + {"brcsl", 0x00000009, 0x3e007fff, 0x000c, x_Rs_x, s7_do_rs}, + {"brccl", 0x00000409, 0x3e007fff, 0x010c, x_Rs_x, s7_do_rs}, + {"brgtul", 0x00000809, 0x3e007fff, 0x020c, x_Rs_x, s7_do_rs}, + {"brleul", 0x00000c09, 0x3e007fff, 0x030c, x_Rs_x, s7_do_rs}, + {"breql", 0x00001009, 0x3e007fff, 0x040c, x_Rs_x, s7_do_rs}, + {"brnel", 0x00001409, 0x3e007fff, 0x050c, x_Rs_x, s7_do_rs}, + {"brgtl", 0x00001809, 0x3e007fff, 0x060c, x_Rs_x, s7_do_rs}, + {"brlel", 0x00001c09, 0x3e007fff, 0x070c, x_Rs_x, s7_do_rs}, + {"brgel", 0x00002009, 0x3e007fff, 0x080c, x_Rs_x, s7_do_rs}, + {"brltl", 0x00002409, 0x3e007fff, 0x090c, x_Rs_x, s7_do_rs}, + {"brmil", 0x00002809, 0x3e007fff, 0x0a0c, x_Rs_x, s7_do_rs}, + {"brpll", 0x00002c09, 0x3e007fff, 0x0b0c, x_Rs_x, s7_do_rs}, + {"brvsl", 0x00003009, 0x3e007fff, 0x0c0c, x_Rs_x, s7_do_rs}, + {"brvcl", 0x00003409, 0x3e007fff, 0x0d0c, x_Rs_x, s7_do_rs}, + {"brcnzl", 0x00003809, 0x3e007fff, 0x0e0c, x_Rs_x, s7_do_rs}, + {"brl", 0x00003c09, 0x3e007fff, 0x0f0c, x_Rs_x, s7_do_rs}, + {"brcs!", 0x0004, 0x7f0f, 0x00000008, x_Rs, s7_do16_xrs}, + {"brcc!", 0x0104, 0x7f0f, 0x00000408, x_Rs, s7_do16_xrs}, + {"brgtu!", 0x0204, 0x7f0f, 0x00000808, x_Rs, s7_do16_xrs}, + {"brleu!", 0x0304, 0x7f0f, 0x00000c08, x_Rs, s7_do16_xrs}, + {"breq!", 0x0404, 0x7f0f, 0x00001008, x_Rs, s7_do16_xrs}, + {"brne!", 0x0504, 0x7f0f, 0x00001408, x_Rs, s7_do16_xrs}, + {"brgt!", 0x0604, 0x7f0f, 0x00001808, x_Rs, s7_do16_xrs}, + {"brle!", 0x0704, 0x7f0f, 0x00001c08, x_Rs, s7_do16_xrs}, + {"brge!", 0x0804, 0x7f0f, 0x00002008, x_Rs, s7_do16_xrs}, + {"brlt!", 0x0904, 0x7f0f, 0x00002408, x_Rs, s7_do16_xrs}, + {"brmi!", 0x0a04, 0x7f0f, 0x00002808, x_Rs, s7_do16_xrs}, + {"brpl!", 0x0b04, 0x7f0f, 0x00002c08, x_Rs, s7_do16_xrs}, + {"brvs!", 0x0c04, 0x7f0f, 0x00003008, x_Rs, s7_do16_xrs}, + {"brvc!", 0x0d04, 0x7f0f, 0x00003408, x_Rs, s7_do16_xrs}, + {"brcnz!", 0x0e04, 0x7f0f, 0x00003808, x_Rs, s7_do16_xrs}, + {"br!", 0x0f04, 0x7f0f, 0x00003c08, x_Rs, s7_do16_xrs}, + {"brcsl!", 0x000c, 0x7f0f, 0x00000009, x_Rs, s7_do16_xrs}, + {"brccl!", 0x010c, 0x7f0f, 0x00000409, x_Rs, s7_do16_xrs}, + {"brgtul!", 0x020c, 0x7f0f, 0x00000809, x_Rs, s7_do16_xrs}, + {"brleul!", 0x030c, 0x7f0f, 0x00000c09, x_Rs, s7_do16_xrs}, + {"breql!", 0x040c, 0x7f0f, 0x00001009, x_Rs, s7_do16_xrs}, + {"brnel!", 0x050c, 0x7f0f, 0x00001409, x_Rs, s7_do16_xrs}, + {"brgtl!", 0x060c, 0x7f0f, 0x00001809, x_Rs, s7_do16_xrs}, + {"brlel!", 0x070c, 0x7f0f, 0x00001c09, x_Rs, s7_do16_xrs}, + {"brgel!", 0x080c, 0x7f0f, 0x00002009, x_Rs, s7_do16_xrs}, + {"brltl!", 0x090c, 0x7f0f, 0x00002409, x_Rs, s7_do16_xrs}, + {"brmil!", 0x0a0c, 0x7f0f, 0x00002809, x_Rs, s7_do16_xrs}, + {"brpll!", 0x0b0c, 0x7f0f, 0x00002c09, x_Rs, s7_do16_xrs}, + {"brvsl!", 0x0c0c, 0x7f0f, 0x00003009, x_Rs, s7_do16_xrs}, + {"brvcl!", 0x0d0c, 0x7f0f, 0x00003409, x_Rs, s7_do16_xrs}, + {"brcnzl!", 0x0e0c, 0x7f0f, 0x00003809, x_Rs, s7_do16_xrs}, + {"brl!", 0x0f0c, 0x7f0f, 0x00003c09, x_Rs, s7_do16_xrs}, + {"bvs", 0x08003000, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"bvc", 0x08003400, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"bvsl", 0x08003001, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bvcl", 0x08003401, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch}, + {"bvs!", 0x4c00, 0x7f00, 0x08003000, PC_DISP8div2, s7_do16_branch}, + {"bvc!", 0x4d00, 0x7f00, 0x08003400, PC_DISP8div2, s7_do16_branch}, + {"b!", 0x4f00, 0x7f00, 0x08003c00, PC_DISP8div2, s7_do16_branch}, + {"b", 0x08003c00, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch}, + {"cache", 0x30000000, 0x3ff00000, 0x8000, OP5_rvalueRs_SI15, s7_do_cache}, + {"ceinst", 0x38000000, 0x3e000000, 0x8000, I5_Rs_Rs_I5_OP5, s7_do_ceinst}, + {"clz", 0x3800000d, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"cmpteq.c", 0x00000019, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"cmptmi.c", 0x00100019, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"cmp.c", 0x00300019, 0x3ff003ff, 0x2003, x_Rs_Rs, s7_do_rsrs}, + {"cmpzteq.c", 0x0000001b, 0x3ff07fff, 0x8000, x_Rs_x, s7_do_rs}, + {"cmpztmi.c", 0x0010001b, 0x3ff07fff, 0x8000, x_Rs_x, s7_do_rs}, + {"cmpz.c", 0x0030001b, 0x3ff07fff, 0x8000, x_Rs_x, s7_do_rs}, + {"cmpi.c", 0x02040001, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_rdsi16}, + {"cmp!", 0x2003, 0x700f, 0x00300019, Rd_Rs, s7_do16_rdrs}, + {"cop1", 0x0c00000c, 0x3e00001f, 0x8000, Rd_Rs_Rs_imm, s7_do_crdcrscrsimm5}, + {"cop2", 0x0c000014, 0x3e00001f, 0x8000, Rd_Rs_Rs_imm, s7_do_crdcrscrsimm5}, + {"cop3", 0x0c00001c, 0x3e00001f, 0x8000, Rd_Rs_Rs_imm, s7_do_crdcrscrsimm5}, + {"drte", 0x0c0000a4, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty}, + {"extsb", 0x00000058, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"extsb.c", 0x00000059, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"extsh", 0x0000005a, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"extsh.c", 0x0000005b, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"extzb", 0x0000005c, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"extzb.c", 0x0000005d, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"extzh", 0x0000005e, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"extzh.c", 0x0000005f, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"jl", 0x04000001, 0x3e000001, 0x8000, PC_DISP24div2, s7_do_jump}, + {"jl!", 0x3001, 0x7001, 0x04000001, PC_DISP11div2, s7_do16_jump}, + {"j!", 0x3000, 0x7001, 0x04000000, PC_DISP11div2, s7_do16_jump}, + {"j", 0x04000000, 0x3e000001, 0x8000, PC_DISP24div2, s7_do_jump}, + {"lbu!", 0x200b, 0x0000700f, 0x2c000000, Rd_rvalueRs, s7_do16_ldst_insn}, + {"lbup!", 0x7003, 0x7007, 0x2c000000, Rd_rvalueBP_I5, s7_do16_ldst_imm_insn}, + {"alw", 0x0000000c, 0x3e0003ff, 0x8000, Rd_rvalue32Rs, s7_do_ldst_atomic}, + {"lcb", 0x00000060, 0x3e0003ff, 0x8000, x_rvalueRs_post4, s7_do_ldst_unalign}, + {"lcw", 0x00000062, 0x3e0003ff, 0x8000, Rd_rvalueRs_post4, s7_do_ldst_unalign}, + {"lce", 0x00000066, 0x3e0003ff, 0x8000, Rd_rvalueRs_post4, s7_do_ldst_unalign}, + {"ldc1", 0x0c00000a, 0x3e00001f, 0x8000, Rd_rvalueRs_SI10, s7_do_ldst_cop}, + {"ldc2", 0x0c000012, 0x3e00001f, 0x8000, Rd_rvalueRs_SI10, s7_do_ldst_cop}, + {"ldc3", 0x0c00001a, 0x3e00001f, 0x8000, Rd_rvalueRs_SI10, s7_do_ldst_cop}, + {"lh!", 0x2009, 0x700f, 0x22000000, Rd_rvalueRs, s7_do16_ldst_insn}, + {"lhp!", 0x7001, 0x7007, 0x22000000, Rd_rvalueBP_I5, s7_do16_ldst_imm_insn}, + {"ldi", 0x020c0000, 0x3e0e0000, 0x5000, Rd_SI16, s7_do_rdsi16}, + {"ldis", 0x0a0c0000, 0x3e0e0000, 0x8000, Rd_I16, s7_do_rdi16}, + {"ldiu!", 0x5000, 0x7000, 0x020c0000, Rd_I8, s7_do16_ldst_imm_insn}, + {"lw!", 0x2008, 0x700f, 0x20000000, Rd_rvalueRs, s7_do16_ldst_insn}, + {"lwp!", 0x7000, 0x7007, 0x20000000, Rd_rvalueBP_I5, s7_do16_ldst_imm_insn}, + {"mfcel", 0x00000448, 0x3e007fff, 0x8000, Rd_x_x, s7_do_rd}, + {"mfcel!", 0x1001, 0x7f0f, 0x00000448, x_Rs, s7_do16_rs}, + {"mad", 0x38000000, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"mad.f!", 0x1004, 0x700f, 0x38000080, Rd_Rs, s7_do16_rdrs}, + {"madh", 0x38000203, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"madh.fs", 0x380002c3, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"madh.fs!", 0x100b, 0x700f, 0x380002c3, Rd_Rs, s7_do16_rdrs}, + {"madl", 0x38000002, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"madl.fs", 0x380000c2, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"madl.fs!", 0x100a, 0x700f, 0x380000c2, Rd_Rs, s7_do16_rdrs}, + {"madu", 0x38000020, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"madu!", 0x1005, 0x700f, 0x38000020, Rd_Rs, s7_do16_rdrs}, + {"mad.f", 0x38000080, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"max", 0x38000007, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"mazh", 0x38000303, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"mazh.f", 0x38000383, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"mazh.f!", 0x1009, 0x700f, 0x38000383, Rd_Rs, s7_do16_rdrs}, + {"mazl", 0x38000102, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"mazl.f", 0x38000182, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"mazl.f!", 0x1008, 0x700f, 0x38000182, Rd_Rs, s7_do16_rdrs}, + {"mfceh", 0x00000848, 0x3e007fff, 0x8000, Rd_x_x, s7_do_rd}, + {"mfceh!", 0x1101, 0x7f0f, 0x00000848, x_Rs, s7_do16_rs}, + {"mfcehl", 0x00000c48, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mfsr", 0x00000050, 0x3e0003ff, 0x8000, Rd_x_I5, s7_do_rdsrs}, + {"mfcr", 0x0c000001, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mfc1", 0x0c000009, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mfc2", 0x0c000011, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mfc3", 0x0c000019, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mfcc1", 0x0c00000f, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mfcc2", 0x0c000017, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mfcc3", 0x0c00001f, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mhfl!", 0x0002, 0x700f, 0x00003c56, Rd_LowRs, s7_do16_hrdrs}, + {"min", 0x38000006, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"mlfh!", 0x0001, 0x700f, 0x00003c56, Rd_HighRs, s7_do16_rdhrs}, + {"msb", 0x38000001, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"msb.f!", 0x1006, 0x700f, 0x38000081, Rd_Rs, s7_do16_rdrs}, + {"msbh", 0x38000205, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"msbh.fs", 0x380002c5, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"msbh.fs!", 0x100f, 0x700f, 0x380002c5, Rd_Rs, s7_do16_rdrs}, + {"msbl", 0x38000004, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"msbl.fs", 0x380000c4, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"msbl.fs!", 0x100e, 0x700f, 0x380000c4, Rd_Rs, s7_do16_rdrs}, + {"msbu", 0x38000021, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"msbu!", 0x1007, 0x700f, 0x38000021, Rd_Rs, s7_do16_rdrs}, + {"msb.f", 0x38000081, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"mszh", 0x38000305, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"mszh.f", 0x38000385, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"mszh.f!", 0x100d, 0x700f, 0x38000385, Rd_Rs, s7_do16_rdrs}, + {"mszl", 0x38000104, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"mszl.f", 0x38000184, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs}, + {"mszl.f!", 0x100c, 0x700f, 0x38000184, Rd_Rs, s7_do16_rdrs}, + {"mtcel!", 0x1000, 0x7f0f, 0x0000044a, x_Rs, s7_do16_rs}, + {"mtcel", 0x0000044a, 0x3e007fff, 0x8000, Rd_x_x, s7_do_rd}, + {"mtceh", 0x0000084a, 0x3e007fff, 0x8000, Rd_x_x, s7_do_rd}, + {"mtceh!", 0x1100, 0x7f0f, 0x0000084a, x_Rs, s7_do16_rs}, + {"mtcehl", 0x00000c4a, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mtsr", 0x00000052, 0x3e0003ff, 0x8000, x_Rs_I5, s7_do_rdsrs}, + {"mtcr", 0x0c000000, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mtc1", 0x0c000008, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mtc2", 0x0c000010, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mtc3", 0x0c000018, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mtcc1", 0x0c00000e, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mtcc2", 0x0c000016, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mtcc3", 0x0c00001e, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs}, + {"mul.f!", 0x1002, 0x700f, 0x00000041, Rd_Rs, s7_do16_rdrs}, + {"mulu!", 0x1003, 0x700f, 0x00000042, Rd_Rs, s7_do16_rdrs}, + {"mvcs", 0x00000056, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mvcc", 0x00000456, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mvgtu", 0x00000856, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mvleu", 0x00000c56, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mveq", 0x00001056, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mvne", 0x00001456, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mvgt", 0x00001856, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mvle", 0x00001c56, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mvge", 0x00002056, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mvlt", 0x00002456, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mvmi", 0x00002856, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mvpl", 0x00002c56, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mvvs", 0x00003056, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mvvc", 0x00003456, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"mv", 0x00003c56, 0x3e007fff, 0x0003, Rd_Rs_x, s7_do_rdrs}, + {"mv!", 0x0003, 0x700f, 0x00003c56, Rd_Rs, s7_do16_mv_rdrs}, + {"neg", 0x0000001e, 0x3e0003ff, 0x8000, Rd_x_Rs, s7_do_rdxrs}, + {"neg.c", 0x0000001f, 0x3e0003ff, 0x2002, Rd_x_Rs, s7_do_rdxrs}, + {"neg!", 0x2002, 0x700f, 0x0000001f, Rd_Rs, s7_do16_rdrs}, + {"nop", 0x00000000, 0x3e0003ff, 0x0000, NO_OPD, s7_do_empty}, + {"not", 0x00000024, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs}, + {"not.c", 0x00000025, 0x3e0003ff, 0x2006, Rd_Rs_x, s7_do_rdrs}, + {"nop!", 0x0000, 0x700f, 0x00000000, NO16_OPD, s7_do_empty}, + {"not!", 0x2006, 0x700f, 0x00000025, Rd_Rs, s7_do16_rdrs}, + {"or", 0x00000022, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"or.c", 0x00000023, 0x3e0003ff, 0x2005, Rd_Rs_Rs, s7_do_rdrsrs}, + {"ori", 0x020a0000, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16}, + {"ori.c", 0x020a0001, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16}, + {"oris", 0x0a0a0000, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16}, + {"oris.c", 0x0a0a0001, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16}, + {"orri", 0x1a000000, 0x3e000001, 0x8000, Rd_Rs_I14, s7_do_rdrsi14}, + {"orri.c", 0x1a000001, 0x3e000001, 0x8000, Rd_Rs_I14, s7_do_rdrsi14}, + {"or!", 0x2005, 0x700f, 0x00000023, Rd_Rs, s7_do16_rdrs}, + {"pflush", 0x0000000a, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty}, + {"pop!", 0x200a, 0x700f, 0x0e000000, Rd_rvalueRs, s7_do16_push_pop}, + {"push!", 0x200e, 0x700f, 0x06000004, Rd_lvalueRs, s7_do16_push_pop}, + {"ror", 0x00000038, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"ror.c", 0x00000039, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"rorc.c", 0x0000003b, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"rol", 0x0000003c, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"rol.c", 0x0000003d, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"rolc.c", 0x0000003f, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"rori", 0x00000078, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5}, + {"rori.c", 0x00000079, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5}, + {"roric.c", 0x0000007b, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5}, + {"roli", 0x0000007c, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5}, + {"roli.c", 0x0000007d, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5}, + {"rolic.c", 0x0000007f, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5}, + {"rte", 0x0c000084, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty}, + {"sb!", 0x200f, 0x700f, 0x2e000000, Rd_lvalueRs, s7_do16_ldst_insn}, + {"sbp!", 0x7007, 0x7007, 0x2e000000, Rd_lvalueBP_I5, s7_do16_ldst_imm_insn}, + {"asw", 0x0000000e, 0x3e0003ff, 0x8000, Rd_lvalue32Rs, s7_do_ldst_atomic}, + {"scb", 0x00000068, 0x3e0003ff, 0x8000, Rd_lvalueRs_post4, s7_do_ldst_unalign}, + {"scw", 0x0000006a, 0x3e0003ff, 0x8000, Rd_lvalueRs_post4, s7_do_ldst_unalign}, + {"sce", 0x0000006e, 0x3e0003ff, 0x8000, x_lvalueRs_post4, s7_do_ldst_unalign}, + {"sdbbp", 0x00000006, 0x3e0003ff, 0x6002, x_I5_x, s7_do_xi5x}, + {"sdbbp!", 0x6002, 0x7007, 0x00000006, Rd_I5, s7_do16_xi5}, + {"sh!", 0x200d, 0x700f, 0x2a000000, Rd_lvalueRs, s7_do16_ldst_insn}, + {"shp!", 0x7005, 0x7007, 0x2a000000, Rd_lvalueBP_I5, s7_do16_ldst_imm_insn}, + {"sleep", 0x0c0000c4, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty}, + {"sll", 0x00000030, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"sll.c", 0x00000031, 0x3e0003ff, 0x0008, Rd_Rs_Rs, s7_do_rdrsrs}, + {"sll.s", 0x3800004e, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"slli", 0x00000070, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5}, + {"slli.c", 0x00000071, 0x3e0003ff, 0x6001, Rd_Rs_I5, s7_do_rdrsi5}, + {"sll!", 0x0008, 0x700f, 0x00000031, Rd_Rs, s7_do16_rdrs}, + {"slli!", 0x6001, 0x7007, 0x00000071, Rd_I5, s7_do16_rdi5}, + {"srl", 0x00000034, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"srl.c", 0x00000035, 0x3e0003ff, 0x000a, Rd_Rs_Rs, s7_do_rdrsrs}, + {"sra", 0x00000036, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"sra.c", 0x00000037, 0x3e0003ff, 0x000b, Rd_Rs_Rs, s7_do_rdrsrs}, + {"srli", 0x00000074, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5}, + {"srli.c", 0x00000075, 0x3e0003ff, 0x6003, Rd_Rs_I5, s7_do_rdrsi5}, + {"srai", 0x00000076, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5}, + {"srai.c", 0x00000077, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5}, + {"srl!", 0x000a, 0x700f, 0x00000035, Rd_Rs, s7_do16_rdrs}, + {"sra!", 0x000b, 0x700f, 0x00000037, Rd_Rs, s7_do16_rdrs}, + {"srli!", 0x6003, 0x7007, 0x00000075, Rd_Rs, s7_do16_rdi5}, + {"stc1", 0x0c00000b, 0x3e00001f, 0x8000, Rd_lvalueRs_SI10, s7_do_ldst_cop}, + {"stc2", 0x0c000013, 0x3e00001f, 0x8000, Rd_lvalueRs_SI10, s7_do_ldst_cop}, + {"stc3", 0x0c00001b, 0x3e00001f, 0x8000, Rd_lvalueRs_SI10, s7_do_ldst_cop}, + {"sub", 0x00000014, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"sub.c", 0x00000015, 0x3e0003ff, 0x2001, Rd_Rs_Rs, s7_do_rdrsrs}, + {"sub.s", 0x38000049, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"subc", 0x00000016, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"subc.c", 0x00000017, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"sub!", 0x2001, 0x700f, 0x00000015, Rd_Rs, s7_do16_rdrs}, + {"subei!", 0x6080, 0x7087, 0x02000001, Rd_I4, s7_do16_rdi4}, + {"sw!", 0x200c, 0x700f, 0x28000000, Rd_lvalueRs, s7_do16_ldst_insn}, + {"swp!", 0x7004, 0x7007, 0x28000000, Rd_lvalueBP_I5, s7_do16_ldst_imm_insn}, + {"syscall", 0x00000002, 0x3e0003ff, 0x8000, I15, s7_do_i15}, + {"tcs", 0x00000054, 0x3e007fff, 0x0005, NO_OPD, s7_do_empty}, + {"tcc", 0x00000454, 0x3e007fff, 0x0105, NO_OPD, s7_do_empty}, + {"tcnz", 0x00003854, 0x3e007fff, 0x0e05, NO_OPD, s7_do_empty}, + {"tcs!", 0x0005, 0x7f0f, 0x00000054, NO16_OPD, s7_do_empty}, + {"tcc!", 0x0105, 0x7f0f, 0x00000454, NO16_OPD, s7_do_empty}, + {"tcnz!", 0x0e05, 0x7f0f, 0x00003854, NO16_OPD, s7_do_empty}, + {"teq", 0x00001054, 0x3e007fff, 0x0405, NO_OPD, s7_do_empty}, + {"teq!", 0x0405, 0x7f0f, 0x00001054, NO16_OPD, s7_do_empty}, + {"tgtu", 0x00000854, 0x3e007fff, 0x0205, NO_OPD, s7_do_empty}, + {"tgt", 0x00001854, 0x3e007fff, 0x0605, NO_OPD, s7_do_empty}, + {"tge", 0x00002054, 0x3e007fff, 0x0805, NO_OPD, s7_do_empty}, + {"tgtu!", 0x0205, 0x7f0f, 0x00000854, NO16_OPD, s7_do_empty}, + {"tgt!", 0x0605, 0x7f0f, 0x00001854, NO16_OPD, s7_do_empty}, + {"tge!", 0x0805, 0x7f0f, 0x00002054, NO16_OPD, s7_do_empty}, + {"tleu", 0x00000c54, 0x3e007fff, 0x0305, NO_OPD, s7_do_empty}, + {"tle", 0x00001c54, 0x3e007fff, 0x0705, NO_OPD, s7_do_empty}, + {"tlt", 0x00002454, 0x3e007fff, 0x0905, NO_OPD, s7_do_empty}, + {"stlb", 0x0c000004, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty}, + {"mftlb", 0x0c000024, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty}, + {"mtptlb", 0x0c000044, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty}, + {"mtrtlb", 0x0c000064, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty}, + {"tleu!", 0x0305, 0x7f0f, 0x00000c54, NO16_OPD, s7_do_empty}, + {"tle!", 0x0705, 0x7f0f, 0x00001c54, NO16_OPD, s7_do_empty}, + {"tlt!", 0x0905, 0x7f0f, 0x00002454, NO16_OPD, s7_do_empty}, + {"tmi", 0x00002854, 0x3e007fff, 0x0a05, NO_OPD, s7_do_empty}, + {"tmi!", 0x0a05, 0x7f0f, 0x00002854, NO16_OPD, s7_do_empty}, + {"tne", 0x00001454, 0x3e007fff, 0x0505, NO_OPD, s7_do_empty}, + {"tne!", 0x0505, 0x7f0f, 0x00001454, NO16_OPD, s7_do_empty}, + {"tpl", 0x00002c54, 0x3e007fff, 0x0b05, NO_OPD, s7_do_empty}, + {"tpl!", 0x0b05, 0x7f0f, 0x00002c54, NO16_OPD, s7_do_empty}, + {"trapcs", 0x00000004, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"trapcc", 0x00000404, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"trapgtu", 0x00000804, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"trapleu", 0x00000c04, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"trapeq", 0x00001004, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"trapne", 0x00001404, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"trapgt", 0x00001804, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"traple", 0x00001c04, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"trapge", 0x00002004, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"traplt", 0x00002404, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"trapmi", 0x00002804, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"trappl", 0x00002c04, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"trapvs", 0x00003004, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"trapvc", 0x00003404, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"trap", 0x00003c04, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x}, + {"tset", 0x00003c54, 0x3e007fff, 0x0f05, NO_OPD, s7_do_empty}, + {"tset!", 0x0f05, 0x00007f0f, 0x00003c54, NO16_OPD, s7_do_empty}, + {"tvs", 0x00003054, 0x3e007fff, 0x0c05, NO_OPD, s7_do_empty}, + {"tvc", 0x00003454, 0x3e007fff, 0x0d05, NO_OPD, s7_do_empty}, + {"tvs!", 0x0c05, 0x7f0f, 0x00003054, NO16_OPD, s7_do_empty}, + {"tvc!", 0x0d05, 0x7f0f, 0x00003454, NO16_OPD, s7_do_empty}, + {"xor", 0x00000026, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs}, + {"xor.c", 0x00000027, 0x3e0003ff, 0x2007, Rd_Rs_Rs, s7_do_rdrsrs}, + {"xor!", 0x2007, 0x700f, 0x00000027, Rd_Rs, s7_do16_rdrs}, + /* Macro instruction. */ + {"li", 0x020c0000, 0x3e0e0000, 0x8000, Insn_Type_SYN, s7_do_macro_li_rdi32}, + /* la reg, imm32 -->(1) ldi reg, simm16 + (2) ldis reg, %HI(imm32) + ori reg, %LO(imm32) + + la reg, symbol -->(1) lis reg, %HI(imm32) + ori reg, %LO(imm32) */ + {"la", 0x020c0000, 0x3e0e0000, 0x8000, Insn_Type_SYN, s7_do_macro_la_rdi32}, + {"div", 0x00000044, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs}, + {"divu", 0x00000046, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs}, + {"rem", 0x00000044, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs}, + {"remu", 0x00000046, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs}, + {"mul", 0x00000040, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs}, + {"mulu", 0x00000042, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs}, + {"maz", 0x00000040, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs}, + {"mazu", 0x00000042, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs}, + {"mul.f", 0x00000041, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs}, + {"maz.f", 0x00000041, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs}, + {"lb", INSN_LB, 0x00000000, 0x8000, Insn_Type_SYN, s7_do_macro_ldst_label}, + {"lbu", INSN_LBU, 0x00000000, 0x200b, Insn_Type_SYN, s7_do_macro_ldst_label}, + {"lh", INSN_LH, 0x00000000, 0x2009, Insn_Type_SYN, s7_do_macro_ldst_label}, + {"lhu", INSN_LHU, 0x00000000, 0x8000, Insn_Type_SYN, s7_do_macro_ldst_label}, + {"lw", INSN_LW, 0x00000000, 0x2008, Insn_Type_SYN, s7_do_macro_ldst_label}, + {"sb", INSN_SB, 0x00000000, 0x200f, Insn_Type_SYN, s7_do_macro_ldst_label}, + {"sh", INSN_SH, 0x00000000, 0x200d, Insn_Type_SYN, s7_do_macro_ldst_label}, + {"sw", INSN_SW, 0x00000000, 0x200c, Insn_Type_SYN, s7_do_macro_ldst_label}, + /* Assembler use internal. */ + {"ld_i32hi", 0x0a0c0000, 0x3e0e0000, 0x8000, Insn_internal, s7_do_macro_rdi32hi}, + {"ld_i32lo", 0x020a0000, 0x3e0e0001, 0x8000, Insn_internal, s7_do_macro_rdi32lo}, + {"ldis_pic", 0x0a0c0000, 0x3e0e0000, 0x5000, Insn_internal, s7_do_rdi16_pic}, + {"addi_s_pic",0x02000000, 0x3e0e0001, 0x8000, Insn_internal, s7_do_addi_s_pic}, + {"addi_u_pic",0x02000000, 0x3e0e0001, 0x8000, Insn_internal, s7_do_addi_u_pic}, + {"lw_pic", 0x20000000, 0x3e000000, 0x8000, Insn_internal, s7_do_lw_pic}, +}; + +#define s7_SCORE5_PIPELINE 5 +#define s7_SCORE7_PIPELINE 7 + +static int s7_university_version = 0; +static int s7_vector_size = s7_SCORE7_PIPELINE; +static struct s7_score_it s7_dependency_vector[s7_SCORE7_PIPELINE]; + +static int s7_score7d = 1; + + + +static int +s7_end_of_line (char *str) +{ + int retval = s7_SUCCESS; + + s7_skip_whitespace (str); + if (*str != '\0') + { + retval = (int) s7_FAIL; + + if (!s7_inst.error) + s7_inst.error = s7_BAD_GARBAGE; + } + + return retval; +} + +static int +s7_score_reg_parse (char **ccp, struct hash_control *htab) +{ + char *start = *ccp; + char c; + char *p; + struct s7_reg_entry *reg; + + p = start; + if (!ISALPHA (*p) || !is_name_beginner (*p)) + return (int) s7_FAIL; + + c = *p++; + + while (ISALPHA (c) || ISDIGIT (c) || c == '_') + c = *p++; + + *--p = 0; + reg = (struct s7_reg_entry *) hash_find (htab, start); + *p = c; + + if (reg) + { + *ccp = p; + return reg->number; + } + return (int) s7_FAIL; +} + +/* If shift <= 0, only return reg. */ +static int +s7_reg_required_here (char **str, int shift, enum s7_score_reg_type reg_type) +{ + static char buff[s7_MAX_LITERAL_POOL_SIZE]; + int reg = (int) s7_FAIL; + char *start = *str; + + if ((reg = s7_score_reg_parse (str, s7_all_reg_maps[reg_type].htab)) != (int) s7_FAIL) + { + if (reg_type == s7_REG_TYPE_SCORE) + { + if ((reg == 1) && (s7_nor1 == 1) && (s7_inst.bwarn == 0)) + { + as_warn (_("Using temp register(r1)")); + s7_inst.bwarn = 1; + } + } + if (shift >= 0) + { + if (reg_type == s7_REG_TYPE_SCORE_CR) + strcpy (s7_inst.reg, s7_score_crn_table[reg].name); + else if (reg_type == s7_REG_TYPE_SCORE_SR) + strcpy (s7_inst.reg, s7_score_srn_table[reg].name); + else + strcpy (s7_inst.reg, ""); + + s7_inst.instruction |= reg << shift; + } + } + else + { + *str = start; + sprintf (buff, _("register expected, not '%.100s'"), start); + s7_inst.error = buff; + } + + return reg; +} + +static int +s7_skip_past_comma (char **str) +{ + char *p = *str; + char c; + int comma = 0; + + while ((c = *p) == ' ' || c == ',') + { + p++; + if (c == ',' && comma++) + { + s7_inst.error = s7_BAD_SKIP_COMMA; + return (int) s7_FAIL; + } + } + + if ((c == '\0') || (comma == 0)) + { + s7_inst.error = s7_BAD_SKIP_COMMA; + return (int) s7_FAIL; + } + + *str = p; + return comma ? s7_SUCCESS : (int) s7_FAIL; +} + +static void +s7_do_rdrsrs (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_reg_required_here (&str, 10, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + { + return; + } + else + { + if ((((s7_inst.instruction >> 15) & 0x10) == 0) + && (((s7_inst.instruction >> 10) & 0x10) == 0) + && (((s7_inst.instruction >> 20) & 0x10) == 0) + && (s7_inst.relax_inst != 0x8000) + && (((s7_inst.instruction >> 20) & 0xf) == ((s7_inst.instruction >> 15) & 0xf))) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0xf) << 4) + | (((s7_inst.instruction >> 15) & 0xf) << 8); + s7_inst.relax_size = 2; + } + else + { + s7_inst.relax_inst = 0x8000; + } + } +} + +static int +s7_walk_no_bignums (symbolS * sp) +{ + if (symbol_get_value_expression (sp)->X_op == O_big) + return 1; + + if (symbol_get_value_expression (sp)->X_add_symbol) + return (s7_walk_no_bignums (symbol_get_value_expression (sp)->X_add_symbol) + || (symbol_get_value_expression (sp)->X_op_symbol + && s7_walk_no_bignums (symbol_get_value_expression (sp)->X_op_symbol))); + + return 0; +} + +static int +s7_my_get_expression (expressionS * ep, char **str) +{ + char *save_in; + segT seg; + + save_in = input_line_pointer; + input_line_pointer = *str; + s7_in_my_get_expression = 1; + seg = expression (ep); + s7_in_my_get_expression = 0; + + if (ep->X_op == O_illegal) + { + *str = input_line_pointer; + input_line_pointer = save_in; + s7_inst.error = _("illegal expression"); + return (int) s7_FAIL; + } + /* Get rid of any bignums now, so that we don't generate an error for which + we can't establish a line number later on. Big numbers are never valid + in instructions, which is where this routine is always called. */ + if (ep->X_op == O_big + || (ep->X_add_symbol + && (s7_walk_no_bignums (ep->X_add_symbol) + || (ep->X_op_symbol && s7_walk_no_bignums (ep->X_op_symbol))))) + { + s7_inst.error = _("invalid constant"); + *str = input_line_pointer; + input_line_pointer = save_in; + return (int) s7_FAIL; + } + + if ((ep->X_add_symbol != NULL) + && (s7_inst.type != PC_DISP19div2) + && (s7_inst.type != PC_DISP8div2) + && (s7_inst.type != PC_DISP24div2) + && (s7_inst.type != PC_DISP11div2) + && (s7_inst.type != Insn_Type_SYN) + && (s7_inst.type != Rd_rvalueRs_SI15) + && (s7_inst.type != Rd_lvalueRs_SI15) + && (s7_inst.type != Insn_internal)) + { + s7_inst.error = s7_BAD_ARGS; + *str = input_line_pointer; + input_line_pointer = save_in; + return (int) s7_FAIL; + } + + *str = input_line_pointer; + input_line_pointer = save_in; + return s7_SUCCESS; +} + +/* Check if an immediate is valid. If so, convert it to the right format. */ + +static bfd_signed_vma +s7_validate_immediate (bfd_signed_vma val, unsigned int data_type, int hex_p) +{ + switch (data_type) + { + case _VALUE_HI16: + { + int val_hi = ((val & 0xffff0000) >> 16); + + if (s7_score_df_range[data_type].range[0] <= val_hi + && val_hi <= s7_score_df_range[data_type].range[1]) + return val_hi; + } + break; + + case _VALUE_LO16: + { + int val_lo = (val & 0xffff); + + if (s7_score_df_range[data_type].range[0] <= val_lo + && val_lo <= s7_score_df_range[data_type].range[1]) + return val_lo; + } + break; + + case _SIMM12: + if (hex_p == 1) + { + if (!(val >= -0x800 && val <= 0xfff)) + { + return (int) s7_FAIL; + } + } + else + { + if (!(val >= -2048 && val <= 2047)) + { + return (int) s7_FAIL; + } + } + + return val; + break; + + case _SIMM14: + if (hex_p == 1) + { + if (!(val >= -0x2000 && val <= 0x3fff)) + { + return (int) s7_FAIL; + } + } + else + { + if (!(val >= -8192 && val <= 8191)) + { + return (int) s7_FAIL; + } + } + + return val; + break; + + case _SIMM15: + if (hex_p == 1) + { + if (!(val >= -0x4000 && val <= 0x7fff)) + { + return (int) s7_FAIL; + } + } + else + { + if (!(val >= -16384 && val <= 16383)) + { + return (int) s7_FAIL; + } + } + + return val; + break; + + case _SIMM16: + if (hex_p == 1) + { + if (!(val >= -0x8000 && val <= 0xffff)) + { + return (int) s7_FAIL; + } + } + else + { + if (!(val >= -32768 && val <= 32767)) + { + return (int) s7_FAIL; + } + } + + return val; + break; + + case _SIMM16_NEG: + if (hex_p == 1) + { + if (!(val >= -0x7fff && val <= 0xffff && val != 0x8000)) + { + return (int) s7_FAIL; + } + } + else + { + if (!(val >= -32767 && val <= 32768)) + { + return (int) s7_FAIL; + } + } + + val = -val; + return val; + break; + + case _IMM32: + if (val >= 0 && val <= 0xffffffff) + { + return val; + } + else + { + return (int) s7_FAIL; + } + + default: + if (data_type == _SIMM14_NEG || data_type == _IMM16_NEG) + val = -val; + + if (s7_score_df_range[data_type].range[0] <= val + && val <= s7_score_df_range[data_type].range[1]) + return val; + + break; + } + + return (int) s7_FAIL; +} + +static int +s7_data_op2 (char **str, int shift, enum score_data_type data_type) +{ + int value; + char data_exp[s7_MAX_LITERAL_POOL_SIZE]; + char *dataptr; + int cnt = 0; + char *pp = NULL; + + s7_skip_whitespace (*str); + s7_inst.error = NULL; + dataptr = * str; + + /* Set hex_p to zero. */ + int hex_p = 0; + + while ((*dataptr != '\0') && (*dataptr != '|') && (cnt <= s7_MAX_LITERAL_POOL_SIZE)) /* 0x7c = ='|' */ + { + data_exp[cnt] = *dataptr; + dataptr++; + cnt++; + } + + data_exp[cnt] = '\0'; + pp = (char *)&data_exp; + + if (*dataptr == '|') /* process PCE */ + { + if (s7_my_get_expression (&s7_inst.reloc.exp, &pp) == (int) s7_FAIL) + return (int) s7_FAIL; + s7_end_of_line (pp); + if (s7_inst.error != 0) + return (int) s7_FAIL; /* to ouptut_inst to printf out the error */ + *str = dataptr; + } + else /* process 16 bit */ + { + if (s7_my_get_expression (&s7_inst.reloc.exp, str) == (int) s7_FAIL) + { + return (int) s7_FAIL; + } + + dataptr = (char *) data_exp; + for (; *dataptr != '\0'; dataptr++) + { + *dataptr = TOLOWER (*dataptr); + if (*dataptr == '!' || *dataptr == ' ') + break; + } + dataptr = (char *) data_exp; + + if ((dataptr != NULL) + && (((strstr (dataptr, "0x")) != NULL) + || ((strstr (dataptr, "0X")) != NULL))) + { + hex_p = 1; + if ((data_type != _SIMM16_LA) + && (data_type != _VALUE_HI16) + && (data_type != _VALUE_LO16) + && (data_type != _IMM16) + && (data_type != _IMM15) + && (data_type != _IMM14) + && (data_type != _IMM4) + && (data_type != _IMM5) + && (data_type != _IMM8) + && (data_type != _IMM5_RSHIFT_1) + && (data_type != _IMM5_RSHIFT_2) + && (data_type != _SIMM14) + && (data_type != _SIMM16) + && (data_type != _SIMM14_NEG) + && (data_type != _SIMM16_NEG) + && (data_type != _IMM10_RSHIFT_2) + && (data_type != _GP_IMM15)) + { + data_type += 24; + } + } + + if ((s7_inst.reloc.exp.X_add_number == 0) + /* for "addi r0,-((((((32*4)+4)+4)+4)+4)&0xf)". */ + && (s7_inst.type != Rd_SI16) + && (s7_inst.type != Insn_Type_SYN) + && (s7_inst.type != Rd_rvalueRs_SI15) + && (s7_inst.type != Rd_lvalueRs_SI15) + && (s7_inst.type != Insn_internal) + && (((*dataptr >= 'a') && (*dataptr <= 'z')) + || ((*dataptr == '0') && (*(dataptr + 1) == 'x') && (*(dataptr + 2) != '0')) + || ((*dataptr == '+') && (*(dataptr + 1) != '0')) + || ((*dataptr == '-') && (*(dataptr + 1) != '0')))) + { + s7_inst.error = s7_BAD_ARGS; + return (int) s7_FAIL; + } + } + + if ((s7_inst.reloc.exp.X_add_symbol) + && ((data_type == _SIMM16) + || (data_type == _SIMM16_NEG) + || (data_type == _IMM16_NEG) + || (data_type == _SIMM14) + || (data_type == _SIMM14_NEG) + || (data_type == _IMM5) + || (data_type == _IMM14) + || (data_type == _IMM20) + || (data_type == _IMM16) + || (data_type == _IMM15) + || (data_type == _IMM4))) + { + s7_inst.error = s7_BAD_ARGS; + return (int) s7_FAIL; + } + + if (s7_inst.reloc.exp.X_add_symbol) + { + switch (data_type) + { + case _SIMM16_LA: + return (int) s7_FAIL; + case _VALUE_HI16: + s7_inst.reloc.type = BFD_RELOC_HI16_S; + s7_inst.reloc.pc_rel = 0; + break; + case _VALUE_LO16: + s7_inst.reloc.type = BFD_RELOC_LO16; + s7_inst.reloc.pc_rel = 0; + break; + case _GP_IMM15: + s7_inst.reloc.type = BFD_RELOC_SCORE_GPREL15; + s7_inst.reloc.pc_rel = 0; + break; + case _SIMM16_pic: + case _IMM16_LO16_pic: + s7_inst.reloc.type = BFD_RELOC_SCORE_GOT_LO16; + s7_inst.reloc.pc_rel = 0; + break; + default: + s7_inst.reloc.type = BFD_RELOC_32; + s7_inst.reloc.pc_rel = 0; + break; + } + } + else + { + if (data_type == _IMM16_pic) + { + s7_inst.reloc.type = BFD_RELOC_SCORE_DUMMY_HI16; + s7_inst.reloc.pc_rel = 0; + } + + if (data_type == _SIMM16_LA && s7_inst.reloc.exp.X_unsigned == 1) + { + value = s7_validate_immediate (s7_inst.reloc.exp.X_add_number, _SIMM16_LA_POS, hex_p); + if (value == (int) s7_FAIL) /* for advance to check if this is ldis */ + if ((s7_inst.reloc.exp.X_add_number & 0xffff) == 0) + { + s7_inst.instruction |= 0x8000000; + s7_inst.instruction |= ((s7_inst.reloc.exp.X_add_number >> 16) << 1) & 0x1fffe; + return s7_SUCCESS; + } + } + else + { + value = s7_validate_immediate (s7_inst.reloc.exp.X_add_number, data_type, hex_p); + } + + if (value == (int) s7_FAIL) + { + if ((data_type != _SIMM14_NEG) && (data_type != _SIMM16_NEG) && (data_type != _IMM16_NEG)) + { + sprintf (s7_err_msg, + _("invalid constant: %d bit expression not in range %d..%d"), + s7_score_df_range[data_type].bits, + s7_score_df_range[data_type].range[0], s7_score_df_range[data_type].range[1]); + } + else + { + sprintf (s7_err_msg, + _("invalid constant: %d bit expression not in range %d..%d"), + s7_score_df_range[data_type].bits, + -s7_score_df_range[data_type].range[1], -s7_score_df_range[data_type].range[0]); + } + + s7_inst.error = s7_err_msg; + return (int) s7_FAIL; + } + + if ((s7_score_df_range[data_type].range[0] != 0) || (data_type == _IMM5_RANGE_8_31)) + { + value &= (1 << s7_score_df_range[data_type].bits) - 1; + } + + s7_inst.instruction |= value << shift; + } + + if ((s7_inst.instruction & 0x3e000000) == 0x30000000) + { + if ((((s7_inst.instruction >> 20) & 0x1F) != 0) + && (((s7_inst.instruction >> 20) & 0x1F) != 1) + && (((s7_inst.instruction >> 20) & 0x1F) != 2) + && (((s7_inst.instruction >> 20) & 0x1F) != 3) + && (((s7_inst.instruction >> 20) & 0x1F) != 4) + && (((s7_inst.instruction >> 20) & 0x1F) != 8) + && (((s7_inst.instruction >> 20) & 0x1F) != 9) + && (((s7_inst.instruction >> 20) & 0x1F) != 0xa) + && (((s7_inst.instruction >> 20) & 0x1F) != 0xb) + && (((s7_inst.instruction >> 20) & 0x1F) != 0xc) + && (((s7_inst.instruction >> 20) & 0x1F) != 0xd) + && (((s7_inst.instruction >> 20) & 0x1F) != 0xe) + && (((s7_inst.instruction >> 20) & 0x1F) != 0x10) + && (((s7_inst.instruction >> 20) & 0x1F) != 0x11) + && (((s7_inst.instruction >> 20) & 0x1F) != 0x18) + && (((s7_inst.instruction >> 20) & 0x1F) != 0x1A) + && (((s7_inst.instruction >> 20) & 0x1F) != 0x1B) + && (((s7_inst.instruction >> 20) & 0x1F) != 0x1d) + && (((s7_inst.instruction >> 20) & 0x1F) != 0x1e) + && (((s7_inst.instruction >> 20) & 0x1F) != 0x1f)) + { + s7_inst.error = _("invalid constant: bit expression not defined"); + return (int) s7_FAIL; + } + } + + return s7_SUCCESS; +} + +/* Handle addi/addi.c/addis.c/cmpi.c/addis.c/ldi. */ + +static void +s7_do_rdsi16 (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_data_op2 (&str, 1, _SIMM16) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + return; + + /* ldi. */ + if ((s7_inst.instruction & 0x20c0000) == 0x20c0000) + { + if ((((s7_inst.instruction >> 20) & 0x10) == 0x10) || ((s7_inst.instruction & 0x1fe00) != 0)) + { + s7_inst.relax_inst = 0x8000; + } + else + { + s7_inst.relax_inst |= (s7_inst.instruction >> 1) & 0xff; + s7_inst.relax_inst |= (((s7_inst.instruction >> 20) & 0xf) << 8); + s7_inst.relax_size = 2; + } + } + else if (((s7_inst.instruction >> 20) & 0x10) == 0x10) + { + s7_inst.relax_inst = 0x8000; + } +} + +/* Handle subi/subi.c. */ + +static void +s7_do_sub_rdsi16 (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL + && s7_data_op2 (&str, 1, _SIMM16_NEG) != (int) s7_FAIL) + s7_end_of_line (str); +} + + +/* Handle addri/addri.c. */ + +static void +s7_do_rdrssi14 (char *str) /* -(2^13)~((2^13)-1) */ +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL + && s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL) + s7_data_op2 (&str, 1, _SIMM14); +} + +/* Handle subri.c/subri. */ + +static void +s7_do_sub_rdrssi14 (char *str) /* -(2^13)~((2^13)-1) */ +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL + && s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL + && s7_data_op2 (&str, 1, _SIMM14_NEG) != (int) s7_FAIL) + s7_end_of_line (str); +} + +/* Handle bitclr.c/bitset.c/bittgl.c/slli.c/srai.c/srli.c/roli.c/rori.c/rolic.c. */ + +static void +s7_do_rdrsi5 (char *str) /* 0~((2^14)-1) */ +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_data_op2 (&str, 10, _IMM5) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + return; + + if ((((s7_inst.instruction >> 20) & 0x1f) == ((s7_inst.instruction >> 15) & 0x1f)) + && (s7_inst.relax_inst != 0x8000) && (((s7_inst.instruction >> 15) & 0x10) == 0)) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0x1f) << 3) | (((s7_inst.instruction >> 15) & 0xf) << 8); + s7_inst.relax_size = 2; + } + else + s7_inst.relax_inst = 0x8000; +} + +/* Handle andri/orri/andri.c/orri.c. */ + +static void +s7_do_rdrsi14 (char *str) /* 0 ~ ((2^14)-1) */ +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL + && s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL + && s7_data_op2 (&str, 1, _IMM14) != (int) s7_FAIL) + s7_end_of_line (str); +} + +/* Handle bittst.c. */ + +static void +s7_do_xrsi5 (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_data_op2 (&str, 10, _IMM5) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + return; + + if ((s7_inst.relax_inst != 0x8000) && (((s7_inst.instruction >> 15) & 0x10) == 0)) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0x1f) << 3) | (((s7_inst.instruction >> 15) & 0xf) << 8); + s7_inst.relax_size = 2; + } + else + s7_inst.relax_inst = 0x8000; +} + +/* Handle addis/andi/ori/andis/oris/ldis. */ + +static void +s7_do_rdi16 (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_data_op2 (&str, 1, _IMM16) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + return; +} + +static void +s7_do_macro_rdi32hi (char *str) +{ + s7_skip_whitespace (str); + + /* Do not handle s7_end_of_line(). */ + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL) + s7_data_op2 (&str, 1, _VALUE_HI16); +} + +static void +s7_do_macro_rdi32lo (char *str) +{ + s7_skip_whitespace (str); + + /* Do not handle s7_end_of_line(). */ + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL) + s7_data_op2 (&str, 1, _VALUE_LO16); +} + +/* Handle ldis_pic. */ + +static void +s7_do_rdi16_pic (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL + && s7_data_op2 (&str, 1, _IMM16_pic) != (int) s7_FAIL) + s7_end_of_line (str); +} + +/* Handle addi_s_pic to generate R_SCORE_GOT_LO16 . */ + +static void +s7_do_addi_s_pic (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL + && s7_data_op2 (&str, 1, _SIMM16_pic) != (int) s7_FAIL) + s7_end_of_line (str); +} + +/* Handle addi_u_pic to generate R_SCORE_GOT_LO16 . */ + +static void +s7_do_addi_u_pic (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL + && s7_data_op2 (&str, 1, _IMM16_LO16_pic) != (int) s7_FAIL) + s7_end_of_line (str); +} + +/* Handle mfceh/mfcel/mtceh/mtchl. */ + +static void +s7_do_rd (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL) + s7_end_of_line (str); +} + +static void +s7_do_rs (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + return; + + if ((s7_inst.relax_inst != 0x8000) && (((s7_inst.instruction >> 15) & 0x10) == 0)) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0xf) << 8) | (((s7_inst.instruction >> 15) & 0xf) << 4); + s7_inst.relax_size = 2; + } + else + s7_inst.relax_inst = 0x8000; +} + +static void +s7_do_i15 (char *str) +{ + s7_skip_whitespace (str); + + if (s7_data_op2 (&str, 10, _IMM15) != (int) s7_FAIL) + s7_end_of_line (str); +} + +static void +s7_do_xi5x (char *str) +{ + s7_skip_whitespace (str); + + if (s7_data_op2 (&str, 15, _IMM5) == (int) s7_FAIL || s7_end_of_line (str) == (int) s7_FAIL) + return; + + if (s7_inst.relax_inst != 0x8000) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 15) & 0x1f) << 3); + s7_inst.relax_size = 2; + } +} + +static void +s7_do_rdrs (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + return; + + if (s7_inst.relax_inst != 0x8000) + { + if (((s7_inst.instruction & 0x7f) == 0x56)) /* adjust mv -> mv! / mlfh! / mhfl! */ + { + /* mlfh */ + if ((((s7_inst.instruction >> 15) & 0x10) != 0x0) && (((s7_inst.instruction >> 20) & 0x10) == 0)) + { + s7_inst.relax_inst = 0x00000001 | (((s7_inst.instruction >> 15) & 0xf) << 4) + | (((s7_inst.instruction >> 20) & 0xf) << 8); + s7_inst.relax_size = 2; + } + /* mhfl */ + else if ((((s7_inst.instruction >> 15) & 0x10) == 0x0) && ((s7_inst.instruction >> 20) & 0x10) != 0) + { + s7_inst.relax_inst = 0x00000002 | (((s7_inst.instruction >> 15) & 0xf) << 4) + | (((s7_inst.instruction >> 20) & 0xf) << 8); + s7_inst.relax_size = 2; + } + else if ((((s7_inst.instruction >> 15) & 0x10) == 0x0) && (((s7_inst.instruction >> 20) & 0x10) == 0)) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 15) & 0xf) << 4) + | (((s7_inst.instruction >> 20) & 0xf) << 8); + s7_inst.relax_size = 2; + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + else if ((((s7_inst.instruction >> 15) & 0x10) == 0x0) && (((s7_inst.instruction >> 20) & 0x10) == 0)) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 15) & 0xf) << 4) + | (((s7_inst.instruction >> 20) & 0xf) << 8); + s7_inst.relax_size = 2; + } + else + { + s7_inst.relax_inst = 0x8000; + } + } +} + +/* Handle mfcr/mtcr. */ +static void +s7_do_rdcrs (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL + && s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE_CR) != (int) s7_FAIL) + s7_end_of_line (str); +} + +/* Handle mfsr/mtsr. */ + +static void +s7_do_rdsrs (char *str) +{ + s7_skip_whitespace (str); + + /* mfsr */ + if ((s7_inst.instruction & 0xff) == 0x50) + { + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL + && s7_reg_required_here (&str, 10, s7_REG_TYPE_SCORE_SR) != (int) s7_FAIL) + s7_end_of_line (str); + } + else + { + if (s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL) + s7_reg_required_here (&str, 10, s7_REG_TYPE_SCORE_SR); + } +} + +/* Handle neg. */ + +static void +s7_do_rdxrs (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_reg_required_here (&str, 10, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + return; + + if ((s7_inst.relax_inst != 0x8000) && (((s7_inst.instruction >> 10) & 0x10) == 0) + && (((s7_inst.instruction >> 20) & 0x10) == 0)) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0xf) << 4) | (((s7_inst.instruction >> 20) & 0xf) << 8); + s7_inst.relax_size = 2; + } + else + s7_inst.relax_inst = 0x8000; +} + +/* Handle cmp.c/cmp<cond>. */ +static void +s7_do_rsrs (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_reg_required_here (&str, 10, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + return; + + if ((s7_inst.relax_inst != 0x8000) && (((s7_inst.instruction >> 20) & 0x1f) == 3) + && (((s7_inst.instruction >> 10) & 0x10) == 0) && (((s7_inst.instruction >> 15) & 0x10) == 0)) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0xf) << 4) | (((s7_inst.instruction >> 15) & 0xf) << 8); + s7_inst.relax_size = 2; + } + else + s7_inst.relax_inst = 0x8000; +} + +static void +s7_do_ceinst (char *str) +{ + char *strbak; + + strbak = str; + s7_skip_whitespace (str); + + if (s7_data_op2 (&str, 20, _IMM5) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_reg_required_here (&str, 10, s7_REG_TYPE_SCORE) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_data_op2 (&str, 5, _IMM5) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_data_op2 (&str, 0, _IMM5) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + { + return; + } + else + { + str = strbak; + if (s7_data_op2 (&str, 0, _IMM25) == (int) s7_FAIL) + return; + } +} + +static int +s7_reglow_required_here (char **str, int shift) +{ + static char buff[s7_MAX_LITERAL_POOL_SIZE]; + int reg; + char *start = *str; + + if ((reg = s7_score_reg_parse (str, s7_all_reg_maps[s7_REG_TYPE_SCORE].htab)) != (int) s7_FAIL) + { + if ((reg == 1) && (s7_nor1 == 1) && (s7_inst.bwarn == 0)) + { + as_warn (_("Using temp register(r1)")); + s7_inst.bwarn = 1; + } + if (reg < 16) + { + if (shift >= 0) + s7_inst.instruction |= reg << shift; + + return reg; + } + } + + /* Restore the start point, we may have got a reg of the wrong class. */ + *str = start; + sprintf (buff, _("low register(r0-r15)expected, not '%.100s'"), start); + s7_inst.error = buff; + return (int) s7_FAIL; +} + +/* Handle addc!/add!/and!/cmp!/neg!/not!/or!/sll!/srl!/sra!/xor!/sub!. */ + +static void +s7_do16_rdrs (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reglow_required_here (&str, 8) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_reglow_required_here (&str, 4) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + { + return; + } + else + { + if ((s7_inst.instruction & 0x700f) == 0x2003) /* cmp! */ + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 15) + | (((s7_inst.instruction >> 4) & 0xf) << 10); + } + else if ((s7_inst.instruction & 0x700f) == 0x2006) /* not! */ + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 20) + | (((s7_inst.instruction >> 4) & 0xf) << 15); + } + else if ((s7_inst.instruction & 0x700f) == 0x1009) /* mazh.f! */ + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 15) + | (((s7_inst.instruction >> 4) & 0xf) << 10); + } + else + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 20) + | (((s7_inst.instruction >> 8) & 0xf) << 15) | (((s7_inst.instruction >> 4) & 0xf) << 10); + } + s7_inst.relax_size = 4; + } +} + +static void +s7_do16_rs (char *str) +{ + int rd = 0; + + s7_skip_whitespace (str); + + if ((rd = s7_reglow_required_here (&str, 4)) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + { + return; + } + else + { + s7_inst.relax_inst |= rd << 20; + s7_inst.relax_size = 4; + } +} + +/* Handle br!/brl!. */ + +static void +s7_do16_xrs (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reglow_required_here (&str, 4) == (int) s7_FAIL || s7_end_of_line (str) == (int) s7_FAIL) + { + return; + } + else + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 10) + | (((s7_inst.instruction >> 4) & 0xf) << 15); + s7_inst.relax_size = 4; + } +} + +static int +s7_reghigh_required_here (char **str, int shift) +{ + static char buff[s7_MAX_LITERAL_POOL_SIZE]; + int reg; + char *start = *str; + + if ((reg = s7_score_reg_parse (str, s7_all_reg_maps[s7_REG_TYPE_SCORE].htab)) != (int) s7_FAIL) + { + if (15 < reg && reg < 32) + { + if (shift >= 0) + s7_inst.instruction |= (reg & 0xf) << shift; + + return reg; + } + } + + *str = start; + sprintf (buff, _("high register(r16-r31)expected, not '%.100s'"), start); + s7_inst.error = buff; + return (int) s7_FAIL; +} + +/* Handle mhfl!. */ + +static void +s7_do16_hrdrs (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reghigh_required_here (&str, 8) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL + && s7_reglow_required_here (&str, 4) != (int) s7_FAIL + && s7_end_of_line (str) != (int) s7_FAIL) + { + s7_inst.relax_inst |= ((((s7_inst.instruction >> 8) & 0xf) | 0x10) << 20) + | (((s7_inst.instruction >> 4) & 0xf) << 15) | (0xf << 10); + s7_inst.relax_size = 4; + } +} + +/* Handle mlfh!. */ + +static void +s7_do16_rdhrs (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reglow_required_here (&str, 8) != (int) s7_FAIL + && s7_skip_past_comma (&str) != (int) s7_FAIL + && s7_reghigh_required_here (&str, 4) != (int) s7_FAIL + && s7_end_of_line (str) != (int) s7_FAIL) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 20) + | ((((s7_inst.instruction >> 4) & 0xf) | 0x10) << 15) | (0xf << 10); + s7_inst.relax_size = 4; + } +} + +/* We need to be able to fix up arbitrary expressions in some statements. + This is so that we can handle symbols that are an arbitrary distance from + the pc. The most common cases are of the form ((+/-sym -/+ . - 8) & mask), + which returns part of an address in a form which will be valid for + a data instruction. We do this by pushing the expression into a symbol + in the expr_section, and creating a fix for that. */ + +static fixS * +s7_fix_new_score (fragS * frag, int where, short int size, expressionS * exp, int pc_rel, int reloc) +{ + fixS *new_fix; + + switch (exp->X_op) + { + case O_constant: + case O_symbol: + case O_add: + case O_subtract: + new_fix = fix_new_exp (frag, where, size, exp, pc_rel, reloc); + break; + default: + new_fix = fix_new (frag, where, size, make_expr_symbol (exp), 0, pc_rel, reloc); + break; + } + return new_fix; +} + +static void +s7_init_dependency_vector (void) +{ + int i; + + for (i = 0; i < s7_vector_size; i++) + memset (&s7_dependency_vector[i], '\0', sizeof (s7_dependency_vector[i])); + + return; +} + +static enum s7_insn_type_for_dependency +s7_dependency_type_from_insn (char *insn_name) +{ + char name[s7_INSN_NAME_LEN]; + const struct s7_insn_to_dependency *tmp; + + strcpy (name, insn_name); + tmp = (const struct s7_insn_to_dependency *) hash_find (s7_dependency_insn_hsh, name); + + if (tmp) + return tmp->type; + + return s7_D_all_insn; +} + +static int +s7_check_dependency (char *pre_insn, char *pre_reg, + char *cur_insn, char *cur_reg, int *warn_or_error) +{ + int bubbles = 0; + unsigned int i; + enum s7_insn_type_for_dependency pre_insn_type; + enum s7_insn_type_for_dependency cur_insn_type; + + pre_insn_type = s7_dependency_type_from_insn (pre_insn); + cur_insn_type = s7_dependency_type_from_insn (cur_insn); + + for (i = 0; i < sizeof (s7_data_dependency_table) / sizeof (s7_data_dependency_table[0]); i++) + { + if ((pre_insn_type == s7_data_dependency_table[i].pre_insn_type) + && (s7_D_all_insn == s7_data_dependency_table[i].cur_insn_type + || cur_insn_type == s7_data_dependency_table[i].cur_insn_type) + && (strcmp (s7_data_dependency_table[i].pre_reg, "") == 0 + || strcmp (s7_data_dependency_table[i].pre_reg, pre_reg) == 0) + && (strcmp (s7_data_dependency_table[i].cur_reg, "") == 0 + || strcmp (s7_data_dependency_table[i].cur_reg, cur_reg) == 0)) + { + if (s7_vector_size == s7_SCORE5_PIPELINE) + bubbles = s7_data_dependency_table[i].bubblenum_5; + else + bubbles = s7_data_dependency_table[i].bubblenum_7; + *warn_or_error = s7_data_dependency_table[i].warn_or_error; + break; + } + } + + return bubbles; +} + +/* Turn an integer of n bytes (in val) into a stream of bytes appropriate + for use in the a.out file, and stores them in the array pointed to by buf. + This knows about the endian-ness of the target machine and does + THE RIGHT THING, whatever it is. Possible values for n are 1 (byte) + 2 (short) and 4 (long) Floating numbers are put out as a series of + LITTLENUMS (shorts, here at least). */ + +static void +s7_number_to_chars (char *buf, valueT val, int n) +{ + if (target_big_endian) + number_to_chars_bigendian (buf, val, n); + else + number_to_chars_littleendian (buf, val, n); +} + +static void +s7_build_one_frag (struct s7_score_it one_inst) +{ + char *p; + int relaxable_p = s7_g_opt; + int relax_size = 0; + + /* Start a new frag if frag_now is not empty. */ + if (frag_now_fix () != 0) + { + if (!frag_now->tc_frag_data.is_insn) + frag_wane (frag_now); + + frag_new (0); + } + frag_grow (20); + + p = frag_more (one_inst.size); + s7_number_to_chars (p, one_inst.instruction, one_inst.size); + +#ifdef OBJ_ELF + dwarf2_emit_insn (one_inst.size); +#endif + + relaxable_p &= (one_inst.relax_size != 0); + relax_size = relaxable_p ? one_inst.relax_size : 0; + + p = frag_var (rs_machine_dependent, relax_size + s7_RELAX_PAD_BYTE, 0, + s7_RELAX_ENCODE (one_inst.size, one_inst.relax_size, + one_inst.type, 0, 0, relaxable_p), + NULL, 0, NULL); + + if (relaxable_p) + s7_number_to_chars (p, one_inst.relax_inst, relax_size); +} + +static void +s7_handle_dependency (struct s7_score_it *theinst) +{ + int i; + int warn_or_error = 0; /* warn - 0; error - 1 */ + int bubbles = 0; + int remainder_bubbles = 0; + char cur_insn[s7_INSN_NAME_LEN]; + char pre_insn[s7_INSN_NAME_LEN]; + struct s7_score_it nop_inst; + struct s7_score_it pflush_inst; + + nop_inst.instruction = 0x0000; + nop_inst.size = 2; + nop_inst.relax_inst = 0x80008000; + nop_inst.relax_size = 4; + nop_inst.type = NO16_OPD; + + pflush_inst.instruction = 0x8000800a; + pflush_inst.size = 4; + pflush_inst.relax_inst = 0x8000; + pflush_inst.relax_size = 0; + pflush_inst.type = NO_OPD; + + /* pflush will clear all data dependency. */ + if (strcmp (theinst->name, "pflush") == 0) + { + s7_init_dependency_vector (); + return; + } + + /* Push current instruction to s7_dependency_vector[0]. */ + for (i = s7_vector_size - 1; i > 0; i--) + memcpy (&s7_dependency_vector[i], &s7_dependency_vector[i - 1], sizeof (s7_dependency_vector[i])); + + memcpy (&s7_dependency_vector[0], theinst, sizeof (s7_dependency_vector[i])); + + /* There is no dependency between nop and any instruction. */ + if (strcmp (s7_dependency_vector[0].name, "nop") == 0 + || strcmp (s7_dependency_vector[0].name, "nop!") == 0) + return; + + /* "pce" is defined in s7_insn_to_dependency_table. */ +#define PCE_NAME "pce" + + if (s7_dependency_vector[0].type == Insn_Type_PCE) + strcpy (cur_insn, PCE_NAME); + else + strcpy (cur_insn, s7_dependency_vector[0].name); + + for (i = 1; i < s7_vector_size; i++) + { + /* The element of s7_dependency_vector is NULL. */ + if (s7_dependency_vector[i].name[0] == '\0') + continue; + + if (s7_dependency_vector[i].type == Insn_Type_PCE) + strcpy (pre_insn, PCE_NAME); + else + strcpy (pre_insn, s7_dependency_vector[i].name); + + bubbles = s7_check_dependency (pre_insn, s7_dependency_vector[i].reg, + cur_insn, s7_dependency_vector[0].reg, &warn_or_error); + remainder_bubbles = bubbles - i + 1; + + if (remainder_bubbles > 0) + { + int j; + + if (s7_fix_data_dependency == 1) + { + if (remainder_bubbles <= 2) + { + if (s7_warn_fix_data_dependency) + as_warn (_("Fix data dependency: %s %s -- %s %s (insert %d nop!/%d)"), + s7_dependency_vector[i].name, s7_dependency_vector[i].reg, + s7_dependency_vector[0].name, s7_dependency_vector[0].reg, + remainder_bubbles, bubbles); + + for (j = (s7_vector_size - 1); (j - remainder_bubbles) > 0; j--) + memcpy (&s7_dependency_vector[j], &s7_dependency_vector[j - remainder_bubbles], + sizeof (s7_dependency_vector[j])); + + for (j = 1; j <= remainder_bubbles; j++) + { + memset (&s7_dependency_vector[j], '\0', sizeof (s7_dependency_vector[j])); + /* Insert nop!. */ + s7_build_one_frag (nop_inst); + } + } + else + { + if (s7_warn_fix_data_dependency) + as_warn (_("Fix data dependency: %s %s -- %s %s (insert 1 pflush/%d)"), + s7_dependency_vector[i].name, s7_dependency_vector[i].reg, + s7_dependency_vector[0].name, s7_dependency_vector[0].reg, + bubbles); + + for (j = 1; j < s7_vector_size; j++) + memset (&s7_dependency_vector[j], '\0', sizeof (s7_dependency_vector[j])); + + /* Insert pflush. */ + s7_build_one_frag (pflush_inst); + } + } + else + { + if (warn_or_error) + { + as_bad (_("data dependency: %s %s -- %s %s (%d/%d bubble)"), + s7_dependency_vector[i].name, s7_dependency_vector[i].reg, + s7_dependency_vector[0].name, s7_dependency_vector[0].reg, + remainder_bubbles, bubbles); + } + else + { + as_warn (_("data dependency: %s %s -- %s %s (%d/%d bubble)"), + s7_dependency_vector[i].name, s7_dependency_vector[i].reg, + s7_dependency_vector[0].name, s7_dependency_vector[0].reg, + remainder_bubbles, bubbles); + } + } + } + } +} + +static enum insn_class +s7_get_insn_class_from_type (enum score_insn_type type) +{ + enum insn_class retval = (int) s7_FAIL; + + switch (type) + { + case Rd_I4: + case Rd_I5: + case Rd_rvalueBP_I5: + case Rd_lvalueBP_I5: + case Rd_I8: + case PC_DISP8div2: + case PC_DISP11div2: + case Rd_Rs: + case Rd_HighRs: + case Rd_lvalueRs: + case Rd_rvalueRs: + case x_Rs: + case Rd_LowRs: + case NO16_OPD: + retval = INSN_CLASS_16; + break; + case Rd_Rs_I5: + case x_Rs_I5: + case x_I5_x: + case Rd_Rs_I14: + case I15: + case Rd_I16: + case Rd_SI16: + case Rd_rvalueRs_SI10: + case Rd_lvalueRs_SI10: + case Rd_rvalueRs_preSI12: + case Rd_rvalueRs_postSI12: + case Rd_lvalueRs_preSI12: + case Rd_lvalueRs_postSI12: + case Rd_Rs_SI14: + case Rd_rvalueRs_SI15: + case Rd_lvalueRs_SI15: + case PC_DISP19div2: + case PC_DISP24div2: + case Rd_Rs_Rs: + case x_Rs_x: + case x_Rs_Rs: + case Rd_Rs_x: + case Rd_x_Rs: + case Rd_x_x: + case OP5_rvalueRs_SI15: + case I5_Rs_Rs_I5_OP5: + case x_rvalueRs_post4: + case Rd_rvalueRs_post4: + case Rd_x_I5: + case Rd_lvalueRs_post4: + case x_lvalueRs_post4: + case Rd_Rs_Rs_imm: + case NO_OPD: + case Rd_lvalue32Rs: + case Rd_rvalue32Rs: + case Insn_GP: + case Insn_PIC: + case Insn_internal: + retval = INSN_CLASS_32; + break; + case Insn_Type_PCE: + retval = INSN_CLASS_PCE; + break; + case Insn_Type_SYN: + retval = INSN_CLASS_SYN; + break; + default: + abort (); + break; + } + return retval; +} + +static unsigned long +s7_adjust_paritybit (unsigned long m_code, enum insn_class class) +{ + unsigned long result = 0; + unsigned long m_code_high = 0; + unsigned long m_code_low = 0; + unsigned long pb_high = 0; + unsigned long pb_low = 0; + + if (class == INSN_CLASS_32) + { + pb_high = 0x80000000; + pb_low = 0x00008000; + } + else if (class == INSN_CLASS_16) + { + pb_high = 0; + pb_low = 0; + } + else if (class == INSN_CLASS_PCE) + { + pb_high = 0; + pb_low = 0x00008000; + } + else if (class == INSN_CLASS_SYN) + { + /* FIXME. at this time, INSN_CLASS_SYN must be 32 bit, but, instruction type should + be changed if macro instruction has been expanded. */ + pb_high = 0x80000000; + pb_low = 0x00008000; + } + else + { + abort (); + } + + m_code_high = m_code & 0x3fff8000; + m_code_low = m_code & 0x00007fff; + result = pb_high | (m_code_high << 1) | pb_low | m_code_low; + return result; + +} + +static void +s7_gen_insn_frag (struct s7_score_it *part_1, struct s7_score_it *part_2) +{ + char *p; + bfd_boolean pce_p = FALSE; + int relaxable_p = s7_g_opt; + int relax_size = 0; + struct s7_score_it *inst1 = part_1; + struct s7_score_it *inst2 = part_2; + struct s7_score_it backup_inst1; + + pce_p = (inst2) ? TRUE : FALSE; + memcpy (&backup_inst1, inst1, sizeof (struct s7_score_it)); + + /* Adjust instruction opcode and to be relaxed instruction opcode. */ + if (pce_p) + { + backup_inst1.instruction = ((backup_inst1.instruction & 0x7FFF) << 15) + | (inst2->instruction & 0x7FFF); + backup_inst1.instruction = s7_adjust_paritybit (backup_inst1.instruction, INSN_CLASS_PCE); + if (!target_big_endian) + { + unsigned long tmp = backup_inst1.instruction; + backup_inst1.instruction = ((tmp & 0xffff) << 16) + | (tmp >> 16); + } + backup_inst1.relax_inst = 0x8000; + backup_inst1.size = s7_INSN_SIZE; + backup_inst1.relax_size = 0; + backup_inst1.type = Insn_Type_PCE; + } + else + { + backup_inst1.instruction = s7_adjust_paritybit (backup_inst1.instruction, + s7_GET_INSN_CLASS (backup_inst1.type)); + } + + if (backup_inst1.relax_size != 0) + { + enum insn_class tmp; + + tmp = (backup_inst1.size == s7_INSN_SIZE) ? INSN_CLASS_16 : INSN_CLASS_32; + backup_inst1.relax_inst = s7_adjust_paritybit (backup_inst1.relax_inst, tmp); + } + + /* Check data dependency. */ + s7_handle_dependency (&backup_inst1); + + /* Start a new frag if frag_now is not empty and is not instruction frag, maybe it contains + data produced by .ascii etc. Doing this is to make one instruction per frag. */ + if (frag_now_fix () != 0) + { + if (!frag_now->tc_frag_data.is_insn) + frag_wane (frag_now); + + frag_new (0); + } + + /* Here, we must call frag_grow in order to keep the instruction frag type is + rs_machine_dependent. + For, frag_var may change frag_now->fr_type to rs_fill by calling frag_grow which + acturally will call frag_wane. + Calling frag_grow first will create a new frag_now which free size is 20 that is enough + for frag_var. */ + frag_grow (20); + + p = frag_more (backup_inst1.size); + s7_number_to_chars (p, backup_inst1.instruction, backup_inst1.size); + +#ifdef OBJ_ELF + dwarf2_emit_insn (backup_inst1.size); +#endif + + /* Generate fixup structure. */ + if (pce_p) + { + if (inst1->reloc.type != BFD_RELOC_NONE) + s7_fix_new_score (frag_now, p - frag_now->fr_literal, + inst1->size, &inst1->reloc.exp, + inst1->reloc.pc_rel, inst1->reloc.type); + + if (inst2->reloc.type != BFD_RELOC_NONE) + s7_fix_new_score (frag_now, p - frag_now->fr_literal + 2, + inst2->size, &inst2->reloc.exp, inst2->reloc.pc_rel, inst2->reloc.type); + } + else + { + if (backup_inst1.reloc.type != BFD_RELOC_NONE) + s7_fix_new_score (frag_now, p - frag_now->fr_literal, + backup_inst1.size, &backup_inst1.reloc.exp, + backup_inst1.reloc.pc_rel, backup_inst1.reloc.type); + } + + /* relax_size may be 2, 4, 12 or 0, 0 indicates no relaxation. */ + relaxable_p &= (backup_inst1.relax_size != 0); + relax_size = relaxable_p ? backup_inst1.relax_size : 0; + + p = frag_var (rs_machine_dependent, relax_size + s7_RELAX_PAD_BYTE, 0, + s7_RELAX_ENCODE (backup_inst1.size, backup_inst1.relax_size, + backup_inst1.type, 0, 0, relaxable_p), + backup_inst1.reloc.exp.X_add_symbol, 0, NULL); + + if (relaxable_p) + s7_number_to_chars (p, backup_inst1.relax_inst, relax_size); + + memcpy (inst1, &backup_inst1, sizeof (struct s7_score_it)); +} + +static void +s7_parse_16_32_inst (char *insnstr, bfd_boolean gen_frag_p) +{ + char c; + char *p; + char *operator = insnstr; + const struct s7_asm_opcode *opcode; + + /* Parse operator and operands. */ + s7_skip_whitespace (operator); + + for (p = operator; *p != '\0'; p++) + if ((*p == ' ') || (*p == '!')) + break; + + if (*p == '!') + p++; + + c = *p; + *p = '\0'; + + opcode = (const struct s7_asm_opcode *) hash_find (s7_score_ops_hsh, operator); + *p = c; + + memset (&s7_inst, '\0', sizeof (s7_inst)); + sprintf (s7_inst.str, "%s", insnstr); + if (opcode) + { + s7_inst.instruction = opcode->value; + s7_inst.relax_inst = opcode->relax_value; + s7_inst.type = opcode->type; + s7_inst.size = s7_GET_INSN_SIZE (s7_inst.type); + s7_inst.relax_size = 0; + s7_inst.bwarn = 0; + sprintf (s7_inst.name, "%s", opcode->template); + strcpy (s7_inst.reg, ""); + s7_inst.error = NULL; + s7_inst.reloc.type = BFD_RELOC_NONE; + + (*opcode->parms) (p); + + /* It indicates current instruction is a macro instruction if s7_inst.bwarn equals -1. */ + if ((s7_inst.bwarn != -1) && (!s7_inst.error) && (gen_frag_p)) + s7_gen_insn_frag (&s7_inst, NULL); + } + else + s7_inst.error = _("unrecognized opcode"); +} + +static int +s7_append_insn (char *str, bfd_boolean gen_frag_p) +{ + int retval = s7_SUCCESS; + + s7_parse_16_32_inst (str, gen_frag_p); + + if (s7_inst.error) + { + retval = (int) s7_FAIL; + as_bad (_("%s -- `%s'"), s7_inst.error, s7_inst.str); + s7_inst.error = NULL; + } + + return retval; +} + +/* Handle mv! reg_high, reg_low; + mv! reg_low, reg_high; + mv! reg_low, reg_low; */ +static void +s7_do16_mv_rdrs (char *str) +{ + int reg_rd; + int reg_rs; + char *backupstr = NULL; + + backupstr = str; + s7_skip_whitespace (str); + + if ((reg_rd = s7_reg_required_here (&str, 8, s7_REG_TYPE_SCORE)) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || (reg_rs = s7_reg_required_here (&str, 4, s7_REG_TYPE_SCORE)) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + { + return; + } + else + { + /* Case 1 : mv! or mlfh!. */ + if (reg_rd < 16) + { + if (reg_rs < 16) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 20) + | (((s7_inst.instruction >> 4) & 0xf) << 15) | (0xf << 10); + s7_inst.relax_size = 4; + } + else + { + char append_str[s7_MAX_LITERAL_POOL_SIZE]; + + sprintf (append_str, "mlfh! %s", backupstr); + if (s7_append_insn (append_str, TRUE) == (int) s7_FAIL) + return; + /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ + s7_inst.bwarn = -1; + } + } + /* Case 2 : mhfl!. */ + else + { + if (reg_rs > 16) + { + s7_SET_INSN_ERROR (s7_BAD_ARGS); + return; + } + else + { + char append_str[s7_MAX_LITERAL_POOL_SIZE]; + + sprintf (append_str, "mhfl! %s", backupstr); + if (s7_append_insn (append_str, TRUE) == (int) s7_FAIL) + return; + + /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ + s7_inst.bwarn = -1; + } + } + } +} + +static void +s7_do16_rdi4 (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reglow_required_here (&str, 8) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_data_op2 (&str, 3, _IMM4) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + { + return; + } + else + { + if (((s7_inst.instruction >> 3) & 0x10) == 0) /* for judge is addei or subei : bit 5 =0 : addei */ + { + if (((s7_inst.instruction >> 3) & 0xf) != 0xf) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 20) + | ((1 << ((s7_inst.instruction >> 3) & 0xf)) << 1); + s7_inst.relax_size = 4; + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + else + { + if (((s7_inst.instruction >> 3) & 0xf) != 0xf) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 20) + | (((-(1 << ((s7_inst.instruction >> 3) & 0xf))) & 0xffff) << 1); + s7_inst.relax_size = 4; + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + } +} + +static void +s7_do16_rdi5 (char *str) +{ + s7_skip_whitespace (str); + + if (s7_reglow_required_here (&str, 8) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_data_op2 (&str, 3, _IMM5) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + return; + else + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 20) + | (((s7_inst.instruction >> 8) & 0xf) << 15) | (((s7_inst.instruction >> 3) & 0x1f) << 10); + s7_inst.relax_size = 4; + } +} + +/* Handle sdbbp. */ + +static void +s7_do16_xi5 (char *str) +{ + s7_skip_whitespace (str); + + if (s7_data_op2 (&str, 3, _IMM5) == (int) s7_FAIL || s7_end_of_line (str) == (int) s7_FAIL) + return; + else + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 3) & 0x1f) << 15); + s7_inst.relax_size = 4; + } +} + +/* Check that an immediate is word alignment or half word alignment. + If so, convert it to the right format. */ + +static int +s7_validate_immediate_align (int val, unsigned int data_type) +{ + if (data_type == _IMM5_RSHIFT_1) + { + if (val % 2) + { + s7_inst.error = _("address offset must be half word alignment"); + return (int) s7_FAIL; + } + } + else if ((data_type == _IMM5_RSHIFT_2) || (data_type == _IMM10_RSHIFT_2)) + { + if (val % 4) + { + s7_inst.error = _("address offset must be word alignment"); + return (int) s7_FAIL; + } + } + + return s7_SUCCESS; +} + +static int +s7_exp_ldst_offset (char **str, int shift, unsigned int data_type) +{ + char *dataptr; + int hex_p = 0; + + dataptr = * str; + + if ((dataptr != NULL) + && (((strstr (dataptr, "0x")) != NULL) + || ((strstr (dataptr, "0X")) != NULL))) + { + hex_p = 1; + if ((data_type != _SIMM16_LA) + && (data_type != _VALUE_HI16) + && (data_type != _VALUE_LO16) + && (data_type != _IMM16) + && (data_type != _IMM15) + && (data_type != _IMM14) + && (data_type != _IMM4) + && (data_type != _IMM5) + && (data_type != _IMM8) + && (data_type != _IMM5_RSHIFT_1) + && (data_type != _IMM5_RSHIFT_2) + && (data_type != _SIMM12) + && (data_type != _SIMM15) + && (data_type != _SIMM14_NEG) + && (data_type != _IMM10_RSHIFT_2)) + { + data_type += 24; + } + } + + if (s7_my_get_expression (&s7_inst.reloc.exp, str) == (int) s7_FAIL) + return (int) s7_FAIL; + + if (s7_inst.reloc.exp.X_op == O_constant) + { + /* Need to check the immediate align. */ + int value = s7_validate_immediate_align (s7_inst.reloc.exp.X_add_number, data_type); + + if (value == (int) s7_FAIL) + return (int) s7_FAIL; + + value = s7_validate_immediate (s7_inst.reloc.exp.X_add_number, data_type, hex_p); + if (value == (int) s7_FAIL) + { + if (data_type < 30) + sprintf (s7_err_msg, + _("invalid constant: %d bit expression not in range %d..%d"), + s7_score_df_range[data_type].bits, + s7_score_df_range[data_type].range[0], s7_score_df_range[data_type].range[1]); + else + sprintf (s7_err_msg, + _("invalid constant: %d bit expression not in range %d..%d"), + s7_score_df_range[data_type - 24].bits, + s7_score_df_range[data_type - 24].range[0], s7_score_df_range[data_type - 24].range[1]); + s7_inst.error = s7_err_msg; + return (int) s7_FAIL; + } + + if (data_type == _IMM5_RSHIFT_1) + { + value >>= 1; + } + else if ((data_type == _IMM5_RSHIFT_2) || (data_type == _IMM10_RSHIFT_2)) + { + value >>= 2; + } + + if (s7_score_df_range[data_type].range[0] != 0) + { + value &= (1 << s7_score_df_range[data_type].bits) - 1; + } + + s7_inst.instruction |= value << shift; + } + else + { + s7_inst.reloc.pc_rel = 0; + } + + return s7_SUCCESS; +} + +static void +s7_do_ldst_insn (char *str) +{ + int pre_inc = 0; + int conflict_reg; + int value; + char * temp; + char *strbak; + char *dataptr; + int reg; + int ldst_idx = 0; + + int hex_p = 0; + + strbak = str; + s7_skip_whitespace (str); + + if (((conflict_reg = s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + || (s7_skip_past_comma (&str) == (int) s7_FAIL)) + return; + + /* ld/sw rD, [rA, simm15] ld/sw rD, [rA]+, simm12 ld/sw rD, [rA, simm12]+. */ + if (*str == '[') + { + str++; + s7_skip_whitespace (str); + + if ((reg = s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + return; + + /* Conflicts can occur on stores as well as loads. */ + conflict_reg = (conflict_reg == reg); + s7_skip_whitespace (str); + temp = str + 1; /* The latter will process decimal/hex expression. */ + + /* ld/sw rD, [rA]+, simm12 ld/sw rD, [rA]+. */ + if (*str == ']') + { + str++; + if (*str == '+') + { + str++; + /* ld/sw rD, [rA]+, simm12. */ + if (s7_skip_past_comma (&str) == s7_SUCCESS) + { + if ((s7_exp_ldst_offset (&str, 3, _SIMM12) == (int) s7_FAIL) + || (s7_end_of_line (str) == (int) s7_FAIL)) + return; + + if (conflict_reg) + { + unsigned int ldst_func = s7_inst.instruction & OPC_PSEUDOLDST_MASK; + + if ((ldst_func == INSN_LH) + || (ldst_func == INSN_LHU) + || (ldst_func == INSN_LW) + || (ldst_func == INSN_LB) + || (ldst_func == INSN_LBU)) + { + s7_inst.error = _("register same as write-back base"); + return; + } + } + + ldst_idx = s7_inst.instruction & OPC_PSEUDOLDST_MASK; + s7_inst.instruction &= ~OPC_PSEUDOLDST_MASK; + s7_inst.instruction |= s7_score_ldst_insns[ldst_idx * 3 + LDST_POST].value; + + /* lw rD, [rA]+, 4 convert to pop rD, [rA]. */ + if ((s7_inst.instruction & 0x3e000007) == 0x0e000000) + { + /* rs = r0-r7, offset = 4 */ + if ((((s7_inst.instruction >> 15) & 0x18) == 0) + && (((s7_inst.instruction >> 3) & 0xfff) == 4)) + { + /* Relax to pophi. */ + if ((((s7_inst.instruction >> 20) & 0x10) == 0x10)) + { + s7_inst.relax_inst = 0x0000200a | (((s7_inst.instruction >> 20) & 0xf) + << 8) | 1 << 7 | + (((s7_inst.instruction >> 15) & 0x7) << 4); + } + /* Relax to pop. */ + else + { + s7_inst.relax_inst = 0x0000200a | (((s7_inst.instruction >> 20) & 0xf) + << 8) | 0 << 7 | + (((s7_inst.instruction >> 15) & 0x7) << 4); + } + s7_inst.relax_size = 2; + } + } + return; + } + /* ld/sw rD, [rA]+ convert to ld/sw rD, [rA, 0]+. */ + else + { + s7_SET_INSN_ERROR (NULL); + if (s7_end_of_line (str) == (int) s7_FAIL) + { + return; + } + + pre_inc = 1; + value = s7_validate_immediate (s7_inst.reloc.exp.X_add_number, _SIMM12, 0); + value &= (1 << s7_score_df_range[_SIMM12].bits) - 1; + ldst_idx = s7_inst.instruction & OPC_PSEUDOLDST_MASK; + s7_inst.instruction &= ~OPC_PSEUDOLDST_MASK; + s7_inst.instruction |= s7_score_ldst_insns[ldst_idx * 3 + pre_inc].value; + s7_inst.instruction |= value << 3; + s7_inst.relax_inst = 0x8000; + return; + } + } + /* ld/sw rD, [rA] convert to ld/sw rD, [rA, simm15]. */ + else + { + if (s7_end_of_line (str) == (int) s7_FAIL) + return; + + ldst_idx = s7_inst.instruction & OPC_PSEUDOLDST_MASK; + s7_inst.instruction &= ~OPC_PSEUDOLDST_MASK; + s7_inst.instruction |= s7_score_ldst_insns[ldst_idx * 3 + LDST_NOUPDATE].value; + + /* lbu rd, [rs] -> lbu! rd, [rs] */ + if (ldst_idx == INSN_LBU) + { + s7_inst.relax_inst = INSN16_LBU; + } + else if (ldst_idx == INSN_LH) + { + s7_inst.relax_inst = INSN16_LH; + } + else if (ldst_idx == INSN_LW) + { + s7_inst.relax_inst = INSN16_LW; + } + else if (ldst_idx == INSN_SB) + { + s7_inst.relax_inst = INSN16_SB; + } + else if (ldst_idx == INSN_SH) + { + s7_inst.relax_inst = INSN16_SH; + } + else if (ldst_idx == INSN_SW) + { + s7_inst.relax_inst = INSN16_SW; + } + else + { + s7_inst.relax_inst = 0x8000; + } + + /* lw/lh/lbu/sw/sh/sb, offset = 0, relax to 16 bit instruction. */ + if ((ldst_idx == INSN_LBU) + || (ldst_idx == INSN_LH) + || (ldst_idx == INSN_LW) + || (ldst_idx == INSN_SB) || (ldst_idx == INSN_SH) || (ldst_idx == INSN_SW)) + { + if ((((s7_inst.instruction >> 15) & 0x10) == 0) && (((s7_inst.instruction >> 20) & 0x10) == 0)) + { + s7_inst.relax_inst |= (2 << 12) | (((s7_inst.instruction >> 20) & 0xf) << 8) | + (((s7_inst.instruction >> 15) & 0xf) << 4); + s7_inst.relax_size = 2; + } + } + + return; + } + } + /* ld/sw rD, [rA, simm15] ld/sw rD, [rA, simm12]+. */ + else + { + if (s7_skip_past_comma (&str) == (int) s7_FAIL) + { + s7_inst.error = _("pre-indexed expression expected"); + return; + } + + if (s7_my_get_expression (&s7_inst.reloc.exp, &str) == (int) s7_FAIL) + return; + + s7_skip_whitespace (str); + if (*str++ != ']') + { + s7_inst.error = _("missing ]"); + return; + } + + s7_skip_whitespace (str); + /* ld/sw rD, [rA, simm12]+. */ + if (*str == '+') + { + str++; + pre_inc = 1; + if (conflict_reg) + { + unsigned int ldst_func = s7_inst.instruction & OPC_PSEUDOLDST_MASK; + + if ((ldst_func == INSN_LH) + || (ldst_func == INSN_LHU) + || (ldst_func == INSN_LW) + || (ldst_func == INSN_LB) + || (ldst_func == INSN_LBU)) + { + s7_inst.error = _("register same as write-back base"); + return; + } + } + } + + if (s7_end_of_line (str) == (int) s7_FAIL) + return; + + if (s7_inst.reloc.exp.X_op == O_constant) + { + int value; + unsigned int data_type; + + if (pre_inc == 1) + data_type = _SIMM12; + else + data_type = _SIMM15; + dataptr = temp; + + if ((dataptr != NULL) + && (((strstr (dataptr, "0x")) != NULL) + || ((strstr (dataptr, "0X")) != NULL))) + { + hex_p = 1; + if ((data_type != _SIMM16_LA) + && (data_type != _VALUE_HI16) + && (data_type != _VALUE_LO16) + && (data_type != _IMM16) + && (data_type != _IMM15) + && (data_type != _IMM14) + && (data_type != _IMM4) + && (data_type != _IMM5) + && (data_type != _IMM8) + && (data_type != _SIMM12) + && (data_type != _SIMM15) + && (data_type != _IMM5_RSHIFT_1) + && (data_type != _IMM5_RSHIFT_2) + && (data_type != _SIMM14_NEG) + && (data_type != _IMM10_RSHIFT_2)) + { + data_type += 24; + } + } + + value = s7_validate_immediate (s7_inst.reloc.exp.X_add_number, data_type, hex_p); + if (value == (int) s7_FAIL) + { + if (data_type < 30) + sprintf (s7_err_msg, + _("invalid constant: %d bit expression not in range %d..%d"), + s7_score_df_range[data_type].bits, + s7_score_df_range[data_type].range[0], s7_score_df_range[data_type].range[1]); + else + sprintf (s7_err_msg, + _("invalid constant: %d bit expression not in range %d..%d"), + s7_score_df_range[data_type - 24].bits, + s7_score_df_range[data_type - 24].range[0], + s7_score_df_range[data_type - 24].range[1]); + s7_inst.error = s7_err_msg; + return; + } + + value &= (1 << s7_score_df_range[data_type].bits) - 1; + ldst_idx = s7_inst.instruction & OPC_PSEUDOLDST_MASK; + s7_inst.instruction &= ~OPC_PSEUDOLDST_MASK; + s7_inst.instruction |= s7_score_ldst_insns[ldst_idx * 3 + pre_inc].value; + if (pre_inc == 1) + s7_inst.instruction |= value << 3; + else + s7_inst.instruction |= value; + + /* lw rD, [rA, simm15] */ + if ((s7_inst.instruction & 0x3e000000) == 0x20000000) + { + /* Both rD and rA are in [r0 - r15]. */ + if ((((s7_inst.instruction >> 15) & 0x10) == 0) + && (((s7_inst.instruction >> 20) & 0x10) == 0)) + { + /* simm15 = 0, lw -> lw!. */ + if ((s7_inst.instruction & 0x7fff) == 0) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 15) & 0xf) << 4) + | (((s7_inst.instruction >> 20) & 0xf) << 8); + s7_inst.relax_size = 2; + } + /* rA = r2, lw -> lwp!. */ + else if ((((s7_inst.instruction >> 15) & 0xf) == 2) + && ((s7_inst.instruction & 0x3) == 0) + && ((s7_inst.instruction & 0x7fff) < 128)) + { + s7_inst.relax_inst = 0x7000 | (((s7_inst.instruction >> 20) & 0xf) << 8) + | (((s7_inst.instruction & 0x7fff) >> 2) << 3); + s7_inst.relax_size = 2; + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + /* sw rD, [rA, simm15] */ + else if ((s7_inst.instruction & 0x3e000000) == 0x28000000) + { + /* Both rD and rA are in [r0 - r15]. */ + if ((((s7_inst.instruction >> 15) & 0x10) == 0) && (((s7_inst.instruction >> 20) & 0x10) == 0)) + { + /* simm15 = 0, sw -> sw!. */ + if ((s7_inst.instruction & 0x7fff) == 0) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 15) & 0xf) << 4) + | (((s7_inst.instruction >> 20) & 0xf) << 8); + s7_inst.relax_size = 2; + } + /* rA = r2, sw -> swp!. */ + else if ((((s7_inst.instruction >> 15) & 0xf) == 2) + && ((s7_inst.instruction & 0x3) == 0) + && ((s7_inst.instruction & 0x7fff) < 128)) + { + s7_inst.relax_inst = 0x7004 | (((s7_inst.instruction >> 20) & 0xf) << 8) + | (((s7_inst.instruction & 0x7fff) >> 2) << 3); + s7_inst.relax_size = 2; + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + /* sw rD, [rA, simm15]+ sw pre. */ + else if ((s7_inst.instruction & 0x3e000007) == 0x06000004) + { + /* rA is in [r0 - r7], and simm15 = -4. */ + if ((((s7_inst.instruction >> 15) & 0x18) == 0) + && (((s7_inst.instruction >> 3) & 0xfff) == 0xffc)) + { + /* sw -> pushhi!. */ + if ((((s7_inst.instruction >> 20) & 0x10) == 0x10)) + { + s7_inst.relax_inst = 0x0000200e | (((s7_inst.instruction >> 20) & 0xf) << 8) + | 1 << 7 | (((s7_inst.instruction >> 15) & 0x7) << 4); + s7_inst.relax_size = 2; + } + /* sw -> push!. */ + else + { + s7_inst.relax_inst = 0x0000200e | (((s7_inst.instruction >> 20) & 0xf) << 8) + | 0 << 7 | (((s7_inst.instruction >> 15) & 0x7) << 4); + s7_inst.relax_size = 2; + } + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + /* lh rD, [rA, simm15] */ + else if ((s7_inst.instruction & 0x3e000000) == 0x22000000) + { + /* Both rD and rA are in [r0 - r15]. */ + if ((((s7_inst.instruction >> 15) & 0x10) == 0) && (((s7_inst.instruction >> 20) & 0x10) == 0)) + { + /* simm15 = 0, lh -> lh!. */ + if ((s7_inst.instruction & 0x7fff) == 0) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 15) & 0xf) << 4) + | (((s7_inst.instruction >> 20) & 0xf) << 8); + s7_inst.relax_size = 2; + } + /* rA = r2, lh -> lhp!. */ + else if ((((s7_inst.instruction >> 15) & 0xf) == 2) + && ((s7_inst.instruction & 0x1) == 0) + && ((s7_inst.instruction & 0x7fff) < 64)) + { + s7_inst.relax_inst = 0x7001 | (((s7_inst.instruction >> 20) & 0xf) << 8) + | (((s7_inst.instruction & 0x7fff) >> 1) << 3); + s7_inst.relax_size = 2; + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + /* sh rD, [rA, simm15] */ + else if ((s7_inst.instruction & 0x3e000000) == 0x2a000000) + { + /* Both rD and rA are in [r0 - r15]. */ + if ((((s7_inst.instruction >> 15) & 0x10) == 0) && (((s7_inst.instruction >> 20) & 0x10) == 0)) + { + /* simm15 = 0, sh -> sh!. */ + if ((s7_inst.instruction & 0x7fff) == 0) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 15) & 0xf) << 4) + | (((s7_inst.instruction >> 20) & 0xf) << 8); + s7_inst.relax_size = 2; + } + /* rA = r2, sh -> shp!. */ + else if ((((s7_inst.instruction >> 15) & 0xf) == 2) + && ((s7_inst.instruction & 0x1) == 0) + && ((s7_inst.instruction & 0x7fff) < 64)) + { + s7_inst.relax_inst = 0x7005 | (((s7_inst.instruction >> 20) & 0xf) << 8) + | (((s7_inst.instruction & 0x7fff) >> 1) << 3); + s7_inst.relax_size = 2; + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + /* lbu rD, [rA, simm15] */ + else if ((s7_inst.instruction & 0x3e000000) == 0x2c000000) + { + /* Both rD and rA are in [r0 - r15]. */ + if ((((s7_inst.instruction >> 15) & 0x10) == 0) && (((s7_inst.instruction >> 20) & 0x10) == 0)) + { + /* simm15 = 0, lbu -> lbu!. */ + if ((s7_inst.instruction & 0x7fff) == 0) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 15) & 0xf) << 4) + | (((s7_inst.instruction >> 20) & 0xf) << 8); + s7_inst.relax_size = 2; + } + /* rA = r2, lbu -> lbup!. */ + else if ((((s7_inst.instruction >> 15) & 0xf) == 2) + && ((s7_inst.instruction & 0x7fff) < 32)) + { + s7_inst.relax_inst = 0x7003 | (((s7_inst.instruction >> 20) & 0xf) << 8) + | ((s7_inst.instruction & 0x7fff) << 3); + s7_inst.relax_size = 2; + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + /* sb rD, [rA, simm15] */ + else if ((s7_inst.instruction & 0x3e000000) == 0x2e000000) + { + /* Both rD and rA are in [r0 - r15]. */ + if ((((s7_inst.instruction >> 15) & 0x10) == 0) && (((s7_inst.instruction >> 20) & 0x10) == 0)) + { + /* simm15 = 0, sb -> sb!. */ + if ((s7_inst.instruction & 0x7fff) == 0) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 15) & 0xf) << 4) + | (((s7_inst.instruction >> 20) & 0xf) << 8); + s7_inst.relax_size = 2; + } + /* rA = r2, sb -> sb!. */ + else if ((((s7_inst.instruction >> 15) & 0xf) == 2) + && ((s7_inst.instruction & 0x7fff) < 32)) + { + s7_inst.relax_inst = 0x7007 | (((s7_inst.instruction >> 20) & 0xf) << 8) + | ((s7_inst.instruction & 0x7fff) << 3); + s7_inst.relax_size = 2; + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + else + { + s7_inst.relax_inst = 0x8000; + } + } + else + { + s7_inst.relax_inst = 0x8000; + } + + return; + } + else + { + /* FIXME: may set error, for there is no ld/sw rD, [rA, label] */ + s7_inst.reloc.pc_rel = 0; + } + } + } + else + { + s7_inst.error = s7_BAD_ARGS; + } +} + +/* Handle cache. */ +static void +s7_do_cache (char *str) +{ + s7_skip_whitespace (str); + + if ((s7_data_op2 (&str, 20, _IMM5) == (int) s7_FAIL) || (s7_skip_past_comma (&str) == (int) s7_FAIL)) + { + return; + } + else + { + int cache_op; + + cache_op = (s7_inst.instruction >> 20) & 0x1F; + sprintf (s7_inst.name, "cache %d", cache_op); + } + + if (*str == '[') + { + str++; + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL) + return; + + s7_skip_whitespace (str); + + /* cache op, [rA] */ + if (s7_skip_past_comma (&str) == (int) s7_FAIL) + { + s7_SET_INSN_ERROR (NULL); + if (*str != ']') + { + s7_inst.error = _("missing ]"); + return; + } + str++; + } + /* cache op, [rA, simm15] */ + else + { + if (s7_exp_ldst_offset (&str, 0, _SIMM15) == (int) s7_FAIL) + { + return; + } + + s7_skip_whitespace (str); + if (*str++ != ']') + { + s7_inst.error = _("missing ]"); + return; + } + } + + if (s7_end_of_line (str) == (int) s7_FAIL) + return; + } + else + { + s7_inst.error = s7_BAD_ARGS; + } +} + +static void +s7_do_crdcrscrsimm5 (char *str) +{ + char *strbak; + + strbak = str; + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE_CR) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE_CR) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL + || s7_reg_required_here (&str, 10, s7_REG_TYPE_SCORE_CR) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL) + { + str = strbak; + /* cop1 cop_code20. */ + if (s7_data_op2 (&str, 5, _IMM20) == (int) s7_FAIL) + return; + } + else + { + if (s7_data_op2 (&str, 5, _IMM5) == (int) s7_FAIL) + return; + } + + s7_end_of_line (str); +} + +/* Handle ldc/stc. */ +static void +s7_do_ldst_cop (char *str) +{ + s7_skip_whitespace (str); + + if ((s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE_CR) == (int) s7_FAIL) + || (s7_skip_past_comma (&str) == (int) s7_FAIL)) + return; + + if (*str == '[') + { + str++; + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL) + return; + + s7_skip_whitespace (str); + + if (*str++ != ']') + { + if (s7_exp_ldst_offset (&str, 5, _IMM10_RSHIFT_2) == (int) s7_FAIL) + return; + + s7_skip_whitespace (str); + if (*str++ != ']') + { + s7_inst.error = _("missing ]"); + return; + } + } + + s7_end_of_line (str); + } + else + s7_inst.error = s7_BAD_ARGS; +} + +static void +s7_do16_ldst_insn (char *str) +{ + s7_skip_whitespace (str); + + if ((s7_reglow_required_here (&str, 8) == (int) s7_FAIL) || (s7_skip_past_comma (&str) == (int) s7_FAIL)) + return; + + if (*str == '[') + { + int reg; + + str++; + s7_skip_whitespace (str); + + if ((reg = s7_reglow_required_here (&str, 4)) == (int) s7_FAIL) + return; + + s7_skip_whitespace (str); + if (*str++ == ']') + { + if (s7_end_of_line (str) == (int) s7_FAIL) + return; + else + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 20) + | (((s7_inst.instruction >> 4) & 0xf) << 15); + s7_inst.relax_size = 4; + } + } + else + { + s7_inst.error = _("missing ]"); + } + } + else + { + s7_inst.error = s7_BAD_ARGS; + } +} + +/* Handle lbup!/lhp!/ldiu!/lwp!/sbp!/shp!/swp!. */ + +static void +s7_do16_ldst_imm_insn (char *str) +{ + char data_exp[s7_MAX_LITERAL_POOL_SIZE]; + int reg_rd; + char *dataptr = NULL, *pp = NULL; + int cnt = 0; + int assign_data = (int) s7_FAIL; + unsigned int ldst_func; + + s7_skip_whitespace (str); + + if (((reg_rd = s7_reglow_required_here (&str, 8)) == (int) s7_FAIL) + || (s7_skip_past_comma (&str) == (int) s7_FAIL)) + return; + + s7_skip_whitespace (str); + dataptr = str; + + while ((*dataptr != '\0') && (*dataptr != '|') && (cnt <= s7_MAX_LITERAL_POOL_SIZE)) + { + data_exp[cnt] = *dataptr; + dataptr++; + cnt++; + } + + data_exp[cnt] = '\0'; + pp = &data_exp[0]; + + str = dataptr; + + ldst_func = s7_inst.instruction & LDST16_RI_MASK; + if (ldst_func == N16_LIU) + assign_data = s7_exp_ldst_offset (&pp, 0, _IMM8); + else if (ldst_func == N16_LHP || ldst_func == N16_SHP) + assign_data = s7_exp_ldst_offset (&pp, 3, _IMM5_RSHIFT_1); + else if (ldst_func == N16_LWP || ldst_func == N16_SWP) + assign_data = s7_exp_ldst_offset (&pp, 3, _IMM5_RSHIFT_2); + else + assign_data = s7_exp_ldst_offset (&pp, 3, _IMM5); + + if ((assign_data == (int) s7_FAIL) || (s7_end_of_line (pp) == (int) s7_FAIL)) + return; + else + { + if ((s7_inst.instruction & 0x7000) == N16_LIU) + { + s7_inst.relax_inst |= ((s7_inst.instruction >> 8) & 0xf) << 20 + | ((s7_inst.instruction & 0xff) << 1); + } + else if (((s7_inst.instruction & 0x7007) == N16_LHP) + || ((s7_inst.instruction & 0x7007) == N16_SHP)) + { + s7_inst.relax_inst |= ((s7_inst.instruction >> 8) & 0xf) << 20 | 2 << 15 + | (((s7_inst.instruction >> 3) & 0x1f) << 1); + } + else if (((s7_inst.instruction & 0x7007) == N16_LWP) + || ((s7_inst.instruction & 0x7007) == N16_SWP)) + { + s7_inst.relax_inst |= ((s7_inst.instruction >> 8) & 0xf) << 20 | 2 << 15 + | (((s7_inst.instruction >> 3) & 0x1f) << 2); + } + else if (((s7_inst.instruction & 0x7007) == N16_LBUP) + || ((s7_inst.instruction & 0x7007) == N16_SBP)) + { + s7_inst.relax_inst |= ((s7_inst.instruction >> 8) & 0xf) << 20 | 2 << 15 + | (((s7_inst.instruction >> 3) & 0x1f)); + } + + s7_inst.relax_size = 4; + } +} + +static void +s7_do16_push_pop (char *str) +{ + int reg_rd; + int H_bit_mask = 0; + + s7_skip_whitespace (str); + if (((reg_rd = s7_reg_required_here (&str, 8, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + || (s7_skip_past_comma (&str) == (int) s7_FAIL)) + return; + + if (reg_rd >= 16) + H_bit_mask = 1; + + /* s7_reg_required_here will change bit 12 of opcode, so we must restore bit 12. */ + s7_inst.instruction &= ~(1 << 12); + + s7_inst.instruction |= H_bit_mask << 7; + + if (*str == '[') + { + int reg; + + str++; + s7_skip_whitespace (str); + if ((reg = s7_reg_required_here (&str, 4, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + return; + else if (reg > 7) + { + if (!s7_inst.error) + s7_inst.error = _("base register nums are over 3 bit"); + + return; + } + + s7_skip_whitespace (str); + if ((*str++ != ']') || (s7_end_of_line (str) == (int) s7_FAIL)) + { + if (!s7_inst.error) + s7_inst.error = _("missing ]"); + + return; + } + + /* pop! */ + if ((s7_inst.instruction & 0xf) == 0xa) + { + if (H_bit_mask) + { + s7_inst.relax_inst |= ((((s7_inst.instruction >> 8) & 0xf) | 0x10) << 20) + | (((s7_inst.instruction >> 4) & 0x7) << 15) | (4 << 3); + } + else + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 20) + | (((s7_inst.instruction >> 4) & 0x7) << 15) | (4 << 3); + } + } + /* push! */ + else + { + if (H_bit_mask) + { + s7_inst.relax_inst |= ((((s7_inst.instruction >> 8) & 0xf) | 0x10) << 20) + | (((s7_inst.instruction >> 4) & 0x7) << 15) | (((-4) & 0xfff) << 3); + } + else + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 20) + | (((s7_inst.instruction >> 4) & 0x7) << 15) | (((-4) & 0xfff) << 3); + } + } + s7_inst.relax_size = 4; + } + else + { + s7_inst.error = s7_BAD_ARGS; + } +} + +/* Handle lcb/lcw/lce/scb/scw/sce. */ +static void +s7_do_ldst_unalign (char *str) +{ + int conflict_reg; + + if (s7_university_version == 1) + { + s7_inst.error = s7_ERR_FOR_SCORE5U_ATOMIC; + return; + } + + s7_skip_whitespace (str); + + /* lcb/scb [rA]+. */ + if (*str == '[') + { + str++; + s7_skip_whitespace (str); + + if (s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL) + return; + + if (*str++ == ']') + { + if (*str++ != '+') + { + s7_inst.error = _("missing +"); + return; + } + } + else + { + s7_inst.error = _("missing ]"); + return; + } + + if (s7_end_of_line (str) == (int) s7_FAIL) + return; + } + /* lcw/lce/scb/sce rD, [rA]+. */ + else + { + if (((conflict_reg = s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + || (s7_skip_past_comma (&str) == (int) s7_FAIL)) + { + return; + } + + s7_skip_whitespace (str); + if (*str++ == '[') + { + int reg; + + s7_skip_whitespace (str); + if ((reg = s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + { + return; + } + + /* Conflicts can occur on stores as well as loads. */ + conflict_reg = (conflict_reg == reg); + s7_skip_whitespace (str); + if (*str++ == ']') + { + unsigned int ldst_func = s7_inst.instruction & LDST_UNALIGN_MASK; + + if (*str++ == '+') + { + if (conflict_reg) + { + as_warn (_("%s register same as write-back base"), + ((ldst_func & UA_LCE) || (ldst_func & UA_LCW) + ? _("destination") : _("source"))); + } + } + else + { + s7_inst.error = _("missing +"); + return; + } + + if (s7_end_of_line (str) == (int) s7_FAIL) + return; + } + else + { + s7_inst.error = _("missing ]"); + return; + } + } + else + { + s7_inst.error = s7_BAD_ARGS; + return; + } + } +} + +/* Handle alw/asw. */ + +static void +s7_do_ldst_atomic (char *str) +{ + if (s7_university_version == 1) + { + s7_inst.error = s7_ERR_FOR_SCORE5U_ATOMIC; + return; + } + + s7_skip_whitespace (str); + + if ((s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL) + || (s7_skip_past_comma (&str) == (int) s7_FAIL)) + { + return; + } + else + { + + s7_skip_whitespace (str); + if (*str++ == '[') + { + int reg; + + s7_skip_whitespace (str); + if ((reg = s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + { + return; + } + + s7_skip_whitespace (str); + if (*str++ != ']') + { + s7_inst.error = _("missing ]"); + return; + } + + s7_end_of_line (str); + } + else + s7_inst.error = s7_BAD_ARGS; + } +} + +static void +s7_build_relax_frag (struct s7_score_it fix_insts[s7_RELAX_INST_NUM], + int fix_num ATTRIBUTE_UNUSED, + struct s7_score_it var_insts[s7_RELAX_INST_NUM], int var_num, + symbolS *add_symbol) +{ + int i; + char *p; + fixS *fixp = NULL; + fixS *cur_fixp = NULL; + long where; + struct s7_score_it inst_main; + + memcpy (&inst_main, &fix_insts[0], sizeof (struct s7_score_it)); + + /* Adjust instruction opcode and to be relaxed instruction opcode. */ + inst_main.instruction = s7_adjust_paritybit (inst_main.instruction, s7_GET_INSN_CLASS (inst_main.type)); + inst_main.type = Insn_PIC; + + for (i = 0; i < var_num; i++) + { + inst_main.relax_size += var_insts[i].size; + var_insts[i].instruction = s7_adjust_paritybit (var_insts[i].instruction, + s7_GET_INSN_CLASS (var_insts[i].type)); + } + + /* Check data dependency. */ + s7_handle_dependency (&inst_main); + + /* Start a new frag if frag_now is not empty. */ + if (frag_now_fix () != 0) + { + if (!frag_now->tc_frag_data.is_insn) + { + frag_wane (frag_now); + } + frag_new (0); + } + frag_grow (20); + + /* Write fr_fix part. */ + p = frag_more (inst_main.size); + s7_number_to_chars (p, inst_main.instruction, inst_main.size); + + if (inst_main.reloc.type != BFD_RELOC_NONE) + fixp = s7_fix_new_score (frag_now, p - frag_now->fr_literal, inst_main.size, + &inst_main.reloc.exp, inst_main.reloc.pc_rel, inst_main.reloc.type); + + frag_now->tc_frag_data.fixp = fixp; + cur_fixp = frag_now->tc_frag_data.fixp; + +#ifdef OBJ_ELF + dwarf2_emit_insn (inst_main.size); +#endif + + where = p - frag_now->fr_literal + inst_main.size; + for (i = 0; i < var_num; i++) + { + if (i > 0) + where += var_insts[i - 1].size; + + if (var_insts[i].reloc.type != BFD_RELOC_NONE) + { + fixp = s7_fix_new_score (frag_now, where, var_insts[i].size, + &var_insts[i].reloc.exp, var_insts[i].reloc.pc_rel, + var_insts[i].reloc.type); + if (fixp) + { + if (cur_fixp) + { + cur_fixp->fx_next = fixp; + cur_fixp = cur_fixp->fx_next; + } + else + { + frag_now->tc_frag_data.fixp = fixp; + cur_fixp = frag_now->tc_frag_data.fixp; + } + } + } + } + + p = frag_var (rs_machine_dependent, inst_main.relax_size + s7_RELAX_PAD_BYTE, 0, + s7_RELAX_ENCODE (inst_main.size, inst_main.relax_size, inst_main.type, + 0, inst_main.size, 0), add_symbol, 0, NULL); + + /* Write fr_var part. + no calling s7_gen_insn_frag, no fixS will be generated. */ + for (i = 0; i < var_num; i++) + { + s7_number_to_chars (p, var_insts[i].instruction, var_insts[i].size); + p += var_insts[i].size; + } + /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ + s7_inst.bwarn = -1; +} + +/* Build a relax frag for la instruction when generating s7_PIC, + external symbol first and local symbol second. */ + +static void +s7_build_la_pic (int reg_rd, expressionS exp) +{ + symbolS *add_symbol = exp.X_add_symbol; + offsetT add_number = exp.X_add_number; + struct s7_score_it fix_insts[s7_RELAX_INST_NUM]; + struct s7_score_it var_insts[s7_RELAX_INST_NUM]; + int fix_num = 0; + int var_num = 0; + char tmp[s7_MAX_LITERAL_POOL_SIZE]; + int r1_bak; + + r1_bak = s7_nor1; + s7_nor1 = 0; + + if (add_number == 0) + { + fix_num = 1; + var_num = 2; + + /* For an external symbol, only one insn is generated; + For a local symbol, two insns are generated. */ + /* Fix part + For an external symbol: lw rD, <sym>($gp) + (BFD_RELOC_SCORE_GOT15 or BFD_RELOC_SCORE_CALL15) */ + sprintf (tmp, "lw_pic r%d, %s", reg_rd, add_symbol->bsym->name); + if (s7_append_insn (tmp, FALSE) == (int) s7_FAIL) + return; + + if (reg_rd == s7_PIC_CALL_REG) + s7_inst.reloc.type = BFD_RELOC_SCORE_CALL15; + memcpy (&fix_insts[0], &s7_inst, sizeof (struct s7_score_it)); + + /* Var part + For a local symbol : + lw rD, <sym>($gp) (BFD_RELOC_SCORE_GOT15) + addi rD, <sym> (BFD_RELOC_GOT_LO16) */ + s7_inst.reloc.type = BFD_RELOC_SCORE_GOT15; + memcpy (&var_insts[0], &s7_inst, sizeof (struct s7_score_it)); + sprintf (tmp, "addi_s_pic r%d, %s", reg_rd, add_symbol->bsym->name); + if (s7_append_insn (tmp, FALSE) == (int) s7_FAIL) + return; + + memcpy (&var_insts[1], &s7_inst, sizeof (struct s7_score_it)); + s7_build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); + } + else if (add_number >= -0x8000 && add_number <= 0x7fff) + { + /* Insn 1: lw rD, <sym>($gp) (BFD_RELOC_SCORE_GOT15) */ + sprintf (tmp, "lw_pic r%d, %s", reg_rd, add_symbol->bsym->name); + if (s7_append_insn (tmp, TRUE) == (int) s7_FAIL) + return; + + /* Insn 2 */ + fix_num = 1; + var_num = 1; + /* Fix part + For an external symbol: addi rD, <constant> */ + sprintf (tmp, "addi r%d, %d", reg_rd, (int) add_number); + if (s7_append_insn (tmp, FALSE) == (int) s7_FAIL) + return; + + memcpy (&fix_insts[0], &s7_inst, sizeof (struct s7_score_it)); + + /* Var part + For a local symbol: addi rD, <sym>+<constant> (BFD_RELOC_GOT_LO16) */ + sprintf (tmp, "addi_s_pic r%d, %s + %d", reg_rd, add_symbol->bsym->name, (int) add_number); + if (s7_append_insn (tmp, FALSE) == (int) s7_FAIL) + return; + + memcpy (&var_insts[0], &s7_inst, sizeof (struct s7_score_it)); + s7_build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); + } + else + { + int hi = (add_number >> 16) & 0x0000FFFF; + int lo = add_number & 0x0000FFFF; + + /* Insn 1: lw rD, <sym>($gp) (BFD_RELOC_SCORE_GOT15) */ + sprintf (tmp, "lw_pic r%d, %s", reg_rd, add_symbol->bsym->name); + if (s7_append_insn (tmp, TRUE) == (int) s7_FAIL) + return; + + /* Insn 2 */ + fix_num = 1; + var_num = 1; + /* Fix part + For an external symbol: ldis r1, HI%<constant> */ + sprintf (tmp, "ldis r1, %d", hi); + if (s7_append_insn (tmp, FALSE) == (int) s7_FAIL) + return; + + memcpy (&fix_insts[0], &s7_inst, sizeof (struct s7_score_it)); + + /* Var part + For a local symbol: ldis r1, HI%<constant> + but, if lo is outof 16 bit, make hi plus 1 */ + if ((lo < -0x8000) || (lo > 0x7fff)) + { + hi += 1; + } + sprintf (tmp, "ldis_pic r1, %d", hi); + if (s7_append_insn (tmp, FALSE) == (int) s7_FAIL) + return; + + memcpy (&var_insts[0], &s7_inst, sizeof (struct s7_score_it)); + s7_build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); + + /* Insn 3 */ + fix_num = 1; + var_num = 1; + /* Fix part + For an external symbol: ori r1, LO%<constant> */ + sprintf (tmp, "ori r1, %d", lo); + if (s7_append_insn (tmp, FALSE) == (int) s7_FAIL) + return; + + memcpy (&fix_insts[0], &s7_inst, sizeof (struct s7_score_it)); + + /* Var part + For a local symbol: addi r1, <sym>+LO%<constant> (BFD_RELOC_GOT_LO16) */ + sprintf (tmp, "addi_u_pic r1, %s + %d", add_symbol->bsym->name, lo); + if (s7_append_insn (tmp, FALSE) == (int) s7_FAIL) + return; + + memcpy (&var_insts[0], &s7_inst, sizeof (struct s7_score_it)); + s7_build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); + + /* Insn 4: add rD, rD, r1 */ + sprintf (tmp, "add r%d, r%d, r1", reg_rd, reg_rd); + if (s7_append_insn (tmp, TRUE) == (int) s7_FAIL) + return; + + /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ + s7_inst.bwarn = -1; + } + + s7_nor1 = r1_bak; +} + +/* Handle la. */ + +static void +s7_do_macro_la_rdi32 (char *str) +{ + int reg_rd; + + s7_skip_whitespace (str); + if ((reg_rd = s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE)) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL) + { + return; + } + else + { + char append_str[s7_MAX_LITERAL_POOL_SIZE]; + char *keep_data = str; + + /* Check immediate value. */ + if (s7_my_get_expression (&s7_inst.reloc.exp, &str) == (int) s7_FAIL) + { + s7_inst.error = _("expression error"); + return; + } + else if ((s7_inst.reloc.exp.X_add_symbol == NULL) + && (s7_validate_immediate (s7_inst.reloc.exp.X_add_number, _IMM32, 0) == (int) s7_FAIL)) + { + s7_inst.error = _("value not in range [0, 0xffffffff]"); + return; + } + + /* Reset str. */ + str = keep_data; + + /* la rd, simm16. */ + if (s7_data_op2 (&str, 1, _SIMM16_LA) != (int) s7_FAIL) + { + s7_end_of_line (str); + return; + } + /* la rd, imm32 or la rd, label. */ + else + { + s7_SET_INSN_ERROR (NULL); + str = keep_data; + if ((s7_data_op2 (&str, 1, _VALUE_HI16) == (int) s7_FAIL) + || (s7_end_of_line (str) == (int) s7_FAIL)) + { + return; + } + else + { + if ((s7_score_pic == s7_NO_PIC) || (!s7_inst.reloc.exp.X_add_symbol)) + { + sprintf (append_str, "ld_i32hi r%d, %s", reg_rd, keep_data); + if (s7_append_insn (append_str, TRUE) == (int) s7_FAIL) + return; + + sprintf (append_str, "ld_i32lo r%d, %s", reg_rd, keep_data); + if (s7_append_insn (append_str, TRUE) == (int) s7_FAIL) + return; + } + else + { + assert (s7_inst.reloc.exp.X_add_symbol); + s7_build_la_pic (reg_rd, s7_inst.reloc.exp); + } + + /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ + s7_inst.bwarn = -1; + } + } + } +} + +/* Handle li. */ + +static void +s7_do_macro_li_rdi32 (char *str) +{ + int reg_rd; + + s7_skip_whitespace (str); + if ((reg_rd = s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE)) == (int) s7_FAIL + || s7_skip_past_comma (&str) == (int) s7_FAIL) + { + return; + } + else + { + char *keep_data = str; + + /* Check immediate value. */ + if (s7_my_get_expression (&s7_inst.reloc.exp, &str) == (int) s7_FAIL) + { + s7_inst.error = _("expression error"); + return; + } + else if (!(s7_inst.reloc.exp.X_add_number >= -0xffffffffLL + && s7_inst.reloc.exp.X_add_number <= 0xffffffffLL)) + { + s7_inst.error = _("value not in range [-0xffffffff, 0xffffffff]"); + return; + } + + /* Reset str. */ + str = keep_data; + + /* li rd, simm16. */ + if (s7_data_op2 (&str, 1, _SIMM16_LA) != (int) s7_FAIL) + { + s7_end_of_line (str); + return; + } + /* li rd, imm32. */ + else + { + char append_str[s7_MAX_LITERAL_POOL_SIZE]; + + str = keep_data; + + if ((s7_data_op2 (&str, 1, _VALUE_HI16) == (int) s7_FAIL) + || (s7_end_of_line (str) == (int) s7_FAIL)) + { + return; + } + else if (s7_inst.reloc.exp.X_add_symbol) + { + s7_inst.error = _("li rd label isn't correct instruction form"); + return; + } + else + { + sprintf (append_str, "ld_i32hi r%d, %s", reg_rd, keep_data); + + if (s7_append_insn (append_str, TRUE) == (int) s7_FAIL) + return; + else + { + sprintf (append_str, "ld_i32lo r%d, %s", reg_rd, keep_data); + if (s7_append_insn (append_str, TRUE) == (int) s7_FAIL) + return; + + /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ + s7_inst.bwarn = -1; + } + } + } + } +} + +/* Handle mul/mulu/div/divu/rem/remu. */ + +static void +s7_do_macro_mul_rdrsrs (char *str) +{ + int reg_rd; + int reg_rs1; + int reg_rs2; + char *backupstr; + char append_str[s7_MAX_LITERAL_POOL_SIZE]; + + if (s7_university_version == 1) + as_warn ("%s", s7_ERR_FOR_SCORE5U_MUL_DIV); + + strcpy (append_str, str); + backupstr = append_str; + s7_skip_whitespace (backupstr); + if (((reg_rd = s7_reg_required_here (&backupstr, -1, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + || (s7_skip_past_comma (&backupstr) == (int) s7_FAIL) + || ((reg_rs1 = s7_reg_required_here (&backupstr, -1, s7_REG_TYPE_SCORE)) == (int) s7_FAIL)) + { + s7_inst.error = s7_BAD_ARGS; + return; + } + + if (s7_skip_past_comma (&backupstr) == (int) s7_FAIL) + { + /* rem/remu rA, rB is error format. */ + if (strcmp (s7_inst.name, "rem") == 0 || strcmp (s7_inst.name, "remu") == 0) + { + s7_SET_INSN_ERROR (s7_BAD_ARGS); + } + else + { + s7_SET_INSN_ERROR (NULL); + s7_do_rsrs (str); + } + return; + } + else + { + s7_SET_INSN_ERROR (NULL); + if (((reg_rs2 = s7_reg_required_here (&backupstr, -1, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + || (s7_end_of_line (backupstr) == (int) s7_FAIL)) + { + return; + } + else + { + char append_str1[s7_MAX_LITERAL_POOL_SIZE]; + + if (strcmp (s7_inst.name, "rem") == 0) + { + sprintf (append_str, "mul r%d, r%d", reg_rs1, reg_rs2); + sprintf (append_str1, "mfceh r%d", reg_rd); + } + else if (strcmp (s7_inst.name, "remu") == 0) + { + sprintf (append_str, "mulu r%d, r%d", reg_rs1, reg_rs2); + sprintf (append_str1, "mfceh r%d", reg_rd); + } + else + { + sprintf (append_str, "%s r%d, r%d", s7_inst.name, reg_rs1, reg_rs2); + sprintf (append_str1, "mfcel r%d", reg_rd); + } + + /* Output mul/mulu or div/divu or rem/remu. */ + if (s7_append_insn (append_str, TRUE) == (int) s7_FAIL) + return; + + /* Output mfcel or mfceh. */ + if (s7_append_insn (append_str1, TRUE) == (int) s7_FAIL) + return; + + /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ + s7_inst.bwarn = -1; + } + } +} + +static void +s7_exp_macro_ldst_abs (char *str) +{ + int reg_rd; + char *backupstr, *tmp; + char append_str[s7_MAX_LITERAL_POOL_SIZE]; + char verifystr[s7_MAX_LITERAL_POOL_SIZE]; + struct s7_score_it inst_backup; + int r1_bak = 0; + + r1_bak = s7_nor1; + s7_nor1 = 0; + memcpy (&inst_backup, &s7_inst, sizeof (struct s7_score_it)); + + strcpy (verifystr, str); + backupstr = verifystr; + s7_skip_whitespace (backupstr); + if ((reg_rd = s7_reg_required_here (&backupstr, -1, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + return; + + tmp = backupstr; + if (s7_skip_past_comma (&backupstr) == (int) s7_FAIL) + return; + + backupstr = tmp; + sprintf (append_str, "li r1 %s", backupstr); + s7_append_insn (append_str, TRUE); + + memcpy (&s7_inst, &inst_backup, sizeof (struct s7_score_it)); + sprintf (append_str, " r%d, [r1,0]", reg_rd); + s7_do_ldst_insn (append_str); + + s7_nor1 = r1_bak; +} + +static int +s7_nopic_need_relax (symbolS * sym, int before_relaxing) +{ + if (sym == NULL) + return 0; + else if (s7_USE_GLOBAL_POINTER_OPT && s7_g_switch_value > 0) + { + const char *symname; + const char *segname; + + /* Find out whether this symbol can be referenced off the $gp + register. It can be if it is smaller than the -G size or if + it is in the .sdata or .sbss section. Certain symbols can + not be referenced off the $gp, although it appears as though + they can. */ + symname = S_GET_NAME (sym); + if (symname != NULL + && (strcmp (symname, "eprol") == 0 + || strcmp (symname, "etext") == 0 + || strcmp (symname, "_gp") == 0 + || strcmp (symname, "edata") == 0 + || strcmp (symname, "_fbss") == 0 + || strcmp (symname, "_fdata") == 0 + || strcmp (symname, "_ftext") == 0 + || strcmp (symname, "end") == 0 + || strcmp (symname, GP_DISP_LABEL) == 0)) + { + return 1; + } + else if ((!S_IS_DEFINED (sym) || S_IS_COMMON (sym)) && (0 + /* We must defer this decision until after the whole file has been read, + since there might be a .extern after the first use of this symbol. */ + || (before_relaxing + && S_GET_VALUE (sym) == 0) + || (S_GET_VALUE (sym) != 0 + && S_GET_VALUE (sym) <= s7_g_switch_value))) + { + return 0; + } + + segname = segment_name (S_GET_SEGMENT (sym)); + return (strcmp (segname, ".sdata") != 0 + && strcmp (segname, ".sbss") != 0 + && strncmp (segname, ".sdata.", 7) != 0 + && strncmp (segname, ".gnu.linkonce.s.", 16) != 0); + } + /* We are not optimizing for the $gp register. */ + else + return 1; +} + +/* Build a relax frag for lw/st instruction when generating s7_PIC, + external symbol first and local symbol second. */ + +static void +s7_build_lwst_pic (int reg_rd, expressionS exp, const char *insn_name) +{ + symbolS *add_symbol = exp.X_add_symbol; + int add_number = exp.X_add_number; + struct s7_score_it fix_insts[s7_RELAX_INST_NUM]; + struct s7_score_it var_insts[s7_RELAX_INST_NUM]; + int fix_num = 0; + int var_num = 0; + char tmp[s7_MAX_LITERAL_POOL_SIZE]; + int r1_bak; + + r1_bak = s7_nor1; + s7_nor1 = 0; + + if ((add_number == 0) || (add_number >= -0x8000 && add_number <= 0x7fff)) + { + fix_num = 1; + var_num = 2; + + /* For an external symbol, two insns are generated; + For a local symbol, three insns are generated. */ + /* Fix part + For an external symbol: lw rD, <sym>($gp) + (BFD_RELOC_SCORE_GOT15) */ + sprintf (tmp, "lw_pic r1, %s", add_symbol->bsym->name); + if (s7_append_insn (tmp, FALSE) == (int) s7_FAIL) + return; + + memcpy (&fix_insts[0], &s7_inst, sizeof (struct s7_score_it)); + + /* Var part + For a local symbol : + lw rD, <sym>($gp) (BFD_RELOC_SCORE_GOT15) + addi rD, <sym> (BFD_RELOC_GOT_LO16) */ + s7_inst.reloc.type = BFD_RELOC_SCORE_GOT15; + memcpy (&var_insts[0], &s7_inst, sizeof (struct s7_score_it)); + sprintf (tmp, "addi_s_pic r1, %s", add_symbol->bsym->name); + if (s7_append_insn (tmp, FALSE) == (int) s7_FAIL) + return; + + memcpy (&var_insts[1], &s7_inst, sizeof (struct s7_score_it)); + s7_build_relax_frag (fix_insts, fix_num, var_insts, var_num, add_symbol); + + /* Insn 2 or Insn 3: lw/st rD, [r1, constant] */ + sprintf (tmp, "%s r%d, [r1, %d]", insn_name, reg_rd, add_number); + if (s7_append_insn (tmp, TRUE) == (int) s7_FAIL) + return; + + /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ + s7_inst.bwarn = -1; + } + else + { + s7_inst.error = _("PIC code offset overflow (max 16 signed bits)"); + return; + } + + s7_nor1 = r1_bak; +} + +static void +s7_do_macro_ldst_label (char *str) +{ + int i; + int ldst_gp_p = 0; + int reg_rd; + int r1_bak; + char *backup_str; + char *label_str; + char *absolute_value; + char append_str[3][s7_MAX_LITERAL_POOL_SIZE]; + char verifystr[s7_MAX_LITERAL_POOL_SIZE]; + struct s7_score_it inst_backup; + struct s7_score_it inst_expand[3]; + struct s7_score_it inst_main; + + memcpy (&inst_backup, &s7_inst, sizeof (struct s7_score_it)); + strcpy (verifystr, str); + backup_str = verifystr; + + s7_skip_whitespace (backup_str); + if ((reg_rd = s7_reg_required_here (&backup_str, -1, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + return; + + if (s7_skip_past_comma (&backup_str) == (int) s7_FAIL) + return; + + label_str = backup_str; + + /* Ld/st rD, [rA, imm] ld/st rD, [rA]+, imm ld/st rD, [rA, imm]+. */ + if (*backup_str == '[') + { + s7_inst.type = Rd_rvalueRs_preSI12; + s7_do_ldst_insn (str); + return; + } + + /* Ld/st rD, imm. */ + absolute_value = backup_str; + s7_inst.type = Rd_rvalueRs_SI15; + + if (s7_my_get_expression (&s7_inst.reloc.exp, &backup_str) == (int) s7_FAIL) + { + s7_inst.error = _("expression error"); + return; + } + else if ((s7_inst.reloc.exp.X_add_symbol == NULL) + && (s7_validate_immediate (s7_inst.reloc.exp.X_add_number, _VALUE, 0) == (int) s7_FAIL)) + { + s7_inst.error = _("value not in range [0, 0x7fffffff]"); + return; + } + else if (s7_end_of_line (backup_str) == (int) s7_FAIL) + { + s7_inst.error = _("end on line error"); + return; + } + else + { + if (s7_inst.reloc.exp.X_add_symbol == 0) + { + memcpy (&s7_inst, &inst_backup, sizeof (struct s7_score_it)); + s7_exp_macro_ldst_abs (str); + return; + } + } + + /* Ld/st rD, label. */ + s7_inst.type = Rd_rvalueRs_SI15; + backup_str = absolute_value; + if ((s7_data_op2 (&backup_str, 1, _GP_IMM15) == (int) s7_FAIL) + || (s7_end_of_line (backup_str) == (int) s7_FAIL)) + { + return; + } + else + { + if (s7_inst.reloc.exp.X_add_symbol == 0) + { + if (!s7_inst.error) + s7_inst.error = s7_BAD_ARGS; + + return; + } + + if (s7_score_pic == s7_PIC) + { + int ldst_idx = 0; + ldst_idx = s7_inst.instruction & OPC_PSEUDOLDST_MASK; + s7_build_lwst_pic (reg_rd, s7_inst.reloc.exp, s7_score_ldst_insns[ldst_idx * 3 + 0].template); + return; + } + else + { + if ((s7_inst.reloc.exp.X_add_number <= 0x3fff) + && (s7_inst.reloc.exp.X_add_number >= -0x4000) + && (!s7_nopic_need_relax (s7_inst.reloc.exp.X_add_symbol, 1))) + { + int ldst_idx = 0; + + /* Assign the real opcode. */ + ldst_idx = s7_inst.instruction & OPC_PSEUDOLDST_MASK; + s7_inst.instruction &= ~OPC_PSEUDOLDST_MASK; + s7_inst.instruction |= s7_score_ldst_insns[ldst_idx * 3 + 0].value; + s7_inst.instruction |= reg_rd << 20; + s7_inst.instruction |= s7_GP << 15; + s7_inst.relax_inst = 0x8000; + s7_inst.relax_size = 0; + ldst_gp_p = 1; + } + } + } + + /* Backup s7_inst. */ + memcpy (&inst_main, &s7_inst, sizeof (struct s7_score_it)); + r1_bak = s7_nor1; + s7_nor1 = 0; + + /* Determine which instructions should be output. */ + sprintf (append_str[0], "ld_i32hi r1, %s", label_str); + sprintf (append_str[1], "ld_i32lo r1, %s", label_str); + sprintf (append_str[2], "%s r%d, [r1, 0]", inst_backup.name, reg_rd); + + /* Generate three instructions. + la r1, label + ld/st rd, [r1, 0] */ + for (i = 0; i < 3; i++) + { + if (s7_append_insn (append_str[i], FALSE) == (int) s7_FAIL) + return; + + memcpy (&inst_expand[i], &s7_inst, sizeof (struct s7_score_it)); + } + + if (ldst_gp_p) + { + char *p; + + /* Adjust instruction opcode and to be relaxed instruction opcode. */ + inst_main.instruction = s7_adjust_paritybit (inst_main.instruction, s7_GET_INSN_CLASS (inst_main.type)); + inst_main.relax_size = inst_expand[0].size + inst_expand[1].size + inst_expand[2].size; + inst_main.type = Insn_GP; + + for (i = 0; i < 3; i++) + inst_expand[i].instruction = s7_adjust_paritybit (inst_expand[i].instruction + , s7_GET_INSN_CLASS (inst_expand[i].type)); + + /* Check data dependency. */ + s7_handle_dependency (&inst_main); + + /* Start a new frag if frag_now is not empty. */ + if (frag_now_fix () != 0) + { + if (!frag_now->tc_frag_data.is_insn) + frag_wane (frag_now); + + frag_new (0); + } + frag_grow (20); + + /* Write fr_fix part. */ + p = frag_more (inst_main.size); + s7_number_to_chars (p, inst_main.instruction, inst_main.size); + + if (inst_main.reloc.type != BFD_RELOC_NONE) + { + s7_fix_new_score (frag_now, p - frag_now->fr_literal, inst_main.size, + &inst_main.reloc.exp, inst_main.reloc.pc_rel, inst_main.reloc.type); + } + +#ifdef OBJ_ELF + dwarf2_emit_insn (inst_main.size); +#endif + + /* s7_GP instruction can not do optimization, only can do relax between + 1 instruction and 3 instructions. */ + p = frag_var (rs_machine_dependent, inst_main.relax_size + s7_RELAX_PAD_BYTE, 0, + s7_RELAX_ENCODE (inst_main.size, inst_main.relax_size, inst_main.type, 0, 4, 0), + inst_main.reloc.exp.X_add_symbol, 0, NULL); + + /* Write fr_var part. + no calling s7_gen_insn_frag, no fixS will be generated. */ + s7_number_to_chars (p, inst_expand[0].instruction, inst_expand[0].size); + p += inst_expand[0].size; + s7_number_to_chars (p, inst_expand[1].instruction, inst_expand[1].size); + p += inst_expand[1].size; + s7_number_to_chars (p, inst_expand[2].instruction, inst_expand[2].size); + } + else + { + s7_gen_insn_frag (&inst_expand[0], NULL); + s7_gen_insn_frag (&inst_expand[1], NULL); + s7_gen_insn_frag (&inst_expand[2], NULL); + } + s7_nor1 = r1_bak; + + /* Set bwarn as -1, so macro instruction itself will not be generated frag. */ + s7_inst.bwarn = -1; +} + +static void +s7_do_lw_pic (char *str) +{ + int reg_rd; + + s7_skip_whitespace (str); + if (((reg_rd = s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + || (s7_skip_past_comma (&str) == (int) s7_FAIL) + || (s7_my_get_expression (&s7_inst.reloc.exp, &str) == (int) s7_FAIL) + || (s7_end_of_line (str) == (int) s7_FAIL)) + { + return; + } + else + { + if (s7_inst.reloc.exp.X_add_symbol == 0) + { + if (!s7_inst.error) + s7_inst.error = s7_BAD_ARGS; + + return; + } + + s7_inst.instruction |= s7_GP << 15; + s7_inst.reloc.type = BFD_RELOC_SCORE_GOT15; + } +} + +static void +s7_do_empty (char *str) +{ + str = str; + if (s7_university_version == 1) + { + if (((s7_inst.instruction & 0x3e0003ff) == 0x0c000004) + || ((s7_inst.instruction & 0x3e0003ff) == 0x0c000024) + || ((s7_inst.instruction & 0x3e0003ff) == 0x0c000044) + || ((s7_inst.instruction & 0x3e0003ff) == 0x0c000064)) + { + s7_inst.error = s7_ERR_FOR_SCORE5U_MMU; + return; + } + } + if (s7_end_of_line (str) == (int) s7_FAIL) + return; + + if (s7_inst.relax_inst != 0x8000) + { + if (s7_inst.type == NO_OPD) + { + s7_inst.relax_size = 2; + } + else + { + s7_inst.relax_size = 4; + } + } +} + +static void +s7_do_jump (char *str) +{ + char *save_in; + + s7_skip_whitespace (str); + if (s7_my_get_expression (&s7_inst.reloc.exp, &str) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + return; + + if (s7_inst.reloc.exp.X_add_symbol == 0) + { + s7_inst.error = _("lacking label "); + return; + } + + if (!(s7_inst.reloc.exp.X_add_number >= -16777216 + && s7_inst.reloc.exp.X_add_number <= 16777215)) + { + s7_inst.error = _("invalid constant: 25 bit expression not in range [-16777216, 16777215]"); + return; + } + + save_in = input_line_pointer; + input_line_pointer = str; + s7_inst.reloc.type = BFD_RELOC_SCORE_JMP; + s7_inst.reloc.pc_rel = 1; + input_line_pointer = save_in; +} + +static void +s7_do16_jump (char *str) +{ + s7_skip_whitespace (str); + if (s7_my_get_expression (&s7_inst.reloc.exp, &str) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + { + return; + } + else if (s7_inst.reloc.exp.X_add_symbol == 0) + { + s7_inst.error = _("lacking label "); + return; + } + else if (!(s7_inst.reloc.exp.X_add_number >= 0 + && s7_inst.reloc.exp.X_add_number <= 4095)) + { + s7_inst.error = _("invalid constant: 12 bit expression not in range [0, 4095]"); + return; + } + + s7_inst.reloc.type = BFD_RELOC_SCORE16_JMP; + s7_inst.reloc.pc_rel = 1; +} + +static void +s7_do_branch (char *str) +{ + unsigned long abs_value = 0; + + if (s7_my_get_expression (&s7_inst.reloc.exp, &str) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL) + { + return; + } + else if (s7_inst.reloc.exp.X_add_symbol == 0) + { + s7_inst.error = _("lacking label "); + return; + } + else if (!(s7_inst.reloc.exp.X_add_number >= -524288 + && s7_inst.reloc.exp.X_add_number <= 524287)) + { + s7_inst.error = _("invalid constant: 20 bit expression not in range -2^19..2^19"); + return; + } + + s7_inst.reloc.type = BFD_RELOC_SCORE_BRANCH; + s7_inst.reloc.pc_rel = 1; + + /* Branch 32 offset field : 20 bit, 16 bit branch offset field : 8 bit. */ + s7_inst.instruction |= (s7_inst.reloc.exp.X_add_number & 0x3fe) | ((s7_inst.reloc.exp.X_add_number & 0xffc00) << 5); + + /* Compute 16 bit branch instruction. */ + if ((s7_inst.relax_inst != 0x8000) && (abs_value & 0xfffffe00) == 0) + { + s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0xf) << 8); + s7_inst.relax_inst |= ((s7_inst.reloc.exp.X_add_number >> 1) & 0xff); + s7_inst.relax_size = 2; + } + else + { + s7_inst.relax_inst = 0x8000; + } +} + +static void +s7_do16_branch (char *str) +{ + if ((s7_my_get_expression (&s7_inst.reloc.exp, &str) == (int) s7_FAIL + || s7_end_of_line (str) == (int) s7_FAIL)) + { + ; + } + else if (s7_inst.reloc.exp.X_add_symbol == 0) + { + s7_inst.error = _("lacking label"); + } + else if (!(s7_inst.reloc.exp.X_add_number >= -512 + && s7_inst.reloc.exp.X_add_number <= 511)) + { + s7_inst.error = _("invalid constant: 10 bit expression not in range [-2^9, 2^9-1]"); + } + else + { + s7_inst.reloc.type = BFD_RELOC_SCORE16_BRANCH; + s7_inst.reloc.pc_rel = 1; + s7_inst.instruction |= ((s7_inst.reloc.exp.X_add_number >> 1) & 0xff); + } +} + +/* Iterate over the base tables to create the instruction patterns. */ + +static void +s7_build_score_ops_hsh (void) +{ + unsigned int i; + static struct obstack insn_obstack; + + obstack_begin (&insn_obstack, 4000); + for (i = 0; i < sizeof (s7_score_insns) / sizeof (struct s7_asm_opcode); i++) + { + const struct s7_asm_opcode *insn = s7_score_insns + i; + unsigned len = strlen (insn->template); + struct s7_asm_opcode *new; + char *template; + new = obstack_alloc (&insn_obstack, sizeof (struct s7_asm_opcode)); + template = obstack_alloc (&insn_obstack, len + 1); + + strcpy (template, insn->template); + new->template = template; + new->parms = insn->parms; + new->value = insn->value; + new->relax_value = insn->relax_value; + new->type = insn->type; + new->bitmask = insn->bitmask; + hash_insert (s7_score_ops_hsh, new->template, (void *) new); + } +} + +static void +s7_build_dependency_insn_hsh (void) +{ + unsigned int i; + static struct obstack dependency_obstack; + + obstack_begin (&dependency_obstack, 4000); + for (i = 0; i < ARRAY_SIZE (s7_insn_to_dependency_table); i++) + { + const struct s7_insn_to_dependency *tmp = s7_insn_to_dependency_table + i; + unsigned len = strlen (tmp->insn_name); + struct s7_insn_to_dependency *new; + + new = obstack_alloc (&dependency_obstack, sizeof (struct s7_insn_to_dependency)); + new->insn_name = obstack_alloc (&dependency_obstack, len + 1); + + strcpy (new->insn_name, tmp->insn_name); + new->type = tmp->type; + hash_insert (s7_dependency_insn_hsh, new->insn_name, (void *) new); + } +} + +static valueT +s7_md_chars_to_number (char *buf, int n) +{ + valueT result = 0; + unsigned char *where = (unsigned char *) buf; + + if (target_big_endian) + { + while (n--) + { + result <<= 8; + result |= (*where++ & 255); + } + } + else + { + while (n--) + { + result <<= 8; + result |= (where[n] & 255); + } + } + + return result; +} + +/* Return true if the given symbol should be considered local for s7_PIC. */ + +static bfd_boolean +s7_pic_need_relax (symbolS *sym, asection *segtype) +{ + asection *symsec; + bfd_boolean linkonce; + + /* Handle the case of a symbol equated to another symbol. */ + while (symbol_equated_reloc_p (sym)) + { + symbolS *n; + + /* It's possible to get a loop here in a badly written + program. */ + n = symbol_get_value_expression (sym)->X_add_symbol; + if (n == sym) + break; + sym = n; + } + + symsec = S_GET_SEGMENT (sym); + + /* Duplicate the test for LINK_ONCE sections as in adjust_reloc_syms */ + linkonce = FALSE; + if (symsec != segtype && ! S_IS_LOCAL (sym)) + { + if ((bfd_get_section_flags (stdoutput, symsec) & SEC_LINK_ONCE) != 0) + linkonce = TRUE; + + /* The GNU toolchain uses an extension for ELF: a section + beginning with the magic string .gnu.linkonce is a linkonce + section. */ + if (strncmp (segment_name (symsec), ".gnu.linkonce", + sizeof ".gnu.linkonce" - 1) == 0) + linkonce = TRUE; + } + + /* This must duplicate the test in adjust_reloc_syms. */ + return (symsec != &bfd_und_section + && symsec != &bfd_abs_section + && ! bfd_is_com_section (symsec) + && !linkonce +#ifdef OBJ_ELF + /* A global or weak symbol is treated as external. */ + && (OUTPUT_FLAVOR != bfd_target_elf_flavour + || (! S_IS_WEAK (sym) && ! S_IS_EXTERNAL (sym))) +#endif + ); +} + +static int +s7_judge_size_before_relax (fragS * fragp, asection *sec) +{ + int change = 0; + + if (s7_score_pic == s7_NO_PIC) + change = s7_nopic_need_relax (fragp->fr_symbol, 0); + else + change = s7_pic_need_relax (fragp->fr_symbol, sec); + + if (change == 1) + { + /* Only at the first time determining whether s7_GP instruction relax should be done, + return the difference between insntruction size and instruction relax size. */ + if (fragp->fr_opcode == NULL) + { + fragp->fr_fix = s7_RELAX_NEW (fragp->fr_subtype); + fragp->fr_opcode = fragp->fr_literal + s7_RELAX_RELOC1 (fragp->fr_subtype); + return s7_RELAX_NEW (fragp->fr_subtype) - s7_RELAX_OLD (fragp->fr_subtype); + } + } + + return 0; +} + +static int +s7_b32_relax_to_b16 (fragS * fragp) +{ + int grows = 0; + int relaxable_p = 0; + int old; + int new; + int frag_addr = fragp->fr_address + fragp->insn_addr; + + addressT symbol_address = 0; + symbolS *s; + offsetT offset; + unsigned long value; + unsigned long abs_value; + + /* FIXME : here may be able to modify better . + I don't know how to get the fragp's section , + so in relax stage , it may be wrong to calculate the symbol's offset when the frag's section + is different from the symbol's. */ + + old = s7_RELAX_OLD (fragp->fr_subtype); + new = s7_RELAX_NEW (fragp->fr_subtype); + relaxable_p = s7_RELAX_OPT (fragp->fr_subtype); + + s = fragp->fr_symbol; + /* b/bl immediate */ + if (s == NULL) + frag_addr = 0; + else + { + if (s->bsym != 0) + symbol_address = (addressT) s->sy_frag->fr_address; + } + + value = s7_md_chars_to_number (fragp->fr_literal, s7_INSN_SIZE); + + /* b 32's offset : 20 bit, b 16's tolerate field : 0xff. */ + offset = ((value & 0x3ff0000) >> 6) | (value & 0x3fe); + if ((offset & 0x80000) == 0x80000) + offset |= 0xfff00000; + + abs_value = offset + symbol_address - frag_addr; + if ((abs_value & 0x80000000) == 0x80000000) + abs_value = 0xffffffff - abs_value + 1; + + /* Relax branch 32 to branch 16. */ + if (relaxable_p && (s->bsym != NULL) && ((abs_value & 0xffffff00) == 0) + && (S_IS_DEFINED (s) && !S_IS_COMMON (s) && !S_IS_EXTERNAL (s))) + { + /* do nothing. */ + } + else + { + /* Branch 32 can not be relaxed to b 16, so clear OPT bit. */ + fragp->fr_opcode = NULL; + fragp->fr_subtype = s7_RELAX_OPT_CLEAR (fragp->fr_subtype); + } + + return grows; +} + +static void +s7_parse_pce_inst (char *insnstr) +{ + char c; + char *p; + char *q; + char first[s7_MAX_LITERAL_POOL_SIZE]; + char second[s7_MAX_LITERAL_POOL_SIZE]; + struct s7_score_it pec_part_1; + + /* Get first part string of PCE. */ + p = strstr (insnstr, "||"); + c = *p; + *p = '\0'; + sprintf (first, "%s", insnstr); + + /* Get second part string of PCE. */ + *p = c; + p += 2; + sprintf (second, "%s", p); + + s7_parse_16_32_inst (first, FALSE); + if (s7_inst.error) + return; + + memcpy (&pec_part_1, &s7_inst, sizeof (s7_inst)); + + q = second; + while (q && *q) + { + *q = TOLOWER (*q); + q++; + } + + s7_parse_16_32_inst (second, FALSE); + if (s7_inst.error) + return; + + if ( ((pec_part_1.size == s7_INSN_SIZE) && (s7_inst.size == s7_INSN_SIZE)) + || ((pec_part_1.size == s7_INSN_SIZE) && (s7_inst.size == s7_INSN16_SIZE)) + || ((pec_part_1.size == s7_INSN16_SIZE) && (s7_inst.size == s7_INSN_SIZE))) + { + s7_inst.error = _("pce instruction error (16 bit || 16 bit)'"); + sprintf (s7_inst.str, insnstr); + return; + } + + if (!s7_inst.error) + s7_gen_insn_frag (&pec_part_1, &s7_inst); +} + + + +static void +s7_insert_reg (const struct s7_reg_entry *r, struct hash_control *htab) +{ + int i = 0; + int len = strlen (r->name) + 2; + char *buf = xmalloc (len); + char *buf2 = xmalloc (len); + + strcpy (buf + i, r->name); + for (i = 0; buf[i]; i++) + { + buf2[i] = TOUPPER (buf[i]); + } + buf2[i] = '\0'; + + hash_insert (htab, buf, (void *) r); + hash_insert (htab, buf2, (void *) r); +} + +static void +s7_build_reg_hsh (struct s7_reg_map *map) +{ + const struct s7_reg_entry *r; + + if ((map->htab = hash_new ()) == NULL) + { + as_fatal (_("virtual memory exhausted")); + } + for (r = map->names; r->name != NULL; r++) + { + s7_insert_reg (r, map->htab); + } +} + + + +/* If we change section we must dump the literal pool first. */ +static void +s7_s_score_bss (int ignore ATTRIBUTE_UNUSED) +{ + subseg_set (bss_section, (subsegT) get_absolute_expression ()); + demand_empty_rest_of_line (); +} + +static void +s7_s_score_text (int ignore) +{ + obj_elf_text (ignore); + record_alignment (now_seg, 2); +} + +static void +s7_s_section (int ignore) +{ + obj_elf_section (ignore); + if ((bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0) + record_alignment (now_seg, 2); + +} + +static void +s7_s_change_sec (int sec) +{ + segT seg; + +#ifdef OBJ_ELF + /* The ELF backend needs to know that we are changing sections, so + that .previous works correctly. We could do something like check + for an obj_section_change_hook macro, but that might be confusing + as it would not be appropriate to use it in the section changing + functions in read.c, since obj-elf.c intercepts those. FIXME: + This should be cleaner, somehow. */ + obj_elf_section_change_hook (); +#endif + switch (sec) + { + case 'r': + seg = subseg_new (s7_RDATA_SECTION_NAME, (subsegT) get_absolute_expression ()); + bfd_set_section_flags (stdoutput, seg, (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_RELOC | SEC_DATA)); + if (strcmp (TARGET_OS, "elf") != 0) + record_alignment (seg, 4); + demand_empty_rest_of_line (); + break; + case 's': + seg = subseg_new (".sdata", (subsegT) get_absolute_expression ()); + bfd_set_section_flags (stdoutput, seg, SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA); + if (strcmp (TARGET_OS, "elf") != 0) + record_alignment (seg, 4); + demand_empty_rest_of_line (); + break; + } +} + +static void +s7_s_score_mask (int reg_type ATTRIBUTE_UNUSED) +{ + long mask, off; + + if (s7_cur_proc_ptr == NULL) + { + as_warn (_(".mask outside of .ent")); + demand_empty_rest_of_line (); + return; + } + if (get_absolute_expression_and_terminator (&mask) != ',') + { + as_warn (_("Bad .mask directive")); + --input_line_pointer; + demand_empty_rest_of_line (); + return; + } + off = get_absolute_expression (); + s7_cur_proc_ptr->reg_mask = mask; + s7_cur_proc_ptr->reg_offset = off; + demand_empty_rest_of_line (); +} + +static symbolS * +s7_get_symbol (void) +{ + int c; + char *name; + symbolS *p; + + name = input_line_pointer; + c = get_symbol_end (); + p = (symbolS *) symbol_find_or_make (name); + *input_line_pointer = c; + return p; +} + +static long +s7_get_number (void) +{ + int negative = 0; + long val = 0; + + if (*input_line_pointer == '-') + { + ++input_line_pointer; + negative = 1; + } + if (!ISDIGIT (*input_line_pointer)) + as_bad (_("expected simple number")); + if (input_line_pointer[0] == '0') + { + if (input_line_pointer[1] == 'x') + { + input_line_pointer += 2; + while (ISXDIGIT (*input_line_pointer)) + { + val <<= 4; + val |= hex_value (*input_line_pointer++); + } + return negative ? -val : val; + } + else + { + ++input_line_pointer; + while (ISDIGIT (*input_line_pointer)) + { + val <<= 3; + val |= *input_line_pointer++ - '0'; + } + return negative ? -val : val; + } + } + if (!ISDIGIT (*input_line_pointer)) + { + printf (_(" *input_line_pointer == '%c' 0x%02x\n"), *input_line_pointer, *input_line_pointer); + as_warn (_("invalid number")); + return -1; + } + while (ISDIGIT (*input_line_pointer)) + { + val *= 10; + val += *input_line_pointer++ - '0'; + } + return negative ? -val : val; +} + +/* The .aent and .ent directives. */ + +static void +s7_s_score_ent (int aent) +{ + symbolS *symbolP; + int maybe_text; + + symbolP = s7_get_symbol (); + if (*input_line_pointer == ',') + ++input_line_pointer; + SKIP_WHITESPACE (); + if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-') + s7_get_number (); + +#ifdef BFD_ASSEMBLER + if ((bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0) + maybe_text = 1; + else + maybe_text = 0; +#else + if (now_seg != data_section && now_seg != bss_section) + maybe_text = 1; + else + maybe_text = 0; +#endif + if (!maybe_text) + as_warn (_(".ent or .aent not in text section.")); + if (!aent && s7_cur_proc_ptr) + as_warn (_("missing .end")); + if (!aent) + { + s7_cur_proc_ptr = &s7_cur_proc; + s7_cur_proc_ptr->reg_mask = 0xdeadbeaf; + s7_cur_proc_ptr->reg_offset = 0xdeadbeaf; + s7_cur_proc_ptr->fpreg_mask = 0xdeafbeaf; + s7_cur_proc_ptr->leaf = 0xdeafbeaf; + s7_cur_proc_ptr->frame_offset = 0xdeafbeaf; + s7_cur_proc_ptr->frame_reg = 0xdeafbeaf; + s7_cur_proc_ptr->pc_reg = 0xdeafbeaf; + s7_cur_proc_ptr->isym = symbolP; + symbol_get_bfdsym (symbolP)->flags |= BSF_FUNCTION; + ++s7_numprocs; + if (debug_type == DEBUG_STABS) + stabs_generate_asm_func (S_GET_NAME (symbolP), S_GET_NAME (symbolP)); + } + demand_empty_rest_of_line (); +} + +static void +s7_s_score_frame (int ignore ATTRIBUTE_UNUSED) +{ + char *backupstr; + char str[30]; + long val; + int i = 0; + + backupstr = input_line_pointer; + +#ifdef OBJ_ELF + if (s7_cur_proc_ptr == NULL) + { + as_warn (_(".frame outside of .ent")); + demand_empty_rest_of_line (); + return; + } + s7_cur_proc_ptr->frame_reg = s7_reg_required_here ((&backupstr), 0, s7_REG_TYPE_SCORE); + SKIP_WHITESPACE (); + s7_skip_past_comma (&backupstr); + while (*backupstr != ',') + { + str[i] = *backupstr; + i++; + backupstr++; + } + str[i] = '\0'; + val = atoi (str); + + SKIP_WHITESPACE (); + s7_skip_past_comma (&backupstr); + s7_cur_proc_ptr->frame_offset = val; + s7_cur_proc_ptr->pc_reg = s7_reg_required_here ((&backupstr), 0, s7_REG_TYPE_SCORE); + + SKIP_WHITESPACE (); + s7_skip_past_comma (&backupstr); + i = 0; + while (*backupstr != '\n') + { + str[i] = *backupstr; + i++; + backupstr++; + } + str[i] = '\0'; + val = atoi (str); + s7_cur_proc_ptr->leaf = val; + SKIP_WHITESPACE (); + s7_skip_past_comma (&backupstr); + +#endif /* OBJ_ELF */ + while (input_line_pointer != backupstr) + input_line_pointer++; +} + +/* The .end directive. */ + +static void +s7_s_score_end (int x ATTRIBUTE_UNUSED) +{ + symbolS *p; + int maybe_text; + + /* Generate a .pdr section. */ + segT saved_seg = now_seg; + subsegT saved_subseg = now_subseg; + valueT dot; + expressionS exp; + char *fragp; + + if (!is_end_of_line[(unsigned char)*input_line_pointer]) + { + p = s7_get_symbol (); + demand_empty_rest_of_line (); + } + else + p = NULL; + +#ifdef BFD_ASSEMBLER + if ((bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0) + maybe_text = 1; + else + maybe_text = 0; +#else + if (now_seg != data_section && now_seg != bss_section) + maybe_text = 1; + else + maybe_text = 0; +#endif + + if (!maybe_text) + as_warn (_(".end not in text section")); + if (!s7_cur_proc_ptr) + { + as_warn (_(".end directive without a preceding .ent directive.")); + demand_empty_rest_of_line (); + return; + } + if (p != NULL) + { + assert (S_GET_NAME (p)); + if (strcmp (S_GET_NAME (p), S_GET_NAME (s7_cur_proc_ptr->isym))) + as_warn (_(".end symbol does not match .ent symbol.")); + if (debug_type == DEBUG_STABS) + stabs_generate_asm_endfunc (S_GET_NAME (p), S_GET_NAME (p)); + } + else + as_warn (_(".end directive missing or unknown symbol")); + + if ((s7_cur_proc_ptr->reg_mask == 0xdeadbeaf) || + (s7_cur_proc_ptr->reg_offset == 0xdeadbeaf) || + (s7_cur_proc_ptr->leaf == 0xdeafbeaf) || + (s7_cur_proc_ptr->frame_offset == 0xdeafbeaf) || + (s7_cur_proc_ptr->frame_reg == 0xdeafbeaf) || (s7_cur_proc_ptr->pc_reg == 0xdeafbeaf)); + + else + { + dot = frag_now_fix (); + assert (s7_pdr_seg); + subseg_set (s7_pdr_seg, 0); + /* Write the symbol. */ + exp.X_op = O_symbol; + exp.X_add_symbol = p; + exp.X_add_number = 0; + emit_expr (&exp, 4); + fragp = frag_more (7 * 4); + s7_number_to_chars (fragp, (valueT) s7_cur_proc_ptr->reg_mask, 4); + s7_number_to_chars (fragp + 4, (valueT) s7_cur_proc_ptr->reg_offset, 4); + s7_number_to_chars (fragp + 8, (valueT) s7_cur_proc_ptr->fpreg_mask, 4); + s7_number_to_chars (fragp + 12, (valueT) s7_cur_proc_ptr->leaf, 4); + s7_number_to_chars (fragp + 16, (valueT) s7_cur_proc_ptr->frame_offset, 4); + s7_number_to_chars (fragp + 20, (valueT) s7_cur_proc_ptr->frame_reg, 4); + s7_number_to_chars (fragp + 24, (valueT) s7_cur_proc_ptr->pc_reg, 4); + subseg_set (saved_seg, saved_subseg); + + } + s7_cur_proc_ptr = NULL; +} + +/* Handle the .set pseudo-op. */ + +static void +s7_s_score_set (int x ATTRIBUTE_UNUSED) +{ + int i = 0; + char name[s7_MAX_LITERAL_POOL_SIZE]; + char * orig_ilp = input_line_pointer; + + while (!is_end_of_line[(unsigned char)*input_line_pointer]) + { + name[i] = (char) * input_line_pointer; + i++; + ++input_line_pointer; + } + + name[i] = '\0'; + + if (strcmp (name, "nwarn") == 0) + { + s7_warn_fix_data_dependency = 0; + } + else if (strcmp (name, "fixdd") == 0) + { + s7_fix_data_dependency = 1; + } + else if (strcmp (name, "nofixdd") == 0) + { + s7_fix_data_dependency = 0; + } + else if (strcmp (name, "r1") == 0) + { + s7_nor1 = 0; + } + else if (strcmp (name, "nor1") == 0) + { + s7_nor1 = 1; + } + else if (strcmp (name, "optimize") == 0) + { + s7_g_opt = 1; + } + else if (strcmp (name, "volatile") == 0) + { + s7_g_opt = 0; + } + else if (strcmp (name, "pic") == 0) + { + s7_score_pic = s7_PIC; + } + else + { + input_line_pointer = orig_ilp; + s_set (0); + } +} + +/* Handle the .cpload pseudo-op. This is used when generating s7_PIC code. It sets the + $gp register for the function based on the function address, which is in the register + named in the argument. This uses a relocation against GP_DISP_LABEL, which is handled + specially by the linker. The result is: + ldis gp, %hi(GP_DISP_LABEL) + ori gp, %low(GP_DISP_LABEL) + add gp, gp, .cpload argument + The .cpload argument is normally r29. */ + +static void +s7_s_score_cpload (int ignore ATTRIBUTE_UNUSED) +{ + int reg; + char insn_str[s7_MAX_LITERAL_POOL_SIZE]; + + /* If we are not generating s7_PIC code, .cpload is ignored. */ + if (s7_score_pic == s7_NO_PIC) + { + s_ignore (0); + return; + } + + if ((reg = s7_reg_required_here (&input_line_pointer, -1, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + return; + + demand_empty_rest_of_line (); + + sprintf (insn_str, "ld_i32hi r%d, %s", s7_GP, GP_DISP_LABEL); + if (s7_append_insn (insn_str, TRUE) == (int) s7_FAIL) + return; + + sprintf (insn_str, "ld_i32lo r%d, %s", s7_GP, GP_DISP_LABEL); + if (s7_append_insn (insn_str, TRUE) == (int) s7_FAIL) + return; + + sprintf (insn_str, "add r%d, r%d, r%d", s7_GP, s7_GP, reg); + if (s7_append_insn (insn_str, TRUE) == (int) s7_FAIL) + return; +} + +/* Handle the .cprestore pseudo-op. This stores $gp into a given + offset from $sp. The offset is remembered, and after making a s7_PIC + call $gp is restored from that location. */ + +static void +s7_s_score_cprestore (int ignore ATTRIBUTE_UNUSED) +{ + int reg; + int cprestore_offset; + char insn_str[s7_MAX_LITERAL_POOL_SIZE]; + + /* If we are not generating s7_PIC code, .cprestore is ignored. */ + if (s7_score_pic == s7_NO_PIC) + { + s_ignore (0); + return; + } + + if ((reg = s7_reg_required_here (&input_line_pointer, -1, s7_REG_TYPE_SCORE)) == (int) s7_FAIL + || s7_skip_past_comma (&input_line_pointer) == (int) s7_FAIL) + { + return; + } + + cprestore_offset = get_absolute_expression (); + + if (cprestore_offset <= 0x3fff) + { + sprintf (insn_str, "sw r%d, [r%d, %d]", s7_GP, reg, cprestore_offset); + if (s7_append_insn (insn_str, TRUE) == (int) s7_FAIL) + return; + } + else + { + int r1_bak; + + r1_bak = s7_nor1; + s7_nor1 = 0; + + sprintf (insn_str, "li r1, %d", cprestore_offset); + if (s7_append_insn (insn_str, TRUE) == (int) s7_FAIL) + return; + + sprintf (insn_str, "add r1, r1, r%d", reg); + if (s7_append_insn (insn_str, TRUE) == (int) s7_FAIL) + return; + + sprintf (insn_str, "sw r%d, [r1]", s7_GP); + if (s7_append_insn (insn_str, TRUE) == (int) s7_FAIL) + return; + + s7_nor1 = r1_bak; + } + + demand_empty_rest_of_line (); +} + +/* Handle the .gpword pseudo-op. This is used when generating s7_PIC + code. It generates a 32 bit s7_GP relative reloc. */ + +static void +s7_s_score_gpword (int ignore ATTRIBUTE_UNUSED) +{ + expressionS ex; + char *p; + + /* When not generating s7_PIC code, this is treated as .word. */ + if (s7_score_pic == s7_NO_PIC) + { + cons (4); + return; + } + expression (&ex); + if (ex.X_op != O_symbol || ex.X_add_number != 0) + { + as_bad (_("Unsupported use of .gpword")); + ignore_rest_of_line (); + } + p = frag_more (4); + s7_number_to_chars (p, (valueT) 0, 4); + fix_new_exp (frag_now, p - frag_now->fr_literal, 4, &ex, FALSE, BFD_RELOC_GPREL32); + demand_empty_rest_of_line (); +} + +/* Handle the .cpadd pseudo-op. This is used when dealing with switch + tables in s7_PIC code. */ + +static void +s7_s_score_cpadd (int ignore ATTRIBUTE_UNUSED) +{ + int reg; + char insn_str[s7_MAX_LITERAL_POOL_SIZE]; + + /* If we are not generating s7_PIC code, .cpload is ignored. */ + if (s7_score_pic == s7_NO_PIC) + { + s_ignore (0); + return; + } + + if ((reg = s7_reg_required_here (&input_line_pointer, -1, s7_REG_TYPE_SCORE)) == (int) s7_FAIL) + { + return; + } + demand_empty_rest_of_line (); + + /* Add $gp to the register named as an argument. */ + sprintf (insn_str, "add r%d, r%d, r%d", reg, reg, s7_GP); + if (s7_append_insn (insn_str, TRUE) == (int) s7_FAIL) + return; +} + +#ifndef TC_IMPLICIT_LCOMM_ALIGNMENT +#define TC_IMPLICIT_LCOMM_ALIGNMENT(SIZE, P2VAR) \ + do \ + { \ + if ((SIZE) >= 8) \ + (P2VAR) = 3; \ + else if ((SIZE) >= 4) \ + (P2VAR) = 2; \ + else if ((SIZE) >= 2) \ + (P2VAR) = 1; \ + else \ + (P2VAR) = 0; \ + } \ + while (0) +#endif + +static void +s7_s_score_lcomm (int bytes_p) +{ + char *name; + char c; + char *p; + int temp; + symbolS *symbolP; + segT current_seg = now_seg; + subsegT current_subseg = now_subseg; + const int max_alignment = 15; + int align = 0; + segT bss_seg = bss_section; + int needs_align = 0; + + name = input_line_pointer; + c = get_symbol_end (); + p = input_line_pointer; + *p = c; + + if (name == p) + { + as_bad (_("expected symbol name")); + discard_rest_of_line (); + return; + } + + SKIP_WHITESPACE (); + + /* Accept an optional comma after the name. The comma used to be + required, but Irix 5 cc does not generate it. */ + if (*input_line_pointer == ',') + { + ++input_line_pointer; + SKIP_WHITESPACE (); + } + + if (is_end_of_line[(unsigned char)*input_line_pointer]) + { + as_bad (_("missing size expression")); + return; + } + + if ((temp = get_absolute_expression ()) < 0) + { + as_warn (_("BSS length (%d) < 0 ignored"), temp); + ignore_rest_of_line (); + return; + } + +#if defined (TC_SCORE) + if (OUTPUT_FLAVOR == bfd_target_ecoff_flavour || OUTPUT_FLAVOR == bfd_target_elf_flavour) + { + /* For Score and Alpha ECOFF or ELF, small objects are put in .sbss. */ + if ((unsigned) temp <= bfd_get_gp_size (stdoutput)) + { + bss_seg = subseg_new (".sbss", 1); + seg_info (bss_seg)->bss = 1; +#ifdef BFD_ASSEMBLER + if (!bfd_set_section_flags (stdoutput, bss_seg, SEC_ALLOC)) + as_warn (_("error setting flags for \".sbss\": %s"), bfd_errmsg (bfd_get_error ())); +#endif + } + } +#endif + + SKIP_WHITESPACE (); + if (*input_line_pointer == ',') + { + ++input_line_pointer; + SKIP_WHITESPACE (); + + if (is_end_of_line[(unsigned char)*input_line_pointer]) + { + as_bad (_("missing alignment")); + return; + } + else + { + align = get_absolute_expression (); + needs_align = 1; + } + } + + if (!needs_align) + { + TC_IMPLICIT_LCOMM_ALIGNMENT (temp, align); + + /* Still zero unless TC_IMPLICIT_LCOMM_ALIGNMENT set it. */ + if (align) + record_alignment (bss_seg, align); + } + + if (needs_align) + { + if (bytes_p) + { + /* Convert to a power of 2. */ + if (align != 0) + { + unsigned int i; + + for (i = 0; align != 0; align >>= 1, ++i) + ; + align = i - 1; + } + } + + if (align > max_alignment) + { + align = max_alignment; + as_warn (_("alignment too large; %d assumed"), align); + } + else if (align < 0) + { + align = 0; + as_warn (_("alignment negative; 0 assumed")); + } + + record_alignment (bss_seg, align); + } + else + { + /* Assume some objects may require alignment on some systems. */ +#if defined (TC_ALPHA) && ! defined (VMS) + if (temp > 1) + { + align = ffs (temp) - 1; + if (temp % (1 << align)) + abort (); + } +#endif + } + + *p = 0; + symbolP = symbol_find_or_make (name); + *p = c; + + if ( +#if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT) \ + || defined (OBJ_BOUT) || defined (OBJ_MAYBE_BOUT)) +#ifdef BFD_ASSEMBLER + (OUTPUT_FLAVOR != bfd_target_aout_flavour + || (S_GET_OTHER (symbolP) == 0 && S_GET_DESC (symbolP) == 0)) && +#else + (S_GET_OTHER (symbolP) == 0 && S_GET_DESC (symbolP) == 0) && +#endif +#endif + (S_GET_SEGMENT (symbolP) == bss_seg || (!S_IS_DEFINED (symbolP) && S_GET_VALUE (symbolP) == 0))) + { + char *pfrag; + + subseg_set (bss_seg, 1); + + if (align) + frag_align (align, 0, 0); + + /* Detach from old frag. */ + if (S_GET_SEGMENT (symbolP) == bss_seg) + symbol_get_frag (symbolP)->fr_symbol = NULL; + + symbol_set_frag (symbolP, frag_now); + pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, (offsetT) temp, NULL); + *pfrag = 0; + + + S_SET_SEGMENT (symbolP, bss_seg); + +#ifdef OBJ_COFF + /* The symbol may already have been created with a preceding + ".globl" directive -- be careful not to step on storage class + in that case. Otherwise, set it to static. */ + if (S_GET_STORAGE_CLASS (symbolP) != C_EXT) + { + S_SET_STORAGE_CLASS (symbolP, C_STAT); + } +#endif /* OBJ_COFF */ + +#ifdef S_SET_SIZE + S_SET_SIZE (symbolP, temp); +#endif + } + else + as_bad (_("symbol `%s' is already defined"), S_GET_NAME (symbolP)); + + subseg_set (current_seg, current_subseg); + + demand_empty_rest_of_line (); +} + + + +static void +s7_begin (void) +{ + unsigned int i; + segT seg; + subsegT subseg; + + if ((s7_score_ops_hsh = hash_new ()) == NULL) + as_fatal (_("virtual memory exhausted")); + + s7_build_score_ops_hsh (); + + if ((s7_dependency_insn_hsh = hash_new ()) == NULL) + as_fatal (_("virtual memory exhausted")); + + s7_build_dependency_insn_hsh (); + + for (i = (int) REG_TYPE_FIRST; i < (int) s7_REG_TYPE_MAX; i++) + s7_build_reg_hsh (s7_all_reg_maps + i); + + /* Initialize dependency vector. */ + s7_init_dependency_vector (); + + bfd_set_arch_mach (stdoutput, TARGET_ARCH, 0); + seg = now_seg; + subseg = now_subseg; + s7_pdr_seg = subseg_new (".pdr", (subsegT) 0); + (void) bfd_set_section_flags (stdoutput, s7_pdr_seg, SEC_READONLY | SEC_RELOC | SEC_DEBUGGING); + (void) bfd_set_section_alignment (stdoutput, s7_pdr_seg, 2); + subseg_set (seg, subseg); + + if (s7_USE_GLOBAL_POINTER_OPT) + bfd_set_gp_size (stdoutput, s7_g_switch_value); +} + +static void +s7_assemble (char *str) +{ + know (str); + know (strlen (str) < s7_MAX_LITERAL_POOL_SIZE); + + memset (&s7_inst, '\0', sizeof (s7_inst)); + if (s7_INSN_IS_PCE_P (str)) + s7_parse_pce_inst (str); + else + s7_parse_16_32_inst (str, TRUE); + + if (s7_inst.error) + as_bad (_("%s -- `%s'"), s7_inst.error, s7_inst.str); +} + +/* We handle all bad expressions here, so that we can report the faulty + instruction in the error message. */ + +static void +s7_operand (expressionS * expr) +{ + if (s7_in_my_get_expression) + { + expr->X_op = O_illegal; + if (s7_inst.error == NULL) + { + s7_inst.error = _("bad expression"); + } + } +} + +/* Turn a string in input_line_pointer into a floating point constant + of type TYPE, and store the appropriate bytes in *LITP. The number + of LITTLENUMS emitted is stored in *SIZEP. An error message is + returned, or NULL on OK. + + Note that fp constants aren't represent in the normal way on the ARM. + In big endian mode, things are as expected. However, in little endian + mode fp constants are big-endian word-wise, and little-endian byte-wise + within the words. For example, (double) 1.1 in big endian mode is + the byte sequence 3f f1 99 99 99 99 99 9a, and in little endian mode is + the byte sequence 99 99 f1 3f 9a 99 99 99. */ + +static char * +s7_atof (int type, char *litP, int *sizeP) +{ + int prec; + LITTLENUM_TYPE words[s7_MAX_LITTLENUMS]; + char *t; + int i; + + switch (type) + { + case 'f': + case 'F': + case 's': + case 'S': + prec = 2; + break; + case 'd': + case 'D': + case 'r': + case 'R': + prec = 4; + break; + case 'x': + case 'X': + case 'p': + case 'P': + prec = 6; + break; + default: + *sizeP = 0; + return _("bad call to MD_ATOF()"); + } + + t = atof_ieee (input_line_pointer, type, words); + if (t) + input_line_pointer = t; + *sizeP = prec * 2; + + if (target_big_endian) + { + for (i = 0; i < prec; i++) + { + s7_number_to_chars (litP, (valueT) words[i], 2); + litP += 2; + } + } + else + { + for (i = 0; i < prec; i += 2) + { + s7_number_to_chars (litP, (valueT) words[i + 1], 2); + s7_number_to_chars (litP + 2, (valueT) words[i], 2); + litP += 4; + } + } + + return 0; +} + +/* Implementation of md_frag_check. + Called after md_convert_frag(). */ + +static void +s7_frag_check (fragS * fragp) +{ + know (fragp->insn_addr <= s7_RELAX_PAD_BYTE); +} + +/* Implementation of TC_VALIDATE_FIX. + Called before md_apply_fix() and after md_convert_frag(). */ + +static void +s7_validate_fix (fixS *fixP) +{ + fixP->fx_where += fixP->fx_frag->insn_addr; +} + +static int +s7_force_relocation (struct fix *fixp) +{ + int retval = 0; + + if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT + || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY + || fixp->fx_r_type == BFD_RELOC_SCORE_JMP + || fixp->fx_r_type == BFD_RELOC_SCORE_BRANCH + || fixp->fx_r_type == BFD_RELOC_SCORE16_JMP + || fixp->fx_r_type == BFD_RELOC_SCORE16_BRANCH) + { + retval = 1; + } + + return retval; +} + +static bfd_boolean +s7_fix_adjustable (fixS * fixP) +{ + if (fixP->fx_addsy == NULL) + { + return 1; + } + else if (OUTPUT_FLAVOR == bfd_target_elf_flavour + && (S_IS_EXTERNAL (fixP->fx_addsy) || S_IS_WEAK (fixP->fx_addsy))) + { + return 0; + } + else if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT + || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY + || fixP->fx_r_type == BFD_RELOC_SCORE_JMP + || fixP->fx_r_type == BFD_RELOC_SCORE16_JMP) + { + return 0; + } + + return 1; +} + +static void +s7_elf_final_processing (void) +{ + unsigned long val = E_SCORE_MACH_SCORE7; + + elf_elfheader (stdoutput)->e_machine = EM_SCORE; + elf_elfheader (stdoutput)->e_flags &= ~EF_SCORE_MACH; + elf_elfheader (stdoutput)->e_flags |= val; + + if (s7_fix_data_dependency == 1) + { + elf_elfheader (stdoutput)->e_flags |= EF_SCORE_FIXDEP; + } + if (s7_score_pic == s7_PIC) + { + elf_elfheader (stdoutput)->e_flags |= EF_SCORE_PIC; + } +} + +/* In this function, we determine whether s7_GP instruction should do relaxation, + for the label being against was known now. + Doing this here but not in md_relax_frag() can induce iteration times + in stage of doing relax. */ + +static int +s7_estimate_size_before_relax (fragS * fragp, asection * sec) +{ + if ((s7_RELAX_TYPE (fragp->fr_subtype) == Insn_GP) + || (s7_RELAX_TYPE (fragp->fr_subtype) == Insn_PIC)) + return s7_judge_size_before_relax (fragp, sec); + + return 0; +} + +static int +s7_relax_frag (asection * sec ATTRIBUTE_UNUSED, + fragS * fragp, + long stretch ATTRIBUTE_UNUSED) +{ + int grows = 0; + int insn_size; + int insn_relax_size; + int do_relax_p = 0; /* Indicate doing relaxation for this frag. */ + int relaxable_p = 0; + bfd_boolean word_align_p = FALSE; + fragS *next_fragp; + + /* If the instruction address is odd, make it half word align first. */ + if ((fragp->fr_address) % 2 != 0) + { + if ((fragp->fr_address + fragp->insn_addr) % 2 != 0) + { + fragp->insn_addr = 1; + grows += 1; + } + } + + word_align_p = ((fragp->fr_address + fragp->insn_addr) % 4 == 0) ? TRUE : FALSE; + + /* Get instruction size and relax size after the last relaxation. */ + if (fragp->fr_opcode) + { + insn_size = s7_RELAX_NEW (fragp->fr_subtype); + insn_relax_size = s7_RELAX_OLD (fragp->fr_subtype); + } + else + { + insn_size = s7_RELAX_OLD (fragp->fr_subtype); + insn_relax_size = s7_RELAX_NEW (fragp->fr_subtype); + } + + /* Handle specially for s7_GP instruction. for, s7_judge_size_before_relax() has already determine + whether the s7_GP instruction should do relax. */ + if ((s7_RELAX_TYPE (fragp->fr_subtype) == Insn_GP) + || (s7_RELAX_TYPE (fragp->fr_subtype) == Insn_PIC)) + { + if (!word_align_p) + { + if (fragp->insn_addr < 2) + { + fragp->insn_addr += 2; + grows += 2; + } + else + { + fragp->insn_addr -= 2; + grows -= 2; + } + } + + if (fragp->fr_opcode) + fragp->fr_fix = s7_RELAX_NEW (fragp->fr_subtype) + fragp->insn_addr; + else + fragp->fr_fix = s7_RELAX_OLD (fragp->fr_subtype) + fragp->insn_addr; + } + else + { + if (s7_RELAX_TYPE (fragp->fr_subtype) == PC_DISP19div2) + s7_b32_relax_to_b16 (fragp); + + relaxable_p = s7_RELAX_OPT (fragp->fr_subtype); + next_fragp = fragp->fr_next; + while ((next_fragp) && (next_fragp->fr_type != rs_machine_dependent)) + { + next_fragp = next_fragp->fr_next; + } + + if (next_fragp) + { + int n_insn_size; + int n_relaxable_p = 0; + + if (next_fragp->fr_opcode) + { + n_insn_size = s7_RELAX_NEW (next_fragp->fr_subtype); + } + else + { + n_insn_size = s7_RELAX_OLD (next_fragp->fr_subtype); + } + + if (s7_RELAX_TYPE (next_fragp->fr_subtype) == PC_DISP19div2) + s7_b32_relax_to_b16 (next_fragp); + n_relaxable_p = s7_RELAX_OPT (next_fragp->fr_subtype); + + if (word_align_p) + { + if (insn_size == 4) + { + /* 32 -> 16. */ + if (relaxable_p && ((n_insn_size == 2) || n_relaxable_p)) + { + grows -= 2; + do_relax_p = 1; + } + } + else if (insn_size == 2) + { + /* 16 -> 32. */ + if (relaxable_p && (((n_insn_size == 4) && !n_relaxable_p) || (n_insn_size > 4))) + { + grows += 2; + do_relax_p = 1; + } + } + else + { + abort (); + } + } + else + { + if (insn_size == 4) + { + /* 32 -> 16. */ + if (relaxable_p) + { + grows -= 2; + do_relax_p = 1; + } + /* Make the 32 bit insturction word align. */ + else + { + fragp->insn_addr += 2; + grows += 2; + } + } + else if (insn_size == 2) + { + /* Do nothing. */ + } + else + { + abort (); + } + } + } + else + { + /* Here, try best to do relax regardless fragp->fr_next->fr_type. */ + if (word_align_p == FALSE) + { + if (insn_size % 4 == 0) + { + /* 32 -> 16. */ + if (relaxable_p) + { + grows -= 2; + do_relax_p = 1; + } + else + { + fragp->insn_addr += 2; + grows += 2; + } + } + } + else + { + /* Do nothing. */ + } + } + + /* fragp->fr_opcode indicates whether this frag should be relaxed. */ + if (do_relax_p) + { + if (fragp->fr_opcode) + { + fragp->fr_opcode = NULL; + /* Guarantee estimate stage is correct. */ + fragp->fr_fix = s7_RELAX_OLD (fragp->fr_subtype); + fragp->fr_fix += fragp->insn_addr; + } + else + { + fragp->fr_opcode = fragp->fr_literal + s7_RELAX_RELOC1 (fragp->fr_subtype); + /* Guarantee estimate stage is correct. */ + fragp->fr_fix = s7_RELAX_NEW (fragp->fr_subtype); + fragp->fr_fix += fragp->insn_addr; + } + } + else + { + if (fragp->fr_opcode) + { + /* Guarantee estimate stage is correct. */ + fragp->fr_fix = s7_RELAX_NEW (fragp->fr_subtype); + fragp->fr_fix += fragp->insn_addr; + } + else + { + /* Guarantee estimate stage is correct. */ + fragp->fr_fix = s7_RELAX_OLD (fragp->fr_subtype); + fragp->fr_fix += fragp->insn_addr; + } + } + } + + return grows; +} + +static void +s7_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, + segT sec ATTRIBUTE_UNUSED, + fragS * fragp) +{ + int old; + int new; + char backup[20]; + fixS *fixp; + + old = s7_RELAX_OLD (fragp->fr_subtype); + new = s7_RELAX_NEW (fragp->fr_subtype); + + /* fragp->fr_opcode indicates whether this frag should be relaxed. */ + if (fragp->fr_opcode == NULL) + { + memcpy (backup, fragp->fr_literal, old); + fragp->fr_fix = old; + } + else + { + memcpy (backup, fragp->fr_literal + old, new); + fragp->fr_fix = new; + } + + fixp = fragp->tc_frag_data.fixp; + while (fixp && fixp->fx_frag == fragp && fixp->fx_where < old) + { + if (fragp->fr_opcode) + fixp->fx_done = 1; + fixp = fixp->fx_next; + } + while (fixp && fixp->fx_frag == fragp) + { + if (fragp->fr_opcode) + fixp->fx_where -= old + fragp->insn_addr; + else + fixp->fx_done = 1; + fixp = fixp->fx_next; + } + + if (fragp->insn_addr) + { + s7_number_to_chars (fragp->fr_literal, 0x0, fragp->insn_addr); + } + memcpy (fragp->fr_literal + fragp->insn_addr, backup, fragp->fr_fix); + fragp->fr_fix += fragp->insn_addr; +} + +static long +s7_pcrel_from (fixS * fixP) +{ + long retval = 0; + + if (fixP->fx_addsy + && (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) + && (fixP->fx_subsy == NULL)) + { + retval = 0; + } + else + { + retval = fixP->fx_where + fixP->fx_frag->fr_address; + } + + return retval; +} + +/* Round up a section size to the appropriate boundary. */ +static valueT +s7_section_align (segT segment, valueT size) +{ + int align = bfd_get_section_alignment (stdoutput, segment); + + return ((size + (1 << align) - 1) & (-1 << align)); +} + +static void +s7_apply_fix (fixS *fixP, valueT *valP, segT seg) +{ + offsetT value = *valP; + offsetT abs_value = 0; + offsetT newval; + offsetT content; + unsigned short HI, LO; + + char *buf = fixP->fx_frag->fr_literal + fixP->fx_where; + + assert (fixP->fx_r_type < BFD_RELOC_UNUSED); + if (fixP->fx_addsy == 0 && !fixP->fx_pcrel) + { + if (fixP->fx_r_type != BFD_RELOC_SCORE_DUMMY_HI16) + fixP->fx_done = 1; + } + + /* If this symbol is in a different section then we need to leave it for + the linker to deal with. Unfortunately, md_pcrel_from can't tell, + so we have to undo it's effects here. */ + if (fixP->fx_pcrel) + { + if (fixP->fx_addsy != NULL + && S_IS_DEFINED (fixP->fx_addsy) + && S_GET_SEGMENT (fixP->fx_addsy) != seg) + value += md_pcrel_from (fixP); + } + + /* Remember value for emit_reloc. */ + fixP->fx_addnumber = value; + + switch (fixP->fx_r_type) + { + case BFD_RELOC_HI16_S: + if (fixP->fx_done) + { /* For la rd, imm32. */ + newval = s7_md_chars_to_number (buf, s7_INSN_SIZE); + HI = (value) >> 16; /* mul to 2, then take the hi 16 bit. */ + newval |= (HI & 0x3fff) << 1; + newval |= ((HI >> 14) & 0x3) << 16; + s7_number_to_chars (buf, newval, s7_INSN_SIZE); + } + break; + case BFD_RELOC_LO16: + if (fixP->fx_done) /* For la rd, imm32. */ + { + newval = s7_md_chars_to_number (buf, s7_INSN_SIZE); + LO = (value) & 0xffff; + newval |= (LO & 0x3fff) << 1; /* 16 bit: imm -> 14 bit in lo, 2 bit in hi. */ + newval |= ((LO >> 14) & 0x3) << 16; + s7_number_to_chars (buf, newval, s7_INSN_SIZE); + } + break; + case BFD_RELOC_SCORE_JMP: + { + content = s7_md_chars_to_number (buf, s7_INSN_SIZE); + value = fixP->fx_offset; + if (!(value >= 0 && value <= 0x1ffffff)) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _("j or jl truncate (0x%x) [0 ~ 2^25-1]"), (unsigned int) value); + return; + } + content = (content & ~0x3ff7ffe) | ((value << 1) & 0x3ff0000) | (value & 0x7fff); + s7_number_to_chars (buf, content, s7_INSN_SIZE); + } + break; + case BFD_RELOC_SCORE_BRANCH: + if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) || (fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy))) + value = fixP->fx_offset; + else + fixP->fx_done = 1; + + content = s7_md_chars_to_number (buf, s7_INSN_SIZE); + if ((fixP->fx_frag->fr_opcode != 0) && ((content & 0x80008000) != 0x80008000)) + { + if ((value & 0x80000000) == 0x80000000) + abs_value = 0xffffffff - value + 1; + if ((abs_value & 0xffffff00) != 0) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _(" branch relocation truncate (0x%x) [-2^8 ~ 2^8]"), (unsigned int) value); + return; + } + content = s7_md_chars_to_number (buf, s7_INSN16_SIZE); + content &= 0xff00; + content = (content & 0xff00) | ((value >> 1) & 0xff); + s7_number_to_chars (buf, content, s7_INSN16_SIZE); + fixP->fx_r_type = BFD_RELOC_SCORE16_BRANCH; + fixP->fx_size = 2; + } + else + { + if ((value & 0x80000000) == 0x80000000) + abs_value = 0xffffffff - value + 1; + if ((abs_value & 0xfff80000) != 0) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _(" branch relocation truncate (0x%x) [-2^19 ~ 2^19]"), + (unsigned int) value); + return; + } + content = s7_md_chars_to_number (buf, s7_INSN_SIZE); + content &= 0xfc00fc01; + content = (content & 0xfc00fc01) | (value & 0x3fe) | ((value << 6) & 0x3ff0000); + s7_number_to_chars (buf, content, s7_INSN_SIZE); + } + break; + case BFD_RELOC_SCORE16_JMP: + content = s7_md_chars_to_number (buf, s7_INSN16_SIZE); + content &= 0xf001; + value = fixP->fx_offset; + if (!(value >= 0 && value <= 0xfff)) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _("j! or jl! truncate (0x%x) [0 ~ 2^12-1]"), (unsigned int) value); + return; + } + value = fixP->fx_offset & 0xfff; + content = (content & 0xfc01) | (value & 0xffe); + s7_number_to_chars (buf, content, s7_INSN16_SIZE); + break; + case BFD_RELOC_SCORE16_BRANCH: + content = s7_md_chars_to_number (buf, s7_INSN_SIZE); + if ((fixP->fx_frag->fr_opcode != 0) && ((content & 0x80008000) == 0x80008000)) + { + if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) || + (fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy))) + value = fixP->fx_offset; + else + fixP->fx_done = 1; + + if ((value & 0xfff80000) != 0 && (value & 0xfff80000) != 0xfff80000) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _(" branch relocation truncate (0x%x) [-2^19 ~ 2^19]"), + (unsigned int) value); + return; + } + content = s7_md_chars_to_number (buf, s7_INSN_SIZE); + content = (content & 0xfc00fc01) | (value & 0x3fe) | ((value << 6) & 0x3ff0000); + s7_number_to_chars (buf, content, s7_INSN_SIZE); + fixP->fx_r_type = BFD_RELOC_SCORE_BRANCH; + fixP->fx_size = 4; + break; + } + else + { + /* In differnt section. */ + if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) || + (fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy))) + value = fixP->fx_offset; + else + fixP->fx_done = 1; + + if ((value & 0xffffff00) != 0 && (value & 0xffffff00) != 0xffffff00) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _(" branch relocation truncate (0x%x) [-2^8 ~ 2^8]"), + (unsigned int) value); + return; + } + content = s7_md_chars_to_number (buf, s7_INSN16_SIZE); + content = (content & 0xff00) | ((value >> 1) & 0xff); + s7_number_to_chars (buf, content, s7_INSN16_SIZE); + break; + } + case BFD_RELOC_8: + if (fixP->fx_done || fixP->fx_pcrel) + s7_number_to_chars (buf, value, 1); +#ifdef OBJ_ELF + else + { + value = fixP->fx_offset; + s7_number_to_chars (buf, value, 1); + } +#endif + break; + + case BFD_RELOC_16: + if (fixP->fx_done || fixP->fx_pcrel) + s7_number_to_chars (buf, value, 2); +#ifdef OBJ_ELF + else + { + value = fixP->fx_offset; + s7_number_to_chars (buf, value, 2); + } +#endif + break; + case BFD_RELOC_RVA: + case BFD_RELOC_32: + if (fixP->fx_done || fixP->fx_pcrel) + s7_number_to_chars (buf, value, 4); +#ifdef OBJ_ELF + else + { + value = fixP->fx_offset; + s7_number_to_chars (buf, value, 4); + } +#endif + break; + case BFD_RELOC_VTABLE_INHERIT: + fixP->fx_done = 0; + if (fixP->fx_addsy && !S_IS_DEFINED (fixP->fx_addsy) && !S_IS_WEAK (fixP->fx_addsy)) + S_SET_WEAK (fixP->fx_addsy); + break; + case BFD_RELOC_VTABLE_ENTRY: + fixP->fx_done = 0; + break; + case BFD_RELOC_SCORE_GPREL15: + content = s7_md_chars_to_number (buf, s7_INSN_SIZE); + if ((fixP->fx_frag->fr_opcode != 0) && ((content & 0xfc1c8000) != 0x94188000)) + fixP->fx_r_type = BFD_RELOC_NONE; + fixP->fx_done = 0; + break; + case BFD_RELOC_SCORE_GOT15: + case BFD_RELOC_SCORE_DUMMY_HI16: + case BFD_RELOC_SCORE_GOT_LO16: + case BFD_RELOC_SCORE_CALL15: + case BFD_RELOC_GPREL32: + break; + case BFD_RELOC_NONE: + default: + as_bad_where (fixP->fx_file, fixP->fx_line, _("bad relocation fixup type (%d)"), fixP->fx_r_type); + } +} + +/* Translate internal representation of relocation info to BFD target format. */ + +static arelent ** +s7_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) +{ + static arelent *retval[MAX_RELOC_EXPANSION + 1]; /* MAX_RELOC_EXPANSION equals 2. */ + arelent *reloc; + bfd_reloc_code_real_type code; + char *type; + fragS *f; + symbolS *s; + expressionS e; + + reloc = retval[0] = xmalloc (sizeof (arelent)); + retval[1] = NULL; + + reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); + *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); + reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; + reloc->addend = fixp->fx_offset; + + /* If this is a variant frag, we may need to adjust the existing + reloc and generate a new one. */ + if (fixp->fx_frag->fr_opcode != NULL && (fixp->fx_r_type == BFD_RELOC_SCORE_GPREL15)) + { + /* Update instruction imm bit. */ + offsetT newval; + unsigned short off; + char *buf; + + buf = fixp->fx_frag->fr_literal + fixp->fx_frag->insn_addr; + newval = s7_md_chars_to_number (buf, s7_INSN_SIZE); + off = fixp->fx_offset >> 16; + newval |= (off & 0x3fff) << 1; + newval |= ((off >> 14) & 0x3) << 16; + s7_number_to_chars (buf, newval, s7_INSN_SIZE); + + buf += s7_INSN_SIZE; + newval = s7_md_chars_to_number (buf, s7_INSN_SIZE); + off = fixp->fx_offset & 0xffff; + newval |= ((off & 0x3fff) << 1); + newval |= (((off >> 14) & 0x3) << 16); + s7_number_to_chars (buf, newval, s7_INSN_SIZE); + + retval[1] = xmalloc (sizeof (arelent)); + retval[2] = NULL; + retval[1]->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); + *retval[1]->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); + retval[1]->address = (reloc->address + s7_RELAX_RELOC2 (fixp->fx_frag->fr_subtype)); + + f = fixp->fx_frag; + s = f->fr_symbol; + e = s->sy_value; + + retval[1]->addend = 0; + retval[1]->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_LO16); + assert (retval[1]->howto != NULL); + + fixp->fx_r_type = BFD_RELOC_HI16_S; + } + + code = fixp->fx_r_type; + switch (fixp->fx_r_type) + { + case BFD_RELOC_32: + if (fixp->fx_pcrel) + { + code = BFD_RELOC_32_PCREL; + break; + } + case BFD_RELOC_HI16_S: + case BFD_RELOC_LO16: + case BFD_RELOC_SCORE_JMP: + case BFD_RELOC_SCORE_BRANCH: + case BFD_RELOC_SCORE16_JMP: + case BFD_RELOC_SCORE16_BRANCH: + case BFD_RELOC_VTABLE_ENTRY: + case BFD_RELOC_VTABLE_INHERIT: + case BFD_RELOC_SCORE_GPREL15: + case BFD_RELOC_SCORE_GOT15: + case BFD_RELOC_SCORE_DUMMY_HI16: + case BFD_RELOC_SCORE_GOT_LO16: + case BFD_RELOC_SCORE_CALL15: + case BFD_RELOC_GPREL32: + case BFD_RELOC_NONE: + code = fixp->fx_r_type; + break; + default: + type = _("<unknown>"); + as_bad_where (fixp->fx_file, fixp->fx_line, + _("cannot represent %s relocation in this object file format"), type); + return NULL; + } + + reloc->howto = bfd_reloc_type_lookup (stdoutput, code); + if (reloc->howto == NULL) + { + as_bad_where (fixp->fx_file, fixp->fx_line, + _("cannot represent %s relocation in this object file format1"), + bfd_get_reloc_code_name (code)); + return NULL; + } + /* HACK: Since arm ELF uses Rel instead of Rela, encode the + vtable entry to be used in the relocation's section offset. */ + if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) + reloc->address = fixp->fx_offset; + + return retval; +} diff --git a/gas/doc/Makefile.am b/gas/doc/Makefile.am index 793058d..6a02ccf 100644 --- a/gas/doc/Makefile.am +++ b/gas/doc/Makefile.am @@ -58,6 +58,7 @@ CPU_DOCS = \ c-pj.texi \ c-ppc.texi \ c-s390.texi \ + c-score.texi \ c-sh.texi \ c-sh64.texi \ c-sparc.texi \ @@ -75,7 +76,7 @@ install-data-local: install-info pdf__strip_dir = `echo $$p | sed -e 's|^.*/||'`; install-pdf: install-pdf-am - + install-pdf-am: $(PDFS) @$(NORMAL_INSTALL) test -z "$(pdfdir)" || $(mkinstalldirs) "$(DESTDIR)$(pdfdir)" diff --git a/gas/doc/Makefile.in b/gas/doc/Makefile.in index 7e8b03b..847b352a 100644 --- a/gas/doc/Makefile.in +++ b/gas/doc/Makefile.in @@ -279,6 +279,7 @@ CPU_DOCS = \ c-pj.texi \ c-ppc.texi \ c-s390.texi \ + c-score.texi \ c-sh.texi \ c-sh64.texi \ c-sparc.texi \ diff --git a/gas/doc/all.texi b/gas/doc/all.texi index 6ccc6f3..9a94e6b 100644 --- a/gas/doc/all.texi +++ b/gas/doc/all.texi @@ -1,5 +1,5 @@ @c Copyright 1992, 1993, 1994, 1996, 1997, 1999, 2000, 2001, 2002, -@c 2003, 2005 +@c 2003, 2005, 2009 @c Free Software Foundation, Inc. @c This file is part of the documentation for the GAS manual @@ -58,6 +58,7 @@ @set PJ @set PPC @set S390 +@set SCORE @set SH @set SPARC @set TIC54X diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo index 18fd962..fd6c0a3 100644 --- a/gas/doc/as.texinfo +++ b/gas/doc/as.texinfo @@ -1,6 +1,6 @@ \input texinfo @c -*-Texinfo-*- @c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, -@c 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 +@c 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 @c Free Software Foundation, Inc. @c UPDATE!! On future updates-- @c (1) check for new machine-dep cmdline options in @@ -101,7 +101,7 @@ This file documents the GNU Assembler "@value{AS}". @c man begin COPYRIGHT Copyright @copyright{} 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002, -2006, 2007, 2008 Free Software Foundation, Inc. +2006, 2007, 2008, 2009 Free Software Foundation, Inc. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.3 @@ -151,7 +151,7 @@ done. @vskip 0pt plus 1filll Copyright @copyright{} 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002, -2006, 2007, 2008 Free Software Foundation, Inc. +2006, 2007, 2008, 2009 Free Software Foundation, Inc. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.3 @@ -423,6 +423,14 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}. [@b{-mregnames}|@b{-mno-regnames}] [@b{-mwarn-areg-zero}] @end ifset +@ifset SCORE + +@emph{Target SCORE options:} + [@b{-EB}][@b{-EL}][@b{-FIXDD}][@b{-NWARN}] + [@b{-SCORE5}][@b{-SCORE5U}][@b{-SCORE7}][@b{-SCORE3}] + [@b{-march=score7}][@b{-march=score3}] + [@b{-USE_R1}][@b{-KPIC}][@b{-O0}][@b{-G} @var{num}][@b{-V}] +@end ifset @ifset SPARC @emph{Target SPARC options:} @@ -2233,9 +2241,15 @@ is considered a comment and is ignored. The line comment character is @ifset PPC @samp{#} for Motorola PowerPC; @end ifset +<<<<<<< as.texinfo +@ifset SCORE +@samp{#} for the Sunplus SCORE; +@end ifset +======= @ifset S390 @samp{#} for IBM S/390; @end ifset +>>>>>>> 1.196 @ifset SH @samp{!} for the Renesas / SuperH SH; @end ifset @@ -6750,9 +6764,15 @@ subject, see the hardware manufacturer's manual. @ifset PPC * PPC-Dependent:: PowerPC Dependent Features @end ifset +<<<<<<< as.texinfo +@ifset SCORE +* SCORE-Dependent:: SCORE Dependent Features +@end ifset +======= @ifset S390 * S/390-Dependent:: IBM S/390 Dependent Features @end ifset +>>>>>>> 1.196 @ifset SPARC * Sparc-Dependent:: SPARC Dependent Features @end ifset @@ -6921,10 +6941,17 @@ family. @include c-ppc.texi @end ifset +<<<<<<< as.texinfo +@ifset SCORE +@include c-score.texi +@end ifset + +======= @ifset S390 @include c-s390.texi @end ifset +>>>>>>> 1.196 @ifset SH @include c-sh.texi @include c-sh64.texi diff --git a/gas/doc/c-score.texi b/gas/doc/c-score.texi new file mode 100644 index 0000000..0820115 --- /dev/null +++ b/gas/doc/c-score.texi @@ -0,0 +1,142 @@ +@c Copyright 2009 +@c Free Software Foundation, Inc. +@c This is part of the GAS manual. +@c For copying conditions, see the file as.texinfo. +@ifset GENERIC +@page +@node SCORE-Dependent +@chapter SCORE Dependent Features +@end ifset +@ifclear GENERIC +@node Machine Dependencies +@chapter SCORE Dependent Features +@end ifclear + +@cindex SCORE processor +@menu +* SCORE-Opts:: Assembler options +* SCORE-Pseudo:: SCORE Assembler Directives +@end menu + +@node SCORE-Opts +@section Options + +@cindex options for SCORE +@cindex SCORE options +@cindex architectures, SCORE +@cindex SCORE architectures + +The following table lists all available SCORE options. + +@table @code +@item -G @var{num} +This option sets the largest size of an object that can be referenced +implicitly with the @code{gp} register. The default value is 8. + +@item -EB +Assemble code for a big-endian cpu + +@itemx -EL +Assemble code for a little-endian cpu + +@item -FIXDD +Assemble code for fix data dependency + +@item -NWARN +Assemble code for no warning message for fix data dependency + +@item -SCORE5 +Assemble code for target is SCORE5 + +@itemx -SCORE5U +Assemble code for target is SCORE5U + +@itemx -SCORE7 +Assemble code for target is SCORE7, this is default setting + +@itemx -SCORE3 +Assemble code for target is SCORE3 + +@item -march=score7 +Assemble code for target is SCORE7, this is default setting + +@item -march=score3 +Assemble code for target is SCORE3 + +@item -USE_R1 +Assemble code for no warning message when using temp register r1 + +@item -KPIC +Generate code for PIC. This option tells the assembler to generate +score position-independent macro expansions. It also tells the +assembler to mark the output file as PIC. + +@item -O0 +Assembler will not perform any optimizations + +@item -V +Sunplus release version + +@end table + +@node SCORE-Pseudo +@section SCORE Assembler Directives + +@cindex directives for SCORE +@cindex SCORE directives +A number of assembler directives are available for SCORE. The +following table is far from complete. + +@table @code +@item .set nwarn +Let the assembler not to generate warnings if the source machine +language instructions happen data dependency. + +@item .set fixdd +Let the assembler to insert bubbles (32 bit nop instruction / +16 bit nop! Instruction) if the source machine language instructions +happen data dependency. + +@item .set nofixdd +Let the assembler to generate warnings if the source machine +language instructions happen data dependency. (Default) + +@item .set r1 +Let the assembler not to generate warnings if the source program +uses r1. allow user to use r1 + +@item set nor1 +Let the assembler to generate warnings if the source program uses +r1. (Default) + +@item .sdata +Tell the assembler to add subsequent data into the sdata section + +@item .rdata +Tell the assembler to add subsequent data into the rdata section + +@item .frame "frame-register", "offset", "return-pc-register" +Describe a stack frame. "frame-register" is the frame register, +"offset" is the distance from the frame register to the virtual +frame pointer, "return-pc-register" is the return program register. +You must use ".ent" before ".frame" and only one ".frame" can be +used per ".ent". + +@item .mask "bitmask", "frameoffset" +Indicate which of the integer registers are saved in the current +function's stack frame, this is for the debugger to explain the +frame chain. + +@item .ent "proc-name" +Set the beginning of the procedure "proc_name". Use this directive +when you want to generate information for the debugger. + +@item .end proc-name +Set the end of a procedure. Use this directive to generate information +for the debugger. + +@item .bss +Switch the destination of following statements into the bss section, +which is used for data that is uninitialized anywhere. + +@end table diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 69d31f4..0cc3652 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,35 @@ +2009-03-02 Qinwei <qinwei@sunnorth.com.cn> + + * gas/score/arith_32-lt.d: New file. + * gas/score/arith_32.d: New file. + * gas/score/arith_32.s: New file. + * gas/score/bit_32-lt.d: New file. + * gas/score/bit_32.d: New file. + * gas/score/bit_32.s: New file. + * gas/score/branch_32-lt.d: New file. + * gas/score/branch_32.d: New file. + * gas/score/branch_32.s: New file. + * gas/score/cmp_32-lt.d: New file. + * gas/score/cmp_32.d: New file. + * gas/score/cmp_32.s: New file. + * gas/score/load_store_32-lt.d: New file. + * gas/score/load_store_32.d: New file. + * gas/score/load_store_32.s: New file. + * gas/score/logical_32-lt.d: New file. + * gas/score/logical_32.d: New file. + * gas/score/logical_32.s: New file. + * gas/score/mv_32-lt.d: New file. + * gas/score/mv_32.d: New file. + * gas/score/mv_32.s: New file. + * gas/score/relax_32.exp: New file. + * gas/score/relaxation_macro.h: New file. + * gas/score/shift_32-lt.d: New file. + * gas/score/shift_32.d: New file. + * gas/score/shift_32.s: New file. + * gas/score/syscontrol_32-lt.d: New file. + * gas/score/syscontrol_32.d: New file. + * gas/score/syscontrol_32.s: New file. + 2009-03-01 Mark Mitchell <mark@codesourcery.com> * gas/arm/archv6m.s: Add dmb, dsb, and isb. diff --git a/gas/testsuite/gas/score/arith_32-lt.d b/gas/testsuite/gas/score/arith_32-lt.d new file mode 100644 index 0000000..c6f8630 --- /dev/null +++ b/gas/testsuite/gas/score/arith_32-lt.d @@ -0,0 +1,16 @@ +#as: -march=score3 -I${srcdir}/${subdir} -EL +#objdump: -s +#source: arith_32.s + +.*: file format elf32-littlescore + +Contents of section .text: + 0000 0f480f48 0f480f48 0f480f48 0f480f48 .* + 0010 0f480080 113c0080 10401082 10001082 .* + 0020 10440180 10080f49 0f490f49 0f490f49 .* + 0030 0f490f49 0f490f49 0080153c 00801440 .* + 0040 10821400 10821444 01801408 205c1f5c .* + 0050 e05fdf5f 205c205c 205c205c 205c205c .* + 0060 205c205c 0384c17f 0384be7f 00844000 .* + 0070 0386c07f 00863e00 .* +#pass diff --git a/gas/testsuite/gas/score/arith_32.d b/gas/testsuite/gas/score/arith_32.d new file mode 100644 index 0000000..cf63259 --- /dev/null +++ b/gas/testsuite/gas/score/arith_32.d @@ -0,0 +1,55 @@ +#as: -march=score3 -I${srcdir}/${subdir} +#objdump: -d +#source: arith_32.s + +.*: file format .* + +Disassembly of section .text: + +00000000 <.text>: + 0: 480f add! r0, r15 + 2: 480f add! r0, r15 + 4: 480f add! r0, r15 + 6: 480f add! r0, r15 + 8: 480f add! r0, r15 + a: 480f add! r0, r15 + c: 480f add! r0, r15 + e: 480f add! r0, r15 + 10: 480f add! r0, r15 + 12: 8000 3c11 add.c r0, r0, r15 + 16: 8000 4010 add r0, r0, r16 + 1a: 8210 0010 add r16, r16, r0 + 1e: 8210 4410 add r16, r16, r17 + 22: 8001 0810 add r0, r1, r2 + 26: 490f sub! r0, r15 + 28: 490f sub! r0, r15 + 2a: 490f sub! r0, r15 + 2c: 490f sub! r0, r15 + 2e: 490f sub! r0, r15 + 30: 490f sub! r0, r15 + 32: 490f sub! r0, r15 + 34: 490f sub! r0, r15 + 36: 490f sub! r0, r15 + 38: 8000 3c15 sub.c r0, r0, r15 + 3c: 8000 4014 sub r0, r0, r16 + 40: 8210 0014 sub r16, r16, r0 + 44: 8210 4414 sub r16, r16, r17 + 48: 8001 0814 sub r0, r1, r2 + 4c: 5c20 addi! r0, -32 + 4e: 5c1f addi! r0, 31 + 50: 5fe0 addi! r15, -32 + 52: 5fdf addi! r15, 31 + 54: 5c20 addi! r0, -32 + 56: 5c20 addi! r0, -32 + 58: 5c20 addi! r0, -32 + 5a: 5c20 addi! r0, -32 + 5c: 5c20 addi! r0, -32 + 5e: 5c20 addi! r0, -32 + 60: 5c20 addi! r0, -32 + 62: 5c20 addi! r0, -32 + 64: 8403 7fc1 addi.c r0, -32 + 68: 8403 7fbe addi r0, -33 + 6c: 8400 0040 addi r0, 32 + 70: 8603 7fc0 addi r16, -32 + 74: 8600 003e addi r16, 31 +#pass diff --git a/gas/testsuite/gas/score/arith_32.s b/gas/testsuite/gas/score/arith_32.s new file mode 100644 index 0000000..7e2f76b --- /dev/null +++ b/gas/testsuite/gas/score/arith_32.s @@ -0,0 +1,43 @@ +/* + * tests for arithmetic instruction relaxation + * + * Author: libin + */ + +.include "relaxation_macro.h" + +.macro _arith_op_pattern insn insn1 + insn_32 "\insn r0, r0, r15" + + tran_16_32 "\insn! r0, r15", "\insn r0, r0, r15" + + /* shouldn't alter */ + .set r1 + insn_32 "\insn1 r0, r0, r15" + insn_32 "\insn r0, r0, r16" + insn_32 "\insn r16, r16, r0" + insn_32 "\insn r16, r16, r17" + insn_32 "\insn r0, r1, r2" +.endm + +.text +/* add rD,rA,rB -> add! rD,rA */ +_arith_op_pattern "add", "add.c" + +/* sub rD,rA,rB -> sub rD,rA */ +_arith_op_pattern "sub", "sub.c" + +/* addi rD,SImm16 -> addi! rD,SImm6 */ +insn_32 "addi r0, -32" +insn_32 "addi r0, 31" +insn_32 "addi r15, -32" +insn_32 "addi r15, 31" + +tran_16_32 "addi! r0,-32", "addi r0,-32" + +/* shouldn't alter */ +insn_32 "addi.c r0, -32" +insn_32 "addi r0, -33" +insn_32 "addi r0, 32" +insn_32 "addi r16, -32" +insn_32 "addi r16, 31" diff --git a/gas/testsuite/gas/score/bit_32-lt.d b/gas/testsuite/gas/score/bit_32-lt.d new file mode 100644 index 0000000..018d8dc --- /dev/null +++ b/gas/testsuite/gas/score/bit_32-lt.d @@ -0,0 +1,17 @@ +#as: -march=score3 -I${srcdir}/${subdir} -EL +#objdump: -s +#source: bit_32.s + +.*: file format elf32-littlescore + +Contents of section .text: + 0000 00501f50 e051ff51 00500050 00500050 .* + 0010 00500050 00500050 00802900 10822800 .* + 0020 1082287c 00521f52 e053ff53 00520052 .* + 0030 00520052 00520052 00520052 00802b00 .* + 0040 10822a00 10822a7c 00561f56 e057ff57 .* + 0050 00560056 00560056 00560056 00560056 .* + 0060 00802f00 10822e00 10822e7c 00541f54 .* + 0070 e055ff55 00540054 00540054 00540054 .* + 0080 00540054 10802d00 10802d7c .* +#pass diff --git a/gas/testsuite/gas/score/bit_32.d b/gas/testsuite/gas/score/bit_32.d new file mode 100644 index 0000000..60a4cb2 --- /dev/null +++ b/gas/testsuite/gas/score/bit_32.d @@ -0,0 +1,69 @@ +#as: -march=score3 -I${srcdir}/${subdir} +#objdump: -d +#source: bit_32.s + +.*: file format .* + +Disassembly of section .text: + +00000000 <.text>: + 0: 5000 bitclr! r0, 0x0 + 2: 501f bitclr! r0, 0x1f + 4: 51e0 bitclr! r15, 0x0 + 6: 51ff bitclr! r15, 0x1f + 8: 5000 bitclr! r0, 0x0 + a: 5000 bitclr! r0, 0x0 + c: 5000 bitclr! r0, 0x0 + e: 5000 bitclr! r0, 0x0 + 10: 5000 bitclr! r0, 0x0 + 12: 5000 bitclr! r0, 0x0 + 14: 5000 bitclr! r0, 0x0 + 16: 5000 bitclr! r0, 0x0 + 18: 8000 0029 bitclr.c r0, r0, 0x0 + 1c: 8210 0028 bitclr r16, r16, 0x0 + 20: 8210 7c28 bitclr r16, r16, 0x1f + 24: 5200 bitset! r0, 0x0 + 26: 521f bitset! r0, 0x1f + 28: 53e0 bitset! r15, 0x0 + 2a: 53ff bitset! r15, 0x1f + 2c: 5200 bitset! r0, 0x0 + 2e: 5200 bitset! r0, 0x0 + 30: 5200 bitset! r0, 0x0 + 32: 5200 bitset! r0, 0x0 + 34: 5200 bitset! r0, 0x0 + 36: 5200 bitset! r0, 0x0 + 38: 5200 bitset! r0, 0x0 + 3a: 5200 bitset! r0, 0x0 + 3c: 8000 002b bitset.c r0, r0, 0x0 + 40: 8210 002a bitset r16, r16, 0x0 + 44: 8210 7c2a bitset r16, r16, 0x1f + 48: 5600 bittgl! r0, 0x0 + 4a: 561f bittgl! r0, 0x1f + 4c: 57e0 bittgl! r15, 0x0 + 4e: 57ff bittgl! r15, 0x1f + 50: 5600 bittgl! r0, 0x0 + 52: 5600 bittgl! r0, 0x0 + 54: 5600 bittgl! r0, 0x0 + 56: 5600 bittgl! r0, 0x0 + 58: 5600 bittgl! r0, 0x0 + 5a: 5600 bittgl! r0, 0x0 + 5c: 5600 bittgl! r0, 0x0 + 5e: 5600 bittgl! r0, 0x0 + 60: 8000 002f bittgl.c r0, r0, 0x0 + 64: 8210 002e bittgl r16, r16, 0x0 + 68: 8210 7c2e bittgl r16, r16, 0x1f + 6c: 5400 bittst! r0, 0x0 + 6e: 541f bittst! r0, 0x1f + 70: 55e0 bittst! r15, 0x0 + 72: 55ff bittst! r15, 0x1f + 74: 5400 bittst! r0, 0x0 + 76: 5400 bittst! r0, 0x0 + 78: 5400 bittst! r0, 0x0 + 7a: 5400 bittst! r0, 0x0 + 7c: 5400 bittst! r0, 0x0 + 7e: 5400 bittst! r0, 0x0 + 80: 5400 bittst! r0, 0x0 + 82: 5400 bittst! r0, 0x0 + 84: 8010 002d bittst.c r16, 0x0 + 88: 8010 7c2d bittst.c r16, 0x1f +#pass diff --git a/gas/testsuite/gas/score/bit_32.s b/gas/testsuite/gas/score/bit_32.s new file mode 100644 index 0000000..9490df4 --- /dev/null +++ b/gas/testsuite/gas/score/bit_32.s @@ -0,0 +1,43 @@ +/* + * tests for bit operations' instruction relaxation + * + * Author: libin + */ + +.include "relaxation_macro.h" + +.macro _bit_op_pattern insn insn1 + insn_32 "\insn r0, r0, 0" + insn_32 "\insn r0, r0, 0x1f" + insn_32 "\insn r15, r15, 0" + insn_32 "\insn r15, r15, 0x1f" + + tran_16_32 "\insn! r0,0", "\insn r0,r0,0" + + /* shouldn't alter */ + insn_32 "\insn1 r0, r0, 0" + insn_32 "\insn r16, r16, 0" + insn_32 "\insn r16, r16, 0x1f" +.endm + +.text +/* + * bitclr rD,rA,BN5 -> bitclr! rD,BN5 + * bitset rD,rA,BN5 -> bitset! rD,BN5 + * bittgl rD,rA,BN5 -> bittgl! rD,BN5 + */ +_bit_op_pattern "bitclr", "bitclr.c" +_bit_op_pattern "bitset", "bitset.c" +_bit_op_pattern "bittgl", "bittgl.c" + +/* bittst.c rA,BN5 <-> bittst! rD,BN5" */ +insn_32 "bittst.c r0, 0" +insn_32 "bittst.c r0, 0x1f" +insn_32 "bittst.c r15, 0" +insn_32 "bittst.c r15, 0x1f" + +tran_16_32 "bittst! r0,0", "bittst.c r0,0" + +/* shouldn't alter */ +insn_32 "bittst.c r16, 0" +insn_32 "bittst.c r16, 0x1f" diff --git a/gas/testsuite/gas/score/branch_32-lt.d b/gas/testsuite/gas/score/branch_32-lt.d new file mode 100644 index 0000000..5175c4f --- /dev/null +++ b/gas/testsuite/gas/score/branch_32-lt.d @@ -0,0 +1,1652 @@ +#as: -march=score3 -I${srcdir}/${subdir} -EL +#objdump: -s +#source: branch_32.s + +.*: file format elf32-littlescore + +Contents of section .text: + 0000 0034ff35 fe35fd35 ff93f80b ff93f40b .* + 0010 f835ff93 ee0bff93 ea0bff93 e70b0000 .* + 0020 00000000 00000000 00000000 00000000 .* + 0030 00000000 00000000 00000000 00000000 .* + 0040 00000000 00000000 00000000 00000000 .* + 0050 00000000 00000000 00000000 00000000 .* + 0060 00000000 00000000 00000000 00000000 .* + 0070 00000000 00000000 00000000 00000000 .* + 0080 00000000 00000000 00000000 00000000 .* + 0090 00000000 00000000 00000000 00000000 .* + 00a0 00000000 00000000 00000000 00000000 .* + 00b0 00000000 00000000 00000000 00000000 .* + 00c0 00000000 00000000 00000000 00000000 .* + 00d0 00000000 00000000 00000000 00000000 .* + 00e0 00000000 00000000 00000000 00000000 .* + 00f0 00000000 00000000 00000000 00000000 .* + 0100 00000000 00000000 00000000 00000000 .* + 0110 00000000 00000000 00000000 00000000 .* + 0120 00000000 00000000 00000000 00000000 .* + 0130 00000000 00000000 00000000 00000000 .* + 0140 00000000 00000000 00000000 00000000 .* + 0150 00000000 00000000 00000000 00000000 .* + 0160 00000000 00000000 00000000 00000000 .* + 0170 00000000 00000000 00000000 00000000 .* + 0180 00000000 00000000 00000000 00000000 .* + 0190 00000000 00000000 00000000 00000000 .* + 01a0 00000000 00000000 00000000 00000000 .* + 01b0 00000000 00000000 00000000 00000000 .* + 01c0 00000000 00000000 00000000 00000000 .* + 01d0 00000000 00000000 00000000 00000000 .* + 01e0 00000000 00000000 00000000 00000000 .* + 01f0 00000000 00000000 00000000 00000000 .* + 0200 00000000 00000000 00000000 00000000 .* + 0210 00000000 00000000 00000000 0000ff93 .* + 0220 e209ff93 de09ff93 da09ff93 d609ff93 .* + 0230 d209ff93 ce09ff93 ca09ff93 c609ff93 .* + 0240 c209ff93 bf090090 460a0090 420a0090 .* + 0250 3e0a0090 3a0a0090 360a0090 320a0090 .* + 0260 2e0a0090 2a0a0090 260a0090 230a0000 .* + 0270 00000000 00000000 00000000 00000000 .* + 0280 00000000 00000000 00000000 00000000 .* + 0290 00000000 00000000 00000000 00000000 .* + 02a0 00000000 00000000 00000000 00000000 .* + 02b0 00000000 00000000 00000000 00000000 .* + 02c0 00000000 00000000 00000000 00000000 .* + 02d0 00000000 00000000 00000000 00000000 .* + 02e0 00000000 00000000 00000000 00000000 .* + 02f0 00000000 00000000 00000000 00000000 .* + 0300 00000000 00000000 00000000 00000000 .* + 0310 00000000 00000000 00000000 00000000 .* + 0320 00000000 00000000 00000000 00000000 .* + 0330 00000000 00000000 00000000 00000000 .* + 0340 00000000 00000000 00000000 00000000 .* + 0350 00000000 00000000 00000000 00000000 .* + 0360 00000000 00000000 00000000 00000000 .* + 0370 00000000 00000000 00000000 00000000 .* + 0380 00000000 00000000 00000000 00000000 .* + 0390 00000000 00000000 00000000 00000000 .* + 03a0 00000000 00000000 00000000 00000000 .* + 03b0 00000000 00000000 00000000 00000000 .* + 03c0 00000000 00000000 00000000 00000000 .* + 03d0 00000000 00000000 00000000 00000000 .* + 03e0 00000000 00000000 00000000 00000000 .* + 03f0 00000000 00000000 00000000 00000000 .* + 0400 00000000 00000000 00000000 00000000 .* + 0410 00000000 00000000 00000000 00000000 .* + 0420 00000000 00000000 00000000 00000000 .* + 0430 00000000 00000000 00000000 00000000 .* + 0440 00000000 00000000 00000000 00000000 .* + 0450 00000000 00000000 00000000 00000000 .* + 0460 00000000 00000000 00000000 00000f34 .* + 0470 0e340d34 0c340090 16080090 12080734 .* + 0480 00900c08 00900808 00900508 00000000 .* + 0490 00000000 00000000 00000000 00000000 .* + 04a0 00000000 00000000 00000000 00000000 .* + 04b0 00000000 00000000 00000000 00000000 .* + 04c0 00000000 00000000 00000000 00000000 .* + 04d0 00000000 00000000 00000000 00000000 .* + 04e0 00000000 00000000 00000000 00000000 .* + 04f0 00000000 00000000 00000000 00000000 .* + 0500 00000000 00000000 00000000 00000000 .* + 0510 00000000 00000000 00000000 00000000 .* + 0520 00000000 00000000 00000000 00000000 .* + 0530 00000000 00000000 00000000 00000000 .* + 0540 00000000 00000000 00000000 00000000 .* + 0550 00000000 00000000 00000000 00000000 .* + 0560 00000000 00000000 00000000 00000000 .* + 0570 00000000 00000000 00000000 00000000 .* + 0580 00000000 00000000 00000000 00000000 .* + 0590 00000000 00000000 00000000 00000000 .* + 05a0 00000000 00000000 00000000 00000000 .* + 05b0 00000000 00000000 00000000 00000000 .* + 05c0 00000000 00000000 00000000 00000000 .* + 05d0 00000000 00000000 00000000 00000000 .* + 05e0 00000000 00000000 00000000 00000000 .* + 05f0 00000000 00000000 00000000 00000000 .* + 0600 00000000 00000000 00000000 00000000 .* + 0610 00000000 00000000 00000000 00000000 .* + 0620 00000000 00000000 00000000 00000000 .* + 0630 00000000 00000000 00000000 00000000 .* + 0640 00000000 00000000 00000000 00000000 .* + 0650 00000000 00000000 00000000 00000000 .* + 0660 00000000 00000000 00000000 00000000 .* + 0670 00000000 00000000 00000000 00000000 .* + 0680 00000000 00000000 00000000 00000035 .* + 0690 ff93fe09 0090060a 0090020a 00000000 .* + 06a0 00000000 00000000 00000000 00000000 .* + 06b0 00000000 00000000 00000000 00000000 .* + 06c0 00000000 00000000 00000000 00000000 .* + 06d0 00000000 00000000 00000000 00000000 .* + 06e0 00000000 00000000 00000000 00000000 .* + 06f0 00000000 00000000 00000000 00000000 .* + 0700 00000000 00000000 00000000 00000000 .* + 0710 00000000 00000000 00000000 00000000 .* + 0720 00000000 00000000 00000000 00000000 .* + 0730 00000000 00000000 00000000 00000000 .* + 0740 00000000 00000000 00000000 00000000 .* + 0750 00000000 00000000 00000000 00000000 .* + 0760 00000000 00000000 00000000 00000000 .* + 0770 00000000 00000000 00000000 00000000 .* + 0780 00000000 00000000 00000000 00000000 .* + 0790 00000000 00000000 00000000 00000000 .* + 07a0 00000000 00000000 00000000 00000000 .* + 07b0 00000000 00000000 00000000 00000000 .* + 07c0 00000000 00000000 00000000 00000000 .* + 07d0 00000000 00000000 00000000 00000000 .* + 07e0 00000000 00000000 00000000 00000000 .* + 07f0 00000000 00000000 00000000 00000000 .* + 0800 00000000 00000000 00000000 00000000 .* + 0810 00000000 00000000 00000000 00000000 .* + 0820 00000000 00000000 00000000 00000000 .* + 0830 00000000 00000000 00000000 00000000 .* + 0840 00000000 00000000 00000000 00000000 .* + 0850 00000000 00000000 00000000 00000000 .* + 0860 00000000 00000000 00000000 00000000 .* + 0870 00000000 00000000 00000000 00000000 .* + 0880 00000000 00000000 00000000 00000000 .* + 0890 00000000 00000000 00000000 00000036 .* + 08a0 ff37fe37 fd37ff93 f80fff93 f40ff837 .* + 08b0 ff93ee0f ff93ea0f ff93e70f 00000000 .* + 08c0 00000000 00000000 00000000 00000000 .* + 08d0 00000000 00000000 00000000 00000000 .* + 08e0 00000000 00000000 00000000 00000000 .* + 08f0 00000000 00000000 00000000 00000000 .* + 0900 00000000 00000000 00000000 00000000 .* + 0910 00000000 00000000 00000000 00000000 .* + 0920 00000000 00000000 00000000 00000000 .* + 0930 00000000 00000000 00000000 00000000 .* + 0940 00000000 00000000 00000000 00000000 .* + 0950 00000000 00000000 00000000 00000000 .* + 0960 00000000 00000000 00000000 00000000 .* + 0970 00000000 00000000 00000000 00000000 .* + 0980 00000000 00000000 00000000 00000000 .* + 0990 00000000 00000000 00000000 00000000 .* + 09a0 00000000 00000000 00000000 00000000 .* + 09b0 00000000 00000000 00000000 00000000 .* + 09c0 00000000 00000000 00000000 00000000 .* + 09d0 00000000 00000000 00000000 00000000 .* + 09e0 00000000 00000000 00000000 00000000 .* + 09f0 00000000 00000000 00000000 00000000 .* + 0a00 00000000 00000000 00000000 00000000 .* + 0a10 00000000 00000000 00000000 00000000 .* + 0a20 00000000 00000000 00000000 00000000 .* + 0a30 00000000 00000000 00000000 00000000 .* + 0a40 00000000 00000000 00000000 00000000 .* + 0a50 00000000 00000000 00000000 00000000 .* + 0a60 00000000 00000000 00000000 00000000 .* + 0a70 00000000 00000000 00000000 00000000 .* + 0a80 00000000 00000000 00000000 00000000 .* + 0a90 00000000 00000000 00000000 00000000 .* + 0aa0 00000000 00000000 00000000 00000000 .* + 0ab0 00000000 00000000 00000000 ff93e20d .* + 0ac0 ff93de0d ff93da0d ff93d60d ff93d20d .* + 0ad0 ff93ce0d ff93ca0d ff93c60d ff93c20d .* + 0ae0 ff93bf0d 0090460e 0090420e 00903e0e .* + 0af0 00903a0e 0090360e 0090320e 00902e0e .* + 0b00 00902a0e 0090260e 0090230e 00000000 .* + 0b10 00000000 00000000 00000000 00000000 .* + 0b20 00000000 00000000 00000000 00000000 .* + 0b30 00000000 00000000 00000000 00000000 .* + 0b40 00000000 00000000 00000000 00000000 .* + 0b50 00000000 00000000 00000000 00000000 .* + 0b60 00000000 00000000 00000000 00000000 .* + 0b70 00000000 00000000 00000000 00000000 .* + 0b80 00000000 00000000 00000000 00000000 .* + 0b90 00000000 00000000 00000000 00000000 .* + 0ba0 00000000 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00000000 00000000 00000000 .* + 0fc0 00000000 00000000 00000000 00000000 .* + 0fd0 00000000 00000000 00000000 00000000 .* + 0fe0 00000000 00000000 00000000 00000000 .* + 0ff0 00000000 00000000 00000000 00000000 .* + 1000 00000000 00000000 00000000 00000000 .* + 1010 00000000 00000000 00000000 00000000 .* + 1020 00000000 00000000 00000000 00000000 .* + 1030 00000000 00000000 00000000 00000000 .* + 1040 00000000 00000000 00000000 00000000 .* + 1050 00000000 00000000 00000000 00000000 .* + 1060 00000000 00000000 00000000 00000000 .* + 1070 00000000 00000000 00000000 00000000 .* + 1080 00000000 00000000 00000000 00000000 .* + 1090 00000000 00000000 00000000 00000000 .* + 10a0 00000000 00000000 00000000 00000000 .* + 10b0 00000000 00000000 00000000 00000000 .* + 10c0 00000000 00000000 00000000 00000000 .* + 10d0 00000000 00000000 00000000 00000000 .* + 10e0 00000000 00000000 00000000 00000000 .* + 10f0 00000000 00000000 00000000 00000000 .* + 1100 00000000 00000000 00000000 00000000 .* + 1110 00000000 00000000 00000000 00000000 .* + 1120 00000000 00000000 00000000 00000000 .* + 1130 00000000 00000000 00000000 0038ff39 .* + 1140 fe39fd39 ff93f813 ff93f413 f839ff93 .* + 1150 ee13ff93 ea13ff93 e7130000 00000000 .* + 1160 00000000 00000000 00000000 00000000 .* + 1170 00000000 00000000 00000000 00000000 .* + 1180 00000000 00000000 00000000 00000000 .* + 1190 00000000 00000000 00000000 00000000 .* + 11a0 00000000 00000000 00000000 00000000 .* + 11b0 00000000 00000000 00000000 00000000 .* + 11c0 00000000 00000000 00000000 00000000 .* + 11d0 00000000 00000000 00000000 00000000 .* + 11e0 00000000 00000000 00000000 00000000 .* + 11f0 00000000 00000000 00000000 00000000 .* + 1200 00000000 00000000 00000000 00000000 .* + 1210 00000000 00000000 00000000 00000000 .* + 1220 00000000 00000000 00000000 00000000 .* + 1230 00000000 00000000 00000000 00000000 .* + 1240 00000000 00000000 00000000 00000000 .* + 1250 00000000 00000000 00000000 00000000 .* + 1260 00000000 00000000 00000000 00000000 .* + 1270 00000000 00000000 00000000 00000000 .* + 1280 00000000 00000000 00000000 00000000 .* + 1290 00000000 00000000 00000000 00000000 .* + 12a0 00000000 00000000 00000000 00000000 .* + 12b0 00000000 00000000 00000000 00000000 .* + 12c0 00000000 00000000 00000000 00000000 .* + 12d0 00000000 00000000 00000000 00000000 .* + 12e0 00000000 00000000 00000000 00000000 .* + 12f0 00000000 00000000 00000000 00000000 .* + 1300 00000000 00000000 00000000 00000000 .* + 1310 00000000 00000000 00000000 00000000 .* + 1320 00000000 00000000 00000000 00000000 .* + 1330 00000000 00000000 00000000 00000000 .* + 1340 00000000 00000000 00000000 00000000 .* + 1350 00000000 00000000 0000ff93 e211ff93 .* + 1360 de11ff93 da11ff93 d611ff93 d211ff93 .* + 1370 ce11ff93 ca11ff93 c611ff93 c211ff93 .* + 1380 bf110090 46120090 42120090 3e120090 .* + 1390 3a120090 36120090 32120090 2e120090 .* + 13a0 2a120090 26120090 23120000 00000000 .* + 13b0 00000000 00000000 00000000 00000000 .* + 13c0 00000000 00000000 00000000 00000000 .* + 13d0 00000000 00000000 00000000 00000000 .* + 13e0 00000000 00000000 00000000 00000000 .* + 13f0 00000000 00000000 00000000 00000000 .* + 1400 00000000 00000000 00000000 00000000 .* + 1410 00000000 00000000 00000000 00000000 .* + 1420 00000000 00000000 00000000 00000000 .* + 1430 00000000 00000000 00000000 00000000 .* + 1440 00000000 00000000 00000000 00000000 .* + 1450 00000000 00000000 00000000 00000000 .* + 1460 00000000 00000000 00000000 00000000 .* + 1470 00000000 00000000 00000000 00000000 .* + 1480 00000000 00000000 00000000 00000000 .* + 1490 00000000 00000000 00000000 00000000 .* + 14a0 00000000 00000000 00000000 00000000 .* + 14b0 00000000 00000000 00000000 00000000 .* + 14c0 00000000 00000000 00000000 00000000 .* + 14d0 00000000 00000000 00000000 00000000 .* + 14e0 00000000 00000000 00000000 00000000 .* + 14f0 00000000 00000000 00000000 00000000 .* + 1500 00000000 00000000 00000000 00000000 .* + 1510 00000000 00000000 00000000 00000000 .* + 1520 00000000 00000000 00000000 00000000 .* + 1530 00000000 00000000 00000000 00000000 .* + 1540 00000000 00000000 00000000 00000000 .* + 1550 00000000 00000000 00000000 00000000 .* + 1560 00000000 00000000 00000000 00000000 .* + 1570 00000000 00000000 00000000 00000000 .* + 1580 00000000 00000000 00000000 00000000 .* + 1590 00000000 00000000 00000000 00000000 .* + 15a0 00000000 00000000 00000f38 0e380d38 .* + 15b0 0c380090 16100090 12100738 00900c10 .* + 15c0 00900810 00900510 00000000 00000000 .* + 15d0 00000000 00000000 00000000 00000000 .* + 15e0 00000000 00000000 00000000 00000000 .* + 15f0 00000000 00000000 00000000 00000000 .* + 1600 00000000 00000000 00000000 00000000 .* + 1610 00000000 00000000 00000000 00000000 .* + 1620 00000000 00000000 00000000 00000000 .* + 1630 00000000 00000000 00000000 00000000 .* + 1640 00000000 00000000 00000000 00000000 .* + 1650 00000000 00000000 00000000 00000000 .* + 1660 00000000 00000000 00000000 00000000 .* + 1670 00000000 00000000 00000000 00000000 .* + 1680 00000000 00000000 00000000 00000000 .* + 1690 00000000 00000000 00000000 00000000 .* + 16a0 00000000 00000000 00000000 00000000 .* + 16b0 00000000 00000000 00000000 00000000 .* + 16c0 00000000 00000000 00000000 00000000 .* + 16d0 00000000 00000000 00000000 00000000 .* + 16e0 00000000 00000000 00000000 00000000 .* + 16f0 00000000 00000000 00000000 00000000 .* + 1700 00000000 00000000 00000000 00000000 .* + 1710 00000000 00000000 00000000 00000000 .* + 1720 00000000 00000000 00000000 00000000 .* + 1730 00000000 00000000 00000000 00000000 .* + 1740 00000000 00000000 00000000 00000000 .* + 1750 00000000 00000000 00000000 00000000 .* + 1760 00000000 00000000 00000000 00000000 .* + 1770 00000000 00000000 00000000 00000000 .* + 1780 00000000 00000000 00000000 00000000 .* + 1790 00000000 00000000 00000000 00000000 .* + 17a0 00000000 00000000 00000000 00000000 .* + 17b0 00000000 00000000 00000000 00000000 .* + 17c0 00000000 00000000 00000039 ff93fe11 .* + 17d0 00900612 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00000000 00000000 00000000 .* + 6510 00000000 00000000 00000000 00000000 .* + 6520 00000000 00000000 00000000 00000000 .* + 6530 00000000 00000000 00000000 00000000 .* + 6540 00000000 00000000 00000000 00000000 .* + 6550 00000000 00000000 00000000 00000000 .* + 6560 00000000 00000000 00000000 00000000 .* + 6570 00000000 00000000 00000000 00000000 .* + 6580 00000000 00000000 00000000 00000000 .* + 6590 00000000 00000000 00000000 00000000 .* + 65a0 00000000 00000000 00000000 00000000 .* + 65b0 00000000 00000000 00000000 00000000 .* + 65c0 00000000 00000000 00000000 00000000 .* + 65d0 00000000 00000000 00000000 00000000 .* + 65e0 00000000 00000000 00000000 00000000 .* + 65f0 00000000 00000000 00000000 00000000 .* + 6600 00000000 00000000 00000000 00000000 .* + 6610 00000000 00000000 00000000 00000000 .* + 6620 00000000 00000000 00000000 00000000 .* + 6630 00000000 00000000 00000000 00000000 .* + 6640 00000000 00000000 00000000 00000000 .* + 6650 00000000 00000000 00000000 00000000 .* + 6660 00000000 00000000 00000000 00000000 .* + 6670 00000000 00000000 00000000 00000000 .* + 6680 00000000 00000000 00000000 00000000 .* + 6690 00000000 00000000 00000000 00000000 .* + 66a0 00000000 00000000 00000000 00000000 .* + 66b0 00000000 00000000 00000000 00000000 .* +#pass diff --git a/gas/testsuite/gas/score/branch_32.d b/gas/testsuite/gas/score/branch_32.d new file mode 100644 index 0000000..36c2851 --- /dev/null +++ b/gas/testsuite/gas/score/branch_32.d @@ -0,0 +1,578 @@ +#as: -march=score3 -I${srcdir}/${subdir} +#objdump: -d +#source: branch_32.s + +.*: file format .* + +Disassembly of section .text: + +00000000 <.text>: + 0: 3400 bgtu! 0x0 + 2: 35ff bgtu! 0x0 + 4: 35fe bgtu! 0x0 + 6: 35fd bgtu! 0x0 + 8: 93ff 0bf8 bgtu 0x0 + c: 93ff 0bf4 bgtu 0x0 + 10: 35f8 bgtu! 0x0 + 12: 93ff 0bee bgtu 0x0 + 16: 93ff 0bea bgtu 0x0 + 1a: 93ff 0be7 bgtul 0x0 + ... + 21e: 93ff 09e2 bgtu 0x0 + 222: 93ff 09de bgtu 0x0 + 226: 93ff 09da bgtu 0x0 + 22a: 93ff 09d6 bgtu 0x0 + 22e: 93ff 09d2 bgtu 0x0 + 232: 93ff 09ce bgtu 0x0 + 236: 93ff 09ca bgtu 0x0 + 23a: 93ff 09c6 bgtu 0x0 + 23e: 93ff 09c2 bgtu 0x0 + 242: 93ff 09bf bgtul 0x0 + 246: 9000 0a46 bgtu 0x48c + 24a: 9000 0a42 bgtu 0x48c + 24e: 9000 0a3e bgtu 0x48c + 252: 9000 0a3a bgtu 0x48c + 256: 9000 0a36 bgtu 0x48c + 25a: 9000 0a32 bgtu 0x48c + 25e: 9000 0a2e bgtu 0x48c + 262: 9000 0a2a bgtu 0x48c + 266: 9000 0a26 bgtu 0x48c + 26a: 9000 0a23 bgtul 0x48c + ... + 46e: 340f bgtu! 0x48c + 470: 340e bgtu! 0x48c + 472: 340d bgtu! 0x48c + 474: 340c bgtu! 0x48c + 476: 9000 0816 bgtu 0x48c + 47a: 9000 0812 bgtu 0x48c + 47e: 3407 bgtu! 0x48c + 480: 9000 080c bgtu 0x48c + 484: 9000 0808 bgtu 0x48c + 488: 9000 0805 bgtul 0x48c + ... + 68c: 0000 nop! + 68e: 3500 bgtu! 0x48e + 690: 93ff 09fe bgtu 0x48e + 694: 9000 0a06 bgtu 0x89a + 698: 9000 0a02 bgtu 0x89a + ... + 89c: 0000 nop! + 89e: 3600 bleu! 0x89e + 8a0: 37ff bleu! 0x89e + 8a2: 37fe bleu! 0x89e + 8a4: 37fd bleu! 0x89e + 8a6: 93ff 0ff8 bleu 0x89e + 8aa: 93ff 0ff4 bleu 0x89e + 8ae: 37f8 bleu! 0x89e + 8b0: 93ff 0fee bleu 0x89e + 8b4: 93ff 0fea bleu 0x89e + 8b8: 93ff 0fe7 bleul 0x89e + ... + abc: 93ff 0de2 bleu 0x89e + ac0: 93ff 0dde bleu 0x89e + ac4: 93ff 0dda bleu 0x89e + ac8: 93ff 0dd6 bleu 0x89e + acc: 93ff 0dd2 bleu 0x89e + ad0: 93ff 0dce bleu 0x89e + ad4: 93ff 0dca bleu 0x89e + ad8: 93ff 0dc6 bleu 0x89e + adc: 93ff 0dc2 bleu 0x89e + ae0: 93ff 0dbf bleul 0x89e + ae4: 9000 0e46 bleu 0xd2a + ae8: 9000 0e42 bleu 0xd2a + aec: 9000 0e3e bleu 0xd2a + af0: 9000 0e3a bleu 0xd2a + af4: 9000 0e36 bleu 0xd2a + af8: 9000 0e32 bleu 0xd2a + afc: 9000 0e2e bleu 0xd2a + b00: 9000 0e2a bleu 0xd2a + b04: 9000 0e26 bleu 0xd2a + b08: 9000 0e23 bleul 0xd2a + ... + d0c: 360f bleu! 0xd2a + d0e: 360e bleu! 0xd2a + d10: 360d bleu! 0xd2a + d12: 360c bleu! 0xd2a + d14: 9000 0c16 bleu 0xd2a + d18: 9000 0c12 bleu 0xd2a + d1c: 3607 bleu! 0xd2a + d1e: 9000 0c0c bleu 0xd2a + d22: 9000 0c08 bleu 0xd2a + d26: 9000 0c05 bleul 0xd2a + ... + f2a: 0000 nop! + f2c: 3700 bleu! 0xd2c + f2e: 93ff 0dfe bleu 0xd2c + f32: 9000 0e06 bleu 0x1138 + f36: 9000 0e02 bleu 0x1138 + ... + 113a: 0000 nop! + 113c: 3800 beq! 0x113c + 113e: 39ff beq! 0x113c + 1140: 39fe beq! 0x113c + 1142: 39fd beq! 0x113c + 1144: 93ff 13f8 beq 0x113c + 1148: 93ff 13f4 beq 0x113c + 114c: 39f8 beq! 0x113c + 114e: 93ff 13ee beq 0x113c + 1152: 93ff 13ea beq 0x113c + 1156: 93ff 13e7 beql 0x113c + ... + 135a: 93ff 11e2 beq 0x113c + 135e: 93ff 11de beq 0x113c + 1362: 93ff 11da beq 0x113c + 1366: 93ff 11d6 beq 0x113c + 136a: 93ff 11d2 beq 0x113c + 136e: 93ff 11ce beq 0x113c + 1372: 93ff 11ca beq 0x113c + 1376: 93ff 11c6 beq 0x113c + 137a: 93ff 11c2 beq 0x113c + 137e: 93ff 11bf beql 0x113c + 1382: 9000 1246 beq 0x15c8 + 1386: 9000 1242 beq 0x15c8 + 138a: 9000 123e beq 0x15c8 + 138e: 9000 123a beq 0x15c8 + 1392: 9000 1236 beq 0x15c8 + 1396: 9000 1232 beq 0x15c8 + 139a: 9000 122e beq 0x15c8 + 139e: 9000 122a beq 0x15c8 + 13a2: 9000 1226 beq 0x15c8 + 13a6: 9000 1223 beql 0x15c8 + ... + 15aa: 380f beq! 0x15c8 + 15ac: 380e beq! 0x15c8 + 15ae: 380d beq! 0x15c8 + 15b0: 380c beq! 0x15c8 + 15b2: 9000 1016 beq 0x15c8 + 15b6: 9000 1012 beq 0x15c8 + 15ba: 3807 beq! 0x15c8 + 15bc: 9000 100c beq 0x15c8 + 15c0: 9000 1008 beq 0x15c8 + 15c4: 9000 1005 beql 0x15c8 + ... + 17c8: 0000 nop! + 17ca: 3900 beq! 0x15ca + 17cc: 93ff 11fe beq 0x15ca + 17d0: 9000 1206 beq 0x19d6 + 17d4: 9000 1202 beq 0x19d6 + ... + 19d8: 0000 nop! + 19da: 3a00 bne! 0x19da + 19dc: 3bff bne! 0x19da + 19de: 3bfe bne! 0x19da + 19e0: 3bfd bne! 0x19da + 19e2: 93ff 17f8 bne 0x19da + 19e6: 93ff 17f4 bne 0x19da + 19ea: 3bf8 bne! 0x19da + 19ec: 93ff 17ee bne 0x19da + 19f0: 93ff 17ea bne 0x19da + 19f4: 93ff 17e7 bnel 0x19da + ... + 1bf8: 93ff 15e2 bne 0x19da + 1bfc: 93ff 15de bne 0x19da + 1c00: 93ff 15da bne 0x19da + 1c04: 93ff 15d6 bne 0x19da + 1c08: 93ff 15d2 bne 0x19da + 1c0c: 93ff 15ce bne 0x19da + 1c10: 93ff 15ca bne 0x19da + 1c14: 93ff 15c6 bne 0x19da + 1c18: 93ff 15c2 bne 0x19da + 1c1c: 93ff 15bf bnel 0x19da + 1c20: 9000 1646 bne 0x1e66 + 1c24: 9000 1642 bne 0x1e66 + 1c28: 9000 163e bne 0x1e66 + 1c2c: 9000 163a bne 0x1e66 + 1c30: 9000 1636 bne 0x1e66 + 1c34: 9000 1632 bne 0x1e66 + 1c38: 9000 162e bne 0x1e66 + 1c3c: 9000 162a bne 0x1e66 + 1c40: 9000 1626 bne 0x1e66 + 1c44: 9000 1623 bnel 0x1e66 + ... + 1e48: 3a0f bne! 0x1e66 + 1e4a: 3a0e bne! 0x1e66 + 1e4c: 3a0d bne! 0x1e66 + 1e4e: 3a0c bne! 0x1e66 + 1e50: 9000 1416 bne 0x1e66 + 1e54: 9000 1412 bne 0x1e66 + 1e58: 3a07 bne! 0x1e66 + 1e5a: 9000 140c bne 0x1e66 + 1e5e: 9000 1408 bne 0x1e66 + 1e62: 9000 1405 bnel 0x1e66 + ... + 2066: 0000 nop! + 2068: 3b00 bne! 0x1e68 + 206a: 93ff 15fe bne 0x1e68 + 206e: 9000 1606 bne 0x2274 + 2072: 9000 1602 bne 0x2274 + ... + 2276: 0000 nop! + 2278: 3c00 bgt! 0x2278 + 227a: 3dff bgt! 0x2278 + 227c: 3dfe bgt! 0x2278 + 227e: 3dfd bgt! 0x2278 + 2280: 93ff 1bf8 bgt 0x2278 + 2284: 93ff 1bf4 bgt 0x2278 + 2288: 3df8 bgt! 0x2278 + 228a: 93ff 1bee bgt 0x2278 + 228e: 93ff 1bea bgt 0x2278 + 2292: 93ff 1be7 bgtl 0x2278 + ... + 2496: 93ff 19e2 bgt 0x2278 + 249a: 93ff 19de bgt 0x2278 + 249e: 93ff 19da bgt 0x2278 + 24a2: 93ff 19d6 bgt 0x2278 + 24a6: 93ff 19d2 bgt 0x2278 + 24aa: 93ff 19ce bgt 0x2278 + 24ae: 93ff 19ca bgt 0x2278 + 24b2: 93ff 19c6 bgt 0x2278 + 24b6: 93ff 19c2 bgt 0x2278 + 24ba: 93ff 19bf bgtl 0x2278 + 24be: 9000 1a46 bgt 0x2704 + 24c2: 9000 1a42 bgt 0x2704 + 24c6: 9000 1a3e bgt 0x2704 + 24ca: 9000 1a3a bgt 0x2704 + 24ce: 9000 1a36 bgt 0x2704 + 24d2: 9000 1a32 bgt 0x2704 + 24d6: 9000 1a2e bgt 0x2704 + 24da: 9000 1a2a bgt 0x2704 + 24de: 9000 1a26 bgt 0x2704 + 24e2: 9000 1a23 bgtl 0x2704 + ... + 26e6: 3c0f bgt! 0x2704 + 26e8: 3c0e bgt! 0x2704 + 26ea: 3c0d bgt! 0x2704 + 26ec: 3c0c bgt! 0x2704 + 26ee: 9000 1816 bgt 0x2704 + 26f2: 9000 1812 bgt 0x2704 + 26f6: 3c07 bgt! 0x2704 + 26f8: 9000 180c bgt 0x2704 + 26fc: 9000 1808 bgt 0x2704 + 2700: 9000 1805 bgtl 0x2704 + ... + 2904: 0000 nop! + 2906: 3d00 bgt! 0x2706 + 2908: 93ff 19fe bgt 0x2706 + 290c: 9000 1a06 bgt 0x2b12 + 2910: 9000 1a02 bgt 0x2b12 + ... + 2b14: 0000 nop! + 2b16: 3e00 ble! 0x2b16 + 2b18: 3fff ble! 0x2b16 + 2b1a: 3ffe ble! 0x2b16 + 2b1c: 3ffd ble! 0x2b16 + 2b1e: 93ff 1ff8 ble 0x2b16 + 2b22: 93ff 1ff4 ble 0x2b16 + 2b26: 3ff8 ble! 0x2b16 + 2b28: 93ff 1fee ble 0x2b16 + 2b2c: 93ff 1fea ble 0x2b16 + 2b30: 93ff 1fe7 blel 0x2b16 + ... + 2d34: 93ff 1de2 ble 0x2b16 + 2d38: 93ff 1dde ble 0x2b16 + 2d3c: 93ff 1dda ble 0x2b16 + 2d40: 93ff 1dd6 ble 0x2b16 + 2d44: 93ff 1dd2 ble 0x2b16 + 2d48: 93ff 1dce ble 0x2b16 + 2d4c: 93ff 1dca ble 0x2b16 + 2d50: 93ff 1dc6 ble 0x2b16 + 2d54: 93ff 1dc2 ble 0x2b16 + 2d58: 93ff 1dbf blel 0x2b16 + 2d5c: 9000 1e46 ble 0x2fa2 + 2d60: 9000 1e42 ble 0x2fa2 + 2d64: 9000 1e3e ble 0x2fa2 + 2d68: 9000 1e3a ble 0x2fa2 + 2d6c: 9000 1e36 ble 0x2fa2 + 2d70: 9000 1e32 ble 0x2fa2 + 2d74: 9000 1e2e ble 0x2fa2 + 2d78: 9000 1e2a ble 0x2fa2 + 2d7c: 9000 1e26 ble 0x2fa2 + 2d80: 9000 1e23 blel 0x2fa2 + ... + 2f84: 3e0f ble! 0x2fa2 + 2f86: 3e0e ble! 0x2fa2 + 2f88: 3e0d ble! 0x2fa2 + 2f8a: 3e0c ble! 0x2fa2 + 2f8c: 9000 1c16 ble 0x2fa2 + 2f90: 9000 1c12 ble 0x2fa2 + 2f94: 3e07 ble! 0x2fa2 + 2f96: 9000 1c0c ble 0x2fa2 + 2f9a: 9000 1c08 ble 0x2fa2 + 2f9e: 9000 1c05 blel 0x2fa2 + ... + 31a2: 0000 nop! + 31a4: 3f00 ble! 0x2fa4 + 31a6: 93ff 1dfe ble 0x2fa4 + 31aa: 9000 1e06 ble 0x33b0 + 31ae: 9000 1e02 ble 0x33b0 + ... + 33b2: 0000 nop! + 33b4: 3200 bcnz! 0x33b4 + 33b6: 33ff bcnz! 0x33b4 + 33b8: 33fe bcnz! 0x33b4 + 33ba: 33fd bcnz! 0x33b4 + 33bc: 93ff 3bf8 bcnz 0x33b4 + 33c0: 93ff 3bf4 bcnz 0x33b4 + 33c4: 33f8 bcnz! 0x33b4 + 33c6: 93ff 3bee bcnz 0x33b4 + 33ca: 93ff 3bea bcnz 0x33b4 + 33ce: 93ff 3be7 bcnzl 0x33b4 + ... + 35d2: 93ff 39e2 bcnz 0x33b4 + 35d6: 93ff 39de bcnz 0x33b4 + 35da: 93ff 39da bcnz 0x33b4 + 35de: 93ff 39d6 bcnz 0x33b4 + 35e2: 93ff 39d2 bcnz 0x33b4 + 35e6: 93ff 39ce bcnz 0x33b4 + 35ea: 93ff 39ca bcnz 0x33b4 + 35ee: 93ff 39c6 bcnz 0x33b4 + 35f2: 93ff 39c2 bcnz 0x33b4 + 35f6: 93ff 39bf bcnzl 0x33b4 + 35fa: 9000 3a46 bcnz 0x3840 + 35fe: 9000 3a42 bcnz 0x3840 + 3602: 9000 3a3e bcnz 0x3840 + 3606: 9000 3a3a bcnz 0x3840 + 360a: 9000 3a36 bcnz 0x3840 + 360e: 9000 3a32 bcnz 0x3840 + 3612: 9000 3a2e bcnz 0x3840 + 3616: 9000 3a2a bcnz 0x3840 + 361a: 9000 3a26 bcnz 0x3840 + 361e: 9000 3a23 bcnzl 0x3840 + ... + 3822: 320f bcnz! 0x3840 + 3824: 320e bcnz! 0x3840 + 3826: 320d bcnz! 0x3840 + 3828: 320c bcnz! 0x3840 + 382a: 9000 3816 bcnz 0x3840 + 382e: 9000 3812 bcnz 0x3840 + 3832: 3207 bcnz! 0x3840 + 3834: 9000 380c bcnz 0x3840 + 3838: 9000 3808 bcnz 0x3840 + 383c: 9000 3805 bcnzl 0x3840 + ... + 3a40: 0000 nop! + 3a42: 3300 bcnz! 0x3842 + 3a44: 93ff 39fe bcnz 0x3842 + 3a48: 9000 3a06 bcnz 0x3c4e + 3a4c: 9000 3a02 bcnz 0x3c4e + ... + 3c50: 0000 nop! + 3c52: 3000 b! 0x3c52 + 3c54: 31ff b! 0x3c52 + 3c56: 31fe b! 0x3c52 + 3c58: 31fd b! 0x3c52 + 3c5a: 93ff 3ff8 b 0x3c52 + 3c5e: 93ff 3ff4 b 0x3c52 + 3c62: 31f8 b! 0x3c52 + 3c64: 93ff 3fee b 0x3c52 + 3c68: 93ff 3fea b 0x3c52 + 3c6c: 93ff 3fe7 bl 0x3c52 + ... + 3e70: 93ff 3de2 b 0x3c52 + 3e74: 93ff 3dde b 0x3c52 + 3e78: 93ff 3dda b 0x3c52 + 3e7c: 93ff 3dd6 b 0x3c52 + 3e80: 93ff 3dd2 b 0x3c52 + 3e84: 93ff 3dce b 0x3c52 + 3e88: 93ff 3dca b 0x3c52 + 3e8c: 93ff 3dc6 b 0x3c52 + 3e90: 93ff 3dc2 b 0x3c52 + 3e94: 93ff 3dbf bl 0x3c52 + 3e98: 9000 3e46 b 0x40de + 3e9c: 9000 3e42 b 0x40de + 3ea0: 9000 3e3e b 0x40de + 3ea4: 9000 3e3a b 0x40de + 3ea8: 9000 3e36 b 0x40de + 3eac: 9000 3e32 b 0x40de + 3eb0: 9000 3e2e b 0x40de + 3eb4: 9000 3e2a b 0x40de + 3eb8: 9000 3e26 b 0x40de + 3ebc: 9000 3e23 bl 0x40de + ... + 40c0: 300f b! 0x40de + 40c2: 300e b! 0x40de + 40c4: 300d b! 0x40de + 40c6: 300c b! 0x40de + 40c8: 9000 3c16 b 0x40de + 40cc: 9000 3c12 b 0x40de + 40d0: 3007 b! 0x40de + 40d2: 9000 3c0c b 0x40de + 40d6: 9000 3c08 b 0x40de + 40da: 9000 3c05 bl 0x40de + ... + 42de: 0000 nop! + 42e0: 3100 b! 0x40e0 + 42e2: 93ff 3dfe b 0x40e0 + 42e6: 9000 3e06 b 0x44ec + 42ea: 9000 3e02 b 0x44ec + ... + 44ee: 0000 nop! + 44f0: 0080 br! r0 + 44f2: 008f br! r15 + 44f4: 0080 br! r0 + 44f6: 0080 br! r0 + 44f8: 0080 br! r0 + 44fa: 0080 br! r0 + 44fc: 0080 br! r0 + 44fe: 0080 br! r0 + 4500: 0080 br! r0 + 4502: 0080 br! r0 + 4504: 0090 br! r16 + 4506: 009f br! r31 + 4508: 00a0 brl! r0 + 450a: 00af brl! r15 + 450c: 00a0 brl! r0 + 450e: 00a0 brl! r0 + 4510: 00a0 brl! r0 + 4512: 00a0 brl! r0 + 4514: 00a0 brl! r0 + 4516: 00a0 brl! r0 + 4518: 00a0 brl! r0 + 451a: 00a0 brl! r0 + 451c: 00b0 brl! r16 + 451e: 00bf brl! r31 + 4520: 8000 3c4c bcmpeq r0, r15 ,0x4520 + 4524: 83ef 43cc bcmpeq r15, r16 ,0x4520 + 4528: 83ef 7f4c bcmpeq r15, r31 ,0x4520 + 452c: 83f0 7ecc bcmpeq r16, r31 ,0x4520 + ... + 4730: 440f cmp! r0, r15 + 4732: 93ff 11ee beq 0x4520 + 4736: 45f0 cmp! r15, r16 + 4738: 93ff 11e8 beq 0x4520 + 473c: 45ff cmp! r15, r31 + 473e: 93ff 11e2 beq 0x4520 + 4742: 461f cmp! r16, r31 + 4744: 93ff 11dc beq 0x4520 + 4748: 440f cmp! r0, r15 + 474a: 9000 1226 beq 0x4970 + 474e: 45f0 cmp! r15, r16 + 4750: 9000 1220 beq 0x4970 + 4754: 45ff cmp! r15, r31 + 4756: 9000 121a beq 0x4970 + 475a: 461f cmp! r16, r31 + 475c: 9000 1214 beq 0x4970 + ... + 4960: 8000 3e4c bcmpeq r0, r15 ,0x4970 + 4964: 800f 41cc bcmpeq r15, r16 ,0x4970 + 4968: 800f 7d4c bcmpeq r15, r31 ,0x4970 + 496c: 8010 7ccc bcmpeq r16, r31 ,0x4970 + ... + 4b70: 0000 nop! + 4b72: 8200 3c4c bcmpeq r0, r15 ,0x4972 + 4b76: 460f cmp! r16, r15 + 4b78: 93ff 11fa beq 0x4972 + 4b7c: 440f cmp! r0, r15 + 4b7e: 9000 1208 beq 0x4d86 + 4b82: 460f cmp! r16, r15 + 4b84: 9000 1202 beq 0x4d86 + ... + 4d88: 8000 3c4e bcmpne r0, r15 ,0x4d88 + 4d8c: 83ef 43ce bcmpne r15, r16 ,0x4d88 + 4d90: 83ef 7f4e bcmpne r15, r31 ,0x4d88 + 4d94: 83f0 7ece bcmpne r16, r31 ,0x4d88 + ... + 4f98: 440f cmp! r0, r15 + 4f9a: 93ff 15ee bne 0x4d88 + 4f9e: 45f0 cmp! r15, r16 + 4fa0: 93ff 15e8 bne 0x4d88 + 4fa4: 45ff cmp! r15, r31 + 4fa6: 93ff 15e2 bne 0x4d88 + 4faa: 461f cmp! r16, r31 + 4fac: 93ff 15dc bne 0x4d88 + 4fb0: 440f cmp! r0, r15 + 4fb2: 9000 1626 bne 0x51d8 + 4fb6: 45f0 cmp! r15, r16 + 4fb8: 9000 1620 bne 0x51d8 + 4fbc: 45ff cmp! r15, r31 + 4fbe: 9000 161a bne 0x51d8 + 4fc2: 461f cmp! r16, r31 + 4fc4: 9000 1614 bne 0x51d8 + ... + 51c8: 8000 3e4e bcmpne r0, r15 ,0x51d8 + 51cc: 800f 41ce bcmpne r15, r16 ,0x51d8 + 51d0: 800f 7d4e bcmpne r15, r31 ,0x51d8 + 51d4: 8010 7cce bcmpne r16, r31 ,0x51d8 + ... + 53d8: 0000 nop! + 53da: 8200 3c4e bcmpne r0, r15 ,0x51da + 53de: 460f cmp! r16, r15 + 53e0: 93ff 15fa bne 0x51da + 53e4: 440f cmp! r0, r15 + 53e6: 9000 1608 bne 0x55ee + 53ea: 460f cmp! r16, r15 + 53ec: 9000 1602 bne 0x55ee + ... + 55f0: 8000 004c bcmpeqz r0, 0x55f0 + 55f4: 83ef 03cc bcmpeqz r15, 0x55f0 + 55f8: 83f0 034c bcmpeqz r16, 0x55f0 + 55fc: 83ff 02cc bcmpeqz r31, 0x55f0 + ... + 5800: 6000 cmpi! r0, 0 + 5802: 93ff 11ee beq 0x55f0 + 5806: 61e0 cmpi! r15, 0 + 5808: 93ff 11e8 beq 0x55f0 + 580c: 6200 cmpi! r16, 0 + 580e: 93ff 11e2 beq 0x55f0 + 5812: 63e0 cmpi! r31, 0 + 5814: 93ff 11dc beq 0x55f0 + 5818: 6000 cmpi! r0, 0 + 581a: 9000 1226 beq 0x5a40 + 581e: 61e0 cmpi! r15, 0 + 5820: 9000 1220 beq 0x5a40 + 5824: 6200 cmpi! r16, 0 + 5826: 9000 121a beq 0x5a40 + 582a: 63e0 cmpi! r31, 0 + 582c: 9000 1214 beq 0x5a40 + ... + 5a30: 8000 024c bcmpeqz r0, 0x5a40 + 5a34: 800f 01cc bcmpeqz r15, 0x5a40 + 5a38: 8010 014c bcmpeqz r16, 0x5a40 + 5a3c: 801f 00cc bcmpeqz r31, 0x5a40 + ... + 5c40: 0000 nop! + 5c42: 8200 004c bcmpeqz r0, 0x5a42 + 5c46: 6200 cmpi! r16, 0 + 5c48: 93ff 11fa beq 0x5a42 + 5c4c: 6000 cmpi! r0, 0 + 5c4e: 9000 1208 beq 0x5e56 + 5c52: 6200 cmpi! r16, 0 + 5c54: 9000 1202 beq 0x5e56 + ... + 5e58: 8000 004e bcmpnez r0, 0x5e58 + 5e5c: 83ef 03ce bcmpnez r15, 0x5e58 + 5e60: 83f0 034e bcmpnez r16, 0x5e58 + 5e64: 83ff 02ce bcmpnez r31, 0x5e58 + ... + 6068: 6000 cmpi! r0, 0 + 606a: 93ff 15ee bne 0x5e58 + 606e: 61e0 cmpi! r15, 0 + 6070: 93ff 15e8 bne 0x5e58 + 6074: 6200 cmpi! r16, 0 + 6076: 93ff 15e2 bne 0x5e58 + 607a: 63e0 cmpi! r31, 0 + 607c: 93ff 15dc bne 0x5e58 + 6080: 6000 cmpi! r0, 0 + 6082: 9000 1626 bne 0x62a8 + 6086: 61e0 cmpi! r15, 0 + 6088: 9000 1620 bne 0x62a8 + 608c: 6200 cmpi! r16, 0 + 608e: 9000 161a bne 0x62a8 + 6092: 63e0 cmpi! r31, 0 + 6094: 9000 1614 bne 0x62a8 + ... + 6298: 8000 024e bcmpnez r0, 0x62a8 + 629c: 800f 01ce bcmpnez r15, 0x62a8 + 62a0: 8010 014e bcmpnez r16, 0x62a8 + 62a4: 801f 00ce bcmpnez r31, 0x62a8 + ... + 64a8: 0000 nop! + 64aa: 8200 004e bcmpnez r0, 0x62aa + 64ae: 6200 cmpi! r16, 0 + 64b0: 93ff 15fa bne 0x62aa + 64b4: 6000 cmpi! r0, 0 + 64b6: 9000 1608 bne 0x66be + 64ba: 6200 cmpi! r16, 0 + 64bc: 9000 1602 bne 0x66be + ... +#pass diff --git a/gas/testsuite/gas/score/branch_32.s b/gas/testsuite/gas/score/branch_32.s new file mode 100644 index 0000000..aba4dcd --- /dev/null +++ b/gas/testsuite/gas/score/branch_32.s @@ -0,0 +1,181 @@ +/* + * tests for branch instruction relaxation + * + * Author: libin + */ + +.include "relaxation_macro.h" + +.macro _b_op_pattern insn insn1 +.balign 2 + +/* + * for local label 1, assembler should NOT alter instructions before .skip; + * but it SHOULD alter instructions afte it. + */ +1: + insn_16 "\insn! 1b" + tran_16_32 "\insn! 1b", "\insn 1b" + insn_16 "\insn1 1b" +.skip 512 + insn_16 "\insn! 1b" + tran_16_32 "\insn! 1b", "\insn 1b" + insn_16 "\insn1 1b" + +/* + * for local label 2, assembler SHOULD alter instructions before .skip; + * but it should NOT alter instructions after it. + */ + insn_16 "\insn! 2f" + tran_16_32 "\insn! 2f", "\insn 2f" + insn_16 "\insn1 2f" +.skip 511 + insn_16 "\insn! 2f" + tran_16_32 "\insn! 2f", "\insn 2f" + insn_16 "\insn1 2f" +2: + nop! + +/* tests for boundary */ +3: +.skip 512 + insn_16 "\insn! 3b" + insn_16 "\insn! 3b" + + insn_16 "\insn! 4f" + insn_16 "\insn! 4f" +.skip 511 +4: + nop! +.endm + +.macro _br_op_pattern insn +.balign 2 + insn_32 "\insn r0" + insn_32 "\insn r15" + + tran_16_32 "\insn! r0", "\insn r0" + + /* shouldn't alter */ + insn_32 "\insn r16" + insn_32 "\insn r31" +.endm + +.macro _bcmp_op_pattern1 insn +.balign 2 + +/* as will give "Using temp register(r1)" warning if you using r1 */ + +/* + * for local label 1, assembler should NOT alter instructions before .skip; + * but it SHOULD alter instructions afte it. + */ +1: + insn_32 "\insn r0, r15, 1b" + insn_32 "\insn r15, r16, 1b" + insn_32 "\insn r15, r31, 1b" + insn_32 "\insn r16, r31, 1b" +.skip 512 + insn_32 "\insn r0, r15, 1b" + insn_32 "\insn r15, r16, 1b" + insn_32 "\insn r15, r31, 1b" + insn_32 "\insn r16, r31, 1b" + +/* + * for local label 2, assembler SHOULD alter instructions before .skip; + * but it should NOT alter instructions after it. + */ + insn_32 "\insn r0, r15, 2f" + insn_32 "\insn r15, r16, 2f" + insn_32 "\insn r15, r31, 2f" + insn_32 "\insn r16, r31, 2f" +.skip 511 + insn_32 "\insn r0, r15, 2f" + insn_32 "\insn r15, r16, 2f" + insn_32 "\insn r15, r31, 2f" + insn_32 "\insn r16, r31, 2f" +2: + nop! + +/* tests for boundary */ +3: +.skip 512 + insn_32 "\insn r0, r15, 3b" + insn_32 "\insn r16, r15, 3b" + + insn_32 "\insn r0, r15, 4f" + insn_32 "\insn r16, r15, 4f" +.skip 511 +4: +.endm + +.macro _bcmp_op_pattern2 insn +.balign 2 + +/* as will give "Using temp register(r1)" warning if you using r1 */ + +/* + * for local label 1, assembler should NOT alter instructions before .skip; + * but it SHOULD alter instructions afte it. + */ +1: + insn_32 "\insn r0, 1b" + insn_32 "\insn r15, 1b" + insn_32 "\insn r16, 1b" + insn_32 "\insn r31, 1b" +.skip 512 + insn_32 "\insn r0, 1b" + insn_32 "\insn r15, 1b" + insn_32 "\insn r16, 1b" + insn_32 "\insn r31, 1b" + +/* + * for local label 2, assembler SHOULD alter instructions before .skip; + * but it should NOT alter instructions after it. + */ + insn_32 "\insn r0, 2f" + insn_32 "\insn r15, 2f" + insn_32 "\insn r16, 2f" + insn_32 "\insn r31, 2f" +.skip 511 + insn_32 "\insn r0, 2f" + insn_32 "\insn r15, 2f" + insn_32 "\insn r16, 2f" + insn_32 "\insn r31, 2f" +2: + nop! + +/* tests for boundary */ +3: +.skip 512 + insn_32 "\insn r0, 3b" + insn_32 "\insn r16, 3b" + + insn_32 "\insn r0, 4f" + insn_32 "\insn r16, 4f" +.skip 511 +4: +.endm + +.text +/* b Disp19 <-> b! Disp9 */ +_b_op_pattern "bgtu", "bgtul" +_b_op_pattern "bleu", "bleul" +_b_op_pattern "beq", "beql" +_b_op_pattern "bne", "bnel" +_b_op_pattern "bgt", "bgtl" +_b_op_pattern "ble", "blel" +_b_op_pattern "bcnz", "bcnzl" +_b_op_pattern "b", "bl" + +/* br rD <-> br! rD */ +_br_op_pattern "br" +_br_op_pattern "brl" + +/* bcmpeq/bcmpne rA,rB,Disp9 -> cmp/cmp! rA, rB; beq/bne Disp19 */ +_bcmp_op_pattern1 "bcmpeq" +_bcmp_op_pattern1 "bcmpne" + +/* bcmpeqz/bcmpnez rA,Disp9 -> cmpi! rA, 0; beq/bne Disp19 */ +_bcmp_op_pattern2 "bcmpeqz" +_bcmp_op_pattern2 "bcmpnez" diff --git a/gas/testsuite/gas/score/cmp_32-lt.d b/gas/testsuite/gas/score/cmp_32-lt.d new file mode 100644 index 0000000..3f87201 --- /dev/null +++ b/gas/testsuite/gas/score/cmp_32-lt.d @@ -0,0 +1,12 @@ +#as: -march=score3 -I${srcdir}/${subdir} -EL +#objdump: -s +#source: cmp_32.s + +.*: file format elf32-littlescore + +Contents of section .text: + 0000 0f440f44 0f440f44 0f440f44 0f440f44 .* + 0010 0f441044 00461f46 10600f60 f061ef61 .* + 0020 10601060 10601060 10601060 10601060 .* + 0030 1062ef63 0b84df7f e8852100 08862100 .* +#pass diff --git a/gas/testsuite/gas/score/cmp_32.d b/gas/testsuite/gas/score/cmp_32.d new file mode 100644 index 0000000..7c01963 --- /dev/null +++ b/gas/testsuite/gas/score/cmp_32.d @@ -0,0 +1,39 @@ +#as: -march=score3 -I${srcdir}/${subdir} +#objdump: -d +#source: cmp_32.s + +.*: file format .* + +Disassembly of section .text: + +00000000 <.text>: + 0: 440f cmp! r0, r15 + 2: 440f cmp! r0, r15 + 4: 440f cmp! r0, r15 + 6: 440f cmp! r0, r15 + 8: 440f cmp! r0, r15 + a: 440f cmp! r0, r15 + c: 440f cmp! r0, r15 + e: 440f cmp! r0, r15 + 10: 440f cmp! r0, r15 + 12: 4410 cmp! r0, r16 + 14: 4600 cmp! r16, r0 + 16: 461f cmp! r16, r31 + 18: 6010 cmpi! r0, -16 + 1a: 600f cmpi! r0, 15 + 1c: 61f0 cmpi! r15, -16 + 1e: 61ef cmpi! r15, 15 + 20: 6010 cmpi! r0, -16 + 22: 6010 cmpi! r0, -16 + 24: 6010 cmpi! r0, -16 + 26: 6010 cmpi! r0, -16 + 28: 6010 cmpi! r0, -16 + 2a: 6010 cmpi! r0, -16 + 2c: 6010 cmpi! r0, -16 + 2e: 6010 cmpi! r0, -16 + 30: 6210 cmpi! r16, -16 + 32: 63ef cmpi! r31, 15 + 34: 840b 7fdf cmpi.c r0, -17 + 38: 85e8 0021 cmpi.c r15, 16 + 3c: 8608 0021 cmpi.c r16, 16 +#pass diff --git a/gas/testsuite/gas/score/cmp_32.s b/gas/testsuite/gas/score/cmp_32.s new file mode 100644 index 0000000..162663e --- /dev/null +++ b/gas/testsuite/gas/score/cmp_32.s @@ -0,0 +1,33 @@ +/* + * tests for compare instruction relaxation + * + * Author: libin + */ + +.include "relaxation_macro.h" + +.text +/* cmp.c rA,rB -> cmp! rA,rB */ +insn_32 "cmp.c r0, r15" + +tran_16_32 "cmp! r0, r15", "cmp.c r0, r15" + +/* shouln't alter */ +insn_32 "cmp.c r0, r16" +insn_32 "cmp.c r16, r0" +insn_32 "cmp.c r16, r31" + +/* cmpi.c rD,SImm16 -> cmpi! rD,SImm5 */ +insn_32 "cmpi.c r0, -16" +insn_32 "cmpi.c r0, 15" +insn_32 "cmpi.c r15, -16" +insn_32 "cmpi.c r15, 15" + +tran_16_32 "cmpi! r0, -16", "cmpi.c r0, -16" + +/* shouldn't alter */ +insn_32 "cmpi.c r16, -16" +insn_32 "cmpi.c r31, 15" +insn_32 "cmpi.c r0, -17" +insn_32 "cmpi.c r15, 16" +insn_32 "cmpi.c r16, 16" diff --git a/gas/testsuite/gas/score/load_store_32-lt.d b/gas/testsuite/gas/score/load_store_32-lt.d new file mode 100644 index 0000000..b78f380 --- /dev/null +++ b/gas/testsuite/gas/score/load_store_32-lt.d @@ -0,0 +1,19 @@ +#as: -march=score3 -I${srcdir}/${subdir} -EL +#objdump: -s +#source: load_store_32.s + +.*: file format elf32-littlescore + +Contents of section .text: + 0000 0010001f e010e01f 1f101f1f ff10ff1f .* + 0010 1f101f10 1f101f10 1f101f10 1f101f10 .* + 0020 00c20000 08c07c00 08c27c00 07c0ff7f .* + 0030 07c08000 0020002f e020e02f 1f201f2f .* + 0040 ff20ff2f 1f201f20 1f201f20 1f201f20 .* + 0050 1f201f20 00d20000 08d07c00 08d27c00 .* + 0060 07d0ff7f 07d08000 0064e065 1f64ff65 .* + 0070 00640064 00640064 00640064 00640064 .* + 0080 00661b84 fe7f1884 40001886 40004200 .* + 0090 4f005000 829c2000 809ce07f 62006f00 .* + 00a0 7000828c e47f808c 24000000 .* +#pass diff --git a/gas/testsuite/gas/score/load_store_32.d b/gas/testsuite/gas/score/load_store_32.d new file mode 100644 index 0000000..5c36149 --- /dev/null +++ b/gas/testsuite/gas/score/load_store_32.d @@ -0,0 +1,79 @@ +#as: -march=score3 -I${srcdir}/${subdir} +#objdump: -d +#source: load_store_32.s + +.*: file format .* + +Disassembly of section .text: + +00000000 <.text>: + 0: 1000 lw! r0, \[r0,0\] + 2: 1f00 lw! r15, \[r0,0\] + 4: 10e0 lw! r0, \[r7,0\] + 6: 1fe0 lw! r15, \[r7,0\] + 8: 101f lw! r0, \[r0,124\] + a: 1f1f lw! r15, \[r0,124\] + c: 10ff lw! r0, \[r7,124\] + e: 1fff lw! r15, \[r7,124\] + 10: 101f lw! r0, \[r0,124\] + 12: 101f lw! r0, \[r0,124\] + 14: 101f lw! r0, \[r0,124\] + 16: 101f lw! r0, \[r0,124\] + 18: 101f lw! r0, \[r0,124\] + 1a: 101f lw! r0, \[r0,124\] + 1c: 101f lw! r0, \[r0,124\] + 1e: 101f lw! r0, \[r0,124\] + 20: c200 0000 lw r16, \[r0, 0\] + 24: c008 007c lw r0, \[r8, 124\] + 28: c208 007c lw r16, \[r8, 124\] + 2c: c007 7fff lw r0, \[r7, -1\] + 30: c007 0080 lw r0, \[r7, 128\] + 34: 2000 sw! r0, \[r0,0\] + 36: 2f00 sw! r15, \[r0,0\] + 38: 20e0 sw! r0, \[r7,0\] + 3a: 2fe0 sw! r15, \[r7,0\] + 3c: 201f sw! r0, \[r0,124\] + 3e: 2f1f sw! r15, \[r0,124\] + 40: 20ff sw! r0, \[r7,124\] + 42: 2fff sw! r15, \[r7,124\] + 44: 201f sw! r0, \[r0,124\] + 46: 201f sw! r0, \[r0,124\] + 48: 201f sw! r0, \[r0,124\] + 4a: 201f sw! r0, \[r0,124\] + 4c: 201f sw! r0, \[r0,124\] + 4e: 201f sw! r0, \[r0,124\] + 50: 201f sw! r0, \[r0,124\] + 52: 201f sw! r0, \[r0,124\] + 54: d200 0000 sw r16, \[r0, 0\] + 58: d008 007c sw r0, \[r8, 124\] + 5c: d208 007c sw r16, \[r8, 124\] + 60: d007 7fff sw r0, \[r7, -1\] + 64: d007 0080 sw r0, \[r7, 128\] + 68: 6400 ldiu! r0, 0 + 6a: 65e0 ldiu! r15, 0 + 6c: 641f ldiu! r0, 31 + 6e: 65ff ldiu! r15, 31 + 70: 6400 ldiu! r0, 0 + 72: 6400 ldiu! r0, 0 + 74: 6400 ldiu! r0, 0 + 76: 6400 ldiu! r0, 0 + 78: 6400 ldiu! r0, 0 + 7a: 6400 ldiu! r0, 0 + 7c: 6400 ldiu! r0, 0 + 7e: 6400 ldiu! r0, 0 + 80: 6600 ldiu! r16, 0 + 82: 841b 7ffe ldi r0, 0xffff\(-1\) + 86: 8418 0040 ldi r0, 0x20\(32\) + 8a: 8618 0040 ldi r16, 0x20\(32\) + 8e: 0042 pop! r2 + 90: 004f pop! r15 + 92: 0050 pop! r16 + 94: 9c82 0020 lw r4, \[r2\]\+, 4 + 98: 9c80 7fe0 lw r4, \[r0\]\+, -4 + 9c: 0062 push! r2 + 9e: 006f push! r15 + a0: 0070 push! r16 + a2: 8c82 7fe4 sw r4, \[r2, -4\]\+ + a6: 8c80 0024 sw r4, \[r0, 4\]\+ + ... +#pass diff --git a/gas/testsuite/gas/score/load_store_32.s b/gas/testsuite/gas/score/load_store_32.s new file mode 100644 index 0000000..046553f --- /dev/null +++ b/gas/testsuite/gas/score/load_store_32.s @@ -0,0 +1,71 @@ +/* + * tests for load/store instruction relaxation + * + * Author: libin + */ + +.include "relaxation_macro.h" + +.macro _ls_op_pattern insn +.balign 2 + insn_32 "\insn r0, [r0,0]" + insn_32 "\insn r15, [r0,0]" + insn_32 "\insn r0, [r7,0]" + insn_32 "\insn r15, [r7,0]" +/* NOTE: offset MUST be word aligned */ + insn_32 "\insn r0, [r0,124]" + insn_32 "\insn r15, [r0,124]" + insn_32 "\insn r0, [r7,124]" + insn_32 "\insn r15, [r7,124]" + + tran_16_32 "\insn! r0,[r0,124]", "\insn r0,[r0,124]" + + /* shouldn't alter */ + insn_32 "\insn r16, [r0, 0]" + insn_32 "\insn r0, [r8, 124]" + insn_32 "\insn r16, [r8, 124]" + insn_32 "\insn r0, [r7, -1]" + insn_32 "\insn r0, [r7, 128]" +.endm + +.text +/* lw/sw rD,[rA,SImm15] -> lw!/sw! rD,[rA,Imm5] */ +_ls_op_pattern "lw" +_ls_op_pattern "sw" + +/* ldi rD,SImm16 -> ldiu! rD,Imm6 */ +.balign 2 +insn_32 "ldi r0, 0" +insn_32 "ldi r15, 0" +insn_32 "ldi r0, 31" +insn_32 "ldi r15, 31" + +tran_16_32 "ldiu! r0, 0", "ldi r0, 0" + +/* shouldn't alter */ +insn_32 "ldi r16, 0" +insn_32 "ldi r0, -1" +insn_32 "ldi r0, 32" +insn_32 "ldi r16, 32" + +/* + * lw rD,[rA]+,SImm12 -> pop! rD + * + * r0: stack pointer(sp) + */ +insn_32 "lw r2, [r0]+, 4" +insn_32 "lw r15, [r0]+, 4" + +/* shouldn't alter */ +insn_32 "lw r16, [r0]+, 4" +insn_32 "lw r4, [r2]+, 4" +insn_32 "lw r4, [r0]+, -4" + +/* sw rD,[rA,SImm12]+ -> push! rD */ +insn_32 "sw r2, [r0, -4]+" +insn_32 "sw r15, [r0, -4]+" + +/* shouldn't alter */ +insn_32 "sw r16, [r0, -4]+" +insn_32 "sw r4, [r2, -4]+" +insn_32 "sw r4, [r0, 4]+" diff --git a/gas/testsuite/gas/score/logical_32-lt.d b/gas/testsuite/gas/score/logical_32-lt.d new file mode 100644 index 0000000..c961fea --- /dev/null +++ b/gas/testsuite/gas/score/logical_32-lt.d @@ -0,0 +1,13 @@ +#as: -march=score3 -I${srcdir}/${subdir} -EL +#objdump: -s +#source: logical_32.s + +.*: file format elf32-littlescore + +Contents of section .text: + 0000 0f4b0f4b 0f4b0f4b 0f4b0f4b 0f4b0f4b .* + 0010 0f4b0080 213c0080 20401082 20001082 .* + 0020 20440180 20080f4a 0f4a0f4a 0f4a0f4a .* + 0030 0f4a0f4a 0f4a0f4a 0080233c 00802240 .* + 0040 10822200 10822244 01802208 .* +#pass diff --git a/gas/testsuite/gas/score/logical_32.d b/gas/testsuite/gas/score/logical_32.d new file mode 100644 index 0000000..170a55a --- /dev/null +++ b/gas/testsuite/gas/score/logical_32.d @@ -0,0 +1,38 @@ +#as: -march=score3 -I${srcdir}/${subdir} +#objdump: -d +#source: logical_32.s + +.*: file format .* + +Disassembly of section .text: + +00000000 <.text>: + 0: 4b0f and! r0, r15 + 2: 4b0f and! r0, r15 + 4: 4b0f and! r0, r15 + 6: 4b0f and! r0, r15 + 8: 4b0f and! r0, r15 + a: 4b0f and! r0, r15 + c: 4b0f and! r0, r15 + e: 4b0f and! r0, r15 + 10: 4b0f and! r0, r15 + 12: 8000 3c21 and.c r0, r0, r15 + 16: 8000 4020 and r0, r0, r16 + 1a: 8210 0020 and r16, r16, r0 + 1e: 8210 4420 and r16, r16, r17 + 22: 8001 0820 and r0, r1, r2 + 26: 4a0f or! r0, r15 + 28: 4a0f or! r0, r15 + 2a: 4a0f or! r0, r15 + 2c: 4a0f or! r0, r15 + 2e: 4a0f or! r0, r15 + 30: 4a0f or! r0, r15 + 32: 4a0f or! r0, r15 + 34: 4a0f or! r0, r15 + 36: 4a0f or! r0, r15 + 38: 8000 3c23 or.c r0, r0, r15 + 3c: 8000 4022 or r0, r0, r16 + 40: 8210 0022 or r16, r16, r0 + 44: 8210 4422 or r16, r16, r17 + 48: 8001 0822 or r0, r1, r2 +#pass diff --git a/gas/testsuite/gas/score/logical_32.s b/gas/testsuite/gas/score/logical_32.s new file mode 100644 index 0000000..af71c55 --- /dev/null +++ b/gas/testsuite/gas/score/logical_32.s @@ -0,0 +1,26 @@ +/* + * tests for logical instruction relaxation + * + * Author: libin + */ + +.include "relaxation_macro.h" + +.macro _logical_op_pattern insn insn1 + insn_32 "\insn r0, r0, r15" + + tran_16_32 "\insn! r0, r15", "\insn r0, r0, r15" + + /* shouldn't alter */ + .set r1 + insn_32 "\insn1 r0, r0, r15" + insn_32 "\insn r0, r0, r16" + insn_32 "\insn r16, r16, r0" + insn_32 "\insn r16, r16, r17" + insn_32 "\insn r0, r1, r2" +.endm + +.text +/* and/or rD,rA,rB -> and!/or! rD,rA */ +_logical_op_pattern "and", "and.c" +_logical_op_pattern "or", "or.c" diff --git a/gas/testsuite/gas/score/mv_32-lt.d b/gas/testsuite/gas/score/mv_32-lt.d new file mode 100644 index 0000000..67e8f96 --- /dev/null +++ b/gas/testsuite/gas/score/mv_32-lt.d @@ -0,0 +1,10 @@ +#as: -march=score3 -I${srcdir}/${subdir} -EL +#objdump: -s +#source: mv_32.s + +.*: file format elf32-littlescore + +Contents of section .text: + 0000 0f400f40 0f400f40 0f400f40 0f400f40 .* + 0010 0f400f42 10401042 .* +#pass diff --git a/gas/testsuite/gas/score/mv_32.d b/gas/testsuite/gas/score/mv_32.d new file mode 100644 index 0000000..57fbe3c --- /dev/null +++ b/gas/testsuite/gas/score/mv_32.d @@ -0,0 +1,22 @@ +#as: -march=score3 -I${srcdir}/${subdir} +#objdump: -d +#source: mv_32.s + +.*: file format .* + +Disassembly of section .text: + +00000000 <.text>: + 0: 400f mv! r0, r15 + 2: 400f mv! r0, r15 + 4: 400f mv! r0, r15 + 6: 400f mv! r0, r15 + 8: 400f mv! r0, r15 + a: 400f mv! r0, r15 + c: 400f mv! r0, r15 + e: 400f mv! r0, r15 + 10: 400f mv! r0, r15 + 12: 420f mv! r16, r15 + 14: 4010 mv! r0, r16 + 16: 4210 mv! r16, r16 +#pass diff --git a/gas/testsuite/gas/score/mv_32.s b/gas/testsuite/gas/score/mv_32.s new file mode 100644 index 0000000..885f80a --- /dev/null +++ b/gas/testsuite/gas/score/mv_32.s @@ -0,0 +1,18 @@ +/* + * tests for mv instruction relaxation + * + * Author: libin + */ + +.include "relaxation_macro.h" + +.text +/* mv rD,rA -> mv! rD,rA */ +insn_32 "mv r0, r15" + +tran_16_32 "mv! r0, r15", "mv r0, r15" + +/* shouldn't alter */ +insn_32 "mv r16, r15" +insn_32 "mv r0, r16" +insn_32 "mv r16, r16" diff --git a/gas/testsuite/gas/score/relax_32.exp b/gas/testsuite/gas/score/relax_32.exp new file mode 100644 index 0000000..9e26054 --- /dev/null +++ b/gas/testsuite/gas/score/relax_32.exp @@ -0,0 +1,24 @@ +# tests for instruction relaxation + +if [istarget score-*-*] then { + run_dump_test "arith_32" + run_dump_test "bit_32" + run_dump_test "branch_32" + run_dump_test "cmp_32" + run_dump_test "load_store_32" + run_dump_test "logical_32" + run_dump_test "mv_32" + run_dump_test "shift_32" + run_dump_test "syscontrol_32" + + # tests for little endian + run_dump_test "arith_32-lt" + run_dump_test "bit_32-lt" + run_dump_test "branch_32-lt" + run_dump_test "cmp_32-lt" + run_dump_test "load_store_32-lt" + run_dump_test "logical_32-lt" + run_dump_test "mv_32-lt" + run_dump_test "shift_32-lt" + run_dump_test "syscontrol_32-lt" +} diff --git a/gas/testsuite/gas/score/relaxation_macro.h b/gas/testsuite/gas/score/relaxation_macro.h new file mode 100644 index 0000000..88c666c --- /dev/null +++ b/gas/testsuite/gas/score/relaxation_macro.h @@ -0,0 +1,32 @@ +/* + * macros for S+core 3 instruction relaxation + * + * partial copyed from testpatterns for S+core 7 + * + * Author: libin + */ + +.macro _tran insn1 insn2 +.balign 2 + .irp i1,"\insn1", "\insn2" + .irp i2,"\insn1", "\insn2" + \i1 + \i2 + .endr + .endr +.endm + +/* insn32/insn16 may include special characters, for example, blank character */ +.macro tran_16_32 insn16 insn32 + _tran "\insn16", "\insn32" +.endm + +.macro insn_16 insn16 +.balign 2 + \insn16 +.endm + +.macro insn_32 insn32 +.balign 2 + \insn32 +.endm diff --git a/gas/testsuite/gas/score/shift_32-lt.d b/gas/testsuite/gas/score/shift_32-lt.d new file mode 100644 index 0000000..a6f034b --- /dev/null +++ b/gas/testsuite/gas/score/shift_32-lt.d @@ -0,0 +1,13 @@ +#as: -march=score3 -I${srcdir}/${subdir} -EL +#objdump: -s +#source: shift_32.s + +.*: file format elf32-littlescore + +Contents of section .text: + 0000 00581f58 e059ff59 00580058 00580058 .* + 0010 00580058 00580058 00807100 02807000 .* + 0020 10827000 005a1f5a e05bff5b 005a005a .* + 0030 005a005a 005a005a 005a005a 00807500 .* + 0040 02807400 10827400 .* +#pass diff --git a/gas/testsuite/gas/score/shift_32.d b/gas/testsuite/gas/score/shift_32.d new file mode 100644 index 0000000..464970c --- /dev/null +++ b/gas/testsuite/gas/score/shift_32.d @@ -0,0 +1,40 @@ +#as: -march=score3 -I${srcdir}/${subdir} +#objdump: -d +#source: shift_32.s + +.*: file format .* + +Disassembly of section .text: + +00000000 <.text>: + 0: 5800 slli! r0, 0 + 2: 581f slli! r0, 31 + 4: 59e0 slli! r15, 0 + 6: 59ff slli! r15, 31 + 8: 5800 slli! r0, 0 + a: 5800 slli! r0, 0 + c: 5800 slli! r0, 0 + e: 5800 slli! r0, 0 + 10: 5800 slli! r0, 0 + 12: 5800 slli! r0, 0 + 14: 5800 slli! r0, 0 + 16: 5800 slli! r0, 0 + 18: 8000 0071 slli.c r0, r0, 0 + 1c: 8002 0070 slli r0, r2, 0 + 20: 8210 0070 slli r16, r16, 0 + 24: 5a00 srli! r0, 0 + 26: 5a1f srli! r0, 31 + 28: 5be0 srli! r15, 0 + 2a: 5bff srli! r15, 31 + 2c: 5a00 srli! r0, 0 + 2e: 5a00 srli! r0, 0 + 30: 5a00 srli! r0, 0 + 32: 5a00 srli! r0, 0 + 34: 5a00 srli! r0, 0 + 36: 5a00 srli! r0, 0 + 38: 5a00 srli! r0, 0 + 3a: 5a00 srli! r0, 0 + 3c: 8000 0075 srli.c r0, r0, 0 + 40: 8002 0074 srli r0, r2, 0 + 44: 8210 0074 srli r16, r16, 0 +#pass diff --git a/gas/testsuite/gas/score/shift_32.s b/gas/testsuite/gas/score/shift_32.s new file mode 100644 index 0000000..6345028 --- /dev/null +++ b/gas/testsuite/gas/score/shift_32.s @@ -0,0 +1,26 @@ +/* + * tests for shift instruction relaxation + * + * Author: libin + */ + +.include "relaxation_macro.h" + +.macro _shift_op_pattern insn insn1 + insn_32 "\insn r0, r0, 0" + insn_32 "\insn r0, r0, 31" + insn_32 "\insn r15, r15, 0" + insn_32 "\insn r15, r15, 31" + + tran_16_32 "\insn! r0, 0", "\insn r0, r0, 0" + + /* shouldn't alter */ + insn_32 "\insn1 r0, r0, 0" + insn_32 "\insn r0, r2, 0" + insn_32 "\insn r16, r16, 0" +.endm + +.text +/* slli/srli rD,rA,Imm5 -> slli!/srli! rD,Imm5 */ +_shift_op_pattern "slli", "slli.c" +_shift_op_pattern "srli", "srli.c" diff --git a/gas/testsuite/gas/score/syscontrol_32-lt.d b/gas/testsuite/gas/score/syscontrol_32-lt.d new file mode 100644 index 0000000..a7b9eca --- /dev/null +++ b/gas/testsuite/gas/score/syscontrol_32-lt.d @@ -0,0 +1,11 @@ +#as: -march=score3 -I${srcdir}/${subdir} -EL +#objdump: -s +#source: syscontrol_32.s + +.*: file format elf32-littlescore + +Contents of section .text: + 0000 20003f00 20002000 20002000 20002000 .* + 0010 20002000 00000000 00000000 00000000 .* + 0020 00000000 00000000 .* +#pass diff --git a/gas/testsuite/gas/score/syscontrol_32.d b/gas/testsuite/gas/score/syscontrol_32.d new file mode 100644 index 0000000..0b4ad31 --- /dev/null +++ b/gas/testsuite/gas/score/syscontrol_32.d @@ -0,0 +1,21 @@ +#as: -march=score3 -I${srcdir}/${subdir} +#objdump: -d +#source: syscontrol_32.s + +.*: file format .* + +Disassembly of section .text: + +00000000 <.text>: + 0: 0020 sdbbp! 0 + 2: 003f sdbbp! 31 + 4: 0020 sdbbp! 0 + 6: 0020 sdbbp! 0 + 8: 0020 sdbbp! 0 + a: 0020 sdbbp! 0 + c: 0020 sdbbp! 0 + e: 0020 sdbbp! 0 + 10: 0020 sdbbp! 0 + 12: 0020 sdbbp! 0 + ... +#pass diff --git a/gas/testsuite/gas/score/syscontrol_32.s b/gas/testsuite/gas/score/syscontrol_32.s new file mode 100644 index 0000000..7997cb1 --- /dev/null +++ b/gas/testsuite/gas/score/syscontrol_32.s @@ -0,0 +1,19 @@ +/* + * tests for system control instruction relaxation + * + * Author: libin + */ + +.include "relaxation_macro.h" + +.text +/* sdbbp Imm5 -> sdbbp! Imm5 */ +insn_32 "sdbbp 0" +insn_32 "sdbbp 31" + +tran_16_32 "sdbbp! 0", "sdbbp 0" + +/* nop -> nop! */ +insn_32 "nop" + +tran_16_32 "nop!", "nop" |