Support Intel FRED LKGS

gas/ChangeLog:

	* NEWS: Support Intel FRED LKGS.
	* config/tc-i386.c: Add fred lkgs
	* doc/c-i386.texi: Document .fred, .lkgs.
	* testsuite/gas/i386/i386.exp: Add FRED LKGS tests
	* testsuite/gas/i386/x86-64-fred-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-fred.d: Ditto.
	* testsuite/gas/i386/x86-64-fred.s: Ditto.
	* testsuite/gas/i386/x86-64-lkgs-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-lkgs-inval.l: Ditto.
	* testsuite/gas/i386/x86-64-lkgs-inval.s: Ditto.
	* testsuite/gas/i386/x86-64-lkgs.d: Ditto.
	* testsuite/gas/i386/x86-64-lkgs.s: Ditto.

opcodes/ChangeLog:

	* i386-dis.c: New entry for fred, lkgs.
	* i386-gen.c: Add CPU_FRED CPU_LKGS.
	* i386-init.h : Regenerated.
	* i386-mnem.h : Regenerated.
	* i386-opc.h: Add fred, lkgs.
	* i386-opc.tbl: Add FRED, LKGS instructions.
	* i386-tbl.h: Regenerated.

12 files changed, 147 insertions, 0 deletions

diff --git a/gas/NEWS b/gas/NEWS
index 42a2005..ea172fe 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,9 @@
 -*- text -*-
 
+* Add support for Intel FRED instructions.
+
+* Add support for Intel LKGS instructions.
+
 * Add support for Intel AMX-COMPLEX instructions.
 
 * Add SME2 support to the AArch64 port.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index ca3626e..1002c5f 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1149,6 +1149,8 @@ static const arch_entry cpu_arch[] =
   SUBARCH (avx_ne_convert, AVX_NE_CONVERT, ANY_AVX_NE_CONVERT, false),
   SUBARCH (rao_int, RAO_INT, RAO_INT, false),
   SUBARCH (rmpquery, RMPQUERY, ANY_RMPQUERY, false),
+  SUBARCH (fred, FRED, ANY_FRED, false),
+  SUBARCH (lkgs, LKGS, ANY_LKGS, false),
 };
 
 #undef SUBARCH
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 15d060b..49b6e3b 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -205,6 +205,8 @@ accept various extension mnemonics.  For example,
 @code{msrlist},
 @code{avx_ne_convert},
 @code{rao_int},
+@code{fred},
+@code{lkgs},
 @code{amx_int8},
 @code{amx_bf16},
 @code{amx_fp16},
@@ -1634,6 +1636,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.prefetchi} @tab @samp{.avx_ifma} @tab @samp{.avx_vnni_int8}
 @item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist}
 @item @samp{.avx_ne_convert} @tab @samp{.rao_int}
+@item @samp{.fred} @tab @samp{.lkgs}
 @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
 @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
 @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index dc29b51..c098f2d 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -1191,6 +1191,9 @@ if [gas_64_check] then {
     run_dump_test "x86-64-amx-complex-intel"
     run_dump_test "x86-64-amx-complex-bad"
     run_list_test "x86-64-amx-complex-inval"
+    run_dump_test "x86-64-fred"
+    run_dump_test "x86-64-lkgs"
+    run_list_test "x86-64-lkgs-inval"
     run_dump_test "x86-64-clzero"
     run_dump_test "x86-64-mwaitx-bdver4"
     run_list_test "x86-64-mwaitx-reg"
diff --git a/gas/testsuite/gas/i386/x86-64-fred-intel.d b/gas/testsuite/gas/i386/x86-64-fred-intel.d
new file mode 100644
index 0000000..aef98af
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-fred-intel.d
@@ -0,0 +1,15 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 FRED insns (Intel disassembly)
+#source: x86-64-fred.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*f2 0f 01 ca\s+erets
+\s*[a-f0-9]+:\s*f3 0f 01 ca\s+eretu
+\s*[a-f0-9]+:\s*f2 0f 01 ca\s+erets
+\s*[a-f0-9]+:\s*f3 0f 01 ca\s+eretu
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-fred.d b/gas/testsuite/gas/i386/x86-64-fred.d
new file mode 100644
index 0000000..01990f1
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-fred.d
@@ -0,0 +1,15 @@
+#as:
+#objdump: -dw
+#name: x86_64 FRED insns
+#source: x86-64-fred.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*f2 0f 01 ca\s+erets
+\s*[a-f0-9]+:\s*f3 0f 01 ca\s+eretu
+\s*[a-f0-9]+:\s*f2 0f 01 ca\s+erets
+\s*[a-f0-9]+:\s*f3 0f 01 ca\s+eretu
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-fred.s b/gas/testsuite/gas/i386/x86-64-fred.s
new file mode 100644
index 0000000..0e5d3d3
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-fred.s
@@ -0,0 +1,11 @@
+# Check 64bit FRED instructions
+
+	.allow_index_reg
+	.text
+_start:
+	erets		 #FRED
+	eretu		 #FRED
+
+.intel_syntax noprefix
+	erets		 #FRED
+	eretu		 #FRED
diff --git a/gas/testsuite/gas/i386/x86-64-lkgs-intel.d b/gas/testsuite/gas/i386/x86-64-lkgs-intel.d
new file mode 100644
index 0000000..0f4a6fb
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-lkgs-intel.d
@@ -0,0 +1,25 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 LKGS insns (Intel disassembly)
+#source: x86-64-lkgs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*f2 41 0f 00 f4\s+lkgs   r12w
+\s*[a-f0-9]+:\s*f2 41 0f 00 f4\s+lkgs   r12w
+\s*[a-f0-9]+:\s*f2 41 0f 00 f4\s+lkgs   r12w
+\s*[a-f0-9]+:\s*f2 42 0f 00 b4 f5 00 00 00 10\s+lkgs   WORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*f2 41 0f 00 31\s+lkgs   WORD PTR \[r9\]
+\s*[a-f0-9]+:\s*f2 0f 00 b1 fe 00 00 00\s+lkgs   WORD PTR \[rcx\+0xfe\]
+\s*[a-f0-9]+:\s*f2 0f 00 b2 00 ff ff ff\s+lkgs   WORD PTR \[rdx-0x100\]
+\s*[a-f0-9]+:\s*f2 41 0f 00 f4\s+lkgs   r12w
+\s*[a-f0-9]+:\s*f2 41 0f 00 f4\s+lkgs   r12w
+\s*[a-f0-9]+:\s*f2 41 0f 00 f4\s+lkgs   r12w
+\s*[a-f0-9]+:\s*f2 42 0f 00 b4 f5 00 00 00 10\s+lkgs   WORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*f2 41 0f 00 31\s+lkgs   WORD PTR \[r9\]
+\s*[a-f0-9]+:\s*f2 0f 00 b1 fe 00 00 00\s+lkgs   WORD PTR \[rcx\+0xfe\]
+\s*[a-f0-9]+:\s*f2 0f 00 b2 00 ff ff ff\s+lkgs   WORD PTR \[rdx-0x100\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-lkgs-inval.l b/gas/testsuite/gas/i386/x86-64-lkgs-inval.l
new file mode 100644
index 0000000..77ee7d7
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-lkgs-inval.l
@@ -0,0 +1,9 @@
+.* Assembler messages:
+.*:5: Error: invalid instruction suffix for `lkgs'
+.*:6: Error: invalid instruction suffix for `lkgs'
+.*:7: Error: invalid instruction suffix for `lkgs'
+.*:8: Error: invalid instruction suffix for `lkgs'
+.*:11: Error: invalid instruction suffix for `lkgs'
+.*:12: Error: invalid instruction suffix for `lkgs'
+.*:13: Error: invalid instruction suffix for `lkgs'
+.*:14: Error: invalid instruction suffix for `lkgs'
diff --git a/gas/testsuite/gas/i386/x86-64-lkgs-inval.s b/gas/testsuite/gas/i386/x86-64-lkgs-inval.s
new file mode 100644
index 0000000..1dbce14
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-lkgs-inval.s
@@ -0,0 +1,14 @@
+# Check illegal 64bit suffer usage in LKGS instructions
+
+    .text
+_start:
+    lkgsb    %r12     #LKGS
+    lkgss    %r12     #LKGS
+    lkgsb    (%r9)    #LKGS
+    lkgss    (%r9)    #LKGS
+
+    .intel_syntax noprefix
+    lkgsb    %r12     #LKGS
+    lkgsb    BYTE PTR [r9]    #LKGS
+    lkgsd    DWORD PTR [r9]    #LKGS
+    lkgsq    QWORD PTR [r9]    #LKGS
diff --git a/gas/testsuite/gas/i386/x86-64-lkgs.d b/gas/testsuite/gas/i386/x86-64-lkgs.d
new file mode 100644
index 0000000..207143d
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-lkgs.d
@@ -0,0 +1,25 @@
+#as:
+#objdump: -dw
+#name: x86_64 LKGS insns
+#source: x86-64-lkgs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*f2 41 0f 00 f4\s+lkgs   %r12w
+\s*[a-f0-9]+:\s*f2 41 0f 00 f4\s+lkgs   %r12w
+\s*[a-f0-9]+:\s*f2 41 0f 00 f4\s+lkgs   %r12w
+\s*[a-f0-9]+:\s*f2 42 0f 00 b4 f5 00 00 00 10\s+lkgs   0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*f2 41 0f 00 31\s+lkgs   \(%r9\)
+\s*[a-f0-9]+:\s*f2 0f 00 b1 fe 00 00 00\s+lkgs   0xfe\(%rcx\)
+\s*[a-f0-9]+:\s*f2 0f 00 b2 00 ff ff ff\s+lkgs   -0x100\(%rdx\)
+\s*[a-f0-9]+:\s*f2 41 0f 00 f4\s+lkgs   %r12w
+\s*[a-f0-9]+:\s*f2 41 0f 00 f4\s+lkgs   %r12w
+\s*[a-f0-9]+:\s*f2 41 0f 00 f4\s+lkgs   %r12w
+\s*[a-f0-9]+:\s*f2 42 0f 00 b4 f5 00 00 00 10\s+lkgs   0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*f2 41 0f 00 31\s+lkgs   \(%r9\)
+\s*[a-f0-9]+:\s*f2 0f 00 b1 fe 00 00 00\s+lkgs   0xfe\(%rcx\)
+\s*[a-f0-9]+:\s*f2 0f 00 b2 00 ff ff ff\s+lkgs   -0x100\(%rdx\)
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-lkgs.s b/gas/testsuite/gas/i386/x86-64-lkgs.s
new file mode 100644
index 0000000..546bbcc
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-lkgs.s
@@ -0,0 +1,21 @@
+# Check 64bit LKGS instructions
+
+	.allow_index_reg
+	.text
+_start:
+	lkgs	%r12	 #LKGS
+	lkgs    %r12w    #LKGS
+	lkgsw   %r12w    #LKGS
+	lkgs	0x10000000(%rbp, %r14, 8)	 #LKGS
+	lkgs	(%r9)	 #LKGS
+	lkgs	254(%rcx)	 #LKGS Disp32(fe000000)
+	lkgs	-256(%rdx)	 #LKGS Disp32(00ffffff)
+
+.intel_syntax noprefix
+	lkgs	r12	 #LKGS
+	lkgs	r12w	 #LKGS
+	lkgsw	r12w	 #LKGS
+	lkgs	WORD PTR [rbp+r14*8+0x10000000]	 #LKGS
+	lkgs	WORD PTR [r9]	 #LKGS
+	lkgs	WORD PTR [rcx+254]	 #LKGS Disp32(fe000000)
+	lkgs	WORD PTR [rdx-256]	 #LKGS Disp32(00ffffff)