LoongArch: Add relaxation for R_LARCH_CALL36

This relaxation is effective for both macro instructions (call36, tail36)
and explicit relocation instructions (pcaddu18i + jirl).

call36 f	  ->	bl f
  R_LARCH_CALL36  ->	  R_LARCH_B26

tail36 $t0, f	  ->	b f
  R_LARCH_CALL36  ->	  R_LARCH_B26

5 files changed, 175 insertions, 147 deletions

diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c
index 68afa79..30aefce 100644
--- a/gas/config/tc-loongarch.c
+++ b/gas/config/tc-loongarch.c
@@ -116,6 +116,8 @@ const char *md_shortopts = "O::g::G:";
 
 static const char default_arch[] = DEFAULT_ARCH;
 
+static bool call36 = 0;
+
 /* The lowest 4-bit is the bytes of instructions.  */
 #define RELAX_BRANCH_16 0xc0000014
 #define RELAX_BRANCH_21 0xc0000024
@@ -720,7 +722,8 @@ loongarch_args_parser_can_match_arg_helper (char esc_ch1, char esc_ch2,
 			|| BFD_RELOC_LARCH_TLS_LE_HI20 == reloc_type
 			|| BFD_RELOC_LARCH_TLS_LE_LO12 == reloc_type
 			|| BFD_RELOC_LARCH_TLS_LE64_LO20 == reloc_type
-			|| BFD_RELOC_LARCH_TLS_LE64_HI12 == reloc_type))
+			|| BFD_RELOC_LARCH_TLS_LE64_HI12 == reloc_type
+			|| BFD_RELOC_LARCH_CALL36 == reloc_type))
 		{
 		  ip->reloc_info[ip->reloc_num].type = BFD_RELOC_LARCH_RELAX;
 		  ip->reloc_info[ip->reloc_num].value = const_0;
@@ -1016,6 +1019,20 @@ append_fixed_insn (struct loongarch_cl_insn *insn)
 
   char *f = frag_more (insn->insn_length);
   move_insn (insn, frag_now, f - frag_now->fr_literal);
+
+  if (call36)
+    {
+      if (strcmp (insn->name, "jirl") == 0)
+	{
+	  /* See comment at end of append_fixp_and_insn.  */
+	  frag_wane (frag_now);
+	  frag_new (0);
+	}
+      call36 = 0;
+    }
+
+  if (BFD_RELOC_LARCH_CALL36 == insn->reloc_info[0].type)
+    call36 = 1;
 }
 
 /* Add instructions based on the worst-case scenario firstly.  */
diff --git a/gas/testsuite/gas/loongarch/medium-call.d b/gas/testsuite/gas/loongarch/medium-call.d
index 3491760..79d74ba 100644
--- a/gas/testsuite/gas/loongarch/medium-call.d
+++ b/gas/testsuite/gas/loongarch/medium-call.d
@@ -1,21 +1,26 @@
 #as:
 #objdump: -dr
+#skip: loongarch32-*-*
 
 .*:[    ]+file format .*
 
 
 Disassembly of section .text:
 
-.* <.text>:
+[ 	]*0000000000000000 <.text>:
 [ 	]+0:[ 	]+1e000001[ 	]+pcaddu18i[ 	]+\$ra, 0
 [ 	]+0: R_LARCH_CALL36[ 	]+a
+[ 	]+0: R_LARCH_RELAX[ 	]+\*ABS\*
 [ 	]+4:[ 	]+4c000021[ 	]+jirl[ 	]+\$ra, \$ra, 0
 [ 	]+8:[ 	]+1e000001[ 	]+pcaddu18i[ 	]+\$ra, 0
 [ 	]+8: R_LARCH_CALL36[ 	]+a
+[ 	]+8: R_LARCH_RELAX[ 	]+\*ABS\*
 [ 	]+c:[ 	]+4c000021[ 	]+jirl[ 	]+\$ra, \$ra, 0
 [ 	]+10:[ 	]+1e00000c[ 	]+pcaddu18i[ 	]+\$t0, 0
 [ 	]+10: R_LARCH_CALL36[ 	]+a
+[ 	]+10: R_LARCH_RELAX[ 	]+\*ABS\*
 [ 	]+14:[ 	]+4c000180[ 	]+jr[ 	]+\$t0
 [ 	]+18:[ 	]+1e00000c[ 	]+pcaddu18i[ 	]+\$t0, 0
 [ 	]+18: R_LARCH_CALL36[ 	]+a
+[ 	]+18: R_LARCH_RELAX[ 	]+\*ABS\*
 [ 	]+1c:[ 	]+4c000180[ 	]+jr[ 	]+\$t0
diff --git a/gas/testsuite/gas/loongarch/relax-cfi-fde-DW_CFA_advance_loc.d b/gas/testsuite/gas/loongarch/relax-cfi-fde-DW_CFA_advance_loc.d
index 6b164cf..d685bd8 100644
--- a/gas/testsuite/gas/loongarch/relax-cfi-fde-DW_CFA_advance_loc.d
+++ b/gas/testsuite/gas/loongarch/relax-cfi-fde-DW_CFA_advance_loc.d
@@ -26,7 +26,7 @@ Disassembly of section .eh_frame:
 [ 	]+2c:[ 	]+d6400016[ 	]+.word[ 	]+[ 	]+0xd6400016
 [ 	]+2e: R_LARCH_ADD6[ 	]+L0\^A
 [ 	]+2e: R_LARCH_SUB6[ 	]+L0\^A
-[ 	]+30:[ 	]+4000160c[ 	]+beqz[ 	]+\$t4, 3145748[ 	]+# 300044 <L0\^A\+0x2ffffc>
+[ 	]+30:[ 	]+4000160c[ 	]+beqz[ 	]+\$t4, 3145748[ 	]+# 300044 <L0\^A\+0x2ffff4>
 [ 	]+33: R_LARCH_ADD6[ 	]+L0\^A
 [ 	]+33: R_LARCH_SUB6[ 	]+L0\^A
 [ 	]+34:[ 	]+00160cd6[ 	]+orn[ 	]+\$fp, \$a2, \$sp
@@ -39,14 +39,16 @@ Disassembly of section .eh_frame:
 [ 	]+40:[ 	]+d6400016[ 	]+.word[ 	]+[ 	]+0xd6400016
 [ 	]+42: R_LARCH_ADD6[ 	]+L0\^A
 [ 	]+42: R_LARCH_SUB6[ 	]+L0\^A
-[ 	]+44:[ 	]+4000160c[ 	]+beqz[ 	]+\$t4, 3145748[ 	]+# 300058 <L0\^A\+0x300010>
+[ 	]+44:[ 	]+4000160c[ 	]+beqz[ 	]+\$t4, 3145748[ 	]+# 300058 <L0\^A\+0x300008>
 [ 	]+47: R_LARCH_ADD6[ 	]+L0\^A
 [ 	]+47: R_LARCH_SUB6[ 	]+L0\^A
 [ 	]+48:[ 	]+00160cd6[ 	]+orn[ 	]+\$fp, \$a2, \$sp
 [ 	]+4c:[ 	]+160cd640[ 	]+lu32i.d[ 	]+\$zero, 26290
 [ 	]+4c: R_LARCH_ADD6[ 	]+L0\^A
 [ 	]+4c: R_LARCH_SUB6[ 	]+L0\^A
-[ 	]+50:[ 	]+00d64000[ 	]+bstrpick.d[ 	]+\$zero, \$zero, 0x16, 0x10
+[ 	]+50:[ 	]+0cd64000[ 	]+.word[ 	]+[ 	]+0x0cd64000
 [ 	]+51: R_LARCH_ADD6[ 	]+L0\^A
 [ 	]+51: R_LARCH_SUB6[ 	]+L0\^A
-[ 	]+54:[ 	]+00000000[ 	]+.word[ 	]+[ 	]+0x00000000
+[ 	]+54:[ 	]+d6400016[ 	]+.word[ 	]+[ 	]+0xd6400016
+[ 	]+56: R_LARCH_ADD6[ 	]+L0\^A
+[ 	]+56: R_LARCH_SUB6[ 	]+L0\^A
diff --git a/gas/testsuite/gas/loongarch/relax-cfi-fde-DW_CFA_advance_loc.s b/gas/testsuite/gas/loongarch/relax-cfi-fde-DW_CFA_advance_loc.s
index 2c67587..021d296 100644
--- a/gas/testsuite/gas/loongarch/relax-cfi-fde-DW_CFA_advance_loc.s
+++ b/gas/testsuite/gas/loongarch/relax-cfi-fde-DW_CFA_advance_loc.s
@@ -38,4 +38,8 @@ la.tls.ie $t0, a
 la.tls.le $t0, a
 .cfi_restore 22
 
+.cfi_def_cfa 22, 0
+call36 f
+.cfi_restore 22
+
 .cfi_endproc
diff --git a/gas/testsuite/gas/loongarch/relocs_64.d b/gas/testsuite/gas/loongarch/relocs_64.d
index 35dde02..ce5216a 100644
--- a/gas/testsuite/gas/loongarch/relocs_64.d
+++ b/gas/testsuite/gas/loongarch/relocs_64.d
@@ -1,148 +1,148 @@
-#as: -mthin-add-sub
+#as:
 #objdump: -dr
 #skip: loongarch32-*-*
 
-.*:     file format .*
+.*:[    ]+file format .*
 
 
 Disassembly of section .text:
 
-0+ <.*>:
-   0:	4c008ca4 	jirl        	\$a0, \$a1, 140
-			0: R_LARCH_B16	.L1
-   4:	40008880 	beqz        	\$a0, 136	# 8c <.L1>
-			4: R_LARCH_B21	.L1
-   8:	50008400 	b           	132	# 8c <.L1>
-			8: R_LARCH_B26	.L1
-   c:	14000004 	lu12i.w     	\$a0, 0
-			c: R_LARCH_ABS_HI20	.L1
-  10:	038000a4 	ori         	\$a0, \$a1, 0x0
-			10: R_LARCH_ABS_LO12	.L1
-  14:	16000004 	lu32i.d     	\$a0, 0
-			14: R_LARCH_ABS64_LO20	.L1
-  18:	03000085 	lu52i.d     	\$a1, \$a0, 0
-			18: R_LARCH_ABS64_HI12	.L1
-  1c:	1a000004 	pcalau12i   	\$a0, 0
-			1c: R_LARCH_PCALA_HI20	.L1
-  20:	02c00085 	addi.d      	\$a1, \$a0, 0
-			20: R_LARCH_PCALA_LO12	.L1
-  24:	16000004 	lu32i.d     	\$a0, 0
-			24: R_LARCH_PCALA64_LO20	.L1
-  28:	03000085 	lu52i.d     	\$a1, \$a0, 0
-			28: R_LARCH_PCALA64_HI12	.L1
-  2c:	1a000004 	pcalau12i   	\$a0, 0
-			2c: R_LARCH_GOT_PC_HI20	.L1
-  30:	28c00085 	ld.d        	\$a1, \$a0, 0
-			30: R_LARCH_GOT_PC_LO12	.L1
-  34:	16000004 	lu32i.d     	\$a0, 0
-			34: R_LARCH_GOT64_PC_LO20	.L1
-  38:	03000085 	lu52i.d     	\$a1, \$a0, 0
-			38: R_LARCH_GOT64_PC_HI12	.L1
-  3c:	14000004 	lu12i.w     	\$a0, 0
-			3c: R_LARCH_GOT_HI20	.L1
-  40:	03800084 	ori         	\$a0, \$a0, 0x0
-			40: R_LARCH_GOT_LO12	.L1
-  44:	16000004 	lu32i.d     	\$a0, 0
-			44: R_LARCH_GOT64_LO20	.L1
-  48:	03000085 	lu52i.d     	\$a1, \$a0, 0
-			48: R_LARCH_GOT64_HI12	.L1
-  4c:	14000004 	lu12i.w     	\$a0, 0
-			4c: R_LARCH_TLS_LE_HI20	TLSL1
-			4c: R_LARCH_RELAX	\*ABS\*
-  50:	03800085 	ori         	\$a1, \$a0, 0x0
-			50: R_LARCH_TLS_LE_LO12	TLSL1
-			50: R_LARCH_RELAX	\*ABS\*
-  54:	16000004 	lu32i.d     	\$a0, 0
-			54: R_LARCH_TLS_LE64_LO20	TLSL1
-			54: R_LARCH_RELAX	\*ABS\*
-  58:	03000085 	lu52i.d     	\$a1, \$a0, 0
-			58: R_LARCH_TLS_LE64_HI12	TLSL1
-			58: R_LARCH_RELAX	\*ABS\*
-  5c:	1a000004 	pcalau12i   	\$a0, 0
-			5c: R_LARCH_TLS_IE_PC_HI20	TLSL1
-  60:	02c00005 	li.d        	\$a1, 0
-			60: R_LARCH_TLS_IE_PC_LO12	TLSL1
-  64:	16000005 	lu32i.d     	\$a1, 0
-			64: R_LARCH_TLS_IE64_PC_LO20	TLSL1
-  68:	030000a5 	lu52i.d     	\$a1, \$a1, 0
-			68: R_LARCH_TLS_IE64_PC_HI12	TLSL1
-  6c:	14000004 	lu12i.w     	\$a0, 0
-			6c: R_LARCH_TLS_IE_HI20	TLSL1
-  70:	03800084 	ori         	\$a0, \$a0, 0x0
-			70: R_LARCH_TLS_IE_LO12	TLSL1
-  74:	16000004 	lu32i.d     	\$a0, 0
-			74: R_LARCH_TLS_IE64_LO20	TLSL1
-  78:	03000084 	lu52i.d     	\$a0, \$a0, 0
-			78: R_LARCH_TLS_IE64_HI12	TLSL1
-  7c:	1a000004 	pcalau12i   	\$a0, 0
-			7c: R_LARCH_TLS_LD_PC_HI20	TLSL1
-  80:	14000004 	lu12i.w     	\$a0, 0
-			80: R_LARCH_TLS_LD_HI20	TLSL1
-  84:	1a000004 	pcalau12i   	\$a0, 0
-			84: R_LARCH_TLS_GD_PC_HI20	TLSL1
-  88:	14000004 	lu12i.w     	\$a0, 0
-			88: R_LARCH_TLS_GD_HI20	TLSL1
-
-0+8c <.L1>:
-  8c:	00000000 	.word		0x00000000
-			8c: R_LARCH_32_PCREL	.L2
-
-0+90 <.L2>:
-	...
-			90: R_LARCH_64_PCREL	.L3
-
-0+98 <.L3>:
-  98:	03400000 	nop
-  9c:	03400000 	nop
-			9c: R_LARCH_ALIGN	.*
-  a0:	03400000 	nop
-  a4:	03400000 	nop
-  a8:	1800000c 	pcaddi      	\$t0, 0
-			a8: R_LARCH_PCREL20_S2	.L1
-  ac:	1e000001 	pcaddu18i   	\$ra, 0
-			ac: R_LARCH_CALL36	a
-  b0:	4c000021 	jirl        	\$ra, \$ra, 0
-  b4:	1a000004 	pcalau12i   	\$a0, 0
-			b4: R_LARCH_TLS_DESC_PC_HI20	TLSL1
-  b8:	02c000a5 	addi.d      	\$a1, \$a1, 0
-			b8: R_LARCH_TLS_DESC_PC_LO12	TLSL1
-  bc:	16000005 	lu32i.d     	\$a1, 0
-			bc: R_LARCH_TLS_DESC64_PC_LO20	TLSL1
-  c0:	030000a5 	lu52i.d     	\$a1, \$a1, 0
-			c0: R_LARCH_TLS_DESC64_PC_HI12	TLSL1
-  c4:	14000004 	lu12i.w     	\$a0, 0
-			c4: R_LARCH_TLS_DESC_HI20	TLSL1
-  c8:	03800084 	ori         	\$a0, \$a0, 0x0
-			c8: R_LARCH_TLS_DESC_LO12	TLSL1
-  cc:	16000004 	lu32i.d     	\$a0, 0
-			cc: R_LARCH_TLS_DESC64_LO20	TLSL1
-  d0:	03000084 	lu52i.d     	\$a0, \$a0, 0
-			d0: R_LARCH_TLS_DESC64_HI12	TLSL1
-  d4:	28c00081 	ld.d        	\$ra, \$a0, 0
-			d4: R_LARCH_TLS_DESC_LD	TLSL1
-  d8:	4c000021 	jirl        	\$ra, \$ra, 0
-			d8: R_LARCH_TLS_DESC_CALL	TLSL1
-  dc:	14000004 	lu12i.w     	\$a0, 0
-			dc: R_LARCH_TLS_LE_HI20_R	TLSL1
-			dc: R_LARCH_RELAX	\*ABS\*
-  e0:	001090a5 	add.d       	\$a1, \$a1, \$a0
-			e0: R_LARCH_TLS_LE_ADD_R	TLSL1
-			e0: R_LARCH_RELAX	\*ABS\*
-  e4:	29800085 	st.w        	\$a1, \$a0, 0
-			e4: R_LARCH_TLS_LE_LO12_R	TLSL1
-			e4: R_LARCH_RELAX	\*ABS\*
-  e8:	14000004 	lu12i.w     	\$a0, 0
-			e8: R_LARCH_TLS_LE_HI20_R	TLSL1
-			e8: R_LARCH_RELAX	\*ABS\*
-  ec:	001090a5 	add.d       	\$a1, \$a1, \$a0
-			ec: R_LARCH_TLS_LE_ADD_R	TLSL1
-			ec: R_LARCH_RELAX	\*ABS\*
-  f0:	29800085 	st.w        	\$a1, \$a0, 0
-			f0: R_LARCH_TLS_LE_LO12_R	TLSL1
-			f0: R_LARCH_RELAX	\*ABS\*
-  f4:	18000004 	pcaddi      	\$a0, 0
-			f4: R_LARCH_TLS_LD_PCREL20_S2	TLSL1
-  f8:	18000004 	pcaddi      	\$a0, 0
-			f8: R_LARCH_TLS_GD_PCREL20_S2	TLSL1
-  fc:	18000004 	pcaddi      	\$a0, 0
-			fc: R_LARCH_TLS_DESC_PCREL20_S2	TLSL1
+[ 	]*0000000000000000 <.L1-0x8c>:
+[ 	]+0:[ 	]+4c008ca4[ 	]+jirl[ 	]+\$a0, \$a1, 140
+[ 	]+0: R_LARCH_B16[ 	]+.L1
+[ 	]+4:[ 	]+40008880[ 	]+beqz[ 	]+\$a0, 136[ 	]+# 8c <.L1>
+[ 	]+4: R_LARCH_B21[ 	]+.L1
+[ 	]+8:[ 	]+50008400[ 	]+b[ 	]+132[ 	]+# 8c <.L1>
+[ 	]+8: R_LARCH_B26[ 	]+.L1
+[ 	]+c:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0, 0
+[ 	]+c: R_LARCH_ABS_HI20[ 	]+.L1
+[ 	]+10:[ 	]+038000a4[ 	]+ori[ 	]+\$a0, \$a1, 0x0
+[ 	]+10: R_LARCH_ABS_LO12[ 	]+.L1
+[ 	]+14:[ 	]+16000004[ 	]+lu32i.d[ 	]+\$a0, 0
+[ 	]+14: R_LARCH_ABS64_LO20[ 	]+.L1
+[ 	]+18:[ 	]+03000085[ 	]+lu52i.d[ 	]+\$a1, \$a0, 0
+[ 	]+18: R_LARCH_ABS64_HI12[ 	]+.L1
+[ 	]+1c:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0, 0
+[ 	]+1c: R_LARCH_PCALA_HI20[ 	]+.L1
+[ 	]+20:[ 	]+02c00085[ 	]+addi.d[ 	]+\$a1, \$a0, 0
+[ 	]+20: R_LARCH_PCALA_LO12[ 	]+.L1
+[ 	]+24:[ 	]+16000004[ 	]+lu32i.d[ 	]+\$a0, 0
+[ 	]+24: R_LARCH_PCALA64_LO20[ 	]+.L1
+[ 	]+28:[ 	]+03000085[ 	]+lu52i.d[ 	]+\$a1, \$a0, 0
+[ 	]+28: R_LARCH_PCALA64_HI12[ 	]+.L1
+[ 	]+2c:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0, 0
+[ 	]+2c: R_LARCH_GOT_PC_HI20[ 	]+.L1
+[ 	]+30:[ 	]+28c00085[ 	]+ld.d[ 	]+\$a1, \$a0, 0
+[ 	]+30: R_LARCH_GOT_PC_LO12[ 	]+.L1
+[ 	]+34:[ 	]+16000004[ 	]+lu32i.d[ 	]+\$a0, 0
+[ 	]+34: R_LARCH_GOT64_PC_LO20[ 	]+.L1
+[ 	]+38:[ 	]+03000085[ 	]+lu52i.d[ 	]+\$a1, \$a0, 0
+[ 	]+38: R_LARCH_GOT64_PC_HI12[ 	]+.L1
+[ 	]+3c:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0, 0
+[ 	]+3c: R_LARCH_GOT_HI20[ 	]+.L1
+[ 	]+40:[ 	]+03800084[ 	]+ori[ 	]+\$a0, \$a0, 0x0
+[ 	]+40: R_LARCH_GOT_LO12[ 	]+.L1
+[ 	]+44:[ 	]+16000004[ 	]+lu32i.d[ 	]+\$a0, 0
+[ 	]+44: R_LARCH_GOT64_LO20[ 	]+.L1
+[ 	]+48:[ 	]+03000085[ 	]+lu52i.d[ 	]+\$a1, \$a0, 0
+[ 	]+48: R_LARCH_GOT64_HI12[ 	]+.L1
+[ 	]+4c:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0, 0
+[ 	]+4c: R_LARCH_TLS_LE_HI20[ 	]+TLSL1
+[ 	]+4c: R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+50:[ 	]+03800085[ 	]+ori[ 	]+\$a1, \$a0, 0x0
+[ 	]+50: R_LARCH_TLS_LE_LO12[ 	]+TLSL1
+[ 	]+50: R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+54:[ 	]+16000004[ 	]+lu32i.d[ 	]+\$a0, 0
+[ 	]+54: R_LARCH_TLS_LE64_LO20[ 	]+TLSL1
+[ 	]+54: R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+58:[ 	]+03000085[ 	]+lu52i.d[ 	]+\$a1, \$a0, 0
+[ 	]+58: R_LARCH_TLS_LE64_HI12[ 	]+TLSL1
+[ 	]+58: R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+5c:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0, 0
+[ 	]+5c: R_LARCH_TLS_IE_PC_HI20[ 	]+TLSL1
+[ 	]+60:[ 	]+02c00005[ 	]+li.d[ 	]+\$a1, 0
+[ 	]+60: R_LARCH_TLS_IE_PC_LO12[ 	]+TLSL1
+[ 	]+64:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1, 0
+[ 	]+64: R_LARCH_TLS_IE64_PC_LO20[ 	]+TLSL1
+[ 	]+68:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1, \$a1, 0
+[ 	]+68: R_LARCH_TLS_IE64_PC_HI12[ 	]+TLSL1
+[ 	]+6c:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0, 0
+[ 	]+6c: R_LARCH_TLS_IE_HI20[ 	]+TLSL1
+[ 	]+70:[ 	]+03800084[ 	]+ori[ 	]+\$a0, \$a0, 0x0
+[ 	]+70: R_LARCH_TLS_IE_LO12[ 	]+TLSL1
+[ 	]+74:[ 	]+16000004[ 	]+lu32i.d[ 	]+\$a0, 0
+[ 	]+74: R_LARCH_TLS_IE64_LO20[ 	]+TLSL1
+[ 	]+78:[ 	]+03000084[ 	]+lu52i.d[ 	]+\$a0, \$a0, 0
+[ 	]+78: R_LARCH_TLS_IE64_HI12[ 	]+TLSL1
+[ 	]+7c:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0, 0
+[ 	]+7c: R_LARCH_TLS_LD_PC_HI20[ 	]+TLSL1
+[ 	]+80:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0, 0
+[ 	]+80: R_LARCH_TLS_LD_HI20[ 	]+TLSL1
+[ 	]+84:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0, 0
+[ 	]+84: R_LARCH_TLS_GD_PC_HI20[ 	]+TLSL1
+[ 	]+88:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0, 0
+[ 	]+88: R_LARCH_TLS_GD_HI20[ 	]+TLSL1
+000000000000008c <.L1>:
+[ 	]+8c:[ 	]+00000000[ 	]+.word[ 	]+[ 	]+0x00000000
+[ 	]+8c: R_LARCH_ADD32[ 	]+.L2
+[ 	]+8c: R_LARCH_SUB32[ 	]+.L1
+0000000000000090 <.L2>:
+[ 	]+...
+[ 	]+90: R_LARCH_ADD64[ 	]+.L3
+[ 	]+90: R_LARCH_SUB64[ 	]+.L2
+0000000000000098 <.L3>:
+[ 	]+98:[ 	]+03400000[ 	]+nop
+[ 	]+9c:[ 	]+03400000[ 	]+nop
+[ 	]+9c: R_LARCH_ALIGN[ 	]+\*ABS\*\+0xc
+[ 	]+a0:[ 	]+03400000[ 	]+nop
+[ 	]+a4:[ 	]+03400000[ 	]+nop
+[ 	]+a8:[ 	]+1800000c[ 	]+pcaddi[ 	]+\$t0, 0
+[ 	]+a8: R_LARCH_PCREL20_S2[ 	]+.L1
+[ 	]+ac:[ 	]+1e000001[ 	]+pcaddu18i[ 	]+\$ra, 0
+[ 	]+ac: R_LARCH_CALL36[ 	]+a
+[ 	]+ac: R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+b0:[ 	]+4c000021[ 	]+jirl[ 	]+\$ra, \$ra, 0
+[ 	]+b4:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0, 0
+[ 	]+b4: R_LARCH_TLS_DESC_PC_HI20[ 	]+TLSL1
+[ 	]+b8:[ 	]+02c000a5[ 	]+addi.d[ 	]+\$a1, \$a1, 0
+[ 	]+b8: R_LARCH_TLS_DESC_PC_LO12[ 	]+TLSL1
+[ 	]+bc:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1, 0
+[ 	]+bc: R_LARCH_TLS_DESC64_PC_LO20[ 	]+TLSL1
+[ 	]+c0:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1, \$a1, 0
+[ 	]+c0: R_LARCH_TLS_DESC64_PC_HI12[ 	]+TLSL1
+[ 	]+c4:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0, 0
+[ 	]+c4: R_LARCH_TLS_DESC_HI20[ 	]+TLSL1
+[ 	]+c8:[ 	]+03800084[ 	]+ori[ 	]+\$a0, \$a0, 0x0
+[ 	]+c8: R_LARCH_TLS_DESC_LO12[ 	]+TLSL1
+[ 	]+cc:[ 	]+16000004[ 	]+lu32i.d[ 	]+\$a0, 0
+[ 	]+cc: R_LARCH_TLS_DESC64_LO20[ 	]+TLSL1
+[ 	]+d0:[ 	]+03000084[ 	]+lu52i.d[ 	]+\$a0, \$a0, 0
+[ 	]+d0: R_LARCH_TLS_DESC64_HI12[ 	]+TLSL1
+[ 	]+d4:[ 	]+28c00081[ 	]+ld.d[ 	]+\$ra, \$a0, 0
+[ 	]+d4: R_LARCH_TLS_DESC_LD[ 	]+TLSL1
+[ 	]+d8:[ 	]+4c000021[ 	]+jirl[ 	]+\$ra, \$ra, 0
+[ 	]+d8: R_LARCH_TLS_DESC_CALL[ 	]+TLSL1
+[ 	]+dc:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0, 0
+[ 	]+dc: R_LARCH_TLS_LE_HI20_R[ 	]+TLSL1
+[ 	]+dc: R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+e0:[ 	]+001090a5[ 	]+add.d[ 	]+\$a1, \$a1, \$a0
+[ 	]+e0: R_LARCH_TLS_LE_ADD_R[ 	]+TLSL1
+[ 	]+e0: R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+e4:[ 	]+29800085[ 	]+st.w[ 	]+\$a1, \$a0, 0
+[ 	]+e4: R_LARCH_TLS_LE_LO12_R[ 	]+TLSL1
+[ 	]+e4: R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+e8:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0, 0
+[ 	]+e8: R_LARCH_TLS_LE_HI20_R[ 	]+TLSL1
+[ 	]+e8: R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+ec:[ 	]+001090a5[ 	]+add.d[ 	]+\$a1, \$a1, \$a0
+[ 	]+ec: R_LARCH_TLS_LE_ADD_R[ 	]+TLSL1
+[ 	]+ec: R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+f0:[ 	]+29800085[ 	]+st.w[ 	]+\$a1, \$a0, 0
+[ 	]+f0: R_LARCH_TLS_LE_LO12_R[ 	]+TLSL1
+[ 	]+f0: R_LARCH_RELAX[ 	]+\*ABS\*
+[ 	]+f4:[ 	]+18000004[ 	]+pcaddi[ 	]+\$a0, 0
+[ 	]+f4: R_LARCH_TLS_LD_PCREL20_S2[ 	]+TLSL1
+[ 	]+f8:[ 	]+18000004[ 	]+pcaddi[ 	]+\$a0, 0
+[ 	]+f8: R_LARCH_TLS_GD_PCREL20_S2[ 	]+TLSL1
+[ 	]+fc:[ 	]+18000004[ 	]+pcaddi[ 	]+\$a0, 0
+[ 	]+fc: R_LARCH_TLS_DESC_PCREL20_S2[ 	]+TLSL1