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authorJan Beulich <jbeulich@novell.com>2018-07-19 08:35:38 +0200
committerJan Beulich <jbeulich@suse.com>2018-07-19 08:35:38 +0200
commit625cbd7ac121a6df6d237c8368262f6634fb61ab (patch)
tree0b471cf54c8bede76c6e2fec7e8ee07babdea2d7 /gas
parent86b15c32040ae35c74e84b18f7b65dea94436458 (diff)
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x86: fold VFPCLASSP{D,S} templates
These are special because they may not have a register operand to derive the vector length from, which requires to also deal with the braodcast case when determining vector length in build_evex_prefix(). Also drop IgnoreSize (and the now redundant size specifiers) from their suffixed counterparts.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog7
-rw-r--r--gas/config/tc-i386.c20
2 files changed, 26 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index dcb6397..be66002 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,12 @@
2018-07-19 Jan Beulich <jbeulich@suse.com>
+ * config/tc-i386.c (build_evex_prefix): Derive vector length
+ from broadcast specification if necessary.
+ (match_template): Also exclude broadcast when checking whether
+ to reject 32-bit operands on pre-386.
+
+2018-07-19 Jan Beulich <jbeulich@suse.com>
+
* testsuite/gas/i386/noavx512-2.l: Adjust expectations.
2018-07-19 Jan Beulich <jbeulich@suse.com>
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index d9305fb..41f701c 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -3622,7 +3622,24 @@ build_evex_prefix (void)
i.tm.opcode_modifier.evex = EVEX256;
else if (i.types[op].bitfield.xmmword)
i.tm.opcode_modifier.evex = EVEX128;
- else
+ else if (i.broadcast && (int) op == i.broadcast->operand)
+ {
+ switch ((i.tm.operand_types[op].bitfield.dword ? 4 : 8)
+ * i.broadcast->type)
+ {
+ case 64:
+ i.tm.opcode_modifier.evex = EVEX512;
+ break;
+ case 32:
+ i.tm.opcode_modifier.evex = EVEX256;
+ break;
+ case 16:
+ i.tm.opcode_modifier.evex = EVEX128;
+ break;
+ default:
+ continue;
+ }
+ }
continue;
break;
}
@@ -5430,6 +5447,7 @@ match_template (char mnem_suffix)
&& flag_code != CODE_64BIT
&& (intel_syntax
? (!t->opcode_modifier.ignoresize
+ && !t->opcode_modifier.broadcast
&& !intel_float_operand (t->name))
: intel_float_operand (t->name) != 2)
&& ((!operand_types[0].bitfield.regmmx