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authorAlan Modra <amodra@gmail.com>2019-05-04 16:03:47 +0930
committerAlan Modra <amodra@gmail.com>2019-05-04 17:23:18 +0930
commit27cdfa03b5be812683c18e64009a5da042190ae6 (patch)
treef2c6abd546ec1b2c9a7f215914f569cd29a8c0c2 /gas
parenta288c270991de1578ad28ac312120f4167347234 (diff)
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m32c padding with nops
m32c_md_end attempted to pad out a code section with nops, but this was just plain wrong in many ways: - The padding didn't happen at all if the last section emitted wasn't a code section. - The padding went to the wrong place if subsections were used, and the last subseg used wasn't the highest numbered subseg. - Padding wasn't added to all code sections. - If the last section was empty, it was padded to 4 bytes. - The padding didn't go to a 4-byte alignment boundary, instead it effectively made the last instruction 4 bytes in size. - The padding didn't take into account that code sections may have contents other than machine instructions. So, rip it out and handle nop padding properly, also fixing .align .balign/.p2align in the middle of code. gas/ * config/tc-m32c.c (insn_size): Delete static var. (md_begin): Don't set it. (m32c_md_end): Delete. (md_assemble): Add insn_size auto var. * config/tc-m32c.h (md_end): Don't define. (m32c_md_end): Delete. (NOP_OPCODE, HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): Define. * testsuite/gas/all/align.d: Remove m32c from notarget list. * testsuite/gas/all/incbin.d: Likewise. * testsuite/gas/elf/dwarf2-11.d: Likewise. * testsuite/gas/macros/semi.d: Likewise. * testsuite/gas/all/gas.exp (do_comment): Similarly. ld/ * testsuite/ld-scripts/fill.d: Don't xfail m32c * testsuite/ld-scripts/fill16.d: Likewise.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog15
-rw-r--r--gas/config/tc-m32c.c18
-rw-r--r--gas/config/tc-m32c.h7
-rw-r--r--gas/testsuite/gas/all/align.d2
-rw-r--r--gas/testsuite/gas/all/gas.exp8
-rw-r--r--gas/testsuite/gas/all/incbin.d1
-rw-r--r--gas/testsuite/gas/elf/dwarf2-11.d2
-rw-r--r--gas/testsuite/gas/macros/semi.d1
8 files changed, 23 insertions, 31 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 8a82fde..8ba1cde 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,18 @@
+2019-05-04 Alan Modra <amodra@gmail.com>
+
+ * config/tc-m32c.c (insn_size): Delete static var.
+ (md_begin): Don't set it.
+ (m32c_md_end): Delete.
+ (md_assemble): Add insn_size auto var.
+ * config/tc-m32c.h (md_end): Don't define.
+ (m32c_md_end): Delete.
+ (NOP_OPCODE, HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): Define.
+ * testsuite/gas/all/align.d: Remove m32c from notarget list.
+ * testsuite/gas/all/incbin.d: Likewise.
+ * testsuite/gas/elf/dwarf2-11.d: Likewise.
+ * testsuite/gas/macros/semi.d: Likewise.
+ * testsuite/gas/all/gas.exp (do_comment): Similarly.
+
2019-05-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/24485
diff --git a/gas/config/tc-m32c.c b/gas/config/tc-m32c.c
index d653186..07501df 100644
--- a/gas/config/tc-m32c.c
+++ b/gas/config/tc-m32c.c
@@ -86,7 +86,6 @@ size_t md_longopts_size = sizeof (md_longopts);
static unsigned long m32c_mach = bfd_mach_m16c;
static int cpu_mach = (1 << MACH_M16C);
-static int insn_size;
static int m32c_relax = 0;
/* Flags to set in the elf header */
@@ -185,22 +184,6 @@ md_begin (void)
/* Set the machine type */
bfd_default_set_arch_mach (stdoutput, bfd_arch_m32c, m32c_mach);
-
- insn_size = 0;
-}
-
-void
-m32c_md_end (void)
-{
- int i, n_nops;
-
- if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
- {
- /* Pad with nops for objdump. */
- n_nops = (32 - ((insn_size) % 32)) / 8;
- for (i = 1; i <= n_nops; i++)
- md_assemble ((char *) "nop");
- }
}
void
@@ -335,6 +318,7 @@ md_assemble (char * str)
char * errmsg;
finished_insnS results;
int rl_type;
+ int insn_size;
if (m32c_mach == bfd_mach_m32c && m32c_indirect_operand (str))
return;
diff --git a/gas/config/tc-m32c.h b/gas/config/tc-m32c.h
index a30b828..b55dd61 100644
--- a/gas/config/tc-m32c.h
+++ b/gas/config/tc-m32c.h
@@ -29,9 +29,6 @@
#define TARGET_BYTES_BIG_ENDIAN 0
-#define md_end m32c_md_end
-extern void m32c_md_end (void);
-
#define md_start_line_hook m32c_start_line_hook
extern void m32c_start_line_hook (void);
@@ -85,3 +82,7 @@ extern long md_pcrel_from_section (struct fix *, segT);
extern int m32c_is_colon_insn (char *, char *);
#define H_TICK_HEX 1
+
+#define NOP_OPCODE (bfd_get_mach (stdoutput) == bfd_mach_m32c ? 0xde : 0x04)
+#define HANDLE_ALIGN(fragP)
+#define MAX_MEM_FOR_RS_ALIGN_CODE 1
diff --git a/gas/testsuite/gas/all/align.d b/gas/testsuite/gas/all/align.d
index 9fcd6c0..c701f25 100644
--- a/gas/testsuite/gas/all/align.d
+++ b/gas/testsuite/gas/all/align.d
@@ -4,7 +4,7 @@
# even if the user requested that they filled with zeros.
# RISC-V handles alignment via relaxation and therefor won't have object files
# with the expected alignment.
-#notarget: m32c-* riscv*-* rx-*
+#notarget: riscv*-* rx-*
# Test the alignment pseudo-op.
diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp
index a91f8c2..abae8b1 100644
--- a/gas/testsuite/gas/all/gas.exp
+++ b/gas/testsuite/gas/all/gas.exp
@@ -194,13 +194,7 @@ proc do_comment {} {
if [all_ones $x1 $x2 $x3] then { pass $testname } else { fail $testname }
}
-# m32c pads out sections, even empty ones.
-case $target_triplet in {
- { m32c-*-* } { }
- default {
- do_comment
- }
-}
+do_comment
# This test checks the output of the -ag switch. It must detect at least
# the name of the input file, output file, and options passed.
diff --git a/gas/testsuite/gas/all/incbin.d b/gas/testsuite/gas/all/incbin.d
index e0c7c44..62f6ae7 100644
--- a/gas/testsuite/gas/all/incbin.d
+++ b/gas/testsuite/gas/all/incbin.d
@@ -1,7 +1,6 @@
#as: -I$srcdir/$subdir
#objdump: -s -j .text
#name: incbin
-#notarget: m32c-*
# Test the incbin pseudo-op
diff --git a/gas/testsuite/gas/elf/dwarf2-11.d b/gas/testsuite/gas/elf/dwarf2-11.d
index 2a5ec84..cdaa4f1 100644
--- a/gas/testsuite/gas/elf/dwarf2-11.d
+++ b/gas/testsuite/gas/elf/dwarf2-11.d
@@ -4,7 +4,7 @@
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#notarget: am3*-* avr-* cr16-* crx-* ft32*-* m32c-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Contents of the \.debug_line section:
diff --git a/gas/testsuite/gas/macros/semi.d b/gas/testsuite/gas/macros/semi.d
index 66c452a..102d732 100644
--- a/gas/testsuite/gas/macros/semi.d
+++ b/gas/testsuite/gas/macros/semi.d
@@ -1,6 +1,5 @@
#objdump: -s -j .text
#name: semi
-#notarget: m32c-*
.*: .*