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authorPrzemyslaw Wirkus <przemyslaw.wirkus@arm.com>2021-09-30 20:44:17 +0100
committerPrzemyslaw Wirkus <przemyslaw.wirkus@arm.com>2021-09-30 20:44:17 +0100
commitd5007f0280d881a8add44e6a68a3f536e138244c (patch)
tree9c08739cc9dfe7b4d88ec691390a91b0ab131253 /gas
parent4dfef5be6812dd7abfbc8f18e9c0384f2522b511 (diff)
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aarch64: add armv9-a architecture to -march
Patch is adding new 'armv9-a` command line flag to -march for AArch64. gas/ * config/tc-aarch64.c: Add 'armv9-a' command line flag. * docs/c-aarch64.text: Update docs. * NEWS: Update docs. include/ * opcode/aarch64.h (AARCH64_FEATURE_V9): New define. (AARCH64_ARCH_V9): New define.
Diffstat (limited to 'gas')
-rw-r--r--gas/NEWS2
-rw-r--r--gas/config/tc-aarch64.c1
-rw-r--r--gas/doc/c-aarch64.texi7
3 files changed, 7 insertions, 3 deletions
diff --git a/gas/NEWS b/gas/NEWS
index 8046ed5..258a156 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -4,6 +4,8 @@
x86 assembler have been reduced from 12 bytes to 10 bytes to match the
output of .tfloat directive.
+* Add support for 'armv9-a' for -march in AArch64 GAS.
+
* Add support for Intel AVX512_FP16 instructions.
Changes in 2.37:
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 19a5d49..087f88e 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -9144,6 +9144,7 @@ static const struct aarch64_arch_option_table aarch64_archs[] = {
{"armv8.6-a", AARCH64_ARCH_V8_6},
{"armv8.7-a", AARCH64_ARCH_V8_7},
{"armv8-r", AARCH64_ARCH_V8_R},
+ {"armv9-a", AARCH64_ARCH_V9},
{NULL, AARCH64_ARCH_NONE}
};
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 79dce2f..c49e0a4 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -107,7 +107,8 @@ issue an error message if an attempt is made to assemble an
instruction which will not execute on the target architecture. The
following architecture names are recognized: @code{armv8-a},
@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a}, @code{armv8.4-a}
-@code{armv8.5-a}, @code{armv8.6-a}, @code{armv8.7-a}, and @code{armv8-r}.
+@code{armv8.5-a}, @code{armv8.6-a}, @code{armv8.7-a}, @code{armv8-r}, and
+@code{armv9-a}.
If both @option{-mcpu} and @option{-march} are specified, the
assembler will use the setting for @option{-mcpu}. If neither are
@@ -196,7 +197,7 @@ automatically cause those extensions to be disabled.
@tab Enable ARMv8.1 Advanced SIMD extensions. This implies @code{simd}.
@item @code{simd} @tab ARMv8-A @tab ARMv8-A or later
@tab Enable Advanced SIMD extensions. This implies @code{fp}.
-@item @code{sve} @tab ARMv8.2-A @tab No
+@item @code{sve} @tab ARMv8.2-A @tab Armv9-A or later
@tab Enable the Scalable Vector Extensions. This implies @code{fp16},
@code{simd} and @code{compnum}.
@item @code{dotprod} @tab ARMv8.2-A @tab ARMv8.4-A or later
@@ -216,7 +217,7 @@ automatically cause those extensions to be disabled.
@tab Enable ARMv8.5-A Memory Tagging Extensions.
@item @code{tme} @tab ARMv8-A @tab No
@tab Enable Transactional Memory Extensions.
-@item @code{sve2} @tab ARMv8-A @tab No
+@item @code{sve2} @tab ARMv8-A @tab Armv9-A or later
@tab Enable the SVE2 Extension.
@item @code{sve2-bitperm} @tab ARMv8-A @tab No
@tab Enable SVE2 BITPERM Extension.