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authorMatthew Fortune <matthew.fortune@imgtec.com>2016-05-20 15:20:42 +0100
committerRobert Suchanek <robert.suchanek@imgtec.com>2016-05-20 15:21:10 +0100
commita4968f42e78972fa10b1a84a5e72afd4b65b0eca (patch)
treebf7689f267255a3fe2d37ec39d2753e5769596b4 /gas
parent4e21640f674499048157fa62f08b16f6039f78f6 (diff)
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MIPS: Add support for P6600
gas/ * config/tc-mips.c (mips_cpu_info_table): Update comment. Add p6600 entry. * doc/c-mips.texi: Document p6600 -march option.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog6
-rw-r--r--gas/config/tc-mips.c3
-rw-r--r--gas/doc/c-mips.texi1
3 files changed, 9 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 272f8fe..328299b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2016-05-20 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Update comment. Add
+ p6600 entry.
+ * doc/c-mips.texi: Document p6600 -march option.
+
2016-05-20 H.J. Lu <hongjiu.lu@intel.com>
PR gas/19600
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 233c641..f58955c 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -18756,8 +18756,9 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
MIPS64R2 rather than MIPS64. */
{ "xlp", 0, 0, ISA_MIPS64R2, CPU_XLR },
- /* i6400. */
+ /* MIPS 64 Release 6 */
{ "i6400", 0, ASE_MSA, ISA_MIPS64R6, CPU_MIPS64R6},
+ { "p6600", 0, ASE_VIRT | ASE_MSA, ISA_MIPS64R6, CPU_MIPS64R6},
/* End marker */
{ NULL, 0, 0, 0, 0 }
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index 5fa64cb..718ac94 100644
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -387,6 +387,7 @@ p5600,
sb1,
sb1a,
i6400,
+p6600,
loongson2e,
loongson2f,
loongson3a,