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authorJan Beulich <jbeulich@suse.com>2022-12-02 09:53:07 +0100
committerJan Beulich <jbeulich@suse.com>2022-12-02 09:53:07 +0100
commita33ef3c24a85759af9a629d673cb49c822466547 (patch)
treeb12e209263cebae884f3f545d0bb8ea89c0fcddd /gas
parent63dc62b25880d4eeabb9eb3a5d691043b2723dd5 (diff)
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x86: also use D for XCHG and TEST
Leverage the C (commutative) attribute to also reduce the number of XCHG and TEST templates we have. This way the reg <-> r/m (and reg <-> reg for XCHG) forms can also be folded into a single template each, utilizing D.
Diffstat (limited to 'gas')
-rw-r--r--gas/config/tc-i386.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 55e2d85..c58a570 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6803,8 +6803,10 @@ match_template (char mnem_suffix)
|| (t->base_opcode | 7) != 0x27))
found_reverse_match = (t->base_opcode & 0xee) != 0x6e
? Opcode_ExtD : Opcode_SIMD_IntD;
- else
+ else if (!t->opcode_modifier.commutative)
found_reverse_match = Opcode_D;
+ else
+ found_reverse_match = ~0;
}
else
{
@@ -7001,9 +7003,6 @@ match_template (char mnem_suffix)
i.tm.base_opcode ^= found_reverse_match;
- i.tm.operand_types[0] = operand_types[i.operands - 1];
- i.tm.operand_types[i.operands - 1] = operand_types[0];
-
/* Certain SIMD insns have their load forms specified in the opcode
table, and hence we need to _set_ RegMem instead of clearing it.
We need to avoid setting the bit though on insns like KMOVW. */
@@ -7011,6 +7010,11 @@ match_template (char mnem_suffix)
= i.tm.opcode_modifier.modrm && i.tm.opcode_modifier.d
&& i.tm.operands > 2U - i.tm.opcode_modifier.sse2avx
&& !i.tm.opcode_modifier.regmem;
+
+ /* Fall through. */
+ case ~0:
+ i.tm.operand_types[0] = operand_types[i.operands - 1];
+ i.tm.operand_types[i.operands - 1] = operand_types[0];
break;
case Opcode_VexW: