* gas/tic80/{float.d, float.lst, float.s}: New tests for

	simple floating point operands.
	* gas/tic80/tic80.exp: Run the float test.

5 files changed, 187 insertions, 0 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 50127cb..f592fa4 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,4 +1,10 @@
 start-sanitize-tic80
+Wed Feb 26 20:36:46 1997  Fred Fish  <fnf@cygnus.com>
+
+	* gas/tic80/{float.d, float.lst, float.s}: New tests for
+	simple floating point operands.
+	* gas/tic80/tic80.exp: Run the float test.
+
 Wed Feb 26 15:16:04 1997  Fred Fish  <fnf@cygnus.com>
 
 	* gas/tic80/{regops2.d, regops2.lst, regops2.s, regops3.d,
diff --git a/gas/testsuite/gas/tic80/float.d b/gas/testsuite/gas/tic80/float.d
new file mode 100644
index 0000000..3f20a3e
--- /dev/null
+++ b/gas/testsuite/gas/tic80/float.d
@@ -0,0 +1,72 @@
+#objdump: -d
+#name: TIc80 simple floating point operands
+
+.*: +file format .*tic80.*
+
+Disassembly of section .text:
+
+00000000 <.text>:
+   0:	80 12 be 51.*
+   4:	16 68 a9 65.*
+   8:	00 12 be 51.*
+   c:	16 68 a9 e5.*
+  10:	00 10 be 51.*
+  14:	9a 6d 41 19.*
+  18:	80 b0 3e 52.*
+  1c:	9a 6d 41 99.*
+  20:	00 b0 3e 52.*
+  24:	00 00 00 00.*
+  28:	80 72 be 51.*
+  2c:	00 00 00 40.*
+  30:	00 72 be 51.*
+  34:	00 00 00 3f.*
+  38:	00 70 be 51.*
+  3c:	00 00 80 45.*
+  40:	80 52 be 51.*
+  44:	00 00 80 c5.*
+  48:	00 52 be 51.*
+  4c:	00 00 00 40.*
+  50:	00 50 be 51.*
+  54:	00 00 00 40.*
+  58:	80 93 3e 40.*
+  5c:	00 00 00 40.*
+  60:	80 95 3e 40.*
+  64:	00 00 00 40.*
+  68:	80 91 3e 40.*
+  6c:	00 00 00 40.*
+  70:	80 97 3e 40.*
+  74:	00 00 00 40.*
+  78:	00 92 3e 40.*
+  7c:	00 00 00 40.*
+  80:	00 94 3e 40.*
+  84:	00 00 00 40.*
+  88:	00 90 3e 40.*
+  8c:	00 00 00 40.*
+  90:	00 96 3e 40.*
+  94:	00 00 00 40.*
+  98:	00 93 3e 40.*
+  9c:	00 00 00 40.*
+  a0:	00 95 3e 40.*
+  a4:	00 00 00 40.*
+  a8:	00 91 3e 40.*
+  ac:	00 00 00 40.*
+  b0:	00 97 3e 40.*
+  b4:	00 00 00 40.*
+  b8:	80 92 3e 40.*
+  bc:	00 00 00 40.*
+  c0:	80 94 3e 40.*
+  c4:	00 00 00 40.*
+  c8:	80 90 3e 40.*
+  cc:	00 00 00 40.*
+  d0:	80 96 3e 40.*
+  d4:	00 00 00 40.*
+  d8:	00 f2 3e 50.*
+  dc:	00 00 00 40.*
+  e0:	00 f0 3e 50.*
+  e4:	00 00 00 40.*
+  e8:	80 32 be 51.*
+  ec:	00 00 00 40.*
+  f0:	00 32 be 51.*
+  f4:	00 00 00 40.*
+  f8:	00 30 be 51.*
+  fc:	00 00 00 40.*
diff --git a/gas/testsuite/gas/tic80/float.lst b/gas/testsuite/gas/tic80/float.lst
new file mode 100644
index 0000000..6134590
--- /dev/null
+++ b/gas/testsuite/gas/tic80/float.lst
@@ -0,0 +1,76 @@
+MVP MP Macro Assembler     Version 1.13     Wed Feb 26 22:09:09 1997
+Copyright (c) 1993-1995    Texas Instruments Incorporated 
+
+float.s                                                              PAGE    1
+
+        1 00000000   51BE1280         fadd.sdd        1.0E23,r6,r10   ; Immediate form
+          00000004   65A96816 
+        2 00000008   51BE1200         fadd.ssd        -1.0E23,r6,r10  ; Immediate form
+          0000000C   E5A96816 
+        3 00000010   51BE1000         fadd.sss        1.0E-23,r6,r10  ; Immediate form
+          00000014   19416D9A 
+        4 00000018   523EB080         fcmp.sd         -1.0E-23,r8,r10 ; Immediate form
+          0000001C   99416D9A 
+        5 00000020   523EB000         fcmp.ss         0.0,r8,r10      ; Immediate form
+          00000024   00000000 
+        6 00000028   51BE7280         fdiv.sdd        2.0,r6,r10      ; Immediate form
+          0000002C   40000000 
+        7 00000030   51BE7200         fdiv.ssd        0.5,r6,r10      ; Immediate form
+          00000034   3F000000 
+        8 00000038   51BE7000         fdiv.sss        4096.0,r6,r10   ; Immediate form
+          0000003C   45800000 
+        9 00000040   51BE5280         fmpy.sdd        -4096.0,r6,r10  ; Immediate form
+          00000044   C5800000 
+       10 00000048   51BE5200         fmpy.ssd        2.0,r6,r10      ; Immediate form
+          0000004C   40000000 
+       11 00000050   51BE5000         fmpy.sss        2.0,r6,r10      ; Immediate form
+          00000054   40000000 
+       12 00000058   403E9380         frndm.sd        2.0,r8          ; Immediate form
+          0000005C   40000000 
+       13 00000060   403E9580         frndm.si        2.0,r8          ; Immediate form
+          00000064   40000000 
+       14 00000068   403E9180         frndm.ss        2.0,r8          ; Immediate form
+          0000006C   40000000 
+       15 00000070   403E9780         frndm.su        2.0,r8          ; Immediate form
+          00000074   40000000 
+       16 00000078   403E9200         frndn.sd        2.0,r8          ; Immediate form
+          0000007C   40000000 
+       17 00000080   403E9400         frndn.si        2.0,r8          ; Immediate form
+          00000084   40000000 
+       18 00000088   403E9000         frndn.ss        2.0,r8          ; Immediate form
+          0000008C   40000000 
+       19 00000090   403E9600         frndn.su        2.0,r8          ; Immediate form
+          00000094   40000000 
+       20 00000098   403E9300         frndp.sd        2.0,r8          ; Immediate form
+          0000009C   40000000 
+       21 000000A0   403E9500         frndp.si        2.0,r8          ; Immediate form
+          000000A4   40000000 
+       22 000000A8   403E9100         frndp.ss        2.0,r8          ; Immediate form
+          000000AC   40000000 
+       23 000000B0   403E9700         frndp.su        2.0,r8          ; Immediate form
+          000000B4   40000000 
+       24 000000B8   403E9280         frndz.sd        2.0,r8          ; Immediate form
+          000000BC   40000000 
+       25 000000C0   403E9480         frndz.si        2.0,r8          ; Immediate form
+          000000C4   40000000 
+       26 000000C8   403E9080         frndz.ss        2.0,r8          ; Immediate form
+          000000CC   40000000 
+       27 000000D0   403E9680         frndz.su        2.0,r8          ; Immediate form
+          000000D4   40000000 
+       28 000000D8   503EF200         fsqrt.sd        2.0,r10         ; Immediate form
+MVP MP Macro Assembler     Version 1.13     Wed Feb 26 22:09:09 1997
+Copyright (c) 1993-1995    Texas Instruments Incorporated 
+
+float.s                                                              PAGE    2
+
+          000000DC   40000000 
+       29 000000E0   503EF000         fsqrt.ss        2.0,r10         ; Immediate form
+          000000E4   40000000 
+       30 000000E8   51BE3280         fsub.sdd        2.0,r6,r10      ; Immediate form
+          000000EC   40000000 
+       31 000000F0   51BE3200         fsub.ssd        2.0,r6,r10      ; Immediate form
+          000000F4   40000000 
+       32 000000F8   51BE3000         fsub.sss        2.0,r6,r10      ; Immediate form
+          000000FC   40000000 
+
+ No Errors,  No Warnings
diff --git a/gas/testsuite/gas/tic80/float.s b/gas/testsuite/gas/tic80/float.s
new file mode 100644
index 0000000..98a2b7a
--- /dev/null
+++ b/gas/testsuite/gas/tic80/float.s
@@ -0,0 +1,32 @@
+	fadd.sdd	0f1.0E23,r6,r10	; Immediate form
+	fadd.ssd	0f-1.0E23,r6,r10	; Immediate form
+	fadd.sss	0f1.0E-23,r6,r10	; Immediate form
+	fcmp.sd		0f-1.0E-23,r8,r10	; Immediate form
+	fcmp.ss		0f0.0,r8,r10	; Immediate form
+	fdiv.sdd	0f2.0,r6,r10	; Immediate form
+	fdiv.ssd	0f0.5,r6,r10	; Immediate form
+	fdiv.sss	0f4096.0,r6,r10	; Immediate form
+	fmpy.sdd	0f-4096.0,r6,r10	; Immediate form
+	fmpy.ssd	0f2.0,r6,r10	; Immediate form
+	fmpy.sss	0f2.0,r6,r10	; Immediate form
+	frndm.sd	0f2.0,r8		; Immediate form
+	frndm.si	0f2.0,r8		; Immediate form
+	frndm.ss	0f2.0,r8		; Immediate form
+	frndm.su	0f2.0,r8		; Immediate form
+	frndn.sd	0f2.0,r8		; Immediate form
+	frndn.si	0f2.0,r8		; Immediate form
+	frndn.ss	0f2.0,r8		; Immediate form
+	frndn.su	0f2.0,r8		; Immediate form
+	frndp.sd	0f2.0,r8		; Immediate form
+	frndp.si	0f2.0,r8		; Immediate form
+	frndp.ss	0f2.0,r8		; Immediate form
+	frndp.su	0f2.0,r8		; Immediate form
+	frndz.sd	0f2.0,r8		; Immediate form
+	frndz.si	0f2.0,r8		; Immediate form
+	frndz.ss	0f2.0,r8		; Immediate form
+	frndz.su	0f2.0,r8		; Immediate form
+	fsqrt.sd	0f2.0,r10		; Immediate form
+	fsqrt.ss	0f2.0,r10		; Immediate form
+	fsub.sdd	0f2.0,r6,r10	; Immediate form
+	fsub.ssd	0f2.0,r6,r10	; Immediate form
+	fsub.sss	0f2.0,r6,r10	; Immediate form
diff --git a/gas/testsuite/gas/tic80/tic80.exp b/gas/testsuite/gas/tic80/tic80.exp
index 960cd65..e64d9ba 100644
--- a/gas/testsuite/gas/tic80/tic80.exp
+++ b/gas/testsuite/gas/tic80/tic80.exp
@@ -8,6 +8,7 @@ if [istarget tic80*-*-*] then {
     run_dump_test "regops3"
     run_dump_test "regops4"
     run_dump_test "cregops"
+    run_dump_test "float"
     run_dump_test "endmask"
     run_dump_test "bitnum"
     run_dump_test "ccode"