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authorNick Clifton <nickc@redhat.com>2005-10-25 17:40:19 +0000
committerNick Clifton <nickc@redhat.com>2005-10-25 17:40:19 +0000
commit3c9b82baee30a1d3cfeb419643c6363dc9267208 (patch)
treee967c167366034d2a3bef0221e40d5abe7b999b6 /gas
parentfcfa13d2b2b18f83382c2a0cb82c9c7d21be10cb (diff)
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Add support for the Z80 processor family
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog17
-rw-r--r--gas/Makefile.am3
-rw-r--r--gas/Makefile.in3
-rw-r--r--gas/app.c54
-rw-r--r--gas/config/obj-coff.h5
-rw-r--r--gas/config/tc-z80.c2061
-rw-r--r--gas/config/tc-z80.h103
-rw-r--r--gas/configure.tgt4
-rw-r--r--gas/doc/Makefile.am1
-rw-r--r--gas/doc/Makefile.in7
-rw-r--r--gas/doc/all.texi1
-rw-r--r--gas/doc/as.texinfo64
-rw-r--r--gas/doc/c-z80.texi248
-rw-r--r--gas/testsuite/ChangeLog13
-rw-r--r--gas/testsuite/gas/all/gas.exp26
-rw-r--r--gas/testsuite/gas/macros/macros.exp2
-rw-r--r--gas/testsuite/gas/z80/quotes.d9
-rw-r--r--gas/testsuite/gas/z80/quotes.s11
-rw-r--r--gas/testsuite/gas/z80/redef.d8
-rw-r--r--gas/testsuite/gas/z80/redef.s11
-rw-r--r--gas/testsuite/gas/z80/z80.exp10
21 files changed, 2649 insertions, 12 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2ff1e50..58816b9 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,20 @@
+2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
+
+ * Makefile.am: Add Z80 cpu.
+ * Makefile.in: Regenerated.
+ * app.c (do_scrub_chars)<TC_Z80>: Correctly scrub "ex af,af'"
+ and disallow newlines in quoted strings.
+ * configure.tgt: Add z80-*-coff.
+ * config/obj-coff.h: Add format "coff-z80".
+ * doc/Makefile.am: Add c-z80.texi.
+ * doc/Makefile.in: Regenerated.
+ * doc/all.texi: Add Z80.
+ * doc/c-z80.texi: New file
+ * doc/as.texinfo: Add z80 options and some z80-related remarks.
+ * config/tc-z80.c: New file
+ * config/tc-z80.h: New file
+ * NEWS: Mention new support.
+
2005-10-25 H.J. Lu <hongjiu.lu@intel.com>
* write.c (adjust_reloc_syms): Undo the change made on
diff --git a/gas/Makefile.am b/gas/Makefile.am
index e373978..0867a9a 100644
--- a/gas/Makefile.am
+++ b/gas/Makefile.am
@@ -88,6 +88,7 @@ CPU_TYPES = \
v850 \
xstormy16 \
xtensa \
+ z80 \
z8k
# Object format types. This is only used for dependency information.
@@ -270,6 +271,7 @@ TARGET_CPU_CFILES = \
config/tc-v850.c \
config/tc-xstormy16.c \
config/tc-xtensa.c \
+ config/tc-z80.c \
config/tc-z8k.c
TARGET_CPU_HFILES = \
@@ -319,6 +321,7 @@ TARGET_CPU_HFILES = \
config/tc-v850.h \
config/tc-xstormy16.h \
config/tc-xtensa.h \
+ config/tc-z80.h \
config/tc-z8k.h
# OBJ files in config
diff --git a/gas/Makefile.in b/gas/Makefile.in
index 4a8c274..c8a3492 100644
--- a/gas/Makefile.in
+++ b/gas/Makefile.in
@@ -318,6 +318,7 @@ CPU_TYPES = \
v850 \
xstormy16 \
xtensa \
+ z80 \
z8k
@@ -498,6 +499,7 @@ TARGET_CPU_CFILES = \
config/tc-v850.c \
config/tc-xstormy16.c \
config/tc-xtensa.c \
+ config/tc-z80.c \
config/tc-z8k.c
TARGET_CPU_HFILES = \
@@ -547,6 +549,7 @@ TARGET_CPU_HFILES = \
config/tc-v850.h \
config/tc-xstormy16.h \
config/tc-xtensa.h \
+ config/tc-z80.h \
config/tc-z8k.h
diff --git a/gas/app.c b/gas/app.c
index 14f2f14..3ff7f61 100644
--- a/gas/app.c
+++ b/gas/app.c
@@ -376,6 +376,10 @@ do_scrub_chars (int (*get) (char *, int), char *tostart, int tolen)
15: After seeing a `(' at state 1, looking for a `)' as
predicate.
#endif
+#ifdef TC_Z80
+ 16: After seeing an 'a' or an 'A' at the start of a symbol
+ 17: After seeing an 'f' or an 'F' in state 16
+#endif
*/
/* I added states 9 and 10 because the MIPS ECOFF assembler uses
@@ -665,6 +669,32 @@ do_scrub_chars (int (*get) (char *, int), char *tostart, int tolen)
PUT ('|');
continue;
#endif
+#ifdef TC_Z80
+ case 16:
+ /* We have seen an 'a' at the start of a symbol, look for an 'f'. */
+ ch = GET ();
+ if (ch == 'f' || ch == 'F')
+ {
+ state = 17;
+ PUT (ch);
+ }
+ else
+ {
+ state = 9;
+ break;
+ }
+ case 17:
+ /* We have seen "af" at the start of a symbol,
+ a ' here is a part of that symbol. */
+ ch = GET ();
+ state = 9;
+ if (ch == '\'')
+ /* Change to avoid warning about unclosed string. */
+ PUT ('`');
+ else
+ UNGET (ch);
+ break;
+#endif
}
/* OK, we are somewhere in states 0 through 4 or 9 through 11. */
@@ -1242,6 +1272,30 @@ do_scrub_chars (int (*get) (char *, int), char *tostart, int tolen)
break;
}
+#ifdef TC_Z80
+ /* "af'" is a symbol containing '\''. */
+ if (state == 3 && (ch == 'a' || ch == 'A'))
+ {
+ state = 16;
+ PUT (ch);
+ ch = GET ();
+ if (ch == 'f' || ch == 'F')
+ {
+ state = 17;
+ PUT (ch);
+ break;
+ }
+ else
+ {
+ state = 9;
+ if (!IS_SYMBOL_COMPONENT (ch))
+ {
+ UNGET (ch);
+ break;
+ }
+ }
+ }
+#endif
if (state == 3)
state = 9;
diff --git a/gas/config/obj-coff.h b/gas/config/obj-coff.h
index 81577c8..4c7c68d 100644
--- a/gas/config/obj-coff.h
+++ b/gas/config/obj-coff.h
@@ -85,6 +85,11 @@
#define TARGET_FORMAT "coff-Intel-little"
#endif
+#ifdef TC_Z80
+#include "coff/z80.h"
+#define TARGET_FORMAT "coff-z80"
+#endif
+
#ifdef TC_Z8K
#include "coff/z8k.h"
#define TARGET_FORMAT "coff-z8k"
diff --git a/gas/config/tc-z80.c b/gas/config/tc-z80.c
new file mode 100644
index 0000000..28f69b1
--- /dev/null
+++ b/gas/config/tc-z80.c
@@ -0,0 +1,2061 @@
+/* tc-z80.c -- Assemble code for the Zilog Z80 and ASCII R800
+ Copyright 2005 Free Software Foundation, Inc.
+ Contributed by Arnold Metselaar <arnold_m@operamail.com>
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
+
+#include "as.h"
+#include "listing.h"
+#include "bfd.h"
+#include "safe-ctype.h"
+#include "subsegs.h"
+#include "symbols.h"
+#include "libiberty.h"
+
+/* Exported constants. */
+const char comment_chars[] = ";\0";
+const char line_comment_chars[] = "#;\0";
+const char line_separator_chars[] = "\0";
+const char EXP_CHARS[] = "eE\0";
+const char FLT_CHARS[] = "RrFf\0";
+
+/* For machine specific options. */
+const char * md_shortopts = ""; /* None yet. */
+
+enum options
+{
+ OPTION_MACH_Z80 = OPTION_MD_BASE,
+ OPTION_MACH_R800,
+ OPTION_MACH_IUD,
+ OPTION_MACH_WUD,
+ OPTION_MACH_FUD,
+ OPTION_MACH_IUP,
+ OPTION_MACH_WUP,
+ OPTION_MACH_FUP
+};
+
+#define INS_Z80 1
+#define INS_UNDOC 2
+#define INS_UNPORT 4
+#define INS_R800 8
+
+struct option md_longopts[] =
+{
+ { "z80", no_argument, NULL, OPTION_MACH_Z80},
+ { "r800", no_argument, NULL, OPTION_MACH_R800},
+ { "ignore-undocumented-instructions", no_argument, NULL, OPTION_MACH_IUD },
+ { "Wnud", no_argument, NULL, OPTION_MACH_IUD },
+ { "warn-undocumented-instructions", no_argument, NULL, OPTION_MACH_WUD },
+ { "Wud", no_argument, NULL, OPTION_MACH_WUD },
+ { "forbid-undocumented-instructions", no_argument, NULL, OPTION_MACH_FUD },
+ { "Fud", no_argument, NULL, OPTION_MACH_FUD },
+ { "ignore-unportable-instructions", no_argument, NULL, OPTION_MACH_IUP },
+ { "Wnup", no_argument, NULL, OPTION_MACH_IUP },
+ { "warn-unportable-instructions", no_argument, NULL, OPTION_MACH_WUP },
+ { "Wup", no_argument, NULL, OPTION_MACH_WUP },
+ { "forbid-unportable-instructions", no_argument, NULL, OPTION_MACH_FUP },
+ { "Fup", no_argument, NULL, OPTION_MACH_FUP },
+
+ { NULL, no_argument, NULL, 0 }
+} ;
+
+size_t md_longopts_size = sizeof (md_longopts);
+
+extern int coff_flags;
+/* Instruction classes that silently assembled. */
+static int ins_ok = INS_Z80 | INS_UNDOC;
+/* Instruction classes that generate errors. */
+static int ins_err = INS_R800;
+/* Instruction classes actually used, determines machine type. */
+static int ins_used = INS_Z80;
+
+int
+md_parse_option (int c, char* arg ATTRIBUTE_UNUSED)
+{
+ switch (c)
+ {
+ default:
+ return 0;
+ case OPTION_MACH_Z80:
+ ins_ok &= ~INS_R800;
+ ins_err |= INS_R800;
+ break;
+ case OPTION_MACH_R800:
+ ins_ok = INS_Z80 | INS_UNDOC | INS_R800;
+ ins_err = INS_UNPORT;
+ break;
+ case OPTION_MACH_IUD:
+ ins_ok |= INS_UNDOC;
+ ins_err &= ~INS_UNDOC;
+ break;
+ case OPTION_MACH_IUP:
+ ins_ok |= INS_UNDOC | INS_UNPORT;
+ ins_err &= ~(INS_UNDOC | INS_UNPORT);
+ break;
+ case OPTION_MACH_WUD:
+ if ((ins_ok & INS_R800) == 0)
+ {
+ ins_ok &= ~(INS_UNDOC|INS_UNPORT);
+ ins_err &= ~INS_UNDOC;
+ }
+ break;
+ case OPTION_MACH_WUP:
+ ins_ok &= ~INS_UNPORT;
+ ins_err &= ~(INS_UNDOC|INS_UNPORT);
+ break;
+ case OPTION_MACH_FUD:
+ if ((ins_ok & INS_R800) == 0)
+ {
+ ins_ok &= (INS_UNDOC | INS_UNPORT);
+ ins_err |= INS_UNDOC | INS_UNPORT;
+ }
+ break;
+ case OPTION_MACH_FUP:
+ ins_ok &= ~INS_UNPORT;
+ ins_err |= INS_UNPORT;
+ break;
+ }
+
+ return 1;
+}
+
+void
+md_show_usage (FILE * f)
+{
+ fprintf (f, "\n\
+CPU model/instruction set options:\n\
+\n\
+ -z80\t\t assemble for Z80\n\
+ -ignore-undocumented-instructions\n\
+ -Wnud\n\
+\tsilently assemble undocumented Z80-instructions that work on R800\n\
+ -ignore-unportable-instructions\n\
+ -Wnup\n\
+\tsilently assemble all undocumented Z80-instructions\n\
+ -warn-undocumented-instructions\n\
+ -Wud\n\
+\tissue warnings for undocumented Z80-instructions that work on R800\n\
+ -warn-unportable-instructions\n\
+ -Wup\n\
+\tissue warnings for other undocumented Z80-instructions\n\
+ -forbid-undocumented-instructions\n\
+ -Fud\n\
+\ttreat all undocumented z80-instructions as errors\n\
+ -forbid-unportable-instructions\n\
+ -Fup\n\
+\ttreat undocumented z80-instructions that do not work on R800 as errors\n\
+ -r800\t assemble for R800\n\n\
+Default: -z80 -ignore-undocument-instructions -warn-unportable-instructions.\n");
+}
+
+static symbolS * zero;
+
+void
+md_begin (void)
+{
+ expressionS nul;
+ char * p;
+
+ p = input_line_pointer;
+ input_line_pointer = "0";
+ nul.X_md=0;
+ expression (& nul);
+ input_line_pointer = p;
+ zero = make_expr_symbol (& nul);
+ /* We do not use relaxation (yet). */
+ linkrelax = 0;
+}
+
+void
+z80_md_end (void)
+{
+ int mach_type;
+
+ if (ins_used & (INS_UNPORT | INS_R800))
+ ins_used |= INS_UNDOC;
+
+ switch (ins_used)
+ {
+ case INS_Z80:
+ mach_type = bfd_mach_z80strict;
+ break;
+ case INS_Z80|INS_UNDOC:
+ mach_type = bfd_mach_z80;
+ break;
+ case INS_Z80|INS_UNDOC|INS_UNPORT:
+ mach_type = bfd_mach_z80full;
+ break;
+ case INS_Z80|INS_UNDOC|INS_R800:
+ mach_type = bfd_mach_r800;
+ break;
+ default:
+ mach_type = 0;
+ }
+
+ bfd_set_arch_mach (stdoutput, TARGET_ARCH, mach_type);
+}
+
+/* Port specific features. */
+const pseudo_typeS md_pseudo_table[] =
+{
+ { "defs", s_space, 1}, /* Synonym for ds on some assemblers. */
+ { "ds", s_space, 1}, /* Fill with bytes rather than words. */
+ { "psect", obj_coff_section, 0}, /* TODO: Translate attributes. */
+ { "set", 0, 0}, /* Real instruction on z80. */
+ { NULL, 0, 0 }
+} ;
+
+static const char *
+skip_space (const char *s)
+{
+ while (*s == ' ' || *s == '\t')
+ ++s;
+ return s;
+}
+
+/* A non-zero return-value causes a continue in the
+ function read_a_source_file () in ../read.c. */
+int
+z80_start_line_hook (void)
+{
+ char *p, quote;
+ char buf[4];
+
+ /* Convert one character constants. */
+ for (p = input_line_pointer; *p && *p != '\n'; ++p)
+ {
+ switch (*p)
+ {
+ case '\'':
+ if (p[1] != 0 && p[1] != '\'' && p[2] == '\'')
+ {
+ snprintf (buf, 4, "%3d", (unsigned char)p[1]);
+ *p++ = buf[0];
+ *p++ = buf[1];
+ *p++ = buf[2];
+ break;
+ }
+ case '"':
+ for (quote = *p++; quote != *p && '\n' != *p; ++p)
+ /* No escapes. */ ;
+ if (quote != *p)
+ {
+ as_bad (_("-- unterminated string"));
+ ignore_rest_of_line ();
+ return 1;
+ }
+ break;
+ }
+ }
+ /* Check for <label>[:] (EQU|DEFL) <value>. */
+ if (is_name_beginner (*input_line_pointer))
+ {
+ char c, *rest, *line_start;
+ int len;
+
+ line_start = input_line_pointer;
+ LISTING_NEWLINE ();
+ if (ignore_input ())
+ return 0;
+
+ c = get_symbol_end ();
+ rest = input_line_pointer + 1;
+
+ if (*rest == ':')
+ ++rest;
+ if (*rest == ' ' || *rest == '\t')
+ ++rest;
+ if (strncasecmp (rest, "EQU", 3) == 0)
+ len = 3;
+ else if (strncasecmp (rest, "DEFL", 4) == 0)
+ len = 4;
+ else
+ len = 0;
+ if (len && (rest[len] == ' ' || rest[len] == '\t'))
+ {
+ /* Handle assignment here. */
+ input_line_pointer = rest + len;
+ if (line_start[-1] == '\n')
+ bump_line_counters ();
+ /* Most Z80 assemblers require the first definition of a
+ label to use "EQU" and redefinitions to have "DEFL".
+ That does not fit the way GNU as deals with labels, so
+ GNU as is more permissive. */
+ equals (line_start, TRUE);
+ return 1;
+ }
+ else
+ {
+ /* Restore line and pointer. */
+ *input_line_pointer = c;
+ input_line_pointer = line_start;
+ }
+ }
+ return 0;
+}
+
+symbolS *
+md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
+{
+ return NULL;
+}
+
+char *
+md_atof (int type ATTRIBUTE_UNUSED, char *litP ATTRIBUTE_UNUSED,
+ int *sizeP ATTRIBUTE_UNUSED)
+{
+ return _("floating point numbers are not implemented");
+}
+
+valueT
+md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size)
+{
+ return size;
+}
+
+long
+md_pcrel_from (fixS * fixp)
+{
+ return fixp->fx_where +
+ fixp->fx_frag->fr_address + 1;
+}
+
+typedef const char * (asfunc)(char, char, const char*);
+
+typedef struct _table_t
+{
+ char* name;
+ char prefix;
+ char opcode;
+ asfunc * fp;
+} table_t;
+
+/* Compares the key for structs that start with a char * to the key. */
+static int
+key_cmp (const void * a, const void * b)
+{
+ const char *str_a, *str_b;
+
+ str_a = *((const char**)a);
+ str_b = *((const char**)b);
+ return strcmp (str_a, str_b);
+}
+
+#define BUFLEN 8 /* Large enough for any keyword. */
+
+char buf[BUFLEN];
+const char *key = buf;
+
+#define R_STACKABLE (0x80)
+#define R_ARITH (0x40)
+#define R_IX (0x20)
+#define R_IY (0x10)
+#define R_INDEX (R_IX | R_IY)
+
+#define REG_A (7)
+#define REG_B (0)
+#define REG_C (1)
+#define REG_D (2)
+#define REG_E (3)
+#define REG_H (4)
+#define REG_L (5)
+#define REG_F (6 | 8)
+#define REG_I (9)
+#define REG_R (10)
+
+#define REG_AF (3 | R_STACKABLE)
+#define REG_BC (0 | R_STACKABLE | R_ARITH)
+#define REG_DE (1 | R_STACKABLE | R_ARITH)
+#define REG_HL (2 | R_STACKABLE | R_ARITH)
+#define REG_SP (3 | R_ARITH)
+
+static const struct reg_entry
+{
+ char* name;
+ int number;
+} regtable[] =
+{
+ {"a", REG_A },
+ {"af", REG_AF },
+ {"b", REG_B },
+ {"bc", REG_BC },
+ {"c", REG_C },
+ {"d", REG_D },
+ {"de", REG_DE },
+ {"e", REG_E },
+ {"f", REG_F },
+ {"h", REG_H },
+ {"hl", REG_HL },
+ {"i", REG_I },
+ {"ix", REG_HL | R_IX },
+ {"ixh",REG_H | R_IX },
+ {"ixl",REG_L | R_IX },
+ {"iy", REG_HL | R_IY },
+ {"iyh",REG_H | R_IY },
+ {"iyl",REG_L | R_IY },
+ {"l", REG_L },
+ {"r", REG_R },
+ {"sp", REG_SP },
+} ;
+
+/* Prevent an error on a line from also generating
+ a "junk at end of line" error message. */
+static char err_flag;
+
+static void
+error (const char * message)
+{
+ as_bad (message);
+ err_flag = 1;
+}
+
+static void
+ill_op (void)
+{
+ error (_("illegal operand"));
+}
+
+static void
+wrong_mach (int ins_type)
+{
+ const char *p;
+
+ switch (ins_type)
+ {
+ case INS_UNDOC:
+ p = "undocumented instruction";
+ break;
+ case INS_UNPORT:
+ p = "instruction does not work on R800";
+ break;
+ case INS_R800:
+ p = "instruction only works R800";
+ break;
+ default:
+ p = 0; /* Not reachables. */
+ }
+
+ if (ins_type & ins_err)
+ error (_(p));
+ else
+ as_warn (_(p));
+}
+
+static void
+check_mach (int ins_type)
+{
+ if ((ins_type & ins_ok) == 0)
+ wrong_mach (ins_type);
+ ins_used |= ins_type;
+}
+
+/* This function tries to subtract two symbols, the generic code does
+ that too, but this function tries harder.
+ The behaviour of this function is not altered by extra
+ fragmentations caused by the code to produce listings. */
+int
+z80_optimize_expr (expressionS *resultP, operatorT left_op,
+ expressionS *right)
+{
+ int res, swap, som;
+ fragS *lfrag, *rfrag, *cur;
+
+ res = 0;
+ if (left_op == O_subtract
+ && right->X_op == O_symbol
+ && resultP->X_op == O_symbol)
+ {
+ lfrag = symbol_get_frag (resultP->X_add_symbol);
+ rfrag = symbol_get_frag (right->X_add_symbol);
+
+ if (S_GET_SEGMENT (right->X_add_symbol) != undefined_section
+ && (S_GET_SEGMENT (right->X_add_symbol)
+ == S_GET_SEGMENT (resultP->X_add_symbol)))
+ {
+ for (swap = 0; (res == 0) && (swap < 2); ++swap)
+ {
+ if (swap)
+ {
+ cur = lfrag;
+ lfrag = rfrag;
+ rfrag = cur;
+ }
+ else
+ cur = rfrag;
+
+ /* Now som == cur->fr_address - rfrag->address, except
+ the latter may not have been computed yet. */
+ for (som = 0; cur && cur != lfrag; cur = cur->fr_next)
+ {
+ if (cur->fr_type == rs_fill) /* Is the size fized? */
+ som += cur->fr_fix+cur->fr_offset*cur->fr_var;
+ else
+ break;
+ }
+
+ if (cur == lfrag)
+ {
+ resultP->X_add_number -= right->X_add_number;
+ resultP->X_add_number
+ += (S_GET_VALUE (resultP->X_add_symbol)
+ - S_GET_VALUE (right->X_add_symbol));
+ som -= lfrag->fr_address - rfrag->fr_address;
+ /* Correct the result if the fr_address
+ fields are not computed yet. */
+ resultP->X_add_number += (swap ? -som : som);
+ resultP->X_op = O_constant;
+ resultP->X_add_symbol = 0;
+ res = 1;
+ }
+ }
+ }
+ }
+ return res;
+}
+
+/* Check whether an expression is indirect. */
+static int
+is_indir (const char *s)
+{
+ char quote;
+ const char *p;
+ int indir, depth;
+
+ /* Indirection is indicated with parentheses. */
+ indir = (*s == '(');
+
+ for (p = s, depth = 0; *p && *p != ','; ++p)
+ {
+ switch (*p)
+ {
+ case '"':
+ case '\'':
+ for (quote = *p++; quote != *p && *p != '\n'; ++p)
+ if (*p == '\\' && p[1])
+ ++p;
+ break;
+ case '(':
+ ++ depth;
+ break;
+ case ')':
+ -- depth;
+ if (depth == 0)
+ {
+ p = skip_space (p + 1);
+ if (*p && *p != ',')
+ indir = 0;
+ --p;
+ }
+ if (depth < 0)
+ error (_("mismatched parentheses"));
+ break;
+ }
+ }
+
+ if (depth != 0)
+ error (_("mismatched parentheses"));
+
+ return indir;
+}
+
+/* Parse general expression. */
+static const char *
+parse_exp2 (const char *s, expressionS *op, segT *pseg)
+{
+ const char *p;
+ int indir;
+ int i;
+ const struct reg_entry * regp;
+ expressionS offset;
+
+ p = skip_space (s);
+ op->X_md = indir = is_indir (p);
+ if (indir)
+ p = skip_space (p + 1);
+
+ for (i = 0; i < BUFLEN; ++i)
+ {
+ if (!ISALPHA (p[i])) /* Register names consist of letters only. */
+ break;
+ buf[i] = TOLOWER (p[i]);
+ }
+
+ if ((i < BUFLEN) && ((p[i] == 0) || (strchr (")+-, \t", p[i]))))
+ {
+ buf[i] = 0;
+ regp = bsearch (& key, regtable, ARRAY_SIZE (regtable),
+ sizeof (regtable[0]), key_cmp);
+ if (regp)
+ {
+ *pseg = reg_section;
+ op->X_add_symbol = op->X_op_symbol = 0;
+ op->X_add_number = regp->number;
+ op->X_op = O_register;
+ p += strlen (regp->name);
+ p = skip_space (p);
+ if (indir)
+ {
+ if (*p == ')')
+ ++p;
+ if ((regp->number & R_INDEX) && (regp->number & R_ARITH))
+ {
+ op->X_op = O_md1;
+
+ if ((*p == '+') || (*p == '-'))
+ {
+ input_line_pointer = (char*) p;
+ expression (& offset);
+ p = skip_space (input_line_pointer);
+ if (*p != ')')
+ error (_("bad offset expression syntax"));
+ else
+ ++ p;
+ op->X_add_symbol = make_expr_symbol (& offset);
+ return p;
+ }
+
+ /* We treat (i[xy]) as (i[xy]+0), which is how it will
+ end up anyway, unless we're processing jp (i[xy]). */
+ op->X_add_symbol = zero;
+ }
+ }
+ p = skip_space (p);
+
+ if ((*p == 0) || (*p == ','))
+ return p;
+ }
+ }
+ /* Not an argument involving a register; use the generic parser. */
+ input_line_pointer = (char*) s ;
+ *pseg = expression (op);
+ if (op->X_op == O_absent)
+ error (_("missing operand"));
+ if (op->X_op == O_illegal)
+ error (_("bad expression syntax"));
+ return input_line_pointer;
+}
+
+static const char *
+parse_exp (const char *s, expressionS *op)
+{
+ segT dummy;
+ return parse_exp2 (s, op, & dummy);
+}
+
+/* Condition codes, including some synonyms provided by HiTech zas. */
+static const struct reg_entry cc_tab[] =
+{
+ { "age", 6 << 3 },
+ { "alt", 7 << 3 },
+ { "c", 3 << 3 },
+ { "di", 4 << 3 },
+ { "ei", 5 << 3 },
+ { "lge", 2 << 3 },
+ { "llt", 3 << 3 },
+ { "m", 7 << 3 },
+ { "nc", 2 << 3 },
+ { "nz", 0 << 3 },
+ { "p", 6 << 3 },
+ { "pe", 5 << 3 },
+ { "po", 4 << 3 },
+ { "z", 1 << 3 },
+} ;
+
+/* Parse condition code. */
+static const char *
+parse_cc (const char *s, char * op)
+{
+ const char *p;
+ int i;
+ struct reg_entry * cc_p;
+
+ for (i = 0; i < BUFLEN; ++i)
+ {
+ if (!ISALPHA (s[i])) /* Condition codes consist of letters only. */
+ break;
+ buf[i] = TOLOWER (s[i]);
+ }
+
+ if ((i < BUFLEN)
+ && ((s[i] == 0) || (s[i] == ',')))
+ {
+ buf[i] = 0;
+ cc_p = bsearch (&key, cc_tab, ARRAY_SIZE (cc_tab),
+ sizeof (cc_tab[0]), key_cmp);
+ }
+ else
+ cc_p = NULL;
+
+ if (cc_p)
+ {
+ *op = cc_p->number;
+ p = s + i;
+ }
+ else
+ p = NULL;
+
+ return p;
+}
+
+static const char *
+emit_insn (char prefix, char opcode, const char * args)
+{
+ char *p;
+
+ if (prefix)
+ {
+ p = frag_more (2);
+ *p++ = prefix;
+ }
+ else
+ p = frag_more (1);
+ *p = opcode;
+ return args;
+}
+
+static void
+emit_byte (expressionS * val, bfd_reloc_code_real_type r_type)
+{
+ char *p;
+ int lo, hi;
+ fixS * fixp;
+
+ p = frag_more (1);
+ *p = val->X_add_number;
+ if ((r_type != BFD_RELOC_8_PCREL) && (val->X_op == O_constant))
+ {
+ lo = -128;
+ hi = (BFD_RELOC_8 == r_type) ? 255 : 127;
+
+ if ((val->X_add_number < lo) || (val->X_add_number > hi))
+ {
+ if (r_type == BFD_RELOC_Z80_DISP8)
+ as_bad (_("offset too large"));
+ else
+ as_warn (_("overflow"));
+ }
+ }
+ else
+ {
+ fixp = fix_new_exp (frag_now, p - frag_now->fr_literal, 1, val,
+ (r_type == BFD_RELOC_8_PCREL) ? TRUE : FALSE, r_type);
+ /* FIXME : Process constant offsets immediately. */
+ }
+}
+
+static void
+emit_word (expressionS * val)
+{
+ char *p;
+
+ p = frag_more (2);
+ if ( (val->X_op == O_register)
+ || (val->X_op == O_md1))
+ ill_op ();
+ else
+ {
+ *p = val->X_add_number;
+ p[1] = (val->X_add_number>>8);
+ if (val->X_op != O_constant)
+ fix_new_exp (frag_now, p - frag_now->fr_literal, 2,
+ val, FALSE, BFD_RELOC_16);
+ }
+}
+
+static void
+emit_mx (char prefix, char opcode, int shift, expressionS * arg)
+ /* The operand m may be r, (hl), (ix+d), (iy+d),
+ if 0 == prefix m may also be ixl, ixh, iyl, iyh. */
+{
+ char *q;
+ int rnum;
+
+ rnum = arg->X_add_number;
+ switch (arg->X_op)
+ {
+ case O_register:
+ if (arg->X_md)
+ {
+ if (rnum != REG_HL)
+ {
+ ill_op ();
+ break;
+ }
+ else
+ rnum = 6;
+ }
+ else
+ {
+ if ((prefix == 0) && (rnum & R_INDEX))
+ {
+ prefix = (rnum & R_IX) ? 0xDD : 0xFD;
+ check_mach (INS_UNDOC);
+ rnum &= ~R_INDEX;
+ }
+ if (rnum > 7)
+ {
+ ill_op ();
+ break;
+ }
+ }
+ q = frag_more (prefix ? 2 : 1);
+ if (prefix)
+ * q ++ = prefix;
+ * q ++ = opcode + (rnum << shift);
+ break;
+ case O_md1:
+ q = frag_more (2);
+ *q++ = (rnum & R_IX) ? 0xDD : 0xFD;
+ *q = (prefix) ? prefix : (opcode + (6 << shift));
+ emit_byte (symbol_get_value_expression (arg->X_add_symbol),
+ BFD_RELOC_Z80_DISP8);
+ if (prefix)
+ {
+ q = frag_more (1);
+ *q = opcode+(6<<shift);
+ }
+ break;
+ default:
+ abort ();
+ }
+}
+
+/* The operand m may be r, (hl), (ix+d), (iy+d),
+ if 0 = prefix m may also be ixl, ixh, iyl, iyh. */
+static const char *
+emit_m (char prefix, char opcode, const char *args)
+{
+ expressionS arg_m;
+ const char *p;
+
+ p = parse_exp (args, &arg_m);
+ switch (arg_m.X_op)
+ {
+ case O_md1:
+ case O_register:
+ emit_mx (prefix, opcode, 0, &arg_m);
+ break;
+ default:
+ ill_op ();
+ }
+ return p;
+}
+
+/* The operand m may be as above or one of the undocumented
+ combinations (ix+d),r and (iy+d),r (if unportable instructions
+ are allowed). */
+static const char *
+emit_mr (char prefix, char opcode, const char *args)
+{
+ expressionS arg_m, arg_r;
+ const char *p;
+
+ p = parse_exp (args, & arg_m);
+
+ switch (arg_m.X_op)
+ {
+ case O_md1:
+ if (*p == ',')
+ {
+ p = parse_exp (p + 1, & arg_r);
+
+ if ((arg_r.X_md == 0)
+ && (arg_r.X_op == O_register)
+ && (arg_r.X_add_number < 8))
+ opcode += arg_r.X_add_number-6; /* Emit_mx () will add 6. */
+ else
+ {
+ ill_op ();
+ break;
+ }
+ check_mach (INS_UNPORT);
+ }
+ case O_register:
+ emit_mx (prefix, opcode, 0, & arg_m);
+ break;
+ default:
+ ill_op ();
+ }
+ return p;
+}
+
+static void
+emit_sx (char prefix, char opcode, expressionS * arg_p)
+{
+ char *q;
+
+ switch (arg_p->X_op)
+ {
+ case O_register:
+ case O_md1:
+ emit_mx (prefix, opcode, 0, arg_p);
+ break;
+ default:
+ if (arg_p->X_md)
+ ill_op ();
+ else
+ {
+ q = frag_more (prefix ? 2 : 1);
+ if (prefix)
+ *q++ = prefix;
+ *q = opcode ^ 0x46;
+ emit_byte (arg_p, BFD_RELOC_8);
+ }
+ }
+}
+
+/* The operand s may be r, (hl), (ix+d), (iy+d), n. */
+static const char *
+emit_s (char prefix, char opcode, const char *args)
+{
+ expressionS arg_s;
+ const char *p;
+
+ p = parse_exp (args, & arg_s);
+ emit_sx (prefix, opcode, & arg_s);
+ return p;
+}
+
+static const char *
+emit_call (char prefix ATTRIBUTE_UNUSED, char opcode, const char * args)
+{
+ expressionS addr;
+ const char *p; char *q;
+
+ p = parse_exp (args, &addr);
+ if (addr.X_md)
+ ill_op ();
+ else
+ {
+ q = frag_more (1);
+ *q = opcode;
+ emit_word (& addr);
+ }
+ return p;
+}
+
+/* Operand may be rr, r, (hl), (ix+d), (iy+d). */
+static const char *
+emit_incdec (char prefix, char opcode, const char * args)
+{
+ expressionS operand;
+ int rnum;
+ const char *p; char *q;
+
+ p = parse_exp (args, &operand);
+ rnum = operand.X_add_number;
+ if ((! operand.X_md)
+ && (operand.X_op == O_register)
+ && (R_ARITH&rnum))
+ {
+ q = frag_more ((rnum & R_INDEX) ? 2 : 1);
+ if (rnum & R_INDEX)
+ *q++ = (rnum & R_IX) ? 0xDD : 0xFD;
+ *q = prefix + ((rnum & 3) << 4);
+ }
+ else
+ {
+ if ((operand.X_op == O_md1) || (operand.X_op == O_register))
+ emit_mx (0, opcode, 3, & operand);
+ else
+ ill_op ();
+ }
+ return p;
+}
+
+static const char *
+emit_jr (char prefix ATTRIBUTE_UNUSED, char opcode, const char * args)
+{
+ expressionS addr;
+ const char *p;
+ char *q;
+
+ p = parse_exp (args, &addr);
+ if (addr.X_md)
+ ill_op ();
+ else
+ {
+ q = frag_more (1);
+ *q = opcode;
+ emit_byte (&addr, BFD_RELOC_8_PCREL);
+ }
+ return p;
+}
+
+static const char *
+emit_jp (char prefix, char opcode, const char * args)
+{
+ expressionS addr;
+ const char *p;
+ char *q;
+ int rnum;
+
+ p = parse_exp (args, & addr);
+ if (addr.X_md)
+ {
+ rnum = addr.X_add_number;
+ if ((addr.X_op == O_register && (rnum & ~R_INDEX) == REG_HL)
+ /* An operand (i[xy]) would have been rewritten to (i[xy]+0)
+ in parse_exp (). */
+ || (addr.X_op == O_md1 && addr.X_add_symbol == zero))
+ {
+ q = frag_more ((rnum & R_INDEX) ? 2 : 1);
+ if (rnum & R_INDEX)
+ *q++ = (rnum & R_IX) ? 0xDD : 0xFD;
+ *q = prefix;
+ }
+ else
+ ill_op ();
+ }
+ else
+ {
+ q = frag_more (1);
+ *q = opcode;
+ emit_word (& addr);
+ }
+ return p;
+}
+
+static const char *
+emit_im (char prefix, char opcode, const char * args)
+{
+ expressionS mode;
+ const char *p;
+ char *q;
+
+ p = parse_exp (args, & mode);
+ if (mode.X_md || (mode.X_op != O_constant))
+ ill_op ();
+ else
+ switch (mode.X_add_number)
+ {
+ case 1:
+ case 2:
+ ++mode.X_add_number;
+ /* Fall through. */
+ case 0:
+ q = frag_more (2);
+ *q++ = prefix;
+ *q = opcode + 8*mode.X_add_number;
+ break;
+ default:
+ ill_op ();
+ }
+ return p;
+}
+
+static const char *
+emit_pop (char prefix ATTRIBUTE_UNUSED, char opcode, const char * args)
+{
+ expressionS regp;
+ const char *p;
+ char *q;
+
+ p = parse_exp (args, & regp);
+ if ((!regp.X_md)
+ && (regp.X_op == O_register)
+ && (regp.X_add_number & R_STACKABLE))
+ {
+ int rnum;
+
+ rnum = regp.X_add_number;
+ if (rnum&R_INDEX)
+ {
+ q = frag_more (2);
+ *q++ = (rnum&R_IX)?0xDD:0xFD;
+ }
+ else
+ q = frag_more (1);
+ *q = opcode + ((rnum & 3) << 4);
+ }
+ else
+ ill_op ();
+
+ return p;
+}
+
+static const char *
+emit_retcc (char prefix ATTRIBUTE_UNUSED, char opcode, const char * args)
+{
+ char cc, *q;
+ const char *p;
+
+ p = parse_cc (args, &cc);
+ q = frag_more (1);
+ if (p)
+ *q = opcode + cc;
+ else
+ *q = prefix;
+ return p ? p : args;
+}
+
+static const char *
+emit_adc (char prefix, char opcode, const char * args)
+{
+ expressionS term;
+ int rnum;
+ const char *p;
+ char *q;
+
+ p = parse_exp (args, &term);
+ if (*p++ != ',')
+ {
+ error (_("bad intruction syntax"));
+ return p;
+ }
+
+ if ((term.X_md) || (term.X_op != O_register))
+ ill_op ();
+ else
+ switch (term.X_add_number)
+ {
+ case REG_A:
+ p = emit_s (0, prefix, p);
+ break;
+ case REG_HL:
+ p = parse_exp (p, &term);
+ if ((!term.X_md) && (term.X_op == O_register))
+ {
+ rnum = term.X_add_number;
+ if (R_ARITH == (rnum & (R_ARITH | R_INDEX)))
+ {
+ q = frag_more (2);
+ *q++ = 0xED;
+ *q = opcode + ((rnum & 3) << 4);
+ break;
+ }
+ }
+ /* Fall through. */
+ default:
+ ill_op ();
+ }
+ return p;
+}
+
+static const char *
+emit_add (char prefix, char opcode, const char * args)
+{
+ expressionS term;
+ int lhs, rhs;
+ const char *p;
+ char *q;
+
+ p = parse_exp (args, &term);
+ if (*p++ != ',')
+ {
+ error (_("bad intruction syntax"));
+ return p;
+ }
+
+ if ((term.X_md) || (term.X_op != O_register))
+ ill_op ();
+ else
+ switch (term.X_add_number & ~R_INDEX)
+ {
+ case REG_A:
+ p = emit_s (0, prefix, p);
+ break;
+ case REG_HL:
+ lhs = term.X_add_number;
+ p = parse_exp (p, &term);
+ if ((!term.X_md) && (term.X_op == O_register))
+ {
+ rhs = term.X_add_number;
+ if ((rhs & R_ARITH)
+ && ((rhs == lhs) || ((rhs & ~R_INDEX) != REG_HL)))
+ {
+ q = frag_more ((lhs & R_INDEX) ? 2 : 1);
+ if (lhs & R_INDEX)
+ *q++ = (lhs & R_IX) ? 0xDD : 0xFD;
+ *q = opcode + ((rhs & 3) << 4);
+ break;
+ }
+ }
+ /* Fall through. */
+ default:
+ ill_op ();
+ }
+ return p;
+}
+
+static const char *
+emit_bit (char prefix, char opcode, const char * args)
+{
+ expressionS b;
+ int bn;
+ const char *p;
+
+ p = parse_exp (args, &b);
+ if (*p++ != ',')
+ error (_("bad intruction syntax"));
+
+ bn = b.X_add_number;
+ if ((!b.X_md)
+ && (b.X_op == O_constant)
+ && (0 <= bn)
+ && (bn < 8))
+ {
+ if (opcode == 0x40)
+ /* Bit : no optional third operand. */
+ p = emit_m (prefix, opcode + (bn << 3), p);
+ else
+ /* Set, res : resulting byte can be copied to register. */
+ p = emit_mr (prefix, opcode + (bn << 3), p);
+ }
+ else
+ ill_op ();
+ return p;
+}
+
+static const char *
+emit_jpcc (char prefix, char opcode, const char * args)
+{
+ char cc;
+ const char *p;
+
+ p = parse_cc (args, & cc);
+ if (p && *p++ == ',')
+ p = emit_call (0, opcode + cc, p);
+ else
+ p = (prefix == (char)0xC3)
+ ? emit_jp (0xE9, prefix, args)
+ : emit_call (0, prefix, args);
+ return p;
+}
+
+static const char *
+emit_jrcc (char prefix, char opcode, const char * args)
+{
+ char cc;
+ const char *p;
+
+ p = parse_cc (args, &cc);
+ if (p && *p++ == ',')
+ {
+ if (cc > (3 << 3))
+ error (_("condition code invalid for jr"));
+ else
+ p = emit_jr (0, opcode + cc, p);
+ }
+ else
+ p = emit_jr (0, prefix, args);
+
+ return p;
+}
+
+static const char *
+emit_ex (char prefix_in ATTRIBUTE_UNUSED,
+ char opcode_in ATTRIBUTE_UNUSED, const char * args)
+{
+ expressionS op;
+ const char * p;
+ char prefix, opcode;
+
+ p = parse_exp (args, &op);
+ p = skip_space (p);
+ if (*p++ != ',')
+ {
+ error (_("bad instruction syntax"));
+ return p;
+ }
+
+ prefix = opcode = 0;
+ if (op.X_op == O_register)
+ switch (op.X_add_number | (op.X_md ? 0x8000 : 0))
+ {
+ case REG_AF:
+ if (TOLOWER (*p++) == 'a' && TOLOWER (*p++) == 'f')
+ {
+ /* The scrubber changes '\'' to '`' in this context. */
+ if (*p == '`')
+ ++p;
+ opcode = 0x08;
+ }
+ break;
+ case REG_DE:
+ if (TOLOWER (*p++) == 'h' && TOLOWER (*p++) == 'l')
+ opcode = 0xEB;
+ break;
+ case REG_SP|0x8000:
+ p = parse_exp (p, & op);
+ if (op.X_op == O_register
+ && op.X_md == 0
+ && (op.X_add_number & ~R_INDEX) == REG_HL)
+ {
+ opcode = 0xE3;
+ if (R_INDEX & op.X_add_number)
+ prefix = (R_IX & op.X_add_number) ? 0xDD : 0xFD;
+ }
+ break;
+ }
+ if (opcode)
+ emit_insn (prefix, opcode, p);
+ else
+ ill_op ();
+
+ return p;
+}
+
+static const char *
+emit_in (char prefix ATTRIBUTE_UNUSED, char opcode ATTRIBUTE_UNUSED,
+ const char * args)
+{
+ expressionS reg, port;
+ const char *p;
+ char *q;
+
+ p = parse_exp (args, &reg);
+ if (*p++ != ',')
+ {
+ error (_("bad intruction syntax"));
+ return p;
+ }
+
+ p = parse_exp (p, &port);
+ if (reg.X_md == 0
+ && reg.X_op == O_register
+ && (reg.X_add_number <= 7 || reg.X_add_number == REG_F)
+ && (port.X_md))
+ {
+ if (port.X_op != O_md1 && port.X_op != O_register)
+ {
+ if (REG_A == reg.X_add_number)
+ {
+ q = frag_more (1);
+ *q = 0xDB;
+ emit_byte (&port, BFD_RELOC_8);
+ }
+ else
+ ill_op ();
+ }
+ else
+ {
+ if (port.X_add_number == REG_C)
+ {
+ if (reg.X_add_number == REG_F)
+ check_mach (INS_UNDOC);
+ else
+ {
+ q = frag_more (2);
+ *q++ = 0xED;
+ *q = 0x40|((reg.X_add_number&7)<<3);
+ }
+ }
+ else
+ ill_op ();
+ }
+ }
+ else
+ ill_op ();
+ return p;
+}
+
+static const char *
+emit_out (char prefix ATTRIBUTE_UNUSED, char opcode ATTRIBUTE_UNUSED,
+ const char * args)
+{
+ expressionS reg, port;
+ const char *p;
+ char *q;
+
+ p = parse_exp (args, & port);
+ if (*p++ != ',')
+ {
+ error (_("bad intruction syntax"));
+ return p;
+ }
+ p = parse_exp (p, &reg);
+ if (!port.X_md)
+ { ill_op (); return p; }
+ /* Allow "out (c), 0" as unportable instruction. */
+ if (reg.X_op == O_constant && reg.X_add_number == 0)
+ {
+ check_mach (INS_UNPORT);
+ reg.X_op = O_register;
+ reg.X_add_number = 6;
+ }
+ if (reg.X_md
+ || reg.X_op != O_register
+ || reg.X_add_number > 7)
+ ill_op ();
+ else
+ if (port.X_op != O_register && port.X_op != O_md1)
+ {
+ if (REG_A == reg.X_add_number)
+ {
+ q = frag_more (1);
+ *q = 0xD3;
+ emit_byte (&port, BFD_RELOC_8);
+ }
+ else
+ ill_op ();
+ }
+ else
+ {
+ if (REG_C == port.X_add_number)
+ {
+ q = frag_more (2);
+ *q++ = 0xED;
+ *q = 0x41 | (reg.X_add_number << 3);
+ }
+ else
+ ill_op ();
+ }
+ return p;
+}
+
+static const char *
+emit_rst (char prefix ATTRIBUTE_UNUSED, char opcode, const char * args)
+{
+ expressionS addr;
+ const char *p;
+ char *q;
+
+ p = parse_exp (args, &addr);
+ if (addr.X_op != O_constant)
+ {
+ error ("rst needs constant address");
+ return p;
+ }
+
+ if (addr.X_add_number & ~(7 << 3))
+ ill_op ();
+ else
+ {
+ q = frag_more (1);
+ *q = opcode + (addr.X_add_number & (7 << 3));
+ }
+ return p;
+}
+
+static void
+emit_ldxhl (char prefix, char opcode, expressionS *src, expressionS *d)
+{
+ char *q;
+
+ if (src->X_md)
+ ill_op ();
+ else
+ {
+ if (src->X_op == O_register)
+ {
+ if (src->X_add_number>7)
+ ill_op ();
+ if (prefix)
+ {
+ q = frag_more (2);
+ *q++ = prefix;
+ }
+ else
+ q = frag_more (1);
+ *q = opcode + src->X_add_number;
+ if (d)
+ emit_byte (d, BFD_RELOC_Z80_DISP8);
+ }
+ else
+ {
+ if (prefix)
+ {
+ q = frag_more (2);
+ *q++ = prefix;
+ }
+ else
+ q = frag_more (1);
+ *q = opcode^0x46;
+ if (d)
+ emit_byte (d, BFD_RELOC_Z80_DISP8);
+ emit_byte (src, BFD_RELOC_8);
+ }
+ }
+}
+
+static void
+emit_ldreg (int dest, expressionS * src)
+{
+ char *q;
+ int rnum;
+
+ switch (dest)
+ {
+ /* 8 Bit ld group: */
+ case REG_I:
+ case REG_R:
+ if (src->X_md == 0 && src->X_op == O_register && src->X_add_number == REG_A)
+ {
+ q = frag_more (2);
+ *q++ = 0xED;
+ *q = (dest == REG_I) ? 0x47 : 0x4F;
+ }
+ else
+ ill_op ();
+ break;
+
+ case REG_A:
+ if ((src->X_md) && src->X_op != O_register && src->X_op != O_md1)
+ {
+ q = frag_more (1);
+ *q = 0x3A;
+ emit_word (src);
+ break;
+ }
+
+ if ((src->X_md)
+ && src->X_op == O_register
+ && (src->X_add_number == REG_BC || src->X_add_number == REG_DE))
+ {
+ q = frag_more (1);
+ *q = 0x0A + ((dest & 1) << 4);
+ break;
+ }
+
+ if ((!src->X_md)
+ && src->X_op == O_register
+ && (src->X_add_number == REG_R || src->X_add_number == REG_I))
+ {
+ q = frag_more (2);
+ *q++ = 0xED;
+ *q = (src->X_add_number == REG_I) ? 0x57 : 0x5F;
+ break;
+ }
+ /* Fall through. */
+ case REG_B:
+ case REG_C:
+ case REG_D:
+ case REG_E:
+ emit_sx (0, 0x40 + (dest << 3), src);
+ break;
+
+ case REG_H:
+ case REG_L:
+ if ((src->X_md == 0)
+ && (src->X_op == O_register)
+ && (src->X_add_number & R_INDEX))
+ ill_op ();
+ else
+ emit_sx (0, 0x40 + (dest << 3), src);
+ break;
+
+ case R_IX | REG_H:
+ case R_IX | REG_L:
+ case R_IY | REG_H:
+ case R_IY | REG_L:
+ if (src->X_md)
+ {
+ ill_op ();
+ break;
+ }
+ check_mach (INS_UNDOC);
+ if (src-> X_op == O_register)
+ {
+ rnum = src->X_add_number;
+ if ((rnum & ~R_INDEX) < 8
+ && ((rnum & R_INDEX) == (dest & R_INDEX)
+ || ( (rnum & ~R_INDEX) != REG_H
+ && (rnum & ~R_INDEX) != REG_L)))
+ {
+ q = frag_more (2);
+ *q++ = (dest & R_IX) ? 0xDD : 0xFD;
+ *q = 0x40 + ((dest & 0x07) << 3) + (rnum & 7);
+ }
+ else
+ ill_op ();
+ }
+ else
+ {
+ q = frag_more (2);
+ *q++ = (dest & R_IX) ? 0xDD : 0xFD;
+ *q = 0x06 + ((dest & 0x07) << 3);
+ emit_byte (src, BFD_RELOC_8);
+ }
+ break;
+
+ /* 16 Bit ld group: */
+ case REG_SP:
+ if (src->X_md == 0
+ && src->X_op == O_register
+ && REG_HL == (src->X_add_number &~ R_INDEX))
+ {
+ q = frag_more ((src->X_add_number & R_INDEX) ? 2 : 1);
+ if (src->X_add_number & R_INDEX)
+ *q++ = (src->X_add_number & R_IX) ? 0xDD : 0xFD;
+ *q = 0xF9;
+ break;
+ }
+ /* Fall through. */
+ case REG_BC:
+ case REG_DE:
+ if (src->X_op == O_register || src->X_op != O_md1)
+ ill_op ();
+ q = frag_more (src->X_md ? 2 : 1);
+ if (src->X_md)
+ {
+ *q++ = 0xED;
+ *q = 0x4B + ((dest & 3) << 4);
+ }
+ else
+ *q = 0x01 + ((dest & 3) << 4);
+ emit_word (src);
+ break;
+
+ case REG_HL:
+ case REG_HL | R_IX:
+ case REG_HL | R_IY:
+ if (src->X_op == O_register || src->X_op == O_md1)
+ ill_op ();
+ q = frag_more ((dest & R_INDEX) ? 2 : 1);
+ if (dest & R_INDEX)
+ * q ++ = (dest & R_IX) ? 0xDD : 0xFD;
+ *q = (src->X_md) ? 0x2A : 0x21;
+ emit_word (src);
+ break;
+
+ case REG_AF:
+ case REG_F:
+ ill_op ();
+ break;
+
+ default:
+ abort ();
+ }
+}
+
+static const char *
+emit_ld (char prefix_in ATTRIBUTE_UNUSED, char opcode_in ATTRIBUTE_UNUSED,
+ const char * args)
+{
+ expressionS dst, src;
+ const char *p;
+ char *q;
+ char prefix, opcode;
+
+ p = parse_exp (args, &dst);
+ if (*p++ != ',')
+ error (_("bad intruction syntax"));
+ p = parse_exp (p, &src);
+
+ switch (dst.X_op)
+ {
+ case O_md1:
+ emit_ldxhl ((dst.X_add_number & R_IX) ? 0xDD : 0xFD, 0x70,
+ &src, symbol_get_value_expression (dst.X_add_symbol));
+ break;
+
+ case O_register:
+ if (dst.X_md)
+ {
+ switch (dst.X_add_number)
+ {
+ case REG_BC:
+ case REG_DE:
+ if (src.X_md == 0 && src.X_op == O_register && src.X_add_number == REG_A)
+ {
+ q = frag_more (1);
+ *q = 0x02 + ( (dst.X_add_number & 1) << 4);
+ }
+ else
+ ill_op ();
+ break;
+ case REG_HL:
+ emit_ldxhl (0, 0x70, &src, NULL);
+ break;
+ default:
+ ill_op ();
+ }
+ }
+ else
+ emit_ldreg (dst.X_add_number, &src);
+ break;
+
+ default:
+ if (src.X_md != 0 || src.X_op != O_register)
+ ill_op ();
+ prefix = opcode = 0;
+ switch (src.X_add_number)
+ {
+ case REG_A:
+ opcode = 0x32; break;
+ case REG_BC: case REG_DE: case REG_SP:
+ prefix = 0xED; opcode = 0x43 + ((src.X_add_number&3)<<4); break;
+ case REG_HL:
+ opcode = 0x22; break;
+ case REG_HL|R_IX:
+ prefix = 0xDD; opcode = 0x22; break;
+ case REG_HL|R_IY:
+ prefix = 0xFD; opcode = 0x22; break;
+ }
+ if (opcode)
+ {
+ q = frag_more (prefix?2:1);
+ if (prefix)
+ *q++ = prefix;
+ *q = opcode;
+ emit_word (&dst);
+ }
+ else
+ ill_op ();
+ }
+ return p;
+}
+
+static const char *
+emit_data (char prefix ATTRIBUTE_UNUSED, char opcode, const char * args)
+{
+ const char *p, *q;
+ char *u, quote;
+ int cnt;
+ expressionS exp;
+
+ p = skip_space (args);
+ if (!*p)
+ error (_("missing operand"));
+
+ while (*p)
+ {
+ if (*p == '\"' || *p == '\'')
+ {
+ if (opcode == 1)
+ {
+ for (quote = *p, q = ++p, cnt = 0; *p && quote != *p; ++p, ++cnt)
+ ;
+ u = frag_more (cnt);
+ memcpy (u, q, cnt);
+ if (!*p)
+ as_warn (_("unterminated string"));
+ else
+ p = skip_space (p+1);
+ }
+ else
+ {
+ ill_op ();
+ break;
+ }
+ }
+ else
+ {
+ p = parse_exp (p, &exp);
+ if (exp.X_op == O_md1 || exp.X_op == O_register)
+ {
+ ill_op ();
+ break;
+ }
+ if (exp.X_md)
+ as_warn (_("parentheses ignored"));
+ if (opcode == 1)
+ emit_byte (&exp, BFD_RELOC_8);
+ else
+ emit_word (&exp);
+ p = skip_space (p);
+ }
+ if (*p)
+ {
+ if (*p != ',')
+ as_warn (_("missing ','"));
+ else
+ ++p;
+ }
+ }
+ return p;
+}
+
+static const char *
+emit_mulub (char prefix ATTRIBUTE_UNUSED, char opcode, const char * args)
+{
+ const char *p;
+
+ p = skip_space (args);
+ if (TOLOWER (*p++) != 'a' || *p++ != ',')
+ ill_op ();
+ else
+ {
+ char *q, reg;
+
+ reg = TOLOWER (*p++);
+ switch (reg)
+ {
+ case 'b':
+ case 'c':
+ case 'd':
+ case 'e':
+ check_mach (INS_R800);
+ if (!*skip_space (p))
+ {
+ q = frag_more (2);
+ *q++ = prefix;
+ *q = opcode + ((reg - 'b') << 3);
+ break;
+ }
+ default:
+ ill_op ();
+ }
+ }
+ return p;
+}
+
+static const char *
+emit_muluw (char prefix ATTRIBUTE_UNUSED, char opcode, const char * args)
+{
+ const char *p;
+
+ p = skip_space (args);
+ if (TOLOWER (*p++) != 'h' || TOLOWER (*p++) != 'l' || *p++ != ',')
+ ill_op ();
+ else
+ {
+ expressionS reg;
+ char *q;
+
+ p = parse_exp (p, & reg);
+
+ if ((!reg.X_md) && reg.X_op == O_register)
+ switch (reg.X_add_number)
+ {
+ case REG_BC:
+ case REG_SP:
+ check_mach (INS_R800);
+ q = frag_more (2);
+ *q++ = prefix;
+ *q = opcode + ((reg.X_add_number & 3) << 4);
+ break;
+ default:
+ ill_op ();
+ }
+ }
+ return p;
+}
+
+static table_t instab[] =
+{
+ { "adc", 0x88, 0x4A, emit_adc },
+ { "add", 0x80, 0x09, emit_add },
+ { "and", 0x00, 0xA0, emit_s },
+ { "bit", 0xCB, 0x40, emit_bit },
+ { "call", 0xCD, 0xC4, emit_jpcc },
+ { "ccf", 0x00, 0x3F, emit_insn },
+ { "cp", 0x00, 0xB8, emit_s },
+ { "cpd", 0xED, 0xA9, emit_insn },
+ { "cpdr", 0xED, 0xB9, emit_insn },
+ { "cpi", 0xED, 0xA1, emit_insn },
+ { "cpir", 0xED, 0xB1, emit_insn },
+ { "cpl", 0x00, 0x2F, emit_insn },
+ { "daa", 0x00, 0x27, emit_insn },
+ { "db", 0x00, 0x01, emit_data },
+ { "dec", 0x0B, 0x05, emit_incdec },
+ { "defb", 0x00, 0x01, emit_data },
+ { "defw", 0x00, 0x02, emit_data },
+ { "di", 0x00, 0xF3, emit_insn },
+ { "djnz", 0x00, 0x10, emit_jr },
+ { "dw", 0x00, 0x02, emit_data },
+ { "ei", 0x00, 0xFB, emit_insn },
+ { "ex", 0x00, 0x00, emit_ex},
+ { "exx", 0x00, 0xD9, emit_insn },
+ { "halt", 0x00, 0x76, emit_insn },
+ { "im", 0xED, 0x46, emit_im },
+ { "in", 0x00, 0x00, emit_in },
+ { "inc", 0x03, 0x04, emit_incdec },
+ { "ind", 0xED, 0xAA, emit_insn },
+ { "indr", 0xED, 0xBA, emit_insn },
+ { "ini", 0xED, 0xA2, emit_insn },
+ { "inir", 0xED, 0xB2, emit_insn },
+ { "jp", 0xC3, 0xC2, emit_jpcc },
+ { "jr", 0x18, 0x20, emit_jrcc },
+ { "ld", 0x00, 0x00, emit_ld },
+ { "ldd", 0xED, 0xA8, emit_insn },
+ { "lddr", 0xED, 0xB8, emit_insn },
+ { "ldi", 0xED, 0xA0, emit_insn },
+ { "ldir", 0xED, 0xB0, emit_insn },
+ { "mulub", 0xED, 0xC5, emit_mulub }, /* R800 only. */
+ { "muluw", 0xED, 0xC3, emit_muluw }, /* R800 only. */
+ { "neg", 0xed, 0x44, emit_insn },
+ { "nop", 0x00, 0x00, emit_insn },
+ { "or", 0x00, 0xB0, emit_s },
+ { "otdr", 0xED, 0xBB, emit_insn },
+ { "otir", 0xED, 0xB3, emit_insn },
+ { "out", 0x00, 0x00, emit_out },
+ { "outd", 0xED, 0xAB, emit_insn },
+ { "outi", 0xED, 0xA3, emit_insn },
+ { "pop", 0x00, 0xC1, emit_pop },
+ { "push", 0x00, 0xC5, emit_pop },
+ { "res", 0xCB, 0x80, emit_bit },
+ { "ret", 0xC9, 0xC0, emit_retcc },
+ { "reti", 0xED, 0x4D, emit_insn },
+ { "retn", 0xED, 0x45, emit_insn },
+ { "rl", 0xCB, 0x10, emit_mr },
+ { "rla", 0x00, 0x17, emit_insn },
+ { "rlc", 0xCB, 0x00, emit_mr },
+ { "rlca", 0x00, 0x07, emit_insn },
+ { "rld", 0xED, 0x6F, emit_insn },
+ { "rr", 0xCB, 0x18, emit_mr },
+ { "rra", 0x00, 0x1F, emit_insn },
+ { "rrc", 0xCB, 0x08, emit_mr },
+ { "rrca", 0x00, 0x0F, emit_insn },
+ { "rrd", 0xED, 0x67, emit_insn },
+ { "rst", 0x00, 0xC7, emit_rst},
+ { "sbc", 0x98, 0x42, emit_adc },
+ { "scf", 0x00, 0x37, emit_insn },
+ { "set", 0xCB, 0xC0, emit_bit },
+ { "sla", 0xCB, 0x20, emit_mr },
+ { "sli", 0xCB, 0x30, emit_mr },
+ { "sll", 0xCB, 0x30, emit_mr },
+ { "sra", 0xCB, 0x28, emit_mr },
+ { "srl", 0xCB, 0x38, emit_mr },
+ { "sub", 0x00, 0x90, emit_s },
+ { "xor", 0x00, 0xA8, emit_s },
+} ;
+
+void
+md_assemble (char* str)
+{
+ const char *p;
+ char * old_ptr;
+ int i;
+ table_t *insp;
+
+ err_flag = 0;
+ old_ptr = input_line_pointer;
+ p = skip_space (str);
+ for (i = 0; (i < BUFLEN) && (ISALPHA (*p));)
+ buf[i++] = TOLOWER (*p++);
+
+ if ((i == BUFLEN)
+ || ((*p) && (!ISSPACE (*p))))
+ as_bad (_("illegal instruction '%s'"), buf);
+
+ buf[i] = 0;
+ p = skip_space (p);
+ key = buf;
+
+ insp = bsearch (&key, instab, ARRAY_SIZE (instab),
+ sizeof (instab[0]), key_cmp);
+ if (!insp)
+ as_bad (_("illegal instruction '%s'"), buf);
+ else
+ {
+ p = insp->fp (insp->prefix, insp->opcode, p);
+ p = skip_space (p);
+ if ((!err_flag) && *p)
+ as_bad (_("junk at end of line, first unrecognized character is `%c'"),
+ *p);
+ }
+ input_line_pointer = old_ptr;
+}
+
+void
+md_apply_fix (fixS * fixP, valueT* valP, segT seg ATTRIBUTE_UNUSED)
+{
+ long val = * (long *) valP;
+ char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
+
+ switch (fixP->fx_r_type)
+ {
+ case BFD_RELOC_8_PCREL:
+ if (fixP->fx_addsy)
+ {
+ fixP->fx_no_overflow = 1;
+ fixP->fx_done = 0;
+ }
+ else
+ {
+ fixP->fx_no_overflow = (-128 <= val && val < 128);
+ if (!fixP->fx_no_overflow)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("relative jump out of range"));
+ *buf++ = val;
+ fixP->fx_done = 1;
+ }
+ break;
+
+ case BFD_RELOC_Z80_DISP8:
+ if (fixP->fx_addsy)
+ {
+ fixP->fx_no_overflow = 1;
+ fixP->fx_done = 0;
+ }
+ else
+ {
+ fixP->fx_no_overflow = (-128 <= val && val < 128);
+ if (!fixP->fx_no_overflow)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("index offset out of range"));
+ *buf++ = val;
+ fixP->fx_done = 1;
+ }
+ break;
+
+ case BFD_RELOC_8:
+ if (val > 255 || val < -128)
+ as_warn_where (fixP->fx_file, fixP->fx_line, _("overflow"));
+ *buf++ = val;
+ if (fixP->fx_addsy == NULL)
+ fixP->fx_done = 1;
+ break;
+
+ case BFD_RELOC_16:
+ *buf++ = val;
+ *buf++ = (val >> 8);
+ if (fixP->fx_addsy == NULL)
+ fixP->fx_done = 1;
+ break;
+
+ case BFD_RELOC_32: /* .Long may produce this. */
+ *buf++ = val;
+ *buf++ = (val >> 8);
+ *buf++ = (val >> 16);
+ *buf++ = (val >> 24);
+ if (fixP->fx_addsy == NULL)
+ fixP->fx_done = 1;
+ break;
+
+ default:
+ printf (_("md_apply_fix: unknown r_type 0x%x\n"), fixP->fx_r_type);
+ abort ();
+ }
+}
+
+/* GAS will call this to generate a reloc. GAS will pass the
+ resulting reloc to `bfd_install_relocation'. This currently works
+ poorly, as `bfd_install_relocation' often does the wrong thing, and
+ instances of `tc_gen_reloc' have been written to work around the
+ problems, which in turns makes it difficult to fix
+ `bfd_install_relocation'. */
+
+/* If while processing a fixup, a reloc really
+ needs to be created then it is done here. */
+
+arelent *
+tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED , fixS *fixp)
+{
+ arelent *reloc;
+
+ if (! bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type))
+ {
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("reloc %d not supported by object file format"),
+ (int) fixp->fx_r_type);
+ return NULL;
+ }
+
+ reloc = xmalloc (sizeof (arelent));
+ reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
+ *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
+ reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
+ reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
+ reloc->addend = fixp->fx_offset;
+
+ return reloc;
+}
+
diff --git a/gas/config/tc-z80.h b/gas/config/tc-z80.h
new file mode 100644
index 0000000..90073ab
--- /dev/null
+++ b/gas/config/tc-z80.h
@@ -0,0 +1,103 @@
+/* this is tc-z80.h
+ Copyright 2005 Free Software Foundation, Inc.
+
+ Contributed by Arnold Metselaar <arnold_m@operamail.com>
+
+ This file is part of GAS, the GNU Assembler.
+
+ GAS is free software; you can redistribute it and/or modify
+ it under the terms of .the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ GAS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GAS; see the file COPYING. If not, write to the Free
+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
+
+#ifndef TC_Z80
+#define TC_Z80
+
+#define TARGET_ARCH bfd_arch_z80
+#define BFD_ARCH TARGET_ARCH
+#define COFF_MAGIC 0x5A80
+#define TARGET_MACH 0
+#define TARGET_BYTES_BIG_ENDIAN 0
+
+/* If you define this macro, GAS will warn about the
+ use of nonstandard escape sequences in a string. */
+#define ONLY_STANDARD_ESCAPES
+
+/* GAS will call this function for any expression that can not be
+ recognized. When the function is called, `input_line_pointer'
+ will point to the start of the expression. */
+#define md_operand(x)
+
+/* This should just call either `number_to_chars_bigendian' or
+ `number_to_chars_littleendian', whichever is appropriate. On
+ targets like the MIPS which support options to change the
+ endianness, which function to call is a runtime decision. On
+ other targets, `md_number_to_chars' can be a simple macro. */
+#define md_number_to_chars number_to_chars_littleendian
+
+#define TC_COUNT_RELOC(x) 1
+
+#define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype (fixP)
+#define md_convert_frag(b,s,f) as_fatal ("convert_frag called\n")
+#define md_estimate_size_before_relax(f,s) \
+ (as_fatal (_("estimate_size_before_relax called")), 1)
+
+/* Define some functions to be called by generic code. */
+#define md_end z80_md_end
+#define md_start_line_hook() { if (z80_start_line_hook ()) continue; }
+#define md_optimize_expr z80_optimize_expr
+
+extern void z80_md_end (void);
+extern int z80_start_line_hook (void);
+extern int z80_optimize_expr (expressionS *, operatorT, expressionS *);
+
+#define WORKING_DOT_WORD
+
+/* If you define this macro, it means that `tc_gen_reloc' may return
+ multiple relocation entries for a single fixup. In this case, the
+ return value of `tc_gen_reloc' is a pointer to a null terminated
+ array. */
+#undef RELOC_EXPANSION_POSSIBLE
+
+/* No shared lib support, so we don't need to ensure
+ externally visible symbols can be overridden. */
+#define EXTERN_FORCE_RELOC 0
+
+/* Values passed to md_apply_fix3 don't include the symbol value. */
+#define MD_APPLY_SYM_VALUE(FIX) 0
+
+#define LISTING_WORD_SIZE 2
+
+/* A '$' is used to refer to the current location or as a hex. prefix. */
+#define DOLLAR_DOT
+#define DOLLAR_AMBIGU 1
+#define SINGLE_EQ_COMPARES
+#define LOCAL_LABELS_FB 1
+#define LITERAL_PREFIXPERCENT_BIN
+#define NUMBERS_WITH_SUFFIX 1
+#define NO_PSEUDO_DOT 1
+/* We allow single quotes to delimit character constants as
+ well, but it is cleaner to handle that in tc-z80.c. */
+#define SINGLE_QUOTE_STRINGS
+#define NO_STRING_ESCAPES
+
+/* An `.lcomm' directive with no explicit alignment parameter will
+ use this macro to set P2VAR to the alignment that a request for
+ SIZE bytes will have. The alignment is expressed as a power of
+ two. If no alignment should take place, the macro definition
+ should do nothing. Some targets define a `.bss' directive that is
+ also affected by this macro. The default definition will set
+ P2VAR to the truncated power of two of sizes up to eight bytes. */
+#define TC_IMPLICIT_LCOMM_ALIGNMENT(SIZE, P2VAR) (P2VAR) = 0
+
+#endif
diff --git a/gas/configure.tgt b/gas/configure.tgt
index b2ce879..28a44bb 100644
--- a/gas/configure.tgt
+++ b/gas/configure.tgt
@@ -375,6 +375,8 @@ case ${generic_target} in
xtensa-*-*) fmt=elf ;;
+ z80-*-coff) fmt=coff ;;
+
z8k-*-coff | z8k-*-sim) fmt=coff ;;
*-*-aout | *-*-scout) fmt=aout ;;
@@ -390,7 +392,7 @@ case ${generic_target} in
esac
case ${cpu_type} in
- alpha | arm | i386 | ia64 | mips | ns32k | pdp11 | ppc | sparc | z8k)
+ alpha | arm | i386 | ia64 | mips | ns32k | pdp11 | ppc | sparc | z80 | z8k)
bfd_gas=yes
;;
esac
diff --git a/gas/doc/Makefile.am b/gas/doc/Makefile.am
index b3b2580..bc25e88 100644
--- a/gas/doc/Makefile.am
+++ b/gas/doc/Makefile.am
@@ -55,6 +55,7 @@ CPU_DOCS = \
c-vax.texi \
c-v850.texi \
c-xtensa.texi \
+ c-z80.texi \
c-z8k.texi
gasver.texi: $(srcdir)/../../bfd/configure
diff --git a/gas/doc/Makefile.in b/gas/doc/Makefile.in
index 4456fa6..bddd088 100644
--- a/gas/doc/Makefile.in
+++ b/gas/doc/Makefile.in
@@ -1,4 +1,4 @@
-# Makefile.in generated by automake 1.9.2 from Makefile.am.
+# Makefile.in generated by automake 1.9.5 from Makefile.am.
# @configure_input@
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
@@ -246,6 +246,7 @@ CPU_DOCS = \
c-vax.texi \
c-v850.texi \
c-xtensa.texi \
+ c-z80.texi \
c-z8k.texi
@@ -347,7 +348,7 @@ as.html: as.texinfo
$(DVIPS) -o $@ $<
uninstall-info-am:
- $(PRE_UNINSTALL)
+ @$(PRE_UNINSTALL)
@if (install-info --version && \
install-info --version 2>&1 | sed 1q | grep -i -v debian) >/dev/null 2>&1; then \
list='$(INFO_DEPS)'; \
@@ -363,7 +364,7 @@ uninstall-info-am:
relfile=`echo "$$file" | sed 's|^.*/||'`; \
relfile_i=`echo "$$relfile" | sed 's|\.info$$||;s|$$|.i|'`; \
(if cd "$(DESTDIR)$(infodir)"; then \
- echo " rm -f $$relfile $$relfile-[0-9] $$relfile-[0-9][0-9] $$relfile_i[0-9] $$relfile_i[0-9][0-9])"; \
+ echo " cd '$(DESTDIR)$(infodir)' && rm -f $$relfile $$relfile-[0-9] $$relfile-[0-9][0-9] $$relfile_i[0-9] $$relfile_i[0-9][0-9]"; \
rm -f $$relfile $$relfile-[0-9] $$relfile-[0-9][0-9] $$relfile_i[0-9] $$relfile_i[0-9][0-9]; \
else :; fi); \
done
diff --git a/gas/doc/all.texi b/gas/doc/all.texi
index 77ff5e9..c10ec08 100644
--- a/gas/doc/all.texi
+++ b/gas/doc/all.texi
@@ -58,6 +58,7 @@
@set V850
@set VAX
@set XTENSA
+@set Z80
@set Z8000
@c Does this version of the assembler use the difference-table kluge?
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 4eefc42..09b844e 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -420,6 +420,19 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
[@b{-mcpu=54[123589]}|@b{-mcpu=54[56]lp}] [@b{-mfar-mode}|@b{-mf}]
[@b{-merrors-to-file} @var{<filename>}|@b{-me} @var{<filename>}]
@end ifset
+
+@ifset Z80
+
+@emph{Target Z80 options:}
+ [@b{-z80}] [@b{-r800}]
+ [@b{ -ignore-undocumented-instructions}] [@b{-Wnud}]
+ [@b{ -ignore-unportable-instructions}] [@b{-Wnup}]
+ [@b{ -warn-undocumented-instructions}] [@b{-Wud}]
+ [@b{ -warn-unportable-instructions}] [@b{-Wup}]
+ [@b{ -forbid-undocumented-instructions}] [@b{-Fud}]
+ [@b{ -forbid-unportable-instructions}] [@b{-Fup}]
+@end ifset
+
@ifset Z8000
@c Z8000 has no machine-dependent assembler options
@end ifset
@@ -1138,6 +1151,35 @@ instructions must be exactly as specified in the assembly source.
@end table
@end ifset
+@ifset Z80
+The following options are available when @value{AS} is configured for
+a Z80 family processor.
+@table @gcctabopt
+@item -z80
+Assemble for Z80 processor.
+@item -r800
+Assemble for R800 processor.
+@item -ignore-undocumented-instructions
+@itemx -Wnud
+Assemble undocumented Z80 instructions that also work on R800 without warning.
+@item -ignore-unportable-instructions
+@itemx -Wnup
+Assemble all undocumented Z80 instructions without warning.
+@item -warn-undocumented-instructions
+@itemx -Wud
+Issue a warning for undocumented Z80 instructions that also work on R800.
+@item -warn-unportable-instructions
+@itemx -Wup
+Issue a warning for undocumented Z80 instructions that do notwork on R800.
+@item -forbid-undocumented-instructions
+@itemx -Fud
+Treat all undocumented instructions as errors.
+@item -forbid-unportable-instructions
+@itemx -Fup
+Treat undocumented Z80 intructions that do notwork on R800 as errors.
+@end table
+@end ifset
+
@c man end
@menu
@@ -2130,6 +2172,9 @@ is considered a comment and is ignored. The line comment character is
@ifset VAX
@samp{#} on the Vax;
@end ifset
+@ifset Z80
+@samp{;} for the Z80;
+@end ifset
@ifset Z8000
@samp{!} for the Z8000;
@end ifset
@@ -4272,6 +4317,13 @@ The syntax for @code{equ} on the HPPA is
@samp{@var{symbol} .equ @var{expression}}.
@end ifset
+@ifset Z80
+The syntax for @code{equ} on the Z80 is
+@samp{@var{symbol} equ @var{expression}}.
+On the Z80 it is an eror if @var{symbol} is already defined,
+compare @xref{Equiv}.
+@end ifset
+
@node Equiv
@section @code{.equiv @var{symbol}, @var{expression}}
@cindex @code{equiv} directive
@@ -5512,6 +5564,11 @@ The syntax for @code{set} on the HPPA is
@samp{@var{symbol} .set @var{expression}}.
@end ifset
+@ifset Z80
+On Z80 @code{set} is a real instruction, use
+@samp{@var{symbol} defl @var{expression}} instead.
+@end ifset
+
@node Short
@section @code{.short @var{expressions}}
@@ -6196,6 +6253,9 @@ subject, see the hardware manufacturer's manual.
@ifset XTENSA
* Xtensa-Dependent:: Xtensa Dependent Features
@end ifset
+@ifset Z80
+* Z80-Dependent:: Z80 Dependent Features
+@end ifset
@ifset Z8000
* Z8000-Dependent:: Z8000 Dependent Features
@end ifset
@@ -6350,6 +6410,10 @@ family.
@include c-tic54x.texi
@end ifset
+@ifset Z80
+@include c-z80.texi
+@end ifset
+
@ifset Z8000
@include c-z8k.texi
@end ifset
diff --git a/gas/doc/c-z80.texi b/gas/doc/c-z80.texi
new file mode 100644
index 0000000..f650581
--- /dev/null
+++ b/gas/doc/c-z80.texi
@@ -0,0 +1,248 @@
+@c This is part of the GAS manual.
+@c For copying conditions, see the file as.texinfo.
+
+@ifset GENERIC
+@page
+@node Z80-Dependent
+@chapter Z80 Dependent Features
+@end ifset
+
+@c DO-NOT-COMMIT
+
+@ifclear GENERIC
+@node Machine Dependencies
+@chapter Z80 Dependent Features
+@end ifclear
+
+@cindex Z80 support
+@menu
+* Z80 Options:: Options
+* Z80 Syntax:: Syntax
+* Z80 Floating Point:: Floating Point
+* Z80 Directives:: Z80 Machine Directives
+* Z80 Opcodes:: Opcodes
+@end menu
+
+@node Z80 Options
+@section Options
+@cindex Z80 options
+@cindex options for Z80
+The Zilog Z80 and Ascii R800 version of @code{@value{AS}} have a few machine
+dependent options.
+@table @option
+@cindex @code{-z80} command line option, Z80
+@item -z80
+Produce code for the Z80 processor. There are additional options to
+request warnings and error messages for undocumented instructions.
+@item -ignore-undocumented-instructions
+@itemx -Wnud
+Silently assemble undocumented Z80-instructions that have been adopted
+as documented R800-instructions.
+@item -ignore-unportable-instructions
+@itemx -Wnup
+Silently assemble all undocumented Z80-instructions.
+@item -warn-undocumented-instructions
+@itemx -Wud
+Issue warnings for undocumented Z80-instructions that work on R800, do
+not assemble other undocumented instructions without warning.
+@item -warn-unportable-instructions
+@itemx -Wup
+Issue warnings for other undocumented Z80-instructions, do not treat any
+undocumented instructions as errors.
+@item -forbid-undocumented-instructions
+@itemx -Fud
+Treat all undocumented z80-instructions as errors.
+@item -forbid-unportable-instructions
+@itemx -Fup
+Treat undocumented z80-instructions that do not work on R800 as errors.
+
+@cindex @code{-r800} command line option, Z80
+@item -r800
+Produce code for the R800 processor. The assembler does not support
+undocumented instructions for the R800.
+In line with common practice, @code{@value{AS}} uses Z80 instriction names
+for the R800 processor, as far as they exist.
+@end table
+
+@cindex Z80 Syntax
+@node Z80 Syntax
+@section Syntax
+The assembler syntax closely follows the 'Z80 family CPU User Manual' by
+Zilog.
+In expressions a single @samp{=} may be used as ``is equal to''
+comparison operator.
+
+Suffices can be used to indicate the radix of integer constants;
+@samp{H} or @samp{h} for hexadecimal, @samp{D} or @samp{d} for decimal,
+@samp{Q}, @samp{O}, @samp{q} or @samp{o} for octal, and @samp{B} for
+binary.
+
+The suffix @samp{b} denotes a backreference to local label.
+
+@menu
+* Z80-Chars:: Special Characters
+* Z80-Regs:: Register Names
+* Z80-Case:: Case Sensitivity
+@end menu
+
+@node Z80-Chars
+@subsection Special Characters
+
+@cindex line comment character, Z80
+@cindex Z80 line comment character
+The semicolon @samp{;} is the line comment character;
+
+@cindex location counter, Z80
+@cindex hexadecimal prefix, Z80
+@cindex Z80 $
+The dollar sign @samp{$} can be used as a prefix for hexadecimal numbers
+and as a symbol denoting the current location counter.
+
+@cindex character escapes, Z80
+@cindex Z80, \
+A backslash @samp{\} is an ordinary character for the Z80 assembler.
+
+@cindex character constant, Z80
+@cindex single quote, Z80
+@cindex Z80 '
+The single quote @samp{'} must be followed by a closing quote. If there
+is one character inbetween, it is a character constant, otherwise it is
+a string constant.
+
+@node Z80-Regs
+@subsection Register Names
+@cindex Z80 registers
+@cindex register names, Z80
+
+The registers are referred to with the letters assigned to them by
+Zilog. In addition @command{@value{AS}} recognises @samp{ixl} and
+@samp{ixh} as the least and most significant octet in @samp{ix}, and
+similarly @samp{iyl} and @samp{iyh} as parts of @samp{iy}.
+
+@c The @samp{'} in @samp{ex af,af'} may be omitted.
+
+@node Z80-Case
+@subsection Case Sensitivity
+@cindex Z80, case sensitivity
+@cindex case sensitivity, Z80
+
+Upper and lower case are equivalent in register names, opcodes,
+condition codes and assembler directives.
+The case of letters is significant in labels and symbol names. The case
+is also important to distinguish the suffix @samp{b} for a backward reference
+to a local label from the suffix @samp{B} for a number in binary notation.
+
+@node Z80 Floating Point
+@section Floating Point
+@cindex floating point, Z80
+@cindex Z80 floating point
+Floating-point numbers are not supported.
+
+@node Z80 Directives
+@section Z80 Assembler Directives
+
+@command{@value{AS}} for the Z80 supports some additional directives for
+compatibility with other assemblers.
+
+@cindex Z80-only directives
+These are the additional directives in @code{@value{AS}} for the Z80:
+
+@table @code
+@item db @var{expression}|@var{string}[,@var{expression}|@var{string}...]
+@itemx defb @var{expression}|@var{string}[,@var{expression}|@var{string}...]
+For each @var{string} the characters are copied to the object file, for
+each other @var{expression} the value is stored in one byte, ignoring
+overflow.
+
+@item dw @var{expression}[,@var{expression}...]
+@itemx defw @var{expression}[,@var{expression}...]
+For each @var{expression} the value is stored in two bytes, ignoring
+overflow.
+
+@item ds @var{count}[, @var{value}]
+@itemx defs @var{count}[, @var{value}]
+@c Synonyms for @code{ds.b},
+@c which should have been described elsewhre
+Fill @var{count} bytes in the object file with @var{value}, if
+@var{value} is omitted it defaults to zero.
+
+@item @var{symbol} equ @var{expression}
+@itemx @var{symbol} defl @var{expression}
+These directives set the value of @var{symbol} to @var{expression}. To
+keep code portable to other assemblers it is best to use @samp{equ} for
+the first definition and @samp{defl} for redefinitions.
+
+@item set
+This is a normal instruction on Z80, and not an assembler directive.
+
+@item psect @var{name}
+A synonym for @xref{Section}, no second argument should be given.
+@ignore
+
+The following attributes will possibly be recognised in the future
+@table @code
+@item abs
+The section is to be absolute. @code{@value{AS}} will issue an error
+message because it can not produce an absolute section.
+@item global
+The section is to be concatenated with other sections of the same name
+by the linker, this is the default.
+@item local
+The section is not global. @code{@value{AS}} will issue a warning if
+object file format is not soff.
+@item ovrld
+The section is to be overlapped with other sections of the same name by
+the linker. @code{@value{AS}} will issue an error message
+because it can not mark a section as such.
+@item pure
+The section is marked as read only.
+@end table
+@end ignore
+
+@end table
+
+@node Z80 Opcodes
+@section Opcodes
+In line with commmon practice Z80 mnonics are used for both the Z80 and
+the R800.
+
+In many instructions it is possible to use one of the half index
+registers (@samp{ixl},@samp{ixh},@samp{iyl},@samp{iyh}) in stead of an
+8-bit general purpose register. This yields instructions that are
+documented on the R800 and undocumented on the Z80.
+Similarly @code{in f,(c)} is documented on the R800 and undocumented on
+the Z80.
+
+The assembler also supports the following undocumented Z80-instructions,
+that have not been adopted in the R800 instruction set:
+@table @code
+@item out (c),0
+Sends zero to the port pointed to by register c.
+
+@item sli @var{m}
+Equivalent to @code{@var{m} = (@var{m}<<1)+1}, the operand @var{m} can
+be any operand that is valid for @samp{sla}. One can use @samp{sll} as a
+synonym for @samp{sli}.
+
+@item @var{op} (ix+@var{d}), @var{r}
+This is equivalent to
+
+@example
+ld @var{r}, (ix+@var{d})
+@var{opc} @var{r}
+ld (ix+@var{d}), @var{r}
+@end example
+
+The operation @samp{@var{opc}} may be any of @samp{res @var{b},},
+@samp{set @var{b},}, @samp{rl}, @samp{rlc}, @samp{rr}, @samp{rrc},
+@samp{sla}, @samp{sli}, @samp{sra} and @samp{srl}, and the register
+@samp{@var{r}} may be any of @samp{a}, @samp{b}, @samp{c}, @samp{d},
+@samp{e}, @samp{h} and @samp{l}.
+
+@item @var{opc} (iy+@var{d}), @var{r}
+As above, but with @samp{iy} instead of @samp{ix}.
+@end table
+
+The web site at @uref{http://www.z80.info} is a good starting place to
+find more information on programming the Z80.
+
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 051544d..69fb931 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,16 @@
+2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
+
+ * gas/all/gas.exp: Exclude Z80-*-* from floating point, string,
+ and cofftag test.
+ * gas/macros/macros.exp: Expect z80-*-* to fail the strings test
+ because it has no string escapes.
+ * gas/z80/quotes.d: New file
+ * gas/z80/quotes.d: New file
+ * gas/z80/quotes.s: New file
+ * gas/z80/redef.d: New file
+ * gas/z80/redef.s: New file
+ * gas/z80/z80.exp: New file
+
2005-10-24 Bernd Schmidt <bernd.schmidt@analog.com>
* gas/bfin/flow2.d: Match changed assembler behaviour.
diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp
index 155a67e..5c52e9e 100644
--- a/gas/testsuite/gas/all/gas.exp
+++ b/gas/testsuite/gas/all/gas.exp
@@ -23,8 +23,9 @@ if { [istarget hppa*-*-*] || [istarget *c54x*-*-*] } then {
gas_test "p1480.s" "" "-a>" "simplifiable double subtraction"
}
-# No floating point support in assembly code for CRIS.
-if { ![istarget cris-*-*] && ![istarget crisv32-*-*] } then {
+# No floating point support in assembly code for CRIS and Z80.
+if { ![istarget cris-*-*] && ![istarget crisv32-*-*]
+ && ![istarget z80-*-*] } then {
gas_test "float.s" "" "" "simple FP constants"
}
@@ -78,6 +79,7 @@ case $target_triplet in {
{ iq2000*-*-* } { }
{ mips*-*-* } { }
{ *c54x*-*-* } { }
+ { z80-*-* } { }
default {
setup_xfail "*c30*-*-*" "*c4x*-*-*" "pdp11-*-*"
run_dump_test redef
@@ -189,7 +191,8 @@ case $target_triplet in {
# We omit the ARM toolchains because they define locals to
# start with '.', which eliminates .eos, .text etc from the output.
# Omit c54x, since .tag and .def mean something different on that target
-if { ([istarget *-*-coff*] && ![istarget *arm*-*-coff] && ![istarget thumb*-*-coff] && ![istarget xscale-*-coff] && ![istarget *c4x*-*-coff] && ![istarget *c54x*-*-coff]) \
+# Omit Z80, since octal numbers need a suffix on that target
+if { ([istarget *-*-coff*] && ![istarget *arm*-*-coff] && ![istarget thumb*-*-coff] && ![istarget xscale-*-coff] && ![istarget *c4x*-*-coff] && ![istarget *c54x*-*-coff] && ![istarget z80-*-coff]) \
||([istarget *-*-pe*] && ![istarget arm*-*-pe*] && ![istarget thumb*-*-pe*]) \
|| [istarget i*86-*-aix*] \
|| [istarget i*86-*-sco*] \
@@ -250,11 +253,18 @@ if { ![istarget "i960-*-*"] } {
run_dump_test quad
}
-run_dump_test weakref1
-run_dump_test weakref1g
-run_dump_test weakref1l
-run_dump_test weakref1u
-run_dump_test weakref1w
+
+# .set works differently on some targets.
+case $target_triplet in {
+ { z80-*-* } { }
+ default {
+ run_dump_test weakref1
+ run_dump_test weakref1g
+ run_dump_test weakref1l
+ run_dump_test weakref1u
+ run_dump_test weakref1w
+ }
+}
gas_test_error "weakref2.s" "" "e: would close weakref loop: e => a => b => c => d => e"
gas_test_error "weakref3.s" "" "a: would close weakref loop: a => b => c => d => e => a"
diff --git a/gas/testsuite/gas/macros/macros.exp b/gas/testsuite/gas/macros/macros.exp
index cd19ff8..3bd1982 100644
--- a/gas/testsuite/gas/macros/macros.exp
+++ b/gas/testsuite/gas/macros/macros.exp
@@ -56,6 +56,7 @@ if { ![istarget hppa*-*-*] || [istarget *-*-linux*] } {
setup_xfail "powerpc*-*-aix*" "powerpc*-*-beos*" "powerpc*-*-macos*"
setup_xfail "powerpc*-*-pe" "powerpc*-*-*win*"
setup_xfail "rs6000-*-*"
+ setup_xfail "z80-*-*"
# FIXME: Due to difference in what "consecutive octets" means.
setup_xfail "*c4x*-*-*" "*c54x*-*"
@@ -75,6 +76,7 @@ case $target_triplet in {
{ m68*-*-* } { }
{ m88*-*-* } { }
{ mmix-* } { }
+ { z80-* } { }
default { run_list_test dot "-alm" }
}
run_list_test end ""
diff --git a/gas/testsuite/gas/z80/quotes.d b/gas/testsuite/gas/z80/quotes.d
new file mode 100644
index 0000000..1915f51
--- /dev/null
+++ b/gas/testsuite/gas/z80/quotes.d
@@ -0,0 +1,9 @@
+#objdump: -s -j .data
+#name: quotes
+
+.*:.*
+
+Contents of section .data:
+ 0000 73696e67 6c653a27 646f7562 6c653a22[ ]+................
+ 0010 00657363 6170653a 5c5c08fe 3a[ ]+................
+#pass \ No newline at end of file
diff --git a/gas/testsuite/gas/z80/quotes.s b/gas/testsuite/gas/z80/quotes.s
new file mode 100644
index 0000000..1b882bc
--- /dev/null
+++ b/gas/testsuite/gas/z80/quotes.s
@@ -0,0 +1,11 @@
+ ;; test the parsing of strings and character constants
+ section .data
+laf:
+ defb "single:'"
+ defb 'double:"',laf
+ defb 'escape:\\'
+
+ ex af,af'
+af0:
+ cp '9'+1
+
diff --git a/gas/testsuite/gas/z80/redef.d b/gas/testsuite/gas/z80/redef.d
new file mode 100644
index 0000000..fed1998
--- /dev/null
+++ b/gas/testsuite/gas/z80/redef.d
@@ -0,0 +1,8 @@
+#objdump: -s -j .data
+#name: .equ redefinitions
+
+.*: .*
+
+Contents of section .data:
+ 0000 00000000 0[04]00000[04] 0[08]00000[08] 0[0c]00000[0c][ ]+................[ ]*
+#pass
diff --git a/gas/testsuite/gas/z80/redef.s b/gas/testsuite/gas/z80/redef.s
new file mode 100644
index 0000000..eda6a69
--- /dev/null
+++ b/gas/testsuite/gas/z80/redef.s
@@ -0,0 +1,11 @@
+ .data
+_start:
+x: defl .-_start
+ .long x
+ .balign 4
+x: defl .-_start
+ .long x
+x: defl .-_start
+ .long x
+x: defl .-_start
+ .long x
diff --git a/gas/testsuite/gas/z80/z80.exp b/gas/testsuite/gas/z80/z80.exp
new file mode 100644
index 0000000..733ce55
--- /dev/null
+++ b/gas/testsuite/gas/z80/z80.exp
@@ -0,0 +1,10 @@
+# run targets for target Z80.
+
+if [istarget z80-*-*] then
+{
+# test redefinitions
+ run_dump_test "redef"
+# test parsing of " and '
+ run_dump_test "quotes"
+
+}