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author | Nelson Chu <nelson.chu@sifive.com> | 2021-11-04 14:31:48 +0800 |
---|---|---|
committer | Nelson Chu <nelson.chu@sifive.com> | 2021-11-04 17:46:09 +0800 |
commit | edc77c591add0a9c7740a9ed9f7e40358bf65dbf (patch) | |
tree | c2775cd5aa98985296420ce901ffc6df91f2e7e1 /gas | |
parent | e5c9e53c9b8d5c8519b251f91de7bc453d1086be (diff) | |
download | gdb-edc77c591add0a9c7740a9ed9f7e40358bf65dbf.zip gdb-edc77c591add0a9c7740a9ed9f7e40358bf65dbf.tar.gz gdb-edc77c591add0a9c7740a9ed9f7e40358bf65dbf.tar.bz2 |
RISC-V: Clarify the behavior of .option rvc or norvc.
Add/Remove the rvc extension to/from the riscv_subsets once the
.option rvc/norvc is set. So that we don't need to always check
the riscv_opts.rvc in the riscv_subset_supports, just call the
riscv_lookup_subset to search the subset list is enough.
Besides, we will need to dump the instructions according to the
elf architecture attributes. That means the dis-assembler needs
to parse the architecture string from the elf attribute before
dumping any instructions, and also needs to recognized the
INSN_CLASS* classes from riscv_opcodes. Therefore, I suppose
some functions will need to be moved from gas/config/tc-riscv.c
to bfd/elfxx-riscv.c, including riscv_multi_subset_supports and
riscv_subset_supports. This is one of the reasons why we need
this patch.
This patch passes the gcc/binutils regressions of rv32emc-elf,
rv32i-elf, rv64gc-elf and rv64gc-linux toolchains.
bfd/
* elfxx-riscv.c (riscv_remove_subset): Remove the extension
from the subset list.
(riscv_update_subset): Add/Remove an extension to/from the
subset list. This is used for the .option rvc or norvc.
* elfxx-riscv.h: Added the extern bool riscv_update_subset.
gas/
* config/tc-riscv.c (riscv_set_options): Removed the unused
rve flag.
(riscv_opts): Likewise.
(riscv_set_rve): Removed.
(riscv_subset_supports): Removed the riscv_opts.rvc check.
(riscv_set_arch): Don't need to call riscv_set_rve.
(reg_lookup_internal): Call riscv_subset_supports to check
whether the rve is supported.
(s_riscv_option): Add/Remove the rvc extension to/from the
subset list once the .option rvc/norvc is set.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/config/tc-riscv.c | 39 |
1 files changed, 18 insertions, 21 deletions
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index eb626f8..90d960a 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -203,7 +203,6 @@ struct riscv_set_options { int pic; /* Generate position-independent code. */ int rvc; /* Generate RVC code. */ - int rve; /* Generate RVE code. */ int relax; /* Emit relocs the linker is allowed to relax. */ int arch_attr; /* Emit architecture and privileged elf attributes. */ int csr_check; /* Enable the CSR checking. */ @@ -213,7 +212,6 @@ static struct riscv_set_options riscv_opts = { 0, /* pic */ 0, /* rvc */ - 0, /* rve */ 1, /* relax */ DEFAULT_RISCV_ATTR, /* arch_attr */ 0, /* csr_check */ @@ -231,14 +229,6 @@ riscv_set_rvc (bool rvc_value) riscv_opts.rvc = rvc_value; } -/* Enable or disable the rve flags for riscv_opts. */ - -static void -riscv_set_rve (bool rve_value) -{ - riscv_opts.rve = rve_value; -} - /* This linked list records all enabled extensions, which are parsed from the architecture string. The architecture string can be set by the -march option, the elf architecture attributes, and the --with-arch @@ -252,10 +242,6 @@ static bool riscv_subset_supports (const char *feature) { struct riscv_subset_t *subset; - - if (riscv_opts.rvc && (strcasecmp (feature, "c") == 0)) - return true; - return riscv_lookup_subset (&riscv_subsets, feature, &subset); } @@ -329,13 +315,9 @@ riscv_set_arch (const char *s) riscv_release_subset_list (&riscv_subsets); riscv_parse_subset (&rps, s); - /* To support .option rvc and rve. */ riscv_set_rvc (false); if (riscv_subset_supports ("c")) riscv_set_rvc (true); - riscv_set_rve (false); - if (riscv_subset_supports ("e")) - riscv_set_rve (true); } /* Indicate -mabi option is explictly set. */ @@ -1013,7 +995,9 @@ reg_lookup_internal (const char *s, enum reg_class class) if (r == NULL || DECODE_REG_CLASS (r) != class) return -1; - if (riscv_opts.rve && class == RCLASS_GPR && DECODE_REG_NUM (r) > 15) + if (riscv_subset_supports ("e") + && class == RCLASS_GPR + && DECODE_REG_NUM (r) > 15) return -1; return DECODE_REG_NUM (r); @@ -3380,10 +3364,23 @@ s_riscv_option (int x ATTRIBUTE_UNUSED) ch = *input_line_pointer; *input_line_pointer = '\0'; + riscv_parse_subset_t rps; + rps.subset_list = &riscv_subsets; + rps.error_handler = as_bad; + rps.xlen = &xlen; + rps.isa_spec = default_isa_spec; + rps.check_unknown_prefixed_ext = true; + if (strcmp (name, "rvc") == 0) - riscv_set_rvc (true); + { + riscv_update_subset (&rps, "c", false); + riscv_set_rvc (true); + } else if (strcmp (name, "norvc") == 0) - riscv_set_rvc (false); + { + riscv_update_subset (&rps, "c", true); + riscv_set_rvc (false); + } else if (strcmp (name, "pic") == 0) riscv_opts.pic = true; else if (strcmp (name, "nopic") == 0) |