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| author | Richard Sandiford <richard.sandiford@arm.com> | 2022-01-06 16:22:54 +0000 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2022-01-06 16:22:54 +0000 |
| commit | 27297937e0c648cdf115ecbceb4ba25dfefe7492 (patch) | |
| tree | 4cf2cea710ecf9e12d951a994f90edbdb03223ec /gas | |
| parent | 41e321a8973edf99f69eb3f11cc076a69be726af (diff) | |
| download | gdb-27297937e0c648cdf115ecbceb4ba25dfefe7492.zip gdb-27297937e0c648cdf115ecbceb4ba25dfefe7492.tar.gz gdb-27297937e0c648cdf115ecbceb4ba25dfefe7492.tar.bz2 | |
aarch64: Add support for new SME instructions
This patch adds support for three new SME instructions: ADDSPL,
ADDSVL and RDSVL. They behave like ADDPL, ADDVL and RDVL, but read
the streaming vector length instead of the current vector length.
opcodes/
* aarch64-tbl.h (aarch64_opcode_table): Add ADDSPL, ADDSVL and RDSVL.
* aarch64-dis-2.c: Regenerate.
gas/
* testsuite/gas/aarch64/sme.s, testsuite/gas/aarch64/sme.d: Add tests
for ADDSPL, ADDSVL and RDSVL.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme.d | 25 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme.s | 31 |
2 files changed, 56 insertions, 0 deletions
diff --git a/gas/testsuite/gas/aarch64/sme.d b/gas/testsuite/gas/aarch64/sme.d index 673ac79..f5cf1f0 100644 --- a/gas/testsuite/gas/aarch64/sme.d +++ b/gas/testsuite/gas/aarch64/sme.d @@ -91,3 +91,28 @@ Disassembly of section \.text: 144: a1a1f893 umops za3.s, p6/m, p7/m, z4.b, z1.b 148: a1817083 usmopa za3.s, p4/m, p3/m, z4.b, z1.b 14c: a181f893 usmops za3.s, p6/m, p7/m, z4.b, z1.b +[^:]+: 04605800 addspl x0, x0, #0 +[^:]+: 04605801 addspl x1, x0, #0 +[^:]+: 0460581f addspl sp, x0, #0 +[^:]+: 04625800 addspl x0, x2, #0 +[^:]+: 047f5800 addspl x0, sp, #0 +[^:]+: 04605be0 addspl x0, x0, #31 +[^:]+: 04605c00 addspl x0, x0, #-32 +[^:]+: 04605c20 addspl x0, x0, #-31 +[^:]+: 04605fe0 addspl x0, x0, #-1 +[^:]+: 04205800 addsvl x0, x0, #0 +[^:]+: 04205801 addsvl x1, x0, #0 +[^:]+: 0420581f addsvl sp, x0, #0 +[^:]+: 04225800 addsvl x0, x2, #0 +[^:]+: 043f5800 addsvl x0, sp, #0 +[^:]+: 04205be0 addsvl x0, x0, #31 +[^:]+: 04205c00 addsvl x0, x0, #-32 +[^:]+: 04205c20 addsvl x0, x0, #-31 +[^:]+: 04205fe0 addsvl x0, x0, #-1 +[^:]+: 04bf5800 rdsvl x0, #0 +[^:]+: 04bf5801 rdsvl x1, #0 +[^:]+: 04bf581f rdsvl xzr, #0 +[^:]+: 04bf5be0 rdsvl x0, #31 +[^:]+: 04bf5c00 rdsvl x0, #-32 +[^:]+: 04bf5c20 rdsvl x0, #-31 +[^:]+: 04bf5fe0 rdsvl x0, #-1 diff --git a/gas/testsuite/gas/aarch64/sme.s b/gas/testsuite/gas/aarch64/sme.s index ad48fa0..659f141 100644 --- a/gas/testsuite/gas/aarch64/sme.s +++ b/gas/testsuite/gas/aarch64/sme.s @@ -121,3 +121,34 @@ umopa foo.s, p6/m, p7/m, z4.b, z1.b umops foo.s, p6/m, p7/m, z4.b, z1.b usmopa foo.s, p4/m, p3/m, z4.b, z1.b usmops foo.s, p6/m, p7/m, z4.b, z1.b + +/* ADDSPL. */ +addspl x0, x0, #0 +addspl x1, x0, #0 +addspl sp, x0, #0 +addspl x0, x2, #0 +addspl x0, sp, #0 +addspl x0, x0, #31 +addspl x0, x0, #-32 +addspl x0, x0, #-31 +addspl x0, x0, #-1 + +/* ADDSVL. */ +addsvl x0, x0, #0 +addsvl x1, x0, #0 +addsvl sp, x0, #0 +addsvl x0, x2, #0 +addsvl x0, sp, #0 +addsvl x0, x0, #31 +addsvl x0, x0, #-32 +addsvl x0, x0, #-31 +addsvl x0, x0, #-1 + +/* RDSVL. */ +rdsvl x0, #0 +rdsvl x1, #0 +rdsvl xzr, #0 +rdsvl x0, #31 +rdsvl x0, #-32 +rdsvl x0, #-31 +rdsvl x0, #-1 |