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author | Tamar Christina <tamar.christina@arm.com> | 2020-01-27 10:40:02 +0000 |
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committer | Tamar Christina <tamar.christina@arm.com> | 2020-01-27 11:16:27 +0000 |
commit | 2a8719fecde2f27bb91440317c3df166be1c511f (patch) | |
tree | d7dc95dcd1d4f8b745b1f2d9c50cedb54ca217ca /gas | |
parent | a00805ef97440e53196cf54247dfb59abc7c9206 (diff) | |
download | gdb-2a8719fecde2f27bb91440317c3df166be1c511f.zip gdb-2a8719fecde2f27bb91440317c3df166be1c511f.tar.gz gdb-2a8719fecde2f27bb91440317c3df166be1c511f.tar.bz2 |
AArch64: Fix cfinv disassembly issues
This fixes the preferred disassembly for cfinv. The Armv8.4-a instruction
overlaps with the possible encoding space for msr. This because msr allows you
to use unallocated encoding space using the general sA_B_cC_cD_E form.
However when an encoding does become allocated then we need to ensure that it's
used as the preferred disassembly. The problem with cfinv is that its mask has
all bits sets because it has no arguments.
This causes issues for the Alias resolver in gas as it uses the mask to build
alias graph. In this case it can't do it since it thinks almost everything
would alias with cfinv. So instead we can only fix this by moving cfinv before
msr.
gas/ChangeLog:
PR 25403
* testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
* testsuite/gas/aarch64/armv8_4-a.s: Likewise.
opcodes/ChangeLog:
PR 25403
* aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
* aarch64-asm-2.c: Regenerate
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.
(cherry picked from commit 7568c93bf95a518797dfb2987b04911164c14a36)
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 9 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/armv8_4-a.d | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/armv8_4-a.s | 3 |
3 files changed, 13 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index a11cf08..0753f1a 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,12 @@ +2020-01-27 Tamar Christina <tamar.christina@arm.com> + + Backport from mainline. + 2020-01-27 Tamar Christina <tamar.christina@arm.com> + + PR 25403 + * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv. + * testsuite/gas/aarch64/armv8_4-a.s: Likewise. + 2020-01-20 Mihail Ionescu <mihail.ionescu@arm.com> Backport from trunk: diff --git a/gas/testsuite/gas/aarch64/armv8_4-a.d b/gas/testsuite/gas/aarch64/armv8_4-a.d index 5b67c6e..4b1a4e3 100644 --- a/gas/testsuite/gas/aarch64/armv8_4-a.d +++ b/gas/testsuite/gas/aarch64/armv8_4-a.d @@ -2202,3 +2202,4 @@ Disassembly of section \.text: [^:]+:\s+998033fe ldapursw x30, \[sp, #3\] [^:]+:\s+998523fe ldapursw x30, \[sp, #82\] [^:]+:\s+9980d3fe ldapursw x30, \[sp, #13\] +[^:]+:\s+d500401f cfinv
\ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/armv8_4-a.s b/gas/testsuite/gas/aarch64/armv8_4-a.s index 45f7ea8..b270d18 100644 --- a/gas/testsuite/gas/aarch64/armv8_4-a.s +++ b/gas/testsuite/gas/aarch64/armv8_4-a.s @@ -144,3 +144,6 @@ func: gen1reg_iter ldapursw x,", [sp]" gen3reg_iter ldapursw x,, [x,,,] gen2reg_iter_offset ldapursw x,,sp + + cfinv + |