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| author | Matthew Fortune <matthew.fortune@imgtec.com> | 2019-04-17 04:07:19 +0000 |
|---|---|---|
| committer | Faraz Shahbazker <fshahbazker@wavecomp.com> | 2019-04-18 09:30:51 -0700 |
| commit | 85bec12d61ca50669cac5975c88d3a1e377375f9 (patch) | |
| tree | 6a002b166dd85e85acf9fd0c2b35eacefb3cd998 /gas/testsuite | |
| parent | b73715df01e6e9b3de5a49cd7bf4170deef48461 (diff) | |
| download | gdb-85bec12d61ca50669cac5975c88d3a1e377375f9.zip gdb-85bec12d61ca50669cac5975c88d3a1e377375f9.tar.gz gdb-85bec12d61ca50669cac5975c88d3a1e377375f9.tar.bz2 | |
Improve warning message for $0 constraint on MIPSR6 branches
gas/
* config/tc-mips.c (match_non_zero_reg_operand): Update
warning message.
* testsuite/gas/mips/r6-branch-constraints.l: Likewise.
Diffstat (limited to 'gas/testsuite')
| -rw-r--r-- | gas/testsuite/gas/mips/r6-branch-constraints.l | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/gas/testsuite/gas/mips/r6-branch-constraints.l b/gas/testsuite/gas/mips/r6-branch-constraints.l index 819a09a..bdeea9f 100644 --- a/gas/testsuite/gas/mips/r6-branch-constraints.l +++ b/gas/testsuite/gas/mips/r6-branch-constraints.l @@ -1,25 +1,25 @@ .*: Assembler messages: -.*:2: Error: invalid operands `blezc \$0,.' +.*:2: Error: the source register must not be \$0 `blezc \$0,.' .*:3: Error: the source register must not be \$0 `bgezc \$0,.' -.*:4: Error: invalid operands `bgtzc \$0,.' +.*:4: Error: the source register must not be \$0 `bgtzc \$0,.' .*:5: Error: the source register must not be \$0 `bltzc \$0,.' -.*:6: Error: invalid operands `beqzc \$0,.' -.*:7: Error: invalid operands `bnezc \$0,.' -.*:8: Error: invalid operands `bgec \$0,\$2,.' +.*:6: Error: the source register must not be \$0 `beqzc \$0,.' +.*:7: Error: the source register must not be \$0 `bnezc \$0,.' +.*:8: Error: the source register must not be \$0 `bgec \$0,\$2,.' .*:9: Error: invalid operands `bgec \$2,\$0,.' .*:10: Error: invalid operands `bgec \$2,\$2,.' -.*:11: Error: invalid operands `bgeuc \$0,\$2,.' +.*:11: Error: the source register must not be \$0 `bgeuc \$0,\$2,.' .*:12: Error: invalid operands `bgeuc \$2,\$0,.' .*:13: Error: invalid operands `bgeuc \$2,\$2,.' -.*:14: Error: invalid operands `bltc \$0,\$2,.' +.*:14: Error: the source register must not be \$0 `bltc \$0,\$2,.' .*:15: Error: invalid operands `bltc \$2,\$0,.' .*:16: Error: invalid operands `bltc \$2,\$2,.' -.*:17: Error: invalid operands `bltuc \$0,\$2,.' +.*:17: Error: the source register must not be \$0 `bltuc \$0,\$2,.' .*:18: Error: invalid operands `bltuc \$2,\$0,.' .*:19: Error: invalid operands `bltuc \$2,\$2,.' -.*:20: Error: invalid operands `beqc \$0,\$2,.' +.*:20: Error: the source register must not be \$0 `beqc \$0,\$2,.' .*:21: Error: invalid operands `beqc \$2,\$0,.' .*:22: Error: invalid operands `beqc \$2,\$2,.' -.*:23: Error: invalid operands `bnec \$0,\$2,.' +.*:23: Error: the source register must not be \$0 `bnec \$0,\$2,.' .*:24: Error: invalid operands `bnec \$2,\$0,.' .*:25: Error: invalid operands `bnec \$2,\$2,.' |