diff options
author | Timothy Wall <twall@alum.mit.edu> | 2001-11-13 14:22:53 +0000 |
---|---|---|
committer | Timothy Wall <twall@alum.mit.edu> | 2001-11-13 14:22:53 +0000 |
commit | 6e9179034707f18294ae1cbebcc7e9714a46951d (patch) | |
tree | 85f85a20b4ea7e4ff949b0703aae7c42bc8ed6b7 /gas/testsuite | |
parent | 1a78a35acfb696d2262b7c2d707b9e6421c99aaa (diff) | |
download | gdb-6e9179034707f18294ae1cbebcc7e9714a46951d.zip gdb-6e9179034707f18294ae1cbebcc7e9714a46951d.tar.gz gdb-6e9179034707f18294ae1cbebcc7e9714a46951d.tar.bz2 |
Fix tic54x testsuite failures and Lmem disassembly bugs.
Diffstat (limited to 'gas/testsuite')
-rw-r--r-- | gas/testsuite/ChangeLog | 16 | ||||
-rw-r--r-- | gas/testsuite/gas/all/gas.exp | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/macros/macros.exp | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/tic54x/align.d | 8 | ||||
-rw-r--r-- | gas/testsuite/gas/tic54x/align.s | 5 | ||||
-rw-r--r-- | gas/testsuite/gas/tic54x/all-opcodes.d | 142 | ||||
-rw-r--r-- | gas/testsuite/gas/tic54x/extaddr.d | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/tic54x/extaddr.s | 90 | ||||
-rw-r--r-- | gas/testsuite/gas/tic54x/labels.s | 110 | ||||
-rw-r--r-- | gas/testsuite/gas/tic54x/sections.d | 18 | ||||
-rw-r--r-- | gas/testsuite/gas/tic54x/sections.s | 145 |
11 files changed, 277 insertions, 263 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index c27523e..e888139 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,18 @@ +2001-11-11 Timothy Wall <twall@alum.mit.edu> + + * gas/tic54x/sections.[sd]: Check for named, initialized sections + defaulting to CODE and DATA. + * gas/tic54x/align.[sd]: While breaking compatibility with TI's + assembler, the difference is not worth the effort to fix. We'd + prefer the assembler *not* fill the section alignment. + * gas/tic54x/all-opcodes.d: Verify Lmem opcodes have proper + length. + * gas/tic54x/labels.s: Document differences from TI tools. + * gas/tic54x/extaddr.d: Match output. + * gas/all/gas.exp: On c54x targets, don't do any tests that use + p2align. + * gas/macros/macros.exp: Expect failure matching use of .ascii. + 2001-11-12 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> * gas/mips/mips.exp: Change naming of some conditionals to reflect @@ -60,6 +75,7 @@ * gas/mmix: New testsuite directory. +>>>>>>> 1.244 2001-10-24 Chris Demetriou <cgd@broadcom.com> * gas/mips/ld-empic.d: Remove extra whitespace at beginning of diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp index af0b1b0..87d3bac 100644 --- a/gas/testsuite/gas/all/gas.exp +++ b/gas/testsuite/gas/all/gas.exp @@ -155,10 +155,9 @@ proc test_cond {} { # again, p2align doesn't work on c54x target if ![istarget *c54x*-*-*] then { test_cond + run_dump_test incbin } -run_dump_test incbin - # FIXME: this is here cause of a bug in DejaGnu 1.1.1. When it is no longer # in use, then this can be removed. if [info exists errorInfo] then { diff --git a/gas/testsuite/gas/macros/macros.exp b/gas/testsuite/gas/macros/macros.exp index b3b4d57..4a424bd 100644 --- a/gas/testsuite/gas/macros/macros.exp +++ b/gas/testsuite/gas/macros/macros.exp @@ -33,5 +33,7 @@ if { ![istarget hppa*-*-*] || [istarget *-*-linux*]} { setup_xfail sh*-*-* setup_xfail z8k*-*-* setup_xfail h8300*-*-* + # FIXME: Due to difference in what "consecutive octets" means. + setup_xfail *c54x*-*-* run_dump_test strings } diff --git a/gas/testsuite/gas/tic54x/align.d b/gas/testsuite/gas/tic54x/align.d index c130534..9959330 100644 --- a/gas/testsuite/gas/tic54x/align.d +++ b/gas/testsuite/gas/tic54x/align.d @@ -1,12 +1,12 @@ #objdump: -d --headers -#name: c54x align (NOTE: .even is broken on TI tools) +#name: c54x align .*: +file format .*c54x.* Sections: Idx Name Size VMA LMA File off Algn - 0 .text 00000089 00000000 00000000 0000.... 2..7 - CONTENTS, ALLOC, LOAD, CODE + 0 .text 000000c0 00000000 00000000 0000.... 2..7 + CONTENTS, ALLOC, LOAD, .... 1 .data 00000005 00000000 00000000 0000.... 2..1 CONTENTS, ALLOC, LOAD, DATA 2 .bss 00000000 00000000 00000000 0000.... 2..0 @@ -53,4 +53,4 @@ Disassembly of section .text: 86: 0005.* 87: 0006.* 88: 0007.* - + ... diff --git a/gas/testsuite/gas/tic54x/align.s b/gas/testsuite/gas/tic54x/align.s index fea8fa6..16a777c 100644 --- a/gas/testsuite/gas/tic54x/align.s +++ b/gas/testsuite/gas/tic54x/align.s @@ -1,6 +1,10 @@ * alignment directives * .even == .align 1, .even 2 == longword boundary * .align [size] ; size is number of words (value must be a power of 2) +* NOTE: .even is broken on TI tools, so theirs won't align .data +* NOTE: TI defaults text section to DATA until opcodes are seen +* NOTE: GAS will fill a section to its alignment; it should probably not +* in this case. .global even, align2, align8, align128 .field 2, 3 .field 11, 8 @@ -15,6 +19,7 @@ align8 .word 8 .align align128 .byte 4 .word 0,1,2,3,4,5,6,7 +* TI .text section total size is 0x89 words; GAS fills to 0xc0 .data .field 2, 3 .field 11, 8 diff --git a/gas/testsuite/gas/tic54x/all-opcodes.d b/gas/testsuite/gas/tic54x/all-opcodes.d index 3cb52f4..ae37380 100644 --- a/gas/testsuite/gas/tic54x/all-opcodes.d +++ b/gas/testsuite/gas/tic54x/all-opcodes.d @@ -61593,17 +61593,17 @@ Disassembly of section .text: f08f: 53f0.* f090: 1ead.* f091: 50f8.* - f092: 1eae.* + f092: 1eae f093: 51f8.* - f094: 1eaf.* + f094: 1eaf f095: 50f8.* - f096: 1eb0.* + f096: 1eb0 f097: 52f8.* - f098: 1eb1.* + f098: 1eb1 f099: 53f8.* - f09a: 1eb2.* + f09a: 1eb2 f09b: 53f8.* - f09c: 1eb3.* + f09c: 1eb3 f09d: 5081.* f09e: 5181.* f09f: 5081.* @@ -61707,17 +61707,17 @@ Disassembly of section .text: f101: 53f1.* f102: 1ec5.* f103: 50f8.* - f104: 1ec6.* + f104: 1ec6 f105: 51f8.* - f106: 1ec7.* + f106: 1ec7 f107: 50f8.* - f108: 1ec8.* + f108: 1ec8 f109: 52f8.* - f10a: 1ec9.* + f10a: 1ec9 f10b: 53f8.* - f10c: 1eca.* + f10c: 1eca f10d: 53f8.* - f10e: 1ecb.* + f10e: 1ecb f10f: 5082.* f110: 5182.* f111: 5082.* @@ -61821,17 +61821,17 @@ Disassembly of section .text: f173: 53f2.* f174: 1edd.* f175: 50f8.* - f176: 1ede.* + f176: 1ede f177: 51f8.* - f178: 1edf.* + f178: 1edf f179: 50f8.* - f17a: 1ee0.* + f17a: 1ee0 f17b: 52f8.* - f17c: 1ee1.* + f17c: 1ee1 f17d: 53f8.* - f17e: 1ee2.* + f17e: 1ee2 f17f: 53f8.* - f180: 1ee3.* + f180: 1ee3 f181: 5083.* f182: 5183.* f183: 5083.* @@ -61935,17 +61935,17 @@ Disassembly of section .text: f1e5: 53f3.* f1e6: 1ef5.* f1e7: 50f8.* - f1e8: 1ef6.* + f1e8: 1ef6 f1e9: 51f8.* - f1ea: 1ef7.* + f1ea: 1ef7 f1eb: 50f8.* - f1ec: 1ef8.* + f1ec: 1ef8 f1ed: 52f8.* - f1ee: 1ef9.* + f1ee: 1ef9 f1ef: 53f8.* - f1f0: 1efa.* + f1f0: 1efa f1f1: 53f8.* - f1f2: 1efb.* + f1f2: 1efb f1f3: 5084.* f1f4: 5184.* f1f5: 5084.* @@ -62049,17 +62049,17 @@ Disassembly of section .text: f257: 53f4.* f258: 1f0d.* f259: 50f8.* - f25a: 1f0e.* + f25a: 1f0e f25b: 51f8.* - f25c: 1f0f.* + f25c: 1f0f f25d: 50f8.* - f25e: 1f10.* + f25e: 1f10 f25f: 52f8.* - f260: 1f11.* + f260: 1f11 f261: 53f8.* - f262: 1f12.* + f262: 1f12 f263: 53f8.* - f264: 1f13.* + f264: 1f13 f265: 5085.* f266: 5185.* f267: 5085.* @@ -62163,17 +62163,17 @@ Disassembly of section .text: f2c9: 53f5.* f2ca: 1f25.* f2cb: 50f8.* - f2cc: 1f26.* + f2cc: 1f26 f2cd: 51f8.* - f2ce: 1f27.* + f2ce: 1f27 f2cf: 50f8.* - f2d0: 1f28.* + f2d0: 1f28 f2d1: 52f8.* - f2d2: 1f29.* + f2d2: 1f29 f2d3: 53f8.* - f2d4: 1f2a.* + f2d4: 1f2a f2d5: 53f8.* - f2d6: 1f2b.* + f2d6: 1f2b f2d7: 5086.* f2d8: 5186.* f2d9: 5086.* @@ -62277,17 +62277,17 @@ Disassembly of section .text: f33b: 53f6.* f33c: 1f3d.* f33d: 50f8.* - f33e: 1f3e.* + f33e: 1f3e f33f: 51f8.* - f340: 1f3f.* + f340: 1f3f f341: 50f8.* - f342: 1f40.* + f342: 1f40 f343: 52f8.* - f344: 1f41.* + f344: 1f41 f345: 53f8.* - f346: 1f42.* + f346: 1f42 f347: 53f8.* - f348: 1f43.* + f348: 1f43 f349: 5087.* f34a: 5187.* f34b: 5087.* @@ -62391,17 +62391,17 @@ Disassembly of section .text: f3ad: 53f7.* f3ae: 1f55.* f3af: 50f8.* - f3b0: 1f56.* + f3b0: 1f56 f3b1: 51f8.* - f3b2: 1f57.* + f3b2: 1f57 f3b3: 50f8.* - f3b4: 1f58.* + f3b4: 1f58 f3b5: 52f8.* - f3b6: 1f59.* + f3b6: 1f59 f3b7: 53f8.* - f3b8: 1f5a.* + f3b8: 1f5a f3b9: 53f8.* - f3ba: 1f5b.* + f3ba: 1f5b f3bb: 5a63.* f3bc: 5b64.* f3bd: 5a80.* @@ -62439,9 +62439,9 @@ Disassembly of section .text: f3dd: 5bf0.* f3de: 1f61.* f3df: 5af8.* - f3e0: 1f62.* + f3e0: 1f62 f3e1: 5bf8.* - f3e2: 1f63.* + f3e2: 1f63 f3e3: 5a81.* f3e4: 5b81.* f3e5: 5a89.* @@ -62477,9 +62477,9 @@ Disassembly of section .text: f403: 5bf1.* f404: 1f69.* f405: 5af8.* - f406: 1f6a.* + f406: 1f6a f407: 5bf8.* - f408: 1f6b.* + f408: 1f6b f409: 5a82.* f40a: 5b82.* f40b: 5a8a.* @@ -62515,9 +62515,9 @@ Disassembly of section .text: f429: 5bf2.* f42a: 1f71.* f42b: 5af8.* - f42c: 1f72.* + f42c: 1f72 f42d: 5bf8.* - f42e: 1f73.* + f42e: 1f73 f42f: 5a83.* f430: 5b83.* f431: 5a8b.* @@ -62553,9 +62553,9 @@ Disassembly of section .text: f44f: 5bf3.* f450: 1f79.* f451: 5af8.* - f452: 1f7a.* + f452: 1f7a f453: 5bf8.* - f454: 1f7b.* + f454: 1f7b f455: 5a84.* f456: 5b84.* f457: 5a8c.* @@ -62591,9 +62591,9 @@ Disassembly of section .text: f475: 5bf4.* f476: 1f81.* f477: 5af8.* - f478: 1f82.* + f478: 1f82 f479: 5bf8.* - f47a: 1f83.* + f47a: 1f83 f47b: 5a85.* f47c: 5b85.* f47d: 5a8d.* @@ -62629,9 +62629,9 @@ Disassembly of section .text: f49b: 5bf5.* f49c: 1f89.* f49d: 5af8.* - f49e: 1f8a.* + f49e: 1f8a f49f: 5bf8.* - f4a0: 1f8b.* + f4a0: 1f8b f4a1: 5a86.* f4a2: 5b86.* f4a3: 5a8e.* @@ -62667,9 +62667,9 @@ Disassembly of section .text: f4c1: 5bf6.* f4c2: 1f91.* f4c3: 5af8.* - f4c4: 1f92.* + f4c4: 1f92 f4c5: 5bf8.* - f4c6: 1f93.* + f4c6: 1f93 f4c7: 5a87.* f4c8: 5b87.* f4c9: 5a8f.* @@ -62705,9 +62705,9 @@ Disassembly of section .text: f4e7: 5bf7.* f4e8: 1f99.* f4e9: 5af8.* - f4ea: 1f9a.* + f4ea: 1f9a f4eb: 5bf8.* - f4ec: 1f9b.* + f4ec: 1f9b f4ed: 4d65.* f4ee: 4d80.* f4ef: 4d88.* @@ -62727,7 +62727,7 @@ Disassembly of section .text: f4fd: 4df0.* f4fe: 1f9e.* f4ff: 4df8.* - f500: 1f9f.* + f500: 1f9f f501: 4d81.* f502: 4d89.* f503: 4d91.* @@ -62746,7 +62746,7 @@ Disassembly of section .text: f510: 4df1.* f511: 1fa2.* f512: 4df8.* - f513: 1fa3.* + f513: 1fa3 f514: 4d82.* f515: 4d8a.* f516: 4d92.* @@ -63794,13 +63794,13 @@ Disassembly of section .text: f928: 4ed0.* f929: 4ed8.* f92a: 4ee0.* - f92b: 207c.* + f92b: 207c f92c: 4ee8.* - f92d: 207d.* + f92d: 207d f92e: 4ef0.* - f92f: 207e.* - f930: 4ef8.* - f931: 207f.* + f92f: 207e + f930: 4ef8 dst a,\*(.*) + f931: 207f f932: 4e81.* f933: 4e89.* f934: 4e91.* diff --git a/gas/testsuite/gas/tic54x/extaddr.d b/gas/testsuite/gas/tic54x/extaddr.d index ceee627..6c692e0 100644 --- a/gas/testsuite/gas/tic54x/extaddr.d +++ b/gas/testsuite/gas/tic54x/extaddr.d @@ -53,4 +53,5 @@ Disassembly of section .text: 10080: f881.* 10081: 0080.* .*10080: ARELEXT.* + ... diff --git a/gas/testsuite/gas/tic54x/extaddr.s b/gas/testsuite/gas/tic54x/extaddr.s index b39479b..7d6a1ee 100644 --- a/gas/testsuite/gas/tic54x/extaddr.s +++ b/gas/testsuite/gas/tic54x/extaddr.s @@ -1,45 +1,45 @@ -*
-* Extended addressing support
-*
- .version 548
- .far_mode
- .global F1, start, end
- ; LDX pseudo-op
- ldx #F1,16,a ; load upper 8 bits of extended address
- or #F1,a,a ; load remaining bits
- bacc a
- ; extended addressing functions
-start:
- fb end
-
- fbd end
- nop
- nop
-
- fbacc a
- fbaccd a
- nop
- nop
- fcala a
- fcalad b
- nop
- nop
- fcall end
-
- fcalld end
- nop
- nop
-
- fret
- fretd
- nop
- nop
- frete
- freted
- nop
- nop
- .space 16*0xFFFF
- .align 0x80
-end:
- fb end
- .end
+* +* Extended addressing support +* + .version 548 + .far_mode + .global F1, start, end + ; LDX pseudo-op + ldx #F1,16,a ; load upper 8 bits of extended address + or #F1,a,a ; load remaining bits + bacc a + ; extended addressing functions +start: + fb end + + fbd end + nop + nop + + fbacc a + fbaccd a + nop + nop + fcala a + fcalad b + nop + nop + fcall end + + fcalld end + nop + nop + + fret + fretd + nop + nop + frete + freted + nop + nop + .space 16*0xFFFF + .align 0x80 +end: + fb end + .end diff --git a/gas/testsuite/gas/tic54x/labels.s b/gas/testsuite/gas/tic54x/labels.s index ac47213..47c3ea3 100644 --- a/gas/testsuite/gas/tic54x/labels.s +++ b/gas/testsuite/gas/tic54x/labels.s @@ -1,55 +1,55 @@ -* local labels
-* two forms, $[0-9] and label? are allowed
-* Local labels are undefined/reset in one of four ways:
-* .newblock
-* changing sections
-* entering an include file
-* leaving an include file
- .global addra, addrb, addrc
-label1: ld addra,a
- sub addrb,a
- bc $1, alt ; generates frag!
- ld addrb, a
- b $2
-$1: ld addra,a
-$2 add addrc,a
- .newblock
- bc $1,alt
- stl a, addrc
-$1 nop
-
-* #1, First definition of local label 'lab'
- nop
-lab? add #1,a ; reports as line 17?
- b lab?
-* #2, Included file also defines local label 'lab'
- .copy labels.inc
-* #3, Next definition; exit from .copy clears all locals
-lab? add #3,a ; reports as line 22?
- b lab?
-* #4, Next definition is within macro; supersedes previous definition while
-* within the macro
-mac .macro
-lab? add #4,a ; line 31?
- b lab?
- .endm
-* Macro invocation
- mac
-* This reference should resolve to definition #3
-after_macro:
- b lab?
-* Section change clears all definitions
- .sect new_section
- nop
-lab? add #5,a
- nop
- nop
- b lab?
-* Newblock directive clears local labels
- .newblock
-lab? add #6,a
- nop
- nop
- b lab?
- .end
-
+* local labels +* two forms, $[0-9] and label? are allowed +* Local labels are undefined/reset in one of four ways: +* .newblock +* changing sections +* entering an include file +* leaving an include file + .global addra, addrb, addrc +label1: ld addra,a + sub addrb,a + bc $1, alt ; generates frag! + ld addrb, a + b $2 +$1: ld addra,a +$2 add addrc,a + .newblock + bc $1,alt + stl a, addrc +$1 nop + +* #1, First definition of local label 'lab' + nop +lab? add #1,a ; reports as line 17? + b lab? +* #2, Included file also defines local label 'lab' + .copy labels.inc +* #3, Next definition; exit from .copy clears all locals +lab? add #3,a ; reports as line 22? + b lab? +* #4, Next definition is within macro; supersedes previous definition while +* within the macro +mac .macro +lab? add #4,a ; line 31? + b lab? + .endm +* Macro invocation + mac +* This reference should resolve to definition #3 +after_macro: + b lab? +* Section change clears all definitions; TI defaults to CODE section w/o name + .sect new_section + nop +lab? add #5,a + nop + nop + b lab? +* Newblock directive clears local labels + .newblock +lab? add #6,a + nop + nop + b lab? + .end + diff --git a/gas/testsuite/gas/tic54x/sections.d b/gas/testsuite/gas/tic54x/sections.d index b3f1344..4f85b9a 100644 --- a/gas/testsuite/gas/tic54x/sections.d +++ b/gas/testsuite/gas/tic54x/sections.d @@ -16,9 +16,9 @@ Idx Name Size VMA LMA File off Algn 4 vectors 00000002 00000000 00000000 0000.... 2..0 CONTENTS, ALLOC, LOAD, CODE, BLOCK 5 clink 00000002 00000000 00000000 0000.... 2..0 - CONTENTS, ALLOC, LOAD, CODE, CLINK + CONTENTS, ALLOC, LOAD, DATA, CLINK 6 blksect 00000002 00000000 00000000 0000.... 2..0 - CONTENTS, ALLOC, LOAD, CODE, BLOCK + CONTENTS, ALLOC, LOAD, DATA, BLOCK Disassembly of section .text: 00000000 <.text>: @@ -72,15 +72,5 @@ Disassembly of section .text: Disassembly of section vectors: 00000000 <vectors>: - 0: 0011.* - 1: 0033.* -Disassembly of section clink: - -00000000 <clink>: - 0: 0022.* - 1: 0044.* -Disassembly of section blksect: - -00000000 <blksect>: - 0: 1234.* - 1: 4321.* + 0: f495.* + 1: f495.* diff --git a/gas/testsuite/gas/tic54x/sections.s b/gas/testsuite/gas/tic54x/sections.s index dbe42e1..35819d7 100644 --- a/gas/testsuite/gas/tic54x/sections.s +++ b/gas/testsuite/gas/tic54x/sections.s @@ -1,72 +1,73 @@ -*
-* Various sections directives
-* .bss, .data, .sect, .text, .usect
-* .align, .space, .bes
-*
- ; default section (should be .text)
- .word 0x1234 ; this should be put in .text
-
- ; initialized data
- .data
- .global coeff
-coeff .word 011h,022h,033h
-
- ; uninitialized data
- .global B1, buffer
- .bss buffer, 10
-B1: .usect ".bss", 10 ; alocate 10 words
-
- ; more initialized data in .data
- .global ptr
-ptr .word 0123h
-
- ; .text section
- .text
- .global add, aloop
-add: ld 0fh,a
-aloop: sub #1,a
- bc aloop,ageq
-
- ; more initialized data into .data
- .data
- .global ivals
-ivals .word 0aah, 0bbh, 0cch
-
- ; define another section for more variables
- .global var2, inbuf, align2
-var2 .usect "newvars", 1 ; with quotes
-inbuf .usect newvars, 7, 1 ; w/o quotes, block 7 words
-align2 .usect newvars, 15, ,1 ; 15 words aligned
-
- ; more code
- .text
- .global mpy, mloop
-mpy: ld 0ah,b
-mloop: mpy #0ah,b
- bc mloop,bnov
- .global space, bes, spacep, besp
-space: .space 64 ; points to first word of block
-bes: .bes 64 ; points to last word of block
-spacep: .word space
-besp: .word bes
- .global pk1, pk2, pk3, endpk1, endpk2, endpk3
-pk1: .space 20
-endpk1: .space 12
-pk2: .bes 20
-endpk2 .bes 12
-pk3: .space 20
-endpk3: .bes 12
- ; named initialized section (TI assembler marks this as DATA, not CODE)
- .sect "vectors"
- .word 011h, 033h
-
- ; named, initialized section, no quotes (TI assembler marks as DATA)
- .sect clink
- .clink ; mark section clink as STYP_CLINK
- .word 022h, 044h
-
- .sect "blksect" ; (TI assembler marks this as DATA)
- .word 0x1234,0x4321
- .sblock "blksect", vectors ; set block flag on blksect and vectors
-
- .end
+* +* Various sections directives +* .bss, .data, .sect, .text, .usect +* .align, .space, .bes +* + ; default section (should be .text) + .word 0x1234 ; this should be put in .text + + ; initialized data + .data + .global coeff +coeff .word 011h,022h,033h + + ; uninitialized data + .global B1, buffer + .bss buffer, 10 +B1: .usect ".bss", 10 ; alocate 10 words + + ; more initialized data in .data + .global ptr +ptr .word 0123h + + ; .text section + .text + .global add, aloop +add: ld 0fh,a +aloop: sub #1,a + bc aloop,ageq + + ; more initialized data into .data + .data + .global ivals +ivals .word 0aah, 0bbh, 0cch + + ; define another section for more variables + .global var2, inbuf, align2 +var2 .usect "newvars", 1 ; with quotes +inbuf .usect newvars, 7, 1 ; w/o quotes, block 7 words +align2 .usect newvars, 15, ,1 ; 15 words aligned + + ; more code + .text + .global mpy, mloop +mpy: ld 0ah,b +mloop: mpy #0ah,b + bc mloop,bnov + .global space, bes, spacep, besp +space: .space 64 ; points to first word of block +bes: .bes 64 ; points to last word of block +spacep: .word space +besp: .word bes + .global pk1, pk2, pk3, endpk1, endpk2, endpk3 +pk1: .space 20 +endpk1: .space 12 +pk2: .bes 20 +endpk2 .bes 12 +pk3: .space 20 +endpk3: .bes 12 + ; named initialized section (CODE) + .sect "vectors" + nop + nop + + ; named, initialized section, no quotes (DATA) + .sect clink + .clink ; mark section clink as STYP_CLINK + .word 022h, 044h + + .sect "blksect" ; (DATA) + .word 0x1234,0x4321 + .sblock "blksect", vectors ; set block flag on blksect and vectors + + .end |