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authorMatthew Gretton-Dann <matthew.gretton-dann@arm.com>2012-08-24 08:06:36 +0000
committerMatthew Gretton-Dann <matthew.gretton-dann@arm.com>2012-08-24 08:06:36 +0000
commit33399f071c6c3cf9877a22eeea94767dacef757b (patch)
tree473a67a514ec5915d97ed05de66b3e3218300b5b /gas/testsuite
parent9eb6c0f132631312886f7084d96448e46a053fb8 (diff)
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* gas/config/tc-arm.c (NEON_ENC_TAB): Add entries for VSEL.
(NEON_ENC_FPV8_): New define. (do_vfp_nsyn_fpv8): New function. (do_vsel): Likewise. (insns): Add VSEL instructions. * gas/testsuite/gas/arm/armv8-a+fp.d: New testcase. * gas/testsuite/gas/arm/armv8-a+fp.s: Likewise. * opcodes/arm-dis.c (coprocessor_opcodes): Add VSEL. (print_insn_coprocessor): Add new %<>c bitfield format specifier.
Diffstat (limited to 'gas/testsuite')
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/arm/armv8-a+fp.d22
-rw-r--r--gas/testsuite/gas/arm/armv8-a+fp.s24
3 files changed, 51 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index e0ca1a8..f6f111f 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,5 +1,10 @@
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+ * gas/arm/armv8-a+fp.d: New testcase.
+ * gas/arm/armv8-a+fp.s: Likewise.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
* gas/arm/armv8-a-bad.l: Update testcase.
* gas/arm/armv8-a-bad.s: Likewise.
* gas/arm/armv8-a.d: Likewise.
diff --git a/gas/testsuite/gas/arm/armv8-a+fp.d b/gas/testsuite/gas/arm/armv8-a+fp.d
new file mode 100644
index 0000000..568d317
--- /dev/null
+++ b/gas/testsuite/gas/arm/armv8-a+fp.d
@@ -0,0 +1,22 @@
+#name: Valid v8-a+fp
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0[0-9a-f]+ <[^>]+> fe000a00 vseleq.f32 s0, s0, s0
+0[0-9a-f]+ <[^>]+> fe500aa0 vselvs.f32 s1, s1, s1
+0[0-9a-f]+ <[^>]+> fe2ffa0f vselge.f32 s30, s30, s30
+0[0-9a-f]+ <[^>]+> fe7ffaaf vselgt.f32 s31, s31, s31
+0[0-9a-f]+ <[^>]+> fe000b00 vseleq.f64 d0, d0, d0
+0[0-9a-f]+ <[^>]+> fe500ba0 vselvs.f64 d16, d16, d16
+0[0-9a-f]+ <[^>]+> fe2ffb0f vselge.f64 d15, d15, d15
+0[0-9a-f]+ <[^>]+> fe7ffbaf vselgt.f64 d31, d31, d31
+0[0-9a-f]+ <[^>]+> fe00 0a00 vseleq.f32 s0, s0, s0
+0[0-9a-f]+ <[^>]+> fe50 0aa0 vselvs.f32 s1, s1, s1
+0[0-9a-f]+ <[^>]+> fe2f fa0f vselge.f32 s30, s30, s30
+0[0-9a-f]+ <[^>]+> fe7f faaf vselgt.f32 s31, s31, s31
+0[0-9a-f]+ <[^>]+> fe00 0b00 vseleq.f64 d0, d0, d0
+0[0-9a-f]+ <[^>]+> fe50 0ba0 vselvs.f64 d16, d16, d16
+0[0-9a-f]+ <[^>]+> fe2f fb0f vselge.f64 d15, d15, d15
+0[0-9a-f]+ <[^>]+> fe7f fbaf vselgt.f64 d31, d31, d31
diff --git a/gas/testsuite/gas/arm/armv8-a+fp.s b/gas/testsuite/gas/arm/armv8-a+fp.s
new file mode 100644
index 0000000..ec79f99
--- /dev/null
+++ b/gas/testsuite/gas/arm/armv8-a+fp.s
@@ -0,0 +1,24 @@
+ .syntax unified
+ .text
+ .arch armv8-a
+ .arch_extension fp
+
+ .arm
+ vseleq.f32 s0, s0, s0
+ vselvs.f32 s1, s1, s1
+ vselge.f32 s30, s30, s30
+ vselgt.f32 s31, s31, s31
+ vseleq.f64 d0, d0, d0
+ vselvs.f64 d16, d16, d16
+ vselge.f64 d15, d15, d15
+ vselgt.f64 d31, d31, d31
+
+ .thumb
+ vseleq.f32 s0, s0, s0
+ vselvs.f32 s1, s1, s1
+ vselge.f32 s30, s30, s30
+ vselgt.f32 s31, s31, s31
+ vseleq.f64 d0, d0, d0
+ vselvs.f64 d16, d16, d16
+ vselge.f64 d15, d15, d15
+ vselgt.f64 d31, d31, d31