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| author | Cooper Qu <cooper.qu@linux.alibaba.com> | 2020-10-12 22:29:09 +0800 |
|---|---|---|
| committer | Lifang Xia <xlf194833_xia@alibaba-inc.com> | 2020-10-26 16:13:55 +0800 |
| commit | 039dac293d5df5d933808aa5d946b80fd0a84794 (patch) | |
| tree | 333b7a4b677577707bcb11c8042bf7a4e2945eda /gas/testsuite | |
| parent | 069ef164801ff68e2ce5d24a2601b1fb6d3acedb (diff) | |
| download | gdb-039dac293d5df5d933808aa5d946b80fd0a84794.zip gdb-039dac293d5df5d933808aa5d946b80fd0a84794.tar.gz gdb-039dac293d5df5d933808aa5d946b80fd0a84794.tar.bz2 | |
CSKY: Fix and add some instructions for VDSPV1.
gas/
* config/tc-csky.c (get_operand_value): Add handler for
OPRND_TYPE_IMM5b_VSH and OPRND_TYPE_VREG_WITH_INDEX.
* testsuite/gas/csky/csky_vdsp.d : Fix the disassembling
for vector register.
opcodes/
* csky-dis.c (csky_output_operand): Add handler for
OPRND_TYPE_IMM5b_VSH and OPRND_TYPE_VREG_WITH_INDEX.
* csky-opc.h (OPRND_TYPE_VREG_WITH_INDEX): New enum.
(OPRND_TYPE_IMM5b_VSH): New enum.
(csky_v2_opcodes): Fix and add some instructions for VDSPV1.
Change-Id: Ia5675d7b716fe5c331e6121ad8f83061ef6454bb
Diffstat (limited to 'gas/testsuite')
| -rw-r--r-- | gas/testsuite/gas/csky/csky_vdsp.d | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/gas/testsuite/gas/csky/csky_vdsp.d b/gas/testsuite/gas/csky/csky_vdsp.d index 3af4413..97330b0 100644 --- a/gas/testsuite/gas/csky/csky_vdsp.d +++ b/gas/testsuite/gas/csky/csky_vdsp.d @@ -6,30 +6,30 @@ Disassembly of section \.text: #... -\s*[0-9a-f]*:\s*f8623c02\s*vstrq\.8\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\) -\s*[0-9a-f]*:\s*f8623d02\s*vstrq\.16\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\) -\s*[0-9a-f]*:\s*f8623e02\s*vstrq\.32\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\) -\s*[0-9a-f]*:\s*f8623402\s*vldrq\.8\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\) -\s*[0-9a-f]*:\s*f8623502\s*vldrq\.16\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\) -\s*[0-9a-f]*:\s*f8623602\s*vldrq\.32\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\) -\s*[0-9a-f]*:\s*f8623802\s*vstrd\.8\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\) -\s*[0-9a-f]*:\s*f8623902\s*vstrd\.16\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\) -\s*[0-9a-f]*:\s*f8623a02\s*vstrd\.32\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\) -\s*[0-9a-f]*:\s*f8623002\s*vldrd\.8\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\) -\s*[0-9a-f]*:\s*f8623102\s*vldrd\.16\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\) -\s*[0-9a-f]*:\s*f8623202\s*vldrd\.32\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\) -\s*[0-9a-f]*:\s*f8022412\s*vldq\.8\s*fr2,\s*\(r2,\s*0x10\) -\s*[0-9a-f]*:\s*f8022512\s*vldq\.16\s*fr2,\s*\(r2,\s*0x10\) -\s*[0-9a-f]*:\s*f8022612\s*vldq\.32\s*fr2,\s*\(r2,\s*0x10\) -\s*[0-9a-f]*:\s*f8022c12\s*vstq\.8\s*fr2,\s*\(r2,\s*0x10\) -\s*[0-9a-f]*:\s*f8022d12\s*vstq\.16\s*fr2,\s*\(r2,\s*0x10\) -\s*[0-9a-f]*:\s*f8022e12\s*vstq\.32\s*fr2,\s*\(r2,\s*0x10\) -\s*[0-9a-f]*:\s*f8022022\s*vldd\.8\s*fr2,\s*\(r2,\s*0x10\) -\s*[0-9a-f]*:\s*f8022122\s*vldd\.16\s*fr2,\s*\(r2,\s*0x10\) -\s*[0-9a-f]*:\s*f8022222\s*vldd\.32\s*fr2,\s*\(r2,\s*0x10\) -\s*[0-9a-f]*:\s*f8022822\s*vstd\.8\s*fr2,\s*\(r2,\s*0x10\) -\s*[0-9a-f]*:\s*f8022922\s*vstd\.16\s*fr2,\s*\(r2,\s*0x10\) -\s*[0-9a-f]*:\s*f8022a22\s*vstd\.32\s*fr2,\s*\(r2,\s*0x10\) +\s*[0-9a-f]*:\s*f8623c02\s*vstrq\.8\s*vr2,\s*\(r2,\s*r3\s*<<\s*0\) +\s*[0-9a-f]*:\s*f8623d02\s*vstrq\.16\s*vr2,\s*\(r2,\s*r3\s*<<\s*0\) +\s*[0-9a-f]*:\s*f8623e02\s*vstrq\.32\s*vr2,\s*\(r2,\s*r3\s*<<\s*0\) +\s*[0-9a-f]*:\s*f8623402\s*vldrq\.8\s*vr2,\s*\(r2,\s*r3\s*<<\s*0\) +\s*[0-9a-f]*:\s*f8623502\s*vldrq\.16\s*vr2,\s*\(r2,\s*r3\s*<<\s*0\) +\s*[0-9a-f]*:\s*f8623602\s*vldrq\.32\s*vr2,\s*\(r2,\s*r3\s*<<\s*0\) +\s*[0-9a-f]*:\s*f8623802\s*vstrd\.8\s*vr2,\s*\(r2,\s*r3\s*<<\s*0\) +\s*[0-9a-f]*:\s*f8623902\s*vstrd\.16\s*vr2,\s*\(r2,\s*r3\s*<<\s*0\) +\s*[0-9a-f]*:\s*f8623a02\s*vstrd\.32\s*vr2,\s*\(r2,\s*r3\s*<<\s*0\) +\s*[0-9a-f]*:\s*f8623002\s*vldrd\.8\s*vr2,\s*\(r2,\s*r3\s*<<\s*0\) +\s*[0-9a-f]*:\s*f8623102\s*vldrd\.16\s*vr2,\s*\(r2,\s*r3\s*<<\s*0\) +\s*[0-9a-f]*:\s*f8623202\s*vldrd\.32\s*vr2,\s*\(r2,\s*r3\s*<<\s*0\) +\s*[0-9a-f]*:\s*f8022412\s*vldq\.8\s*vr2,\s*\(r2,\s*0x10\) +\s*[0-9a-f]*:\s*f8022512\s*vldq\.16\s*vr2,\s*\(r2,\s*0x10\) +\s*[0-9a-f]*:\s*f8022612\s*vldq\.32\s*vr2,\s*\(r2,\s*0x10\) +\s*[0-9a-f]*:\s*f8022c12\s*vstq\.8\s*vr2,\s*\(r2,\s*0x10\) +\s*[0-9a-f]*:\s*f8022d12\s*vstq\.16\s*vr2,\s*\(r2,\s*0x10\) +\s*[0-9a-f]*:\s*f8022e12\s*vstq\.32\s*vr2,\s*\(r2,\s*0x10\) +\s*[0-9a-f]*:\s*f8022022\s*vldd\.8\s*vr2,\s*\(r2,\s*0x10\) +\s*[0-9a-f]*:\s*f8022122\s*vldd\.16\s*vr2,\s*\(r2,\s*0x10\) +\s*[0-9a-f]*:\s*f8022222\s*vldd\.32\s*vr2,\s*\(r2,\s*0x10\) +\s*[0-9a-f]*:\s*f8022822\s*vstd\.8\s*vr2,\s*\(r2,\s*0x10\) +\s*[0-9a-f]*:\s*f8022922\s*vstd\.16\s*vr2,\s*\(r2,\s*0x10\) +\s*[0-9a-f]*:\s*f8022a22\s*vstd\.32\s*vr2,\s*\(r2,\s*0x10\) \s*[0-9a-f]*:\s*c43eb020\s*vmulsh\s*r30,\s*r1 \s*[0-9a-f]*:\s*c7e0b040\s*vmulsha\s*r0,\s*r31 \s*[0-9a-f]*:\s*c58cb420\s*vmulsw\s*r12,\s*r12 @@ -43,9 +43,9 @@ Disassembly of section \.text: \s*[0-9a-f]*:\s*f8101305\s*vmtvr.u8\s*vr5\[0\],\s*r16 \s*[0-9a-f]*:\s*f8ea1324\s*vmtvr.u16\s*vr4\[7\],\s*r10 \s*[0-9a-f]*:\s*f9ea134f\s*vmtvr.u32\s*vr15\[15\],\s*r10 -\s*[0-9a-f]*:\s*f94a0e81\s*vdup.8\s*fr1,\s*vr10\[10\] -\s*[0-9a-f]*:\s*f83a0e8f\s*vdup.16\s*fr15,\s*vr10\[1\] -\s*[0-9a-f]*:\s*faaa0e87\s*vdup.32\s*fr7,\s*vr10\[5\] +\s*[0-9a-f]*:\s*f94a0e81\s*vdup.8\s*vr1,\s*vr10\[10\] +\s*[0-9a-f]*:\s*f83a0e8f\s*vdup.16\s*vr15,\s*vr10\[1\] +\s*[0-9a-f]*:\s*faaa0e87\s*vdup.32\s*vr7,\s*vr10\[5\] \s*[0-9a-f]*:\s*f8030c02\s*vmov\s*vr2,\s*vr3 \s*[0-9a-f]*:\s*f8030062\s*vcadd\.eu8\s*vr2,\s*vr3 \s*[0-9a-f]*:\s*f8130062\s*vcadd\.eu16\s*vr2,\s*vr3 |