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authorMihail Ionescu <mihail.ionescu@arm.com>2019-11-12 13:57:20 +0000
committerKyrylo Tkachov <kyrylo.tkachov@arm.com>2019-11-12 14:01:10 +0000
commitef8f595f73a6b42f745bc76a716f45079eae1075 (patch)
tree718987e71df5f0b8198b8b9dfef3ab9839d5ecdf /gas/testsuite
parentce760a762093d59a3faab07fff895b484071977c (diff)
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[gas][arm] Enable VLDM, VSTM, VPUSH, VPOP for MVE
This patch enables a few instructions for Armv8.1-M MVE. Currently VLDM, VSTM, VSTR, VLDR, VPUSH and VPOP are enabled only when the Armv8-M Floating-point Extension is enabled. According to the ARMv8.1-M ARM, section A.1.4.2[1], they can be enabled by having "Armv8-M Floating-point Extension and/or Armv8.1-M MVE". [1]https://developer.arm.com/docs/ddi0553/bh/armv81-m-architecture-reference-manual 2019-11-12 Mihail Ionescu <mihail.ionescu@arm.com> * config/tc-arm.c (do_vfp_nsyn_push): Move in order to enable it for both fpu_vfp_ext_v1xd and mve_ext and add call to the aliased vstm instruction for mve_ext. (do_vfp_nsyn_pop): Move in order to enable it for both fpu_vfp_ext_v1xd and mve_ext and add call to the aliased vldm instruction for mve_ext. (do_neon_ldm_stm): Add fpu_vfp_ext_v1 and mve_ext checks. (insns): Enable vldm, vldmia, vldmdb, vstm, vstmia, vstmdb, vpop, vpush, and fldd, fstd, flds, fsts for arm_ext_v6t2 instead of fpu_vfp_ext_v1xd. * testsuite/gas/arm/v8_1m-mve.s: New. * testsuite/gas/arm/v8_1m-mve.d: New.
Diffstat (limited to 'gas/testsuite')
-rw-r--r--gas/testsuite/gas/arm/v8_1m-mve.d27
-rw-r--r--gas/testsuite/gas/arm/v8_1m-mve.s24
2 files changed, 51 insertions, 0 deletions
diff --git a/gas/testsuite/gas/arm/v8_1m-mve.d b/gas/testsuite/gas/arm/v8_1m-mve.d
new file mode 100644
index 0000000..4c528de
--- /dev/null
+++ b/gas/testsuite/gas/arm/v8_1m-mve.d
@@ -0,0 +1,27 @@
+# name: V8.1-m FP register instructions enabled by +mve
+# as: -march=armv8.1-m.main+mve
+# objdump: -dr --show-raw-insn -marmv8.1-m.main
+
+.*: +file format .*arm.*
+
+
+Disassembly of section .text:
+
+00000000 <\.text>:
+ *[0-9a-f]+: ec80 0b08 vstmia r0, {d0-d3}
+ *[0-9a-f]+: ecb7 3b04 vldmia r7!, {d3-d4}
+ *[0-9a-f]+: ecbd 0b06 vpop {d0-d2}
+ *[0-9a-f]+: ed2d 0b06 vpush {d0-d2}
+ *[0-9a-f]+: ecbd 2b08 vpop {d2-d5}
+ *[0-9a-f]+: ed2d 1b0c vpush {d1-d6}
+ *[0-9a-f]+: fe71 0f4d vpst
+ *[0-9a-f]+: fd00 3e01 vstrwt\.32 q1, \[q0, #-4\]
+ *[0-9a-f]+: ed82 2f80 vstr FPSCR, \[r2\]
+ *[0-9a-f]+: ed80 0b00 vstr d0, \[r0\]
+ *[0-9a-f]+: ed90 0b00 vldr d0, \[r0\]
+ *[0-9a-f]+: ed80 0a00 vstr s0, \[r0\]
+ *[0-9a-f]+: ed90 0a00 vldr s0, \[r0\]
+ *[0-9a-f]+: ed81 fb00 vstr d15, \[r1\]
+ *[0-9a-f]+: ed91 fb00 vldr d15, \[r1\]
+ *[0-9a-f]+: edc1 fa00 vstr s31, \[r1\]
+ *[0-9a-f]+: edd1 fa00 vldr s31, \[r1\]
diff --git a/gas/testsuite/gas/arm/v8_1m-mve.s b/gas/testsuite/gas/arm/v8_1m-mve.s
new file mode 100644
index 0000000..cae1f93
--- /dev/null
+++ b/gas/testsuite/gas/arm/v8_1m-mve.s
@@ -0,0 +1,24 @@
+.syntax unified
+
+vstmia r0,{d0-d3}
+vldmia r7!, {d3-d4}
+
+vpop {d0-d2}
+vpush {d0-d2}
+vpop {d2-d5}
+vpush {d1-d6}
+
+vpst
+vstrwt.u32 q1, [q0, #-4]
+
+vstr FPSCR, [r2] @ Accepts offset variant without immediate
+
+vstr d0,[r0]
+vldr d0,[r0]
+vstr s0,[r0]
+vldr s0,[r0]
+
+vstr d15,[r1]
+vldr d15,[r1]
+vstr s31,[r1]
+vldr s31,[r1]