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author | Maciej W. Rozycki <macro@redhat.com> | 2024-07-19 09:42:56 +0100 |
---|---|---|
committer | Maciej W. Rozycki <macro@redhat.com> | 2024-07-19 09:42:56 +0100 |
commit | a70e2bc4fcc8ebefba9c4fe9144185ac7876d75b (patch) | |
tree | 6829deb90da64d500704de0e9e71bcf4851a20d7 /gas/testsuite | |
parent | 875ac09b1217981fcd8d72908f45ecd9540fe8b5 (diff) | |
download | gdb-a70e2bc4fcc8ebefba9c4fe9144185ac7876d75b.zip gdb-a70e2bc4fcc8ebefba9c4fe9144185ac7876d75b.tar.gz gdb-a70e2bc4fcc8ebefba9c4fe9144185ac7876d75b.tar.bz2 |
MIPS/GAS/testsuite: Run the div macro test across architectures
The division macros expand differently depending on the ISA selected, so
run the 'div' macro test across compatible architectures, adopting the
'div-ilocks' test orphaned by commit 23fce1e31156 ("MIPS16 intermix test
failure"), <https://sourceware.org/ml/binutils/2009-01/msg00335.html>,
and providing coverage for the expansion variants.
Only run from MIPS III up for now and remove the ISA override from the
source, so that the 64-bit instructions are covered for individual
64-bit architectures.
Diffstat (limited to 'gas/testsuite')
-rw-r--r-- | gas/testsuite/gas/mips/div-ilocks.d | 110 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/div.d | 179 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/div.s | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/micromips@div.d | 125 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips.exp | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips3@div.d | 126 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips4@div.d | 5 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips5@div.d | 5 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/r4000@div.d | 5 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/vr5400@div.d | 5 |
10 files changed, 357 insertions, 210 deletions
diff --git a/gas/testsuite/gas/mips/div-ilocks.d b/gas/testsuite/gas/mips/div-ilocks.d deleted file mode 100644 index a3ff94b..0000000 --- a/gas/testsuite/gas/mips/div-ilocks.d +++ /dev/null @@ -1,110 +0,0 @@ -#objdump: -dr --prefix-addresses -mmips:4000 -#name: MIPS div -#source: div.s - -# Test the div macro. - -.*: +file format .*mips.* - -Disassembly of section .text: -0+0000 <[^>]*> div zero,a0,a1 -0+0004 <[^>]*> bnez a1,0+0010 <foo\+0x10> -0+0008 <[^>]*> div zero,a0,a1 -0+000c <[^>]*> break (0x0,0x7|0x7) -0+0010 <[^>]*> li at,-1 -0+0014 <[^>]*> bne a1,at,0+0028 <foo\+0x28> -0+0018 <[^>]*> lui at,0x8000 -0+001c <[^>]*> bne a0,at,0+0028 <foo\+0x28> -0+0020 <[^>]*> nop -0+0024 <[^>]*> break (0x0,0x6|0x6) -0+0028 <[^>]*> mflo a0 -0+002c <[^>]*> bnez a2,0+0038 <foo\+0x38> -0+0030 <[^>]*> div zero,a1,a2 -0+0034 <[^>]*> break (0x0,0x7|0x7) -0+0038 <[^>]*> li at,-1 -0+003c <[^>]*> bne a2,at,0+0050 <foo\+0x50> -0+0040 <[^>]*> lui at,0x8000 -0+0044 <[^>]*> bne a1,at,0+0050 <foo\+0x50> -0+0048 <[^>]*> nop -0+004c <[^>]*> break (0x0,0x6|0x6) -0+0050 <[^>]*> mflo a0 -0+0054 <[^>]*> move a0,a0 -0+0058 <[^>]*> move a0,a1 -0+005c <[^>]*> neg a0,a0 -0+0060 <[^>]*> neg a0,a1 -0+0064 <[^>]*> li at,2 -0+0068 <[^>]*> div zero,a0,at -0+006c <[^>]*> mflo a0 -0+0070 <[^>]*> li at,2 -0+0074 <[^>]*> div zero,a1,at -0+0078 <[^>]*> mflo a0 -0+007c <[^>]*> li at,0x8000 -0+0080 <[^>]*> div zero,a0,at -0+0084 <[^>]*> mflo a0 -0+0088 <[^>]*> li at,0x8000 -0+008c <[^>]*> div zero,a1,at -0+0090 <[^>]*> mflo a0 -0+0094 <[^>]*> li at,-32768 -0+0098 <[^>]*> div zero,a0,at -0+009c <[^>]*> mflo a0 -0+00a0 <[^>]*> li at,-32768 -0+00a4 <[^>]*> div zero,a1,at -0+00a8 <[^>]*> mflo a0 -0+00ac <[^>]*> lui at,0x1 -0+00b0 <[^>]*> div zero,a0,at -0+00b4 <[^>]*> mflo a0 -0+00b8 <[^>]*> lui at,0x1 -0+00bc <[^>]*> div zero,a1,at -0+00c0 <[^>]*> mflo a0 -0+00c4 <[^>]*> lui at,0x1 -0+00c8 <[^>]*> ori at,at,0xa5a5 -0+00cc <[^>]*> div zero,a0,at -0+00d0 <[^>]*> mflo a0 -0+00d4 <[^>]*> lui at,0x1 -0+00d8 <[^>]*> ori at,at,0xa5a5 -0+00dc <[^>]*> div zero,a1,at -0+00e0 <[^>]*> mflo a0 -0+00e4 <[^>]*> divu zero,a0,a1 -0+00e8 <[^>]*> bnez a1,0+0f4 <foo\+0xf4> -0+00ec <[^>]*> divu zero,a0,a1 -0+00f0 <[^>]*> break (0x0,0x7|0x7) -0+00f4 <[^>]*> mflo a0 -0+00f8 <[^>]*> bnez a2,0+0104 <foo\+0x104> -0+00fc <[^>]*> divu zero,a1,a2 -0+0100 <[^>]*> break (0x0,0x7|0x7) -0+0104 <[^>]*> mflo a0 -0+0108 <[^>]*> move a0,a0 -0+010c <[^>]*> bnez a2,0+0118 <foo\+0x118> -0+0110 <[^>]*> div zero,a1,a2 -0+0114 <[^>]*> break (0x0,0x7|0x7) -0+0118 <[^>]*> li at,-1 -0+011c <[^>]*> bne a2,at,0+0130 <foo\+0x130> -0+0120 <[^>]*> lui at,0x8000 -0+0124 <[^>]*> bne a1,at,0+0130 <foo\+0x130> -0+0128 <[^>]*> nop -0+012c <[^>]*> break (0x0,0x6|0x6) -0+0130 <[^>]*> mfhi a0 -0+0134 <[^>]*> li at,2 -0+0138 <[^>]*> divu zero,a1,at -0+013c <[^>]*> mfhi a0 -0+0140 <[^>]*> bnez a2,0+014c <foo\+0x14c> -0+0144 <[^>]*> ddiv zero,a1,a2 -0+0148 <[^>]*> break (0x0,0x7|0x7) -0+014c <[^>]*> daddiu at,zero,-1 -0+0150 <[^>]*> bne a2,at,0+0168 <foo\+0x168> -0+0154 <[^>]*> daddiu at,zero,1 -0+0158 <[^>]*> dsll32 at,at,0x1f -0+015c <[^>]*> bne a1,at,0+0168 <foo\+0x168> -0+0160 <[^>]*> nop -0+0164 <[^>]*> break (0x0,0x6|0x6) -0+0168 <[^>]*> mflo a0 -0+016c <[^>]*> li at,2 -0+0170 <[^>]*> ddivu zero,a1,at -0+0174 <[^>]*> mflo a0 -0+0178 <[^>]*> li at,0x8000 -0+017c <[^>]*> ddiv zero,a1,at -0+0180 <[^>]*> mfhi a0 -0+0184 <[^>]*> li at,-32768 -0+0188 <[^>]*> ddivu zero,a1,at -0+018c <[^>]*> mfhi a0 - ... diff --git a/gas/testsuite/gas/mips/div.d b/gas/testsuite/gas/mips/div.d index 869c0fd..fae4a57 100644 --- a/gas/testsuite/gas/mips/div.d +++ b/gas/testsuite/gas/mips/div.d @@ -1,5 +1,5 @@ -#as: -march=r4000 -mtune=r4000 -#objdump: -dr --prefix-addresses -mmips:4000 +#as: -32 +#objdump: -dr --prefix-addresses #name: MIPS div # Test the div macro. @@ -18,108 +18,93 @@ Disassembly of section .text: 0+0020 <[^>]*> nop 0+0024 <[^>]*> break (0x0,0x6|0x6) 0+0028 <[^>]*> mflo a0 -0+002c <[^>]*> nop -0+0030 <[^>]*> bnez a2,0+003c <foo\+0x3c> -0+0034 <[^>]*> div zero,a1,a2 -0+0038 <[^>]*> break (0x0,0x7|0x7) -0+003c <[^>]*> li at,-1 -0+0040 <[^>]*> bne a2,at,0+0054 <foo\+0x54> -0+0044 <[^>]*> lui at,0x8000 -0+0048 <[^>]*> bne a1,at,0+0054 <foo\+0x54> -0+004c <[^>]*> nop -0+0050 <[^>]*> break (0x0,0x6|0x6) -0+0054 <[^>]*> mflo a0 -0+0058 <[^>]*> move a0,a0 -0+005c <[^>]*> move a0,a1 -0+0060 <[^>]*> neg a0,a0 -0+0064 <[^>]*> neg a0,a1 -0+0068 <[^>]*> li at,2 -0+006c <[^>]*> div zero,a0,at -0+0070 <[^>]*> mflo a0 -0+0074 <[^>]*> li at,2 -0+0078 <[^>]*> nop -0+007c <[^>]*> div zero,a1,at -0+0080 <[^>]*> mflo a0 -0+0084 <[^>]*> li at,0x8000 -0+0088 <[^>]*> nop -0+008c <[^>]*> div zero,a0,at +0+002c <[^>]*> bnez a2,0+0038 <foo\+0x38> +0+0030 <[^>]*> div zero,a1,a2 +0+0034 <[^>]*> break (0x0,0x7|0x7) +0+0038 <[^>]*> li at,-1 +0+003c <[^>]*> bne a2,at,0+0050 <foo\+0x50> +0+0040 <[^>]*> lui at,0x8000 +0+0044 <[^>]*> bne a1,at,0+0050 <foo\+0x50> +0+0048 <[^>]*> nop +0+004c <[^>]*> break (0x0,0x6|0x6) +0+0050 <[^>]*> mflo a0 +0+0054 <[^>]*> move a0,a0 +0+0058 <[^>]*> move a0,a1 +0+005c <[^>]*> neg a0,a0 +0+0060 <[^>]*> neg a0,a1 +0+0064 <[^>]*> li at,2 +0+0068 <[^>]*> div zero,a0,at +0+006c <[^>]*> mflo a0 +0+0070 <[^>]*> li at,2 +0+0074 <[^>]*> div zero,a1,at +0+0078 <[^>]*> mflo a0 +0+007c <[^>]*> li at,0x8000 +0+0080 <[^>]*> div zero,a0,at +0+0084 <[^>]*> mflo a0 +0+0088 <[^>]*> li at,0x8000 +0+008c <[^>]*> div zero,a1,at 0+0090 <[^>]*> mflo a0 -0+0094 <[^>]*> li at,0x8000 -0+0098 <[^>]*> nop -0+009c <[^>]*> div zero,a1,at -0+00a0 <[^>]*> mflo a0 -0+00a4 <[^>]*> li at,-32768 -0+00a8 <[^>]*> nop -0+00ac <[^>]*> div zero,a0,at -0+00b0 <[^>]*> mflo a0 -0+00b4 <[^>]*> li at,-32768 -0+00b8 <[^>]*> nop +0+0094 <[^>]*> li at,-32768 +0+0098 <[^>]*> div zero,a0,at +0+009c <[^>]*> mflo a0 +0+00a0 <[^>]*> li at,-32768 +0+00a4 <[^>]*> div zero,a1,at +0+00a8 <[^>]*> mflo a0 +0+00ac <[^>]*> lui at,0x1 +0+00b0 <[^>]*> div zero,a0,at +0+00b4 <[^>]*> mflo a0 +0+00b8 <[^>]*> lui at,0x1 0+00bc <[^>]*> div zero,a1,at 0+00c0 <[^>]*> mflo a0 0+00c4 <[^>]*> lui at,0x1 -0+00c8 <[^>]*> nop +0+00c8 <[^>]*> ori at,at,0xa5a5 0+00cc <[^>]*> div zero,a0,at 0+00d0 <[^>]*> mflo a0 0+00d4 <[^>]*> lui at,0x1 -0+00d8 <[^>]*> nop +0+00d8 <[^>]*> ori at,at,0xa5a5 0+00dc <[^>]*> div zero,a1,at 0+00e0 <[^>]*> mflo a0 -0+00e4 <[^>]*> lui at,0x1 -0+00e8 <[^>]*> ori at,at,0xa5a5 -0+00ec <[^>]*> div zero,a0,at -0+00f0 <[^>]*> mflo a0 -0+00f4 <[^>]*> lui at,0x1 -0+00f8 <[^>]*> ori at,at,0xa5a5 -0+00fc <[^>]*> div zero,a1,at -0+0100 <[^>]*> mflo a0 - ... -0+010c <[^>]*> divu zero,a0,a1 -0+0110 <[^>]*> bnez a1,0+011c <foo\+0x11c> -0+0114 <[^>]*> divu zero,a0,a1 -0+0118 <[^>]*> break (0x0,0x7|0x7) -0+011c <[^>]*> mflo a0 -0+0120 <[^>]*> nop -0+0124 <[^>]*> bnez a2,0+0130 <foo\+0x130> -0+0128 <[^>]*> divu zero,a1,a2 -0+012c <[^>]*> break (0x0,0x7|0x7) -0+0130 <[^>]*> mflo a0 -0+0134 <[^>]*> move a0,a0 -0+0138 <[^>]*> bnez a2,0+0144 <foo\+0x144> -0+013c <[^>]*> div zero,a1,a2 -0+0140 <[^>]*> break (0x0,0x7|0x7) -0+0144 <[^>]*> li at,-1 -0+0148 <[^>]*> bne a2,at,0+015c <foo\+0x15c> -0+014c <[^>]*> lui at,0x8000 -0+0150 <[^>]*> bne a1,at,0+015c <foo\+0x15c> -0+0154 <[^>]*> nop -0+0158 <[^>]*> break (0x0,0x6|0x6) -0+015c <[^>]*> mfhi a0 -0+0160 <[^>]*> li at,2 -0+0164 <[^>]*> nop -0+0168 <[^>]*> divu zero,a1,at -0+016c <[^>]*> mfhi a0 -0+0170 <[^>]*> nop -0+0174 <[^>]*> bnez a2,0+0180 <foo\+0x180> -0+0178 <[^>]*> ddiv zero,a1,a2 -0+017c <[^>]*> break (0x0,0x7|0x7) -0+0180 <[^>]*> (daddiu at,zero,-1|li at,-1) -0+0184 <[^>]*> bne a2,at,0+019c <foo\+0x19c> -0+0188 <[^>]*> (daddiu at,zero,1|li at,1) -0+018c <[^>]*> dsll32 at,at,0x1f -0+0190 <[^>]*> bne a1,at,0+019c <foo\+0x19c> -0+0194 <[^>]*> nop -0+0198 <[^>]*> break (0x0,0x6|0x6) -0+019c <[^>]*> mflo a0 -0+01a0 <[^>]*> li at,2 -0+01a4 <[^>]*> nop -0+01a8 <[^>]*> ddivu zero,a1,at -0+01ac <[^>]*> mflo a0 -0+01b0 <[^>]*> li at,0x8000 -0+01b4 <[^>]*> nop -0+01b8 <[^>]*> ddiv zero,a1,at -0+01bc <[^>]*> mfhi a0 -0+01c0 <[^>]*> li at,-32768 -0+01c4 <[^>]*> nop -0+01c8 <[^>]*> ddivu zero,a1,at -0+01cc <[^>]*> mfhi a0 +0+00e4 <[^>]*> divu zero,a0,a1 +0+00e8 <[^>]*> bnez a1,0+0f4 <foo\+0xf4> +0+00ec <[^>]*> divu zero,a0,a1 +0+00f0 <[^>]*> break (0x0,0x7|0x7) +0+00f4 <[^>]*> mflo a0 +0+00f8 <[^>]*> bnez a2,0+0104 <foo\+0x104> +0+00fc <[^>]*> divu zero,a1,a2 +0+0100 <[^>]*> break (0x0,0x7|0x7) +0+0104 <[^>]*> mflo a0 +0+0108 <[^>]*> move a0,a0 +0+010c <[^>]*> bnez a2,0+0118 <foo\+0x118> +0+0110 <[^>]*> div zero,a1,a2 +0+0114 <[^>]*> break (0x0,0x7|0x7) +0+0118 <[^>]*> li at,-1 +0+011c <[^>]*> bne a2,at,0+0130 <foo\+0x130> +0+0120 <[^>]*> lui at,0x8000 +0+0124 <[^>]*> bne a1,at,0+0130 <foo\+0x130> +0+0128 <[^>]*> nop +0+012c <[^>]*> break (0x0,0x6|0x6) +0+0130 <[^>]*> mfhi a0 +0+0134 <[^>]*> li at,2 +0+0138 <[^>]*> divu zero,a1,at +0+013c <[^>]*> mfhi a0 +0+0140 <[^>]*> bnez a2,0+014c <foo\+0x14c> +0+0144 <[^>]*> ddiv zero,a1,a2 +0+0148 <[^>]*> break (0x0,0x7|0x7) +0+014c <[^>]*> (daddiu at,zero,-1|li at,-1) +0+0150 <[^>]*> bne a2,at,0+0168 <foo\+0x168> +0+0154 <[^>]*> (daddiu at,zero,1|li at,1) +0+0158 <[^>]*> dsll32 at,at,0x1f +0+015c <[^>]*> bne a1,at,0+0168 <foo\+0x168> +0+0160 <[^>]*> nop +0+0164 <[^>]*> break (0x0,0x6|0x6) +0+0168 <[^>]*> mflo a0 +0+016c <[^>]*> li at,2 +0+0170 <[^>]*> ddivu zero,a1,at +0+0174 <[^>]*> mflo a0 +0+0178 <[^>]*> li at,0x8000 +0+017c <[^>]*> ddiv zero,a1,at +0+0180 <[^>]*> mfhi a0 +0+0184 <[^>]*> li at,-32768 +0+0188 <[^>]*> ddivu zero,a1,at +0+018c <[^>]*> mfhi a0 ... diff --git a/gas/testsuite/gas/mips/div.s b/gas/testsuite/gas/mips/div.s index 6d99906..14e9e89 100644 --- a/gas/testsuite/gas/mips/div.s +++ b/gas/testsuite/gas/mips/div.s @@ -30,7 +30,6 @@ foo: remu $4,$5,2 # Sanity check the 64 bit versions. - .set mips3 ddiv $4,$5,$6 ddivu $4,$5,2 drem $4,$5,0x8000 @@ -38,4 +37,5 @@ foo: # force some padding, to make objdump consistently report that there's some # here... - .space 8 + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/micromips@div.d b/gas/testsuite/gas/mips/micromips@div.d new file mode 100644 index 0000000..c7df292 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@div.d @@ -0,0 +1,125 @@ +#as: -32 +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS div +#source: div.s + +# Test the div macro. + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 00a4 ab3c div zero,a0,a1 +[0-9a-f]+ <[^>]*> b405 fffe bnez a1,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_0 +[0-9a-f]+ <[^>]*> 00a4 ab3c div zero,a0,a1 +[0-9a-f]+ <[^>]*> 4687 break 0x7 +[0-9a-f]+ <\.L\^_0> 3020 ffff li at,-1 +[0-9a-f]+ <[^>]*> b425 fffe bne a1,at,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_1 +[0-9a-f]+ <[^>]*> 41a1 8000 lui at,0x8000 +[0-9a-f]+ <[^>]*> b424 fffe bne a0,at,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_1 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4686 break 0x6 +[0-9a-f]+ <\.L\^_1> 4644 mflo a0 +[0-9a-f]+ <[^>]*> b406 fffe bnez a2,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_2 +[0-9a-f]+ <[^>]*> 00c5 ab3c div zero,a1,a2 +[0-9a-f]+ <[^>]*> 4687 break 0x7 +[0-9a-f]+ <\.L\^_2> 3020 ffff li at,-1 +[0-9a-f]+ <[^>]*> b426 fffe bne a2,at,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_3 +[0-9a-f]+ <[^>]*> 41a1 8000 lui at,0x8000 +[0-9a-f]+ <[^>]*> b425 fffe bne a1,at,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_3 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4686 break 0x6 +[0-9a-f]+ <\.L\^_3> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 0c84 move a0,a0 +[0-9a-f]+ <[^>]*> 0c85 move a0,a1 +[0-9a-f]+ <[^>]*> 0080 2190 neg a0,a0 +[0-9a-f]+ <[^>]*> 00a0 2190 neg a0,a1 +[0-9a-f]+ <[^>]*> 3020 0002 li at,2 +[0-9a-f]+ <[^>]*> 0024 ab3c div zero,a0,at +[0-9a-f]+ <[^>]*> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 3020 0002 li at,2 +[0-9a-f]+ <[^>]*> 0025 ab3c div zero,a1,at +[0-9a-f]+ <[^>]*> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 0024 ab3c div zero,a0,at +[0-9a-f]+ <[^>]*> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 0025 ab3c div zero,a1,at +[0-9a-f]+ <[^>]*> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 +[0-9a-f]+ <[^>]*> 0024 ab3c div zero,a0,at +[0-9a-f]+ <[^>]*> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 +[0-9a-f]+ <[^>]*> 0025 ab3c div zero,a1,at +[0-9a-f]+ <[^>]*> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 0024 ab3c div zero,a0,at +[0-9a-f]+ <[^>]*> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 0025 ab3c div zero,a1,at +[0-9a-f]+ <[^>]*> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 5021 a5a5 ori at,at,0xa5a5 +[0-9a-f]+ <[^>]*> 0024 ab3c div zero,a0,at +[0-9a-f]+ <[^>]*> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1 +[0-9a-f]+ <[^>]*> 5021 a5a5 ori at,at,0xa5a5 +[0-9a-f]+ <[^>]*> 0025 ab3c div zero,a1,at +[0-9a-f]+ <[^>]*> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 00a4 bb3c divu zero,a0,a1 +[0-9a-f]+ <[^>]*> b405 fffe bnez a1,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_4 +[0-9a-f]+ <[^>]*> 00a4 bb3c divu zero,a0,a1 +[0-9a-f]+ <[^>]*> 4687 break 0x7 +[0-9a-f]+ <\.L\^_4> 4644 mflo a0 +[0-9a-f]+ <[^>]*> b406 fffe bnez a2,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_5 +[0-9a-f]+ <[^>]*> 00c5 bb3c divu zero,a1,a2 +[0-9a-f]+ <[^>]*> 4687 break 0x7 +[0-9a-f]+ <\.L\^_5> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 0c84 move a0,a0 +[0-9a-f]+ <[^>]*> b406 fffe bnez a2,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_6 +[0-9a-f]+ <[^>]*> 00c5 ab3c div zero,a1,a2 +[0-9a-f]+ <[^>]*> 4687 break 0x7 +[0-9a-f]+ <\.L\^_6> 3020 ffff li at,-1 +[0-9a-f]+ <[^>]*> b426 fffe bne a2,at,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_7 +[0-9a-f]+ <[^>]*> 41a1 8000 lui at,0x8000 +[0-9a-f]+ <[^>]*> b425 fffe bne a1,at,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_7 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4686 break 0x6 +[0-9a-f]+ <\.L\^_7> 4604 mfhi a0 +[0-9a-f]+ <[^>]*> 3020 0002 li at,2 +[0-9a-f]+ <[^>]*> 0025 bb3c divu zero,a1,at +[0-9a-f]+ <[^>]*> 4604 mfhi a0 +[0-9a-f]+ <[^>]*> b406 fffe bnez a2,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_8 +[0-9a-f]+ <[^>]*> 58c5 ab3c ddiv zero,a1,a2 +[0-9a-f]+ <[^>]*> 4687 break 0x7 +[0-9a-f]+ <\.L\^_8> 3020 ffff li at,-1 +[0-9a-f]+ <[^>]*> b426 fffe bne a2,at,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_9 +[0-9a-f]+ <[^>]*> 3020 0001 li at,1 +[0-9a-f]+ <[^>]*> 5821 f808 dsll32 at,at,0x1f +[0-9a-f]+ <[^>]*> b425 fffe bne a1,at,[0-9a-f]+ <[^>]*> + [0-9a-f]+: R_MICROMIPS_PC16_S1 \.L\^_9 +[0-9a-f]+ <[^>]*> 0c00 nop +[0-9a-f]+ <[^>]*> 4686 break 0x6 +[0-9a-f]+ <\.L\^_9> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 3020 0002 li at,2 +[0-9a-f]+ <[^>]*> 5825 bb3c ddivu zero,a1,at +[0-9a-f]+ <[^>]*> 4644 mflo a0 +[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 +[0-9a-f]+ <[^>]*> 5825 ab3c ddiv zero,a1,at +[0-9a-f]+ <[^>]*> 4604 mfhi a0 +[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 +[0-9a-f]+ <[^>]*> 5825 bb3c ddivu zero,a1,at +[0-9a-f]+ <[^>]*> 4604 mfhi a0 + \.\.\. diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index a211e02..3586fa1 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -725,7 +725,8 @@ if { [istarget mips*-*-vxworks*] } { run_list_test "compact-eh-err1" run_list_test "compact-eh-err2" - run_dump_test "div" + run_dump_test_arches "div" [mips_arch_list_matching mips3 !r5900 \ + !mips64r6] if { !$addr32 && $has_newabi } { run_dump_test_arches "dli" [mips_arch_list_matching mips3] diff --git a/gas/testsuite/gas/mips/mips3@div.d b/gas/testsuite/gas/mips/mips3@div.d new file mode 100644 index 0000000..2aedab3 --- /dev/null +++ b/gas/testsuite/gas/mips/mips3@div.d @@ -0,0 +1,126 @@ +#as: -32 +#objdump: -dr --prefix-addresses +#name: MIPS div +#source: div.s + +# Test the div macro. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> div zero,a0,a1 +0+0004 <[^>]*> bnez a1,0+0010 <foo\+0x10> +0+0008 <[^>]*> div zero,a0,a1 +0+000c <[^>]*> break (0x0,0x7|0x7) +0+0010 <[^>]*> li at,-1 +0+0014 <[^>]*> bne a1,at,0+0028 <foo\+0x28> +0+0018 <[^>]*> lui at,0x8000 +0+001c <[^>]*> bne a0,at,0+0028 <foo\+0x28> +0+0020 <[^>]*> nop +0+0024 <[^>]*> break (0x0,0x6|0x6) +0+0028 <[^>]*> mflo a0 +0+002c <[^>]*> nop +0+0030 <[^>]*> bnez a2,0+003c <foo\+0x3c> +0+0034 <[^>]*> div zero,a1,a2 +0+0038 <[^>]*> break (0x0,0x7|0x7) +0+003c <[^>]*> li at,-1 +0+0040 <[^>]*> bne a2,at,0+0054 <foo\+0x54> +0+0044 <[^>]*> lui at,0x8000 +0+0048 <[^>]*> bne a1,at,0+0054 <foo\+0x54> +0+004c <[^>]*> nop +0+0050 <[^>]*> break (0x0,0x6|0x6) +0+0054 <[^>]*> mflo a0 +0+0058 <[^>]*> move a0,a0 +0+005c <[^>]*> move a0,a1 +0+0060 <[^>]*> neg a0,a0 +0+0064 <[^>]*> neg a0,a1 +0+0068 <[^>]*> li at,2 +0+006c <[^>]*> div zero,a0,at +0+0070 <[^>]*> mflo a0 +0+0074 <[^>]*> li at,2 +0+0078 <[^>]*> nop +0+007c <[^>]*> div zero,a1,at +0+0080 <[^>]*> mflo a0 +0+0084 <[^>]*> li at,0x8000 +0+0088 <[^>]*> nop +0+008c <[^>]*> div zero,a0,at +0+0090 <[^>]*> mflo a0 +0+0094 <[^>]*> li at,0x8000 +0+0098 <[^>]*> nop +0+009c <[^>]*> div zero,a1,at +0+00a0 <[^>]*> mflo a0 +0+00a4 <[^>]*> li at,-32768 +0+00a8 <[^>]*> nop +0+00ac <[^>]*> div zero,a0,at +0+00b0 <[^>]*> mflo a0 +0+00b4 <[^>]*> li at,-32768 +0+00b8 <[^>]*> nop +0+00bc <[^>]*> div zero,a1,at +0+00c0 <[^>]*> mflo a0 +0+00c4 <[^>]*> lui at,0x1 +0+00c8 <[^>]*> nop +0+00cc <[^>]*> div zero,a0,at +0+00d0 <[^>]*> mflo a0 +0+00d4 <[^>]*> lui at,0x1 +0+00d8 <[^>]*> nop +0+00dc <[^>]*> div zero,a1,at +0+00e0 <[^>]*> mflo a0 +0+00e4 <[^>]*> lui at,0x1 +0+00e8 <[^>]*> ori at,at,0xa5a5 +0+00ec <[^>]*> div zero,a0,at +0+00f0 <[^>]*> mflo a0 +0+00f4 <[^>]*> lui at,0x1 +0+00f8 <[^>]*> ori at,at,0xa5a5 +0+00fc <[^>]*> div zero,a1,at +0+0100 <[^>]*> mflo a0 + ... +0+010c <[^>]*> divu zero,a0,a1 +0+0110 <[^>]*> bnez a1,0+011c <foo\+0x11c> +0+0114 <[^>]*> divu zero,a0,a1 +0+0118 <[^>]*> break (0x0,0x7|0x7) +0+011c <[^>]*> mflo a0 +0+0120 <[^>]*> nop +0+0124 <[^>]*> bnez a2,0+0130 <foo\+0x130> +0+0128 <[^>]*> divu zero,a1,a2 +0+012c <[^>]*> break (0x0,0x7|0x7) +0+0130 <[^>]*> mflo a0 +0+0134 <[^>]*> move a0,a0 +0+0138 <[^>]*> bnez a2,0+0144 <foo\+0x144> +0+013c <[^>]*> div zero,a1,a2 +0+0140 <[^>]*> break (0x0,0x7|0x7) +0+0144 <[^>]*> li at,-1 +0+0148 <[^>]*> bne a2,at,0+015c <foo\+0x15c> +0+014c <[^>]*> lui at,0x8000 +0+0150 <[^>]*> bne a1,at,0+015c <foo\+0x15c> +0+0154 <[^>]*> nop +0+0158 <[^>]*> break (0x0,0x6|0x6) +0+015c <[^>]*> mfhi a0 +0+0160 <[^>]*> li at,2 +0+0164 <[^>]*> nop +0+0168 <[^>]*> divu zero,a1,at +0+016c <[^>]*> mfhi a0 +0+0170 <[^>]*> nop +0+0174 <[^>]*> bnez a2,0+0180 <foo\+0x180> +0+0178 <[^>]*> ddiv zero,a1,a2 +0+017c <[^>]*> break (0x0,0x7|0x7) +0+0180 <[^>]*> (daddiu at,zero,-1|li at,-1) +0+0184 <[^>]*> bne a2,at,0+019c <foo\+0x19c> +0+0188 <[^>]*> (daddiu at,zero,1|li at,1) +0+018c <[^>]*> dsll32 at,at,0x1f +0+0190 <[^>]*> bne a1,at,0+019c <foo\+0x19c> +0+0194 <[^>]*> nop +0+0198 <[^>]*> break (0x0,0x6|0x6) +0+019c <[^>]*> mflo a0 +0+01a0 <[^>]*> li at,2 +0+01a4 <[^>]*> nop +0+01a8 <[^>]*> ddivu zero,a1,at +0+01ac <[^>]*> mflo a0 +0+01b0 <[^>]*> li at,0x8000 +0+01b4 <[^>]*> nop +0+01b8 <[^>]*> ddiv zero,a1,at +0+01bc <[^>]*> mfhi a0 +0+01c0 <[^>]*> li at,-32768 +0+01c4 <[^>]*> nop +0+01c8 <[^>]*> ddivu zero,a1,at +0+01cc <[^>]*> mfhi a0 + ... diff --git a/gas/testsuite/gas/mips/mips4@div.d b/gas/testsuite/gas/mips/mips4@div.d new file mode 100644 index 0000000..b513cd5 --- /dev/null +++ b/gas/testsuite/gas/mips/mips4@div.d @@ -0,0 +1,5 @@ +#as: -32 +#objdump: -dr --prefix-addresses +#name: MIPS div +#source: div.s +#dump: mips3@div.d diff --git a/gas/testsuite/gas/mips/mips5@div.d b/gas/testsuite/gas/mips/mips5@div.d new file mode 100644 index 0000000..b513cd5 --- /dev/null +++ b/gas/testsuite/gas/mips/mips5@div.d @@ -0,0 +1,5 @@ +#as: -32 +#objdump: -dr --prefix-addresses +#name: MIPS div +#source: div.s +#dump: mips3@div.d diff --git a/gas/testsuite/gas/mips/r4000@div.d b/gas/testsuite/gas/mips/r4000@div.d new file mode 100644 index 0000000..b513cd5 --- /dev/null +++ b/gas/testsuite/gas/mips/r4000@div.d @@ -0,0 +1,5 @@ +#as: -32 +#objdump: -dr --prefix-addresses +#name: MIPS div +#source: div.s +#dump: mips3@div.d diff --git a/gas/testsuite/gas/mips/vr5400@div.d b/gas/testsuite/gas/mips/vr5400@div.d new file mode 100644 index 0000000..b513cd5 --- /dev/null +++ b/gas/testsuite/gas/mips/vr5400@div.d @@ -0,0 +1,5 @@ +#as: -32 +#objdump: -dr --prefix-addresses +#name: MIPS div +#source: div.s +#dump: mips3@div.d |