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| author | Alan Modra <amodra@gmail.com> | 2022-03-16 09:59:07 +1030 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2022-03-16 09:59:07 +1030 |
| commit | 42952a9605b00e4b1d6514de9b30e56d4dcb8bbe (patch) | |
| tree | 75c8dfbfc16defe8b00e99366c272fff18b62ed0 /gas/testsuite | |
| parent | 8f50b4b574b9f34c4f23ce6d6508f72e9c2f5a59 (diff) | |
| download | gdb-42952a9605b00e4b1d6514de9b30e56d4dcb8bbe.zip gdb-42952a9605b00e4b1d6514de9b30e56d4dcb8bbe.tar.gz gdb-42952a9605b00e4b1d6514de9b30e56d4dcb8bbe.tar.bz2 | |
PowerPC64 extended instructions in powerpc_macros
The extended instructions implemented in powerpc_macros aren't used by
the disassembler. That means instructions like "sldi r3,r3,2" appear
in disassembly as "rldicr r3,r3,2,61", which is annoying since many
other extended instructions are shown.
Note that some of the instructions moved out of the macro table to the
opcode table won't appear in disassembly, because they are aliases
rather than a subset of the underlying raw instruction. If enabled,
rotrdi, extrdi, extldi, clrlsldi, and insrdi would replace all
occurrences of rotldi, rldicl, rldicr, rldic and rldimi. (Or many
occurrences in the case of clrlsldi if n <= b was added to the extract
functions.)
The patch also fixes a small bug in opcode sanity checking.
include/
* opcode/ppc.h (PPC_OPSHIFT_SH6): Define.
opcodes/
* ppc-opc.c (insert_erdn, extract_erdn, insert_eldn, extract_eldn),
(insert_crdn, extract_crdn, insert_rrdn, extract_rrdn),
(insert_sldn, extract_sldn, insert_srdn, extract_srdn),
(insert_erdb, extract_erdb, insert_csldn, extract_csldb),
(insert_irdb, extract_irdn): New functions.
(ELDn, ERDn, ERDn, RRDn, SRDn, ERDb, CSLDn, CSLDb, IRDn, IRDb):
Define and add associated powerpc_operands entries.
(powerpc_opcodes): Add "rotrdi", "srdi", "extrdi", "clrrdi",
"sldi", "extldi", "clrlsldi", "insrdi" and corresponding record
(ie. dot suffix) forms.
(powerpc_macros): Delete same from here.
gas/
* config/tc-ppc.c (insn_validate): Don't modify value passed
to operand->insert for PPC_OPERAND_PLUS1 when calculating mask.
Handle PPC_OPSHIFT_SH6.
* testsuite/gas/ppc/prefix-reloc.d: Update.
* testsuite/gas/ppc/simpshft.d: Update.
ld/
* testsuite/ld-powerpc/elfv2so.d: Update.
* testsuite/ld-powerpc/notoc.d: Update.
* testsuite/ld-powerpc/notoc3.d: Update.
* testsuite/ld-powerpc/tlsdesc2.d: Update.
* testsuite/ld-powerpc/tlsget.d: Update.
* testsuite/ld-powerpc/tlsget2.d: Update.
* testsuite/ld-powerpc/tlsopt5.d: Update.
* testsuite/ld-powerpc/tlsopt6.d: Update.
Diffstat (limited to 'gas/testsuite')
| -rw-r--r-- | gas/testsuite/gas/ppc/prefix-reloc.d | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/ppc/simpshft.d | 26 |
2 files changed, 14 insertions, 14 deletions
diff --git a/gas/testsuite/gas/ppc/prefix-reloc.d b/gas/testsuite/gas/ppc/prefix-reloc.d index b442419..e79f4aa 100644 --- a/gas/testsuite/gas/ppc/prefix-reloc.d +++ b/gas/testsuite/gas/ppc/prefix-reloc.d @@ -10,7 +10,7 @@ Disassembly of section \.text: 0: (00 00 00 06|06 00 00 00) pli r9,0 4: (00 00 20 39|39 20 00 00) 0: R_PPC64_D34_HA30 ext - 8: (46 17 29 79|79 29 17 46) rldicr r9,r9,34,29 + 8: (46 17 29 79|79 29 17 46) sldi r9,r9,34 c: (00 00 00 06|06 00 00 00) paddi r9,r9,0 10: (00 00 29 39|39 29 00 00) c: R_PPC64_D34_LO ext diff --git a/gas/testsuite/gas/ppc/simpshft.d b/gas/testsuite/gas/ppc/simpshft.d index b4cccd5..b88752c8 100644 --- a/gas/testsuite/gas/ppc/simpshft.d +++ b/gas/testsuite/gas/ppc/simpshft.d @@ -7,19 +7,19 @@ Disassembly of section .text: 0+ <.text>: - 0: (e0 0f 64 78|78 64 0f e0) rldicl r4,r3,1,63 + 0: (e0 0f 64 78|78 64 0f e0) srdi r4,r3,63 4: (0e f8 83 78|78 83 f8 0e) rldimi r3,r4,63,0 - 8: (e4 45 a5 78|78 a5 45 e4) rldicr r5,r5,8,55 + 8: (e4 45 a5 78|78 a5 45 e4) sldi r5,r5,8 c: (20 00 64 78|78 64 00 20) clrldi r4,r3,32 10: (fe 0f 64 54|54 64 0f fe) rlwinm r4,r3,1,31,31 14: (00 f8 83 50|50 83 f8 00) rlwimi r3,r4,31,0,0 18: (2e 40 a5 54|54 a5 40 2e) rlwinm r5,r5,8,0,23 1c: (3e 04 64 54|54 64 04 3e) clrlwi r4,r3,16 - 20: (04 00 64 78|78 64 00 04) rldicr r4,r3,0,0 - 24: (e4 07 64 78|78 64 07 e4) rldicr r4,r3,0,63 - 28: (06 f8 64 78|78 64 f8 06) rldicr r4,r3,63,0 + 20: (04 00 64 78|78 64 00 04) clrrdi r4,r3,63 + 24: (e4 07 64 78|78 64 07 e4) clrrdi r4,r3,0 + 28: (06 f8 64 78|78 64 f8 06) sldi r4,r3,63 2c: (e6 ff 64 78|78 64 ff e6) rldicr r4,r3,63,63 - 30: (42 f8 64 78|78 64 f8 42) rldicl r4,r3,63,1 + 30: (42 f8 64 78|78 64 f8 42) srdi r4,r3,1 34: (e2 ff 64 78|78 64 ff e2) rldicl r4,r3,63,63 38: (0c 00 64 78|78 64 00 0c) rldimi r4,r3,0,0 3c: (0c 08 64 78|78 64 08 0c) rldimi r4,r3,1,0 @@ -32,17 +32,17 @@ Disassembly of section .text: 58: (02 f8 64 78|78 64 f8 02) rotldi r4,r3,63 5c: (00 08 64 78|78 64 08 00) rotldi r4,r3,1 60: (10 20 65 78|78 65 20 10) rotld r5,r3,r4 - 64: (e4 07 64 78|78 64 07 e4) rldicr r4,r3,0,63 - 68: (06 f8 64 78|78 64 f8 06) rldicr r4,r3,63,0 + 64: (e4 07 64 78|78 64 07 e4) clrrdi r4,r3,0 + 68: (06 f8 64 78|78 64 f8 06) sldi r4,r3,63 6c: (00 00 64 78|78 64 00 00) rotldi r4,r3,0 - 70: (42 f8 64 78|78 64 f8 42) rldicl r4,r3,63,1 - 74: (e0 0f 64 78|78 64 0f e0) rldicl r4,r3,1,63 + 70: (42 f8 64 78|78 64 f8 42) srdi r4,r3,1 + 74: (e0 0f 64 78|78 64 0f e0) srdi r4,r3,63 78: (00 00 64 78|78 64 00 00) rotldi r4,r3,0 7c: (40 00 64 78|78 64 00 40) clrldi r4,r3,1 80: (e0 07 64 78|78 64 07 e0) clrldi r4,r3,63 - 84: (e4 07 64 78|78 64 07 e4) rldicr r4,r3,0,63 - 88: (a4 07 64 78|78 64 07 a4) rldicr r4,r3,0,62 - 8c: (04 00 64 78|78 64 00 04) rldicr r4,r3,0,0 + 84: (e4 07 64 78|78 64 07 e4) clrrdi r4,r3,0 + 88: (a4 07 64 78|78 64 07 a4) clrrdi r4,r3,1 + 8c: (04 00 64 78|78 64 00 04) clrrdi r4,r3,63 90: (08 00 64 78|78 64 00 08) rldic r4,r3,0,0 94: (48 00 64 78|78 64 00 48) rldic r4,r3,0,1 98: (e8 07 64 78|78 64 07 e8) rldic r4,r3,0,63 |