diff options
author | Jan Beulich <jbeulich@novell.com> | 2005-07-01 06:51:39 +0000 |
---|---|---|
committer | Jan Beulich <jbeulich@novell.com> | 2005-07-01 06:51:39 +0000 |
commit | e4e8248d79d8461adf8b0cf22086e85a4c9ee0a4 (patch) | |
tree | ca212d70445e1db6133eb28d30620140141e24cb /gas/testsuite | |
parent | 85d162e6db2034e9763e6c77892c914b0dc03b1d (diff) | |
download | gdb-e4e8248d79d8461adf8b0cf22086e85a4c9ee0a4.zip gdb-e4e8248d79d8461adf8b0cf22086e85a4c9ee0a4.tar.gz gdb-e4e8248d79d8461adf8b0cf22086e85a4c9ee0a4.tar.bz2 |
gas/
2005-07-01 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (line_separator_chars): Add '{' and '}'.
(output_spill_psprel, output_spill_psprel_p): Combine.
(output_spill_sprel, output_spill_sprel_p): Combine.
(output_spill_reg, output_spill_regp_p): Combine.
(process_one_record): Handle psp_psprel.
(parse_predicate_and_operand): New.
(convert_expr_to_ab_reg): Two new parameters. Return void. Always
initialize output values. Emit diagnostic case here.
(convert_expr_to_xy_reg): Likewise. Don't allow r0, f0, and f1.
(add_unwind_entry): New second parameter. Allow first parameter to
be NULL. Parse optional tag, emit warning about further support for
it otherwise being missing. Check end-of-line when requested.
(dot_fframe): Clear operand when wrong. Allow tag.
(dot_vframe): Likewise.
(dot_vframesp): Likewise. Rename parameter, issue warning when psp
relative.
(dot_vframepsp): Remove.
(dot_altrp): Clear operand when wrong. Allow tag.
(dot_save): Likewise. Let default case also go through
add_unwind_entry.
(dot_savemem): Likewise.
(dot_restore): Don't return when wrong operand. Allow tag.
(dot_spillreg, dot_spillreg_p): Combine. Simplify by using
parse_predicate_and_operand and the new arguments to
convert_expr_to_ab_reg and convert_expr_to_xy_reg. Don't return
when wrong operand. Allow tag.
(dot_restorereg, dot_restorereg_p): Likewise.
(dot_spillmem, dot_spillmem_p): Likewise.
(dot_saveg): Clear operand when wrong. Perform tighter operand
checks. Allow tag.
(dot_savef): Likewise.
(dot_saveb): Likewise.
(dot_savegf): Likewise.
(dot_spill): Remove end-of-line check. Combine. Simplify by using
parse_predicate_and_operand and the new arguments to
convert_expr_to_ab_reg and convert_expr_to_xy_reg. Don't return
when wrong operand. Allow tag.
(popcount): New.
(dot_label_state): Don't return when wrong operand.
(dot_copy_state): Likewise.
(dot_unwabi): Likewise. Check if in prologue.
(dot_body): Don't call demand_empty_rest_of_line.
(dot_prologue): Type of mask and grsave is unsigned. Perform tighter
operand checks.
(md_pseudo_table): Also use dot_restorereg for .restorereg.p. Also
use dot_spillreg for .spillreg.p. Also use dot_spillmem for
.spillpsp.p and .spillsp.p. Also use dot_vframesp for .vframepsp.
(parse_operand): New second parameter. Don't deal with '}' here
anymore. Don't advance past end-of-line.
(parse_operands): Pass second argument to parse_operand.
(ia64_start_line): Prevent out-of-bounds access through
input_line_pointer. Deal with '}' here.
(ia64_unrecognized_line): Don't deal with '}' here.
(dot_alias): Use ignore_rest_of_line not its deprecated alias
discard_rest_of_line.
gas/testsuite/
2005-07-01 Jan Beulich <jbeulich@novell.com>
* gas/ia64/group-2.s: Use register as second operand of .prologue.
* gas/ia64/unwind-err.s: Add check for .vframesp.
* gas/ia64/unwind-err.l: Adjust.
* gas/ia64/strange.[sd]: New.
* gas/ia64/unwind-bad.[sl]: New.
* gas/ia64/unwind-ok.[sd]: New.
* gas/ia64/ia64.exp: Run new tests.
Diffstat (limited to 'gas/testsuite')
-rw-r--r-- | gas/testsuite/ChangeLog | 10 | ||||
-rw-r--r-- | gas/testsuite/gas/ia64/group-2.s | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/ia64/ia64.exp | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/ia64/strange.d | 19 | ||||
-rw-r--r-- | gas/testsuite/gas/ia64/strange.s | 18 | ||||
-rw-r--r-- | gas/testsuite/gas/ia64/unwind-bad.l | 51 | ||||
-rw-r--r-- | gas/testsuite/gas/ia64/unwind-bad.s | 155 | ||||
-rw-r--r-- | gas/testsuite/gas/ia64/unwind-err.l | 37 | ||||
-rw-r--r-- | gas/testsuite/gas/ia64/unwind-err.s | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/ia64/unwind-ok.d | 224 | ||||
-rw-r--r-- | gas/testsuite/gas/ia64/unwind-ok.s | 272 |
11 files changed, 773 insertions, 19 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 8c85048..352f34a 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,13 @@ +2005-07-01 Jan Beulich <jbeulich@novell.com> + + * gas/ia64/group-2.s: Use register as second operand of .prologue. + * gas/ia64/unwind-err.s: Add check for .vframesp. + * gas/ia64/unwind-err.l: Adjust. + * gas/ia64/strange.[sd]: New. + * gas/ia64/unwind-bad.[sl]: New. + * gas/ia64/unwind-ok.[sd]: New. + * gas/ia64/ia64.exp: Run new tests. + 2005-06-30 Zack Weinberg <zack@codesourcery.com> * gas/arm/arm.exp: Don't special case ldconst, arm7t, or copro diff --git a/gas/testsuite/gas/ia64/group-2.s b/gas/testsuite/gas/ia64/group-2.s index 6ddc94c..6b6b9fc 100644 --- a/gas/testsuite/gas/ia64/group-2.s +++ b/gas/testsuite/gas/ia64/group-2.s @@ -1,6 +1,6 @@ .section .gnu.linkonce.t.foo,"axG",@progbits,foo,comdat .proc foo# foo: - .prologue 12, 33 + .prologue 12, r33 ;; .endp foo# diff --git a/gas/testsuite/gas/ia64/ia64.exp b/gas/testsuite/gas/ia64/ia64.exp index 6199b24..8b4b999 100644 --- a/gas/testsuite/gas/ia64/ia64.exp +++ b/gas/testsuite/gas/ia64/ia64.exp @@ -84,7 +84,10 @@ if [istarget "ia64-*"] then { run_list_test "proc" "-munwind-check=error" run_list_test "radix" "" run_list_test "slot2" "" + run_dump_test "strange" + run_list_test "unwind-bad" "" run_list_test "unwind-err" "-munwind-check=error" + run_dump_test "unwind-ok" run_dump_test "operand-or" run_list_test "hint.b-err" "" run_list_test "hint.b-warn" "-mhint.b=warning" diff --git a/gas/testsuite/gas/ia64/strange.d b/gas/testsuite/gas/ia64/strange.d new file mode 100644 index 0000000..287d073 --- /dev/null +++ b/gas/testsuite/gas/ia64/strange.d @@ -0,0 +1,19 @@ +#objdump: -s +#name: ia64 strange + +.*: +file format .* + +Contents of section .text: + 0000 0c000000 01001000 00020000 00000400 .* + 0010 04000000 01000000 00000020 00000400 .* + 0020 0c000000 01002000 00020000 00000400 .* + 0030 04000000 01000000 00000040 00000400 .* + 0040 1c000000 01003000 00020000 00000020 .* + 0050 04000000 01000000 00000080 00000400 .* + 0060 04000000 01000000 000000a0 00000400 .* + 0070 04000000 01000000 000000c0 00000400 .* + 0080 04000000 01000000 000000e0 00000400 .* + 0090 0e000000 01000000 00020000 01000400 .* + 00a0 1d000000 01009000 00020080 00008400 .* +Contents of section .data: + 0000 ffffff .* diff --git a/gas/testsuite/gas/ia64/strange.s b/gas/testsuite/gas/ia64/strange.s new file mode 100644 index 0000000..9a19b04 --- /dev/null +++ b/gas/testsuite/gas/ia64/strange.s @@ -0,0 +1,18 @@ +.explicit +.text +_start: +{.mfi + nop.f 1 } nop.x 1 +{.mfi + nop.f 2 +} nop.x 2 +{.mfb + nop.f 3 +.xdata1 .data, -1 } .xdata1 .data, -1 + nop.x 4 { nop.x 5 +} { nop.x 6 } + nop.x 7 {.mmf + nop.f 8 +} .xdata1 .data, -1 { .mfb + nop.f 9 + br.ret.sptk rp } diff --git a/gas/testsuite/gas/ia64/unwind-bad.l b/gas/testsuite/gas/ia64/unwind-bad.l new file mode 100644 index 0000000..59a4b20 --- /dev/null +++ b/gas/testsuite/gas/ia64/unwind-bad.l @@ -0,0 +1,51 @@ +.*: Assembler messages: +.*:8: Error: First operand to \.save\.g must be a positive 4-bit constant +.*:10: Error: First operand to \.save\.g must be a positive 4-bit constant +.*:12: Error: First operand to \.save\.g must be a positive 4-bit constant +#FIXME .*:16: Error: Previous spill incomplete +#FIXME .*:18: Error: Register r4 was already saved +.*:20: Error: Operand to \.save\.f must be a positive 20-bit constant +.*:22: Error: Operand to \.save\.f must be a positive 20-bit constant +.*:24: Error: Operand to \.save\.f must be a positive 20-bit constant +#FIXME .*:28: Error: Previous spill incomplete +#FIXME .*:30: Error: Register f2 was already saved +.*:32: Error: First operand to \.save\.b must be a positive 5-bit constant +.*:34: Error: First operand to \.save\.b must be a positive 5-bit constant +.*:36: Error: First operand to \.save\.b must be a positive 5-bit constant +#FIXME .*:40: Error: Previous spill incomplete +#FIXME .*:42: Error: Register b1 was already saved +.*:44: Error: Operand 2 to \.spillreg must be a writable register +.*:46: Error: Operand 1 to \.spillreg must be a preserved register +.*:48: Error: Operand 1 to \.spillreg must be a preserved register +.*:50: Error: Operand 1 to \.spillreg must be a preserved register +.*:52: Error: Operand 2 to \.spillreg must be a writable register +.*:54: Error: Operand 2 to \.spillreg must be a writable register +.*:56: Error: Operand 1 to \.spillreg must be a preserved register +#FIXME .*:58: Error: Floating point register cannot be spilled to general register +#FIXME .*:60: Error: Floating point register cannot be spilled to branch register +.*:62: Warning: Pointless use of p0 as first operand to \.spillreg\.p +.*:64: Error: Operand 3 to \.spillreg.p must be a writable register +.*:66: Error: Operand 3 to \.spillreg.p must be a writable register +.*:68: Warning: Pointless use of p0 as first operand to \.restorereg\.p +.*:78: Error: Operands to \.save\.gf may not be both zero +.*:80: Error: First operand to \.save\.gf must be a non-negative 4-bit constant +.*:82: Error: Second operand to \.save\.gf must be a non-negative 20-bit constant +.*:84: Error: First operand to \.save\.gf must be a non-negative 4-bit constant +.*:86: Error: Second operand to \.save\.gf must be a non-negative 20-bit constant +#FIXME .*:90: Error: Previous spill incomplete +#FIXME .*:92: Error: Register r4 was already saved +#FIXME .*:94: Error: Register f2 was already saved +.*:98: Error: Epilogue count of 2 exceeds number of nested prologues \(1\) +.*:100: Error: Missing \.label_state 2 +.*:108: Error: First operand to \.save\.g must be a positive 4-bit constant +#FIXME .*:110: Error: Second operand to \.save\.g must be a writable general registers +.*:112: Error: Second operand to \.save\.g must be the first of 2 general registers +.*:115: Error: First operand to \.save\.b must be a positive 5-bit constant +#FIXME .*:117: Error: Second operand to \.save\.b must be a writable general registers +.*:119: Error: Second operand to \.save\.b must be the first of 2 general registers +.*:128: Error: First operand to \.prologue must be a positive 4-bit constant +.*:134: Warning: Pointless use of zero first operand to \.prologue +.*:140: Error: First operand to \.prologue must be a positive 4-bit constant +#FIXME .*:141: Error: Operand to \.vframe must be a writable general registers +#FIXME .*:147: Error: Second operand to \.prologue must be a writable general registers +.*:153: Error: Second operand to \.prologue must be the first of 2 general registers diff --git a/gas/testsuite/gas/ia64/unwind-bad.s b/gas/testsuite/gas/ia64/unwind-bad.s new file mode 100644 index 0000000..9a4b7be --- /dev/null +++ b/gas/testsuite/gas/ia64/unwind-bad.s @@ -0,0 +1,155 @@ +.text + +.proc full1 +full1: + +.prologue +.spill 0 +.save.g 0 + nop 0 +.save.g 0x10 + nop 0 +.save.g -1 + nop 0 +.save.g 0x3 + nop 0 +.save.g 0x4 + nop 0 +.save.g 0x1 + nop 0 +.save.f 0 + nop 0 +.save.f 0x100000 + nop 0 +.save.f -1 + nop 0 +.save.f 0x3 + nop 0 +.save.f 0x4 + nop 0 +.save.f 0x1 + nop 0 +.save.b 0 + nop 0 +.save.b 0x20 + nop 0 +.save.b -1 + nop 0 +.save.b 0x3 + nop 0 +.save.b 0x4 + nop 0 +.save.b 0x1 + nop 0 +.spillreg r4, r0 + nop 0 +.spillreg r3, r2 + nop 0 +.spillreg r8, r9 + nop 0 +.spillreg b6, r10 + nop 0 +.spillreg f2, f0 + nop 0 +.spillreg f3, f1 + nop 0 +.spillreg f6, f7 + nop 0 +.spillreg f4, r11 + nop 0 +.spillreg f5, b0 + nop 0 +.spillreg.p p0, r4, r3 + nop 0 +.spillreg.p p1, r4, r0 + nop 0 +.spillreg.p p1, f16, f0 + nop 0 +.restorereg.p p0, r4 + nop 0 +.body + br.ret.sptk rp +.endp full1 + +.proc full2 +full2: +.prologue +.spill 0 +.save.gf 0, 0 + nop 0 +.save.gf 0x10, 0 + nop 0 +.save.gf 0, 0x100000 + nop 0 +.save.gf ~0, 0 + nop 0 +.save.gf 0, ~0 + nop 0 +.save.gf 1, 1 + nop 0 +.save.gf 2, 0 + nop 0 +.save.gf 1, 0 + nop 0 +.save.gf 0, 1 + nop 0 +.body +.label_state 1 +.restore sp, 1 + nop.x 0 +.copy_state 2 + br.ret.sptk rp +.endp full2 + +.proc full3 +full3: +.prologue +.spill 0 +.save.g 0x10, r16 + nop 0 +.save.g 0x01, r0 + nop 0 +.save.g 0x06, r127 + nop 0 + nop 0 +.save.b 0x20, r16 + nop 0 +.save.b 0x01, r0 + nop 0 +.save.b 0x18, r127 + nop 0 + nop 0 +.body + br.ret.sptk rp +.endp full3 + +.proc simple1 +simple1: +.prologue 0x10, r2 + br.ret.sptk rp +.endp simple1 + +.proc simple2 +simple2: +.prologue 0, r2 + br.ret.sptk rp +.endp simple2 + +.proc simple3 +simple3: +.prologue -1, r2 +.vframe r0 + br.ret.sptk rp +.endp simple3 + +.proc simple4 +simple4: +.prologue 0x1, r0 + br.ret.sptk rp +.endp simple4 + +.proc simple5 +simple5: +.prologue 0xc, r127 + br.ret.sptk rp +.endp simple5 diff --git a/gas/testsuite/gas/ia64/unwind-err.l b/gas/testsuite/gas/ia64/unwind-err.l index 153451f..71cca18 100644 --- a/gas/testsuite/gas/ia64/unwind-err.l +++ b/gas/testsuite/gas/ia64/unwind-err.l @@ -8,27 +8,28 @@ .*:7: Error: .body outside of procedure .*:8: Error: .spillreg outside of procedure .*:9: Error: .spillreg.p outside of procedure -.*:10: Error: .spillmem outside of procedure -.*:11: Error: .spillmem.p outside of procedure -.*:12: Error: .spillmem outside of procedure -.*:13: Error: .spillmem.p outside of procedure +.*:10: Error: .spillsp outside of procedure +.*:11: Error: .spillsp.p outside of procedure +.*:12: Error: .spillpsp outside of procedure +.*:13: Error: .spillpsp.p outside of procedure .*:14: Error: .restorereg outside of procedure .*:15: Error: .restorereg.p outside of procedure .*:24: Error: .label_state outside of body region .*:25: Error: .copy_state outside of body region .*:26: Error: .fframe outside of prologue .*:27: Error: .vframe outside of prologue -.*:28: Error: .spill outside of prologue -.*:29: Error: .restore outside of body region -.*:30: Error: .save outside of prologue -.*:31: Error: .savesp outside of prologue -.*:32: Error: .savepsp outside of prologue -.*:33: Error: .save.g outside of prologue -.*:34: Error: .save.gf outside of prologue -.*:35: Error: .save.f outside of prologue -.*:36: Error: .save.b outside of prologue -.*:37: Error: .altrp outside of prologue -.*:42: Error: .prologue within prologue -.*:50: Error: .body outside of procedure -.*:57: Warning: Initial .prologue.* -.*:64: Warning: Initial .body.* +.*:28: Error: .vframesp outside of prologue +.*:29: Error: .spill outside of prologue +.*:30: Error: .restore outside of body region +.*:31: Error: .save outside of prologue +.*:32: Error: .savesp outside of prologue +.*:33: Error: .savepsp outside of prologue +.*:34: Error: .save.g outside of prologue +.*:35: Error: .save.gf outside of prologue +.*:36: Error: .save.f outside of prologue +.*:37: Error: .save.b outside of prologue +.*:38: Error: .altrp outside of prologue +.*:43: Error: .prologue within prologue +.*:51: Error: .body outside of procedure +.*:58: Warning: Initial .prologue.* +.*:65: Warning: Initial .body.* diff --git a/gas/testsuite/gas/ia64/unwind-err.s b/gas/testsuite/gas/ia64/unwind-err.s index f50cc3d..81b2597 100644 --- a/gas/testsuite/gas/ia64/unwind-err.s +++ b/gas/testsuite/gas/ia64/unwind-err.s @@ -25,6 +25,7 @@ start: .copy_state 1 .fframe 0 .vframe r0 +.vframesp 0 .spill 0 .restore sp .save rp, r0 diff --git a/gas/testsuite/gas/ia64/unwind-ok.d b/gas/testsuite/gas/ia64/unwind-ok.d new file mode 100644 index 0000000..d35d6de --- /dev/null +++ b/gas/testsuite/gas/ia64/unwind-ok.d @@ -0,0 +1,224 @@ +#readelf: -u +#name: ia64 unwind descriptors + +Unwind section '\.IA_64\.unwind' at offset 0x[[:xdigit:]]+ contains 8 entries: + +<full1>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08] +[[:space:]]*v[[:digit:]]+, flags=0x3 \( ?ehandler uhandler\), len=[[:digit:]]+ bytes +[[:space:]]*R1:prologue\(rlen=8\) +[[:space:]]*P6:fr_mem\(frmask=\[f2,f5\]\) +[[:space:]]*P6:gr_mem\(grmask=\[r4,r7\]\) +[[:space:]]*P1:br_mem\(brmask=\[b1,b5\]\) +[[:space:]]*P4:spill_mask\(imask=\[rfb,rfb,--\]\) +[[:space:]]*P7:spill_base\(pspoff=0x10-0x10\) +[[:space:]]*P3:rp_br\(reg=b7\) +[[:space:]]*P10:unwabi\(abi=@svr4,context=0x00\) +[[:space:]]*R1:body\(rlen=[[:digit:]]+\) +[[:space:]]*X2:spill_reg\(t=0,reg=r4,treg=r2\) +[[:space:]]*X4:spill_reg_p\(qp=p1,t=1,reg=r7,treg=r31\) +[[:space:]]*X1:spill_sprel\(reg=b1,t=2,spoff=0x8\) +[[:space:]]*X3:spill_sprel_p\(qp=p2,t=3,reg=b5,spoff=0x10\) +[[:space:]]*X1:spill_psprel\(reg=f2,t=4,pspoff=0x10-0x28\) +[[:space:]]*X3:spill_psprel_p\(qp=p4,t=5,reg=f5,pspoff=0x10-0x30\) +[[:space:]]*X2:restore\(t=6,reg=f16\) +[[:space:]]*X4:restore_p\(qp=p8,t=7,reg=f31\) +[[:space:]]*X2:spill_reg\(t=8,reg=ar\.bsp,treg=r16\) +[[:space:]]*X2:spill_reg\(t=9,reg=ar\.bspstore,treg=r17\) +[[:space:]]*X2:spill_reg\(t=10,reg=ar\.fpsr,treg=r18\) +[[:space:]]*X2:spill_reg\(t=11,reg=ar\.lc,treg=r19\) +[[:space:]]*X2:spill_reg\(t=12,reg=ar\.pfs,treg=r20\) +[[:space:]]*X2:spill_reg\(t=13,reg=ar\.rnat,treg=r21\) +[[:space:]]*X2:spill_reg\(t=14,reg=ar\.unat,treg=r22\) +[[:space:]]*X2:spill_reg\(t=15,reg=psp,treg=r23\) +[[:space:]]*X2:spill_reg\(t=16,reg=pr,treg=r24\) +[[:space:]]*X2:spill_reg\(t=17,reg=rp,treg=r25\) +[[:space:]]*X2:spill_reg\(t=18,reg=@priunat,treg=r26\) +[[:space:]]*B1:label_state\(label=1\) +[[:space:]]*B2:epilogue\(t=4,ecount=0\) +[[:space:]]*B1:copy_state\(label=1\) +#... +<full2>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08] +[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes +[[:space:]]*R2:prologue_gr\(mask=\[rp,psp,pr\],grsave=r8,rlen=14\) +[[:space:]]*P5:frgr_mem\(grmask=\[r4,r7\],frmask=\[f2,f31\]\) +[[:space:]]*P4:spill_mask\(imask=\[b-b,bb-,---,---,--\]\) +[[:space:]]*P7:spill_base\(pspoff=0x10-0x10\) +[[:space:]]*P2:br_gr\(brmask=\[b1,b5\],gr=r32\) +[[:space:]]*X2:spill_reg\(t=6,reg=f31,treg=f31\) +[[:space:]]*X4:spill_reg_p\(qp=p63,t=7,reg=f16,treg=f0\) +[[:space:]]*X1:spill_sprel\(reg=f5,t=8,spoff=0x20\) +[[:space:]]*X3:spill_sprel_p\(qp=p31,t=9,reg=f2,spoff=0x18\) +[[:space:]]*X1:spill_psprel\(reg=b5,t=10,pspoff=0x10-0x20\) +[[:space:]]*X3:spill_psprel_p\(qp=p15,t=11,reg=b1,pspoff=0x10-0x18\) +[[:space:]]*X2:restore\(t=12,reg=r7\) +[[:space:]]*X4:restore_p\(qp=p7,t=13,reg=r4\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=0\) +[[:space:]]*R1:prologue\(rlen=0\) +[[:space:]]*R1:body\(rlen=7\) +[[:space:]]*B4:label_state\(label=32\) +[[:space:]]*B3:epilogue\(t=4,ecount=32\) +[[:space:]]*B4:copy_state\(label=32\) +#... +<full3>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08] +[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes +[[:space:]]*R3:prologue\(rlen=33\) +[[:space:]]*P4:spill_mask\(imask=\[rrb,brr,bb-,---,---,---,---,---,---,---,---\]\) +[[:space:]]*P7:spill_base\(pspoff=0x10-0x10\) +[[:space:]]*P9:gr_gr\(grmask=\[r4,r5\],r32\) +[[:space:]]*P2:br_gr\(brmask=\[b1,b2\],gr=r34\) +[[:space:]]*P9:gr_gr\(grmask=\[r6,r7\],r124\) +[[:space:]]*P2:br_gr\(brmask=\[b4,b5\],gr=r126\) +[[:space:]]*R3:body\(rlen=33\) +#... +<fframe>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08] +[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes +[[:space:]]*R1:prologue\(rlen=1\) +[[:space:]]*P7:mem_stack_f\(t=0,size=0\) +[[:space:]]*R1:body\(rlen=2\) +#... +<vframe>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08] +[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes +[[:space:]]*R1:prologue\(rlen=11\) +[[:space:]]*P7:mem_stack_v\(t=0\) +[[:space:]]*P3:psp_gr\(reg=r16\) +[[:space:]]*P8:bsp_when\(t=1\) +[[:space:]]*P3:bsp_gr\(reg=r17\) +[[:space:]]*P8:bspstore_when\(t=2\) +[[:space:]]*P3:bspstore_gr\(reg=r18\) +[[:space:]]*P7:fpsr_when\(t=3\) +[[:space:]]*P3:fpsr_gr\(reg=r19\) +[[:space:]]*P7:lc_when\(t=4\) +[[:space:]]*P3:lc_gr\(reg=r20\) +[[:space:]]*P7:pfs_when\(t=5\) +[[:space:]]*P3:pfs_gr\(reg=r21\) +[[:space:]]*P8:rnat_when\(t=6\) +[[:space:]]*P3:rnat_gr\(reg=r22\) +[[:space:]]*P7:unat_when\(t=7\) +[[:space:]]*P3:unat_gr\(reg=r23\) +[[:space:]]*P7:pr_when\(t=8\) +[[:space:]]*P3:pr_gr\(reg=r24\) +[[:space:]]*P8:priunat_when_gr\(t=9\) +[[:space:]]*P3:priunat_gr\(reg=r25\) +[[:space:]]*P7:rp_when\(t=10\) +[[:space:]]*P3:rp_gr\(reg=r26\) +[[:space:]]*R1:body\(rlen=1\) +#... +<vframesp>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08] +[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes +[[:space:]]*R1:prologue\(rlen=11\) +[[:space:]]*P7:mem_stack_v\(t=0\) +[[:space:]]*P7:psp_sprel\(spoff=0x0\) +[[:space:]]*P8:bsp_when\(t=1\) +[[:space:]]*P8:bsp_sprel\(spoff=0x8\) +[[:space:]]*P8:bspstore_when\(t=2\) +[[:space:]]*P8:bspstore_sprel\(spoff=0x10\) +[[:space:]]*P7:fpsr_when\(t=3\) +[[:space:]]*P8:fpsr_sprel\(spoff=0x18\) +[[:space:]]*P7:lc_when\(t=4\) +[[:space:]]*P8:lc_sprel\(spoff=0x20\) +[[:space:]]*P7:pfs_when\(t=5\) +[[:space:]]*P8:pfs_sprel\(spoff=0x28\) +[[:space:]]*P8:rnat_when\(t=6\) +[[:space:]]*P8:rnat_sprel\(spoff=0x30\) +[[:space:]]*P7:unat_when\(t=7\) +[[:space:]]*P8:unat_sprel\(spoff=0x38\) +[[:space:]]*P7:pr_when\(t=8\) +[[:space:]]*P8:pr_sprel\(spoff=0x40\) +[[:space:]]*P8:priunat_when_mem\(t=9\) +[[:space:]]*P8:priunat_sprel\(spoff=0x48\) +[[:space:]]*P7:rp_when\(t=10\) +[[:space:]]*P8:rp_sprel\(spoff=0x50\) +[[:space:]]*R1:body\(rlen=1\) +#... +<psp>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08] +[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes +[[:space:]]*R1:prologue\(rlen=11\) +[[:space:]]*P7:mem_stack_v\(t=0\) +[[:space:]]*P7:psp_sprel\(spoff=0x0\) +[[:space:]]*P8:bsp_when\(t=1\) +[[:space:]]*P8:bsp_psprel\(pspoff=0x10-0x18\) +[[:space:]]*P8:bspstore_when\(t=2\) +[[:space:]]*P8:bspstore_psprel\(pspoff=0x10-0x20\) +[[:space:]]*P7:fpsr_when\(t=3\) +[[:space:]]*P7:fpsr_psprel\(pspoff=0x10-0x28\) +[[:space:]]*P7:lc_when\(t=4\) +[[:space:]]*P7:lc_psprel\(pspoff=0x10-0x30\) +[[:space:]]*P7:pfs_when\(t=5\) +[[:space:]]*P7:pfs_psprel\(pspoff=0x10-0x38\) +[[:space:]]*P8:rnat_when\(t=6\) +[[:space:]]*P8:rnat_psprel\(pspoff=0x10-0x40\) +[[:space:]]*P7:unat_when\(t=7\) +[[:space:]]*P7:unat_psprel\(pspoff=0x10-0x48\) +[[:space:]]*P7:pr_when\(t=8\) +[[:space:]]*P7:pr_psprel\(pspoff=0x10-0x50\) +[[:space:]]*P8:priunat_when_mem\(t=9\) +[[:space:]]*P8:priunat_psprel\(pspoff=0x10-0x58\) +[[:space:]]*P7:rp_when\(t=10\) +[[:space:]]*P7:rp_psprel\(pspoff=0x10-0x60\) +[[:space:]]*R1:body\(rlen=1\) +#... +<simple>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08] +[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes +#pass diff --git a/gas/testsuite/gas/ia64/unwind-ok.s b/gas/testsuite/gas/ia64/unwind-ok.s new file mode 100644 index 0000000..f2cc0cf --- /dev/null +++ b/gas/testsuite/gas/ia64/unwind-ok.s @@ -0,0 +1,272 @@ +.text +.proc personality +personality: + br.ret.sptk rp +.endp personality + +.proc full1 +full1: + +.prologue +.spill 0 +.save.g 0x1 + nop 0 +.save.f 0x1 + nop 0 +.save.b 0x01 + nop 0 +.save.g 0x8 + nop 0 +.save.f 0x8 + nop 0 +.save.b 0x10 + nop 0 +.altrp b7 + nop 0 +.unwabi @svr4, 0 + nop 0 + +.body +.spillreg r4, r2 + nop 0 +.spillreg.p p1, r7, r127 + nop 0 +.spillsp b1, 0x08 + nop 0 +.spillsp.p p2, b5, 0x10 + nop 0 +.spillpsp f2, 0x18 + nop 0 +.spillpsp.p p4, f5, 0x20 + nop 0 +.restorereg f16 + nop 0 +.restorereg.p p8, f31 + nop 0 + +.spillreg ar.bsp, r16 + nop 0 +.spillreg ar.bspstore, r17 + nop 0 +.spillreg ar.fpsr, r18 + nop 0 +.spillreg ar.lc, r19 + nop 0 +.spillreg ar.pfs, r20 + nop 0 +.spillreg ar.rnat, r21 + nop 0 +.spillreg ar.unat, r22 + nop 0 +.spillreg psp, r23 + nop 0 +.spillreg pr, r24 + nop 0 +.spillreg rp, r25 + nop 0 +.spillreg @priunat, r26 + nop 0 + +.label_state 1 + nop 0 +.restore sp + nop.x 0 +.copy_state 1 + br.ret.sptk rp + +.personality personality +.handlerdata + data4 -1 + data4 0 + +.endp full1 + +.proc full2 +full2: + +.prologue 0xb, r8 +.spill 0 +.save.gf 0x1, 0x00001 + nop 0 + nop 0 +.save.b 0x11, r32 + nop 0 + nop 0 +.save.gf 0x8, 0x80000 + nop 0 + nop 0 +.spillreg f31, f127 + nop 0 +.spillreg.p p63, f16, f32 + nop 0 +.spillsp f5, 0x20 + nop 0 +.spillsp.p p31, f2, 0x18 + nop 0 +.spillpsp b5, 0x10 + nop 0 +.spillpsp.p p15, b1, 0x08 + nop 0 +.restorereg r7 + nop 0 +.restorereg.p p7, r4 + nop 0 + +.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue +.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue +.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue +.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue +.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue +.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue +.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue +.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue + +.body +.label_state 32 + nop 0 +.restore sp, 32 + nop.x 0 +.copy_state 32 + br.ret.sptk rp +.endp full2 + +.proc full3 +full3: + +.prologue +.spill 0 +.save.g 0x3, r32 + nop 0 + nop 0 +.save.b 0x03, r34 + nop 0 + nop 0 +.save.g 0xc, r124 + nop 0 + nop 0 +.save.b 0x18, r126 + nop 0 + nop 0 + nop.x 0 + nop.x 0 + nop.x 0 + nop.x 0 + nop.x 0 + nop.x 0 + nop.x 0 + nop.x 0 +.body + nop.x 0 + nop.x 0 + nop.x 0 + nop.x 0 + nop.x 0 + nop.x 0 + nop.x 0 + nop.x 0 + nop.x 0 + nop.x 0 + br.ret.sptk rp +.endp full3 + +.proc fframe +fframe: +.prologue +.fframe 0 + nop 0 +.body + br.ret.sptk rp +.endp fframe + +.proc vframe +vframe: +.prologue +.vframe r16 + nop 0 +.save ar.bsp, r17 + nop 0 +.save ar.bspstore, r18 + nop 0 +.save ar.fpsr, r19 + nop 0 +.save ar.lc, r20 + nop 0 +.save ar.pfs, r21 + nop 0 +.save ar.rnat, r22 + nop 0 +.save ar.unat, r23 + nop 0 +.save pr, r24 + nop 0 +.save @priunat, r25 + nop 0 +.save rp, r26 + nop 0 +.body + br.ret.sptk rp +.endp vframe + +.proc vframesp +vframesp: +.prologue +.vframesp 0 + nop 0 +.savesp ar.bsp, 0x08 + nop 0 +.savesp ar.bspstore, 0x10 + nop 0 +.savesp ar.fpsr, 0x18 + nop 0 +.savesp ar.lc, 0x20 + nop 0 +.savesp ar.pfs, 0x28 + nop 0 +.savesp ar.rnat, 0x30 + nop 0 +.savesp ar.unat, 0x38 + nop 0 +.savesp pr, 0x40 + nop 0 +.savesp @priunat, 0x48 + nop 0 +.savesp rp, 0x50 + nop 0 +.body + br.ret.sptk rp +.endp vframesp + +.proc psp +psp: +.prologue +.vframesp 0 + nop 0 +.savepsp ar.bsp, 0x08 + nop 0 +.savepsp ar.bspstore, 0x10 + nop 0 +.savepsp ar.fpsr, 0x18 + nop 0 +.savepsp ar.lc, 0x20 + nop 0 +.savepsp ar.pfs, 0x28 + nop 0 +.savepsp ar.rnat, 0x30 + nop 0 +.savepsp ar.unat, 0x38 + nop 0 +.savepsp pr, 0x40 + nop 0 +.savepsp @priunat, 0x48 + nop 0 +.savepsp rp, 0x50 + nop 0 +.body + br.ret.sptk rp +.endp psp + +.proc simple +simple: +.unwentry + br.ret.sptk rp +.endp simple |