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authorJan Beulich <jbeulich@novell.com>2005-01-31 08:48:32 +0000
committerJan Beulich <jbeulich@novell.com>2005-01-31 08:48:32 +0000
commit60b9a617725df23ea629c34a83919bf320082a7d (patch)
tree41c516899c81c93b7ef9997355ee9e56e126c483 /gas/testsuite
parente901b190a91d42356660e45e459c60fac24b2e7d (diff)
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gas/
2005-01-31 Jan Beulich <jbeulich@novell.com> * config/tc-ia64.c (parse_operands): Also handle alloc without first input being ar.pfs. gas/testsuite/ 2005-01-31 Jan Beulich <jbeulich@novell.com> * gas/ia64/pseudo.[ds]: New. * gas/ia64/ia64.exp: Run new test. opcodes/ 2005-01-31 Jan Beulich <jbeulich@novell.com> * ia64-gen.c (NELEMS): Define. (shrink): Generate alias with missing second predicate register when opcode has two outputs and these are both predicates. * ia64-opc-i.c (FULL17): Define. (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17 here to generate output template. (TBITCM, TNATCM): Undefine after use. * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as first input. Add ld16 aliases without ar.csd as second output. Add st16 aliases without ar.csd as second input. Add cmpxchg aliases without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/ ar.ccv as third/fourth inputs. Consolidate through... (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8, CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define. * ia64-asmtab.c: Regenerate.
Diffstat (limited to 'gas/testsuite')
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/ia64/ia64.exp1
-rw-r--r--gas/testsuite/gas/ia64/pseudo.d26
-rw-r--r--gas/testsuite/gas/ia64/pseudo.s15
4 files changed, 47 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 0e63736..004ed44 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2005-01-31 Jan Beulich <jbeulich@novell.com>
+
+ * gas/ia64/pseudo.[ds]: New.
+ * gas/ia64/ia64.exp: Run new test.
+
2005-01-27 Jan Beulich <jbeulich@novell.com>
* gas/ia64/nop_x.[ds]: New.
diff --git a/gas/testsuite/gas/ia64/ia64.exp b/gas/testsuite/gas/ia64/ia64.exp
index d004bc2..8419410 100644
--- a/gas/testsuite/gas/ia64/ia64.exp
+++ b/gas/testsuite/gas/ia64/ia64.exp
@@ -24,6 +24,7 @@ if [istarget "ia64-*"] then {
run_dump_test "opc-i"
run_dump_test "opc-m"
run_dump_test "opc-x"
+ run_dump_test "pseudo"
run_dump_test "nop_x"
run_dump_test "mov-ar"
diff --git a/gas/testsuite/gas/ia64/pseudo.d b/gas/testsuite/gas/ia64/pseudo.d
new file mode 100644
index 0000000..c636e50
--- /dev/null
+++ b/gas/testsuite/gas/ia64/pseudo.d
@@ -0,0 +1,26 @@
+# objdump: -d
+# name: ia64 pseudo-ops
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+0 <_start>:
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+alloc r8=ar\.pfs,0,0,0
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+cmp\.eq p6,p0=r0,r0
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+cmp\.eq p7,p0=0,r0
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+cmp4\.eq p8,p0=r0,r0
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+nop\.. 0x0
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+cmp4\.eq p9,p0=0,r0
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+cmp8xchg16\.acq r9=\[r0\],r0,ar\.csd,ar\.ccv
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+cmpxchg4\.acq r10=\[r0\],r0,ar\.ccv
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+fclass\.m p10,p0=f0,0x1
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+nop\.. 0x0
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+fcmp\.eq\.s0 p11,p0=f0,f0
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+nop\.. 0x0
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+ld16 r11,ar\.csd=\[r0\]
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+nop\.. 0x0
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+mov pr=r0,0xfffffffffffffffe
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+st16 \[r0\]=r0,ar\.csd
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+tbit\.z p0,p12=r0,0
+[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+tnat\.z p0,p13=r0(;;)?
diff --git a/gas/testsuite/gas/ia64/pseudo.s b/gas/testsuite/gas/ia64/pseudo.s
new file mode 100644
index 0000000..5c7f66f
--- /dev/null
+++ b/gas/testsuite/gas/ia64/pseudo.s
@@ -0,0 +1,15 @@
+_start:
+ alloc r8 = 0, 0, 0, 0
+ cmp.eq p6 = r0, r0
+ cmp.eq p7 = 0, r0
+ cmp4.eq p8 = r0, r0
+ cmp4.eq p9 = 0, r0
+ cmp8xchg16.acq r9 = [r0], r0
+ cmpxchg4.acq r10 = [r0], r0
+ fclass.m p10 = f0, @pos
+ fcmp.eq p11 = f0, f0
+ ld16 r11 = [r0]
+ mov pr = r0
+ st16 [r0] = r0
+ tbit.nz p12 = r0, 0
+ tnat.nz p13 = r0