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authorThomas Preud'homme <thomas.preudhomme@arm.com>2015-12-24 17:16:19 +0800
committerThomas Preud'homme <thomas.preudhomme@arm.com>2015-12-24 17:26:54 +0800
commit4ed7ed8db2289a9cd61312c14344cb210dc229b7 (patch)
tree93f6ac4a25e12f348e4b74226ec858d0e45ff3a2 /gas/testsuite
parentfc289b0a832c536a2ec324634cb420f39b212696 (diff)
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Add assembler support for ARMv8-M Mainline
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ (tag_cpu_arch_combine): Adjust v4t_plus_v6_m and comb array to account for new TAG_CPU_ARCH_V4T_PLUS_V6_M value. Deal with NULL values in comb array. binutils/ * readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Mainline Tag_CPU_arch value. (arm_attr_tag_THUMB_ISA_use): Add ARMv8-M Mainline Tag_THUMB_ISA_use value. gas/ * config/tc-arm.c (arm_ext_m): Include ARMv8-M. (arm_ext_v8m): New feature for ARMv8-M. (arm_ext_atomics): New feature for ARMv8 atomics. (do_tt): New encoding function for TT* instructions. (insns): Add new entries for ARMv8-M specific instructions and reorganize the ones shared by ARMv8-M Mainline and ARMv8-A. (arm_archs): Define armv8-m.main architecture. (cpu_arch_ver): Define ARM_ARCH_V8M_MAIN architecture version and clarify the ordering rule. (aeabi_set_public_attributes): Use TAG_CPU_ARCH_* macro to refer to Tag_CPU_arch values for ARMv7e-M detection. Add logic to keep setting Tag_CPU_arch to ARMv8-A for -march=all. Also set Tag_CPU_arch_profile to 'A' if extension bit for atomic instructions is set, unless it is ARMv8-M. Set Tag_THUMB_ISA_use to 3 for ARMv8-M. Set Tag_DIV_use to 0 for ARMv8-M Mainline. gas/testsuite/ * gas/arm/archv8m.s: New file. * gas/arm/archv8m-main.d: Likewise. * gas/arm/attr-march-armv8m.main.d: Likewise. * gas/arm/any-armv8m.s: Likewise. * gas/arm/any-armv8m.d: Likewise. include/elf/ * arm.h (TAG_CPU_ARCH_V8M_MAIN): Declare. (MAX_TAG_CPU_ARCH): Define to TAG_CPU_ARCH_V8M_MAIN. (TAG_CPU_ARCH_V4T_PLUS_V6_M): Define to unused value 15. include/opcode/ * arm.h (ARM_EXT2_ATOMICS): New extension bit. (ARM_EXT2_V8M): Likewise. (ARM_EXT_V8): Adjust comment with regards to atomics and remove mention of legacy use for that bit. (ARM_AEXT2_V8_1A): New architecture extension bitfield. (ARM_AEXT2_V8_2A): Likewise. (ARM_AEXT_V8M_MAIN): Likewise. (ARM_AEXT2_V8M): Likewise. (ARM_ARCH_V8A): Use ARM_EXT2_ATOMICS for features in second bitfield. (ARM_ARCH_V8_1A): Likewise with ARM_AEXT2_V8_1A. (ARM_ARCH_V8_2A): Likewise with ARM_AEXT2_V8_2A. (ARM_ARCH_V8M_MAIN): New architecture feature bitfield. (ARM_ARCH_V8A_FP): Use ARM_EXT2_ATOMICS for features in second bitfield and reindent. (ARM_ARCH_V8A_SIMD): Likewise. (ARM_ARCH_V8A_CRYPTOV1): Likewise. (ARM_ARCH_V8_1A_FP): Use ARM_AEXT2_V8_1A to set second bitfield of feature bits. (ARM_ARCH_V8_1A_SIMD): Likewise. (ARM_ARCH_V8_1A_CRYPTOV1): Likewise. opcodes/ * arm-dis.c (arm_opcodes): Guard lda, ldab, ldaex, ldaexb, ldaexh, stl, stlb, stlh, stlex, stlexb and stlexh by ARM_EXT2_ATOMICS instead of ARM_EXT_V8. (thumb32_opcodes): Add entries for wide ARMv8-M instructions.
Diffstat (limited to 'gas/testsuite')
-rw-r--r--gas/testsuite/ChangeLog8
-rw-r--r--gas/testsuite/gas/arm/any-armv8m.d12
-rw-r--r--gas/testsuite/gas/arm/any-armv8m.s4
-rw-r--r--gas/testsuite/gas/arm/archv8m-main.d47
-rw-r--r--gas/testsuite/gas/arm/archv8m.s45
-rw-r--r--gas/testsuite/gas/arm/attr-march-armv8m.main.d13
6 files changed, 129 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index eac24c2..baad934 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * gas/arm/archv8m.s: New file.
+ * gas/arm/archv8m-main.d: Likewise.
+ * gas/arm/attr-march-armv8m.main.d: Likewise.
+ * gas/arm/any-armv8m.s: Likewise.
+ * gas/arm/any-armv8m.d: Likewise.
+
2015-12-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
* gas/arm/automatic-bw.d: New.
diff --git a/gas/testsuite/gas/arm/any-armv8m.d b/gas/testsuite/gas/arm/any-armv8m.d
new file mode 100644
index 0000000..fc0b22d
--- /dev/null
+++ b/gas/testsuite/gas/arm/any-armv8m.d
@@ -0,0 +1,12 @@
+# name: attributes for 'any' CPU with ARMv8-M security extension
+# source: any-armv8m.s
+# as: -mthumb
+# readelf: -A
+# This test is only valid on EABI based ports.
+# target: *-*-*eabi* *-*-nacl*
+
+Attribute Section: aeabi
+File Attributes
+ Tag_CPU_arch: v8-M.mainline
+ Tag_CPU_arch_profile: Microcontroller
+ Tag_THUMB_ISA_use: Yes
diff --git a/gas/testsuite/gas/arm/any-armv8m.s b/gas/testsuite/gas/arm/any-armv8m.s
new file mode 100644
index 0000000..f0e4084
--- /dev/null
+++ b/gas/testsuite/gas/arm/any-armv8m.s
@@ -0,0 +1,4 @@
+tt r0, r1
+tt r8, r9
+ttt r0, r1
+ttt r8, r9
diff --git a/gas/testsuite/gas/arm/archv8m-main.d b/gas/testsuite/gas/arm/archv8m-main.d
new file mode 100644
index 0000000..c86bab3
--- /dev/null
+++ b/gas/testsuite/gas/arm/archv8m-main.d
@@ -0,0 +1,47 @@
+#name: ARM V8-M mainline instructions
+#source: archv8m.s
+#as: -march=armv8-m.main
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+.* <[^>]*> 47a0 blx r4
+0+.* <[^>]*> 47c8 blx r9
+0+.* <[^>]*> 4720 bx r4
+0+.* <[^>]*> 4748 bx r9
+0+.* <[^>]*> e841 f000 tt r0, r1
+0+.* <[^>]*> e849 f800 tt r8, r9
+0+.* <[^>]*> e841 f040 ttt r0, r1
+0+.* <[^>]*> e849 f840 ttt r8, r9
+0+.* <[^>]*> f24f 1023 movw r0, #61731 ; 0xf123
+0+.* <[^>]*> f24f 1823 movw r8, #61731 ; 0xf123
+0+.* <[^>]*> f2cf 1023 movt r0, #61731 ; 0xf123
+0+.* <[^>]*> f2cf 1823 movt r8, #61731 ; 0xf123
+0+.* <[^>]*> b154 cbz r4, 0+.* <[^>]*>
+0+.* <[^>]*> b94c cbnz r4, 0+.* <[^>]*>
+0+.* <[^>]*> f000 b808 b.w 0+.* <[^>]*>
+0+.* <[^>]*> fb91 f0f2 sdiv r0, r1, r2
+0+.* <[^>]*> fb99 f8fa sdiv r8, r9, sl
+0+.* <[^>]*> fbb1 f0f2 udiv r0, r1, r2
+0+.* <[^>]*> fbb9 f8fa udiv r8, r9, sl
+0+.* <[^>]*> 4408 add r0, r1
+0+.* <[^>]*> f3bf 8f2f clrex
+0+.* <[^>]*> e851 0f01 ldrex r0, \[r1, #4\]
+0+.* <[^>]*> e8d1 0f4f ldrexb r0, \[r1\]
+0+.* <[^>]*> e8d1 0f5f ldrexh r0, \[r1\]
+0+.* <[^>]*> e842 1001 strex r0, r1, \[r2, #4\]
+0+.* <[^>]*> e8c2 1f40 strexb r0, r1, \[r2\]
+0+.* <[^>]*> e8c2 1f50 strexh r0, r1, \[r2\]
+0+.* <[^>]*> e8d1 0faf lda r0, \[r1\]
+0+.* <[^>]*> e8d1 0f8f ldab r0, \[r1\]
+0+.* <[^>]*> e8d1 0f9f ldah r0, \[r1\]
+0+.* <[^>]*> e8c1 0faf stl r0, \[r1\]
+0+.* <[^>]*> e8c1 0f8f stlb r0, \[r1\]
+0+.* <[^>]*> e8c1 0f9f stlh r0, \[r1\]
+0+.* <[^>]*> e8d1 0fef ldaex r0, \[r1\]
+0+.* <[^>]*> e8d1 0fcf ldaexb r0, \[r1\]
+0+.* <[^>]*> e8d1 0fdf ldaexh r0, \[r1\]
+0+.* <[^>]*> e8c2 1fe0 stlex r0, r1, \[r2\]
+0+.* <[^>]*> e8c2 1fc0 stlexb r0, r1, \[r2\]
+0+.* <[^>]*> e8c2 1fd0 stlexh r0, r1, \[r2\]
diff --git a/gas/testsuite/gas/arm/archv8m.s b/gas/testsuite/gas/arm/archv8m.s
new file mode 100644
index 0000000..8aca8ba
--- /dev/null
+++ b/gas/testsuite/gas/arm/archv8m.s
@@ -0,0 +1,45 @@
+.thumb
+.syntax unified
+
+blx r4
+blx r9
+bx r4
+bx r9
+tt r0, r1
+tt r8, r9
+ttt r0, r1
+ttt r8, r9
+movw r0, #0xF123
+movw r8, #0xF123
+movt r0, #0xF123
+movt r8, #0xF123
+cbz r4, .L1
+cbnz r4, .L1
+b.w .L1
+sdiv r0, r1, r2
+sdiv r8, r9, r10
+udiv r0, r1, r2
+udiv r8, r9, r10
+.L1:
+ add r0, r1
+clrex
+ldrex r0, [r1, #0x4]
+ldrexb r0, [r1]
+ldrexh r0, [r1]
+strex r0, r1, [r2, #0x4]
+strexb r0, r1, [r2]
+strexh r0, r1, [r2]
+lda r0, [r1]
+ldab r0, [r1]
+ldah r0, [r1]
+stl r0, [r1]
+stlb r0, [r1]
+stlh r0, [r1]
+ldaex r0, [r1]
+ldaexb r0, [r1]
+ldaexh r0, [r1]
+stlex r0, r1, [r2]
+stlexb r0, r1, [r2]
+stlexh r0, r1, [r2]
+
+
diff --git a/gas/testsuite/gas/arm/attr-march-armv8m.main.d b/gas/testsuite/gas/arm/attr-march-armv8m.main.d
new file mode 100644
index 0000000..7a194e2
--- /dev/null
+++ b/gas/testsuite/gas/arm/attr-march-armv8m.main.d
@@ -0,0 +1,13 @@
+# name: attributes for -march=armv8-m.main
+# source: blank.s
+# as: -march=armv8-m.main
+# readelf: -A
+# This test is only valid on EABI based ports.
+# target: *-*-*eabi* *-*-nacl*
+
+Attribute Section: aeabi
+File Attributes
+ Tag_CPU_name: "8-M.MAIN"
+ Tag_CPU_arch: v8-M.mainline
+ Tag_CPU_arch_profile: Microcontroller
+ Tag_THUMB_ISA_use: Yes