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| author | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-05-28 16:39:51 +0000 |
|---|---|---|
| committer | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-05-28 16:39:51 +0000 |
| commit | 418009c200310bee330ac27ab44cd9390a72bfef (patch) | |
| tree | 305b56c3077ac97dec7e96e0c3b3b6d15e2693dd /gas/testsuite | |
| parent | 0a8897c77c37f8f9d688f1fb546a319b5c9c546d (diff) | |
| download | gdb-418009c200310bee330ac27ab44cd9390a72bfef.zip gdb-418009c200310bee330ac27ab44cd9390a72bfef.tar.gz gdb-418009c200310bee330ac27ab44cd9390a72bfef.tar.bz2 | |
Correct the relocation names for R_AARCH64_TLSDESC_LD_PREL19 and R_AARCH64_TLSDESC_ADR_PAGE21.
Diffstat (limited to 'gas/testsuite')
| -rw-r--r-- | gas/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/tls.d | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/tls.s | 2 |
3 files changed, 7 insertions, 2 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index bbfe39d..6bd45d5 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com> + + * gas/aarch64/tls.d: Update. + * gas/aarch64/tls.s: Update. + 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gas/arm/armv8-a-bad.l: Update expected warning message. diff --git a/gas/testsuite/gas/aarch64/tls.d b/gas/testsuite/gas/aarch64/tls.d index 2934519..9b79c85 100644 --- a/gas/testsuite/gas/aarch64/tls.d +++ b/gas/testsuite/gas/aarch64/tls.d @@ -6,7 +6,7 @@ Disassembly of section \.text: 0000000000000000 <.*>: 0: 90000000 adrp x0, 0 <var> - 0: R_AARCH64_TLSDESC_ADR_PAGE var + 0: R_AARCH64_TLSDESC_ADR_PAGE21 var 4: f9400001 ldr x1, \[x0\] 4: R_AARCH64_TLSDESC_LD64_LO12_NC var 8: 91000000 add x0, x0, #0x0 diff --git a/gas/testsuite/gas/aarch64/tls.s b/gas/testsuite/gas/aarch64/tls.s index 6bf75b4..1c7025a 100644 --- a/gas/testsuite/gas/aarch64/tls.s +++ b/gas/testsuite/gas/aarch64/tls.s @@ -21,7 +21,7 @@ func: - // R_AARCH64_TLSDESC_ADR_PAGE var + // R_AARCH64_TLSDESC_ADR_PAGE21 var adrp x0, :tlsdesc:var // R_AARCH64_TLSDESC_LD64_LO12 var ldr x1, [x0, #:tlsdesc_lo12:var] |