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author | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-01-04 14:59:33 +0000 |
---|---|---|
committer | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-01-04 14:59:33 +0000 |
commit | fb098a1efcc97442a25ec05fb705089095ca5f3f (patch) | |
tree | 2cd062d677a1fb43f2c4b4a53e6c06907017b9af /gas/testsuite | |
parent | a32c3ff848ab6898a812e1520b30d76540731614 (diff) | |
download | gdb-fb098a1efcc97442a25ec05fb705089095ca5f3f.zip gdb-fb098a1efcc97442a25ec05fb705089095ca5f3f.tar.gz gdb-fb098a1efcc97442a25ec05fb705089095ca5f3f.tar.bz2 |
opcodes/
2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-opc.c (aarch64_print_operand): Change to print
AARCH64_OPND_IMM_MOV in hexadecimal in the instruction and in decimal
in comment.
* aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag
from the opcode entries of OP_MOV_IMM_LOG, OP_MOV_IMM_WIDEN and
OP_MOV_IMM_WIDE.
gas/testsuite/
2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/int-insns.d: Update.
* gas/aarch64/mov.d: Update.
* gas/aarch64/reloc-insn.d: Update.
ld/testsuite/
2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com>
* ld-aarch64/emit-relocs-264.d: Append the '-Mno-aliases' option to
the objdump directive.
* ld-aarch64/emit-relocs-266.d: Ditto.
* ld-aarch64/emit-relocs-268.d: Ditto.
* ld-aarch64/emit-relocs-269.d: Ditto.
* ld-aarch64/emit-relocs-270.d: Ditto.
* ld-aarch64/emit-relocs-271.d: Ditto.
* ld-aarch64/emit-relocs-272.d: Ditto.
Diffstat (limited to 'gas/testsuite')
-rw-r--r-- | gas/testsuite/ChangeLog | 8 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/int-insns.d | 24 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/mov.d | 16 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/reloc-insn.d | 17 |
4 files changed, 35 insertions, 30 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 7f6bdf4..3cc89a6 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,6 +1,12 @@ 2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com> - * gas/aarch64/system.d: Update. + * gas/aarch64/int-insns.d: Update. + * gas/aarch64/mov.d: Update. + * gas/aarch64/reloc-insn.d: Update. + +2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com> + + * gas/aarch64/system.d: Update. 2013-01-02 Nick Clifton <nickc@redhat.com> diff --git a/gas/testsuite/gas/aarch64/int-insns.d b/gas/testsuite/gas/aarch64/int-insns.d index cf939de..8896c40 100644 --- a/gas/testsuite/gas/aarch64/int-insns.d +++ b/gas/testsuite/gas/aarch64/int-insns.d @@ -37,18 +37,18 @@ Disassembly of section .text: 68: 8b430441 add x1, x2, x3, lsr #1 6c: 91001ca5 add x5, x5, #0x7 70: 71000421 subs w1, w1, #0x1 - 74: d2800c82 movz x2, #0x64 - 78: d2800c82 movz x2, #0x64 - 7c: d2800c82 movz x2, #0x64 - 80: d2a00c82 movz x2, #0x64, lsl #16 - 84: d2a00c82 movz x2, #0x64, lsl #16 - 88: d2c00c82 movz x2, #0x64, lsl #32 - 8c: d2c00c82 movz x2, #0x64, lsl #32 - 90: d2e00c82 movz x2, #0x64, lsl #48 - 94: d2e00c82 movz x2, #0x64, lsl #48 - 98: 52800c81 movz w1, #0x64 - 9c: 52800c81 movz w1, #0x64 - a0: 52a00c81 movz w1, #0x64, lsl #16 + 74: d2800c82 mov x2, #0x64 // #100 + 78: d2800c82 mov x2, #0x64 // #100 + 7c: d2800c82 mov x2, #0x64 // #100 + 80: d2a00c82 mov x2, #0x640000 // #6553600 + 84: d2a00c82 mov x2, #0x640000 // #6553600 + 88: d2c00c82 mov x2, #0x6400000000 // #429496729600 + 8c: d2c00c82 mov x2, #0x6400000000 // #429496729600 + 90: d2e00c82 mov x2, #0x64000000000000 // #28147497671065600 + 94: d2e00c82 mov x2, #0x64000000000000 // #28147497671065600 + 98: 52800c81 mov w1, #0x64 // #100 + 9c: 52800c81 mov w1, #0x64 // #100 + a0: 52a00c81 mov w1, #0x640000 // #6553600 a4: 8a030041 and x1, x2, x3 a8: 0a0f015e and w30, w10, w15 ac: 12000041 and w1, w2, #0x1 diff --git a/gas/testsuite/gas/aarch64/mov.d b/gas/testsuite/gas/aarch64/mov.d index b344b8e..78b9027 100644 --- a/gas/testsuite/gas/aarch64/mov.d +++ b/gas/testsuite/gas/aarch64/mov.d @@ -13,14 +13,14 @@ Disassembly of section \.text: 14: 910003ff mov sp, sp 18: aa0f03e7 mov x7, x15 1c: 2a0f03e7 mov w7, w15 - 20: 52800b01 movz w1, #0x58 - 24: 12800000 movn w0, #0x0 - 28: b2607fe0 orr x0, xzr, #0xffffffff00000000 - 2c: b2400fff orr sp, xzr, #0xf - 30: 32000fff orr wsp, wzr, #0xf - 34: d28001ff movz xzr, #0xf - 38: 528001ff movz wzr, #0xf + 20: 52800b01 mov w1, #0x58 // #88 + 24: 12800000 mov w0, #0xffffffff // #-1 + 28: b2607fe0 mov x0, #0xffffffff00000000 // #-4294967296 + 2c: b2400fff mov sp, #0xf // #15 + 30: 32000fff mov wsp, #0xf // #15 + 34: d28001ff mov xzr, #0xf // #15 + 38: 528001ff mov wzr, #0xf // #15 3c: 0e1c3de7 mov w7, v15\.s\[3\] 40: 4e183fef mov x15, v31\.d\[1\] - 44: d2801fe0 movz x0, #0xff + 44: d2801fe0 mov x0, #0xff // #255 48: 320de400 orr w0, w0, #0x99999999 diff --git a/gas/testsuite/gas/aarch64/reloc-insn.d b/gas/testsuite/gas/aarch64/reloc-insn.d index 7eb13a2..afcccc7 100644 --- a/gas/testsuite/gas/aarch64/reloc-insn.d +++ b/gas/testsuite/gas/aarch64/reloc-insn.d @@ -5,13 +5,13 @@ Disassembly of section \.text: 0000000000000000 <.*>: - 0: d281ffe0 movz x0, #0xfff - 4: 9280ffe0 movn x0, #0x7ff - 8: d2a24681 movz x1, #0x1234, lsl #16 + 0: d281ffe0 mov x0, #0xfff // #4095 + 4: 9280ffe0 mov x0, #0xfffffffffffff800 // #-2048 + 8: d2a24681 mov x1, #0x12340000 // #305397760 c: f28acf01 movk x1, #0x5678 10: 92a00001 movn x1, #0x0, lsl #16 14: f29f0001 movk x1, #0xf800 - 18: d2d55761 movz x1, #0xaabb, lsl #32 + 18: d2d55761 mov x1, #0xaabb00000000 // #187720135606272 1c: f2b99ba1 movk x1, #0xccdd, lsl #16 20: f29ddfe1 movk x1, #0xeeff 24: d2c00001 movz x1, #0x0, lsl #32 @@ -29,11 +29,11 @@ Disassembly of section \.text: 3c: 92c00001 movn x1, #0x0, lsl #32 40: f2bfffe1 movk x1, #0xffff, lsl #16 44: f29f0001 movk x1, #0xf800 - 48: d2ffffe1 movz x1, #0xffff, lsl #48 + 48: d2ffffe1 mov x1, #0xffff000000000000 // #-281474976710656 4c: f2dfffe1 movk x1, #0xffff, lsl #32 50: f2bfffe1 movk x1, #0xffff, lsl #16 54: f29f0001 movk x1, #0xf800 - 58: d2ffdb81 movz x1, #0xfedc, lsl #48 + 58: d2ffdb81 mov x1, #0xfedc000000000000 // #-82190693199511552 5c: f2d75301 movk x1, #0xba98, lsl #32 60: f2aeca81 movk x1, #0x7654, lsl #16 64: f2864201 movk x1, #0x3210 @@ -121,11 +121,11 @@ Disassembly of section \.text: 11c: 9400001f bl 198 <lab> 120: 94000000 bl 0 <xlab> 120: R_AARCH64_CALL26 xlab - 124: d2e24680 movz x0, #0x1234, lsl #48 + 124: d2e24680 mov x0, #0x1234000000000000 // #1311673391471656960 128: f2cacf00 movk x0, #0x5678, lsl #32 12c: f2b35780 movk x0, #0x9abc, lsl #16 130: f29bde00 movk x0, #0xdef0 - 134: d2ffdb80 movz x0, #0xfedc, lsl #48 + 134: d2ffdb80 mov x0, #0xfedc000000000000 // #-82190693199511552 138: f2d75300 movk x0, #0xba98, lsl #32 13c: f2aeca80 movk x0, #0x7654, lsl #16 140: f2864200 movk x0, #0x3210 @@ -156,6 +156,5 @@ Disassembly of section \.text: 18c: 39400001 ldrb w1, \[x0\] 190: d65f03c0 ret - 0000000000000194 <llit>: 194: deadf00d \.word 0xdeadf00d |