gas/

2009-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (December, 2008)
	* config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction
	support.  Don't swap REG and NDS for FMA.

gas/testsuite/

2009-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (December, 2008)
	* gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/inval-avx.l: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-inval-avx.l: Likewise.

	* gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA
	instructions.  Update tests.
	* gas/i386/inval-avx.s: Likewise.
	* gas/i386/x86-64-avx.s: Likewise.
	* gas/i386/x86-64-inval-avx.s: Likewise.

	* gas/i386/fma.d: New.
	* gas/i386/fma.s: Likewise.
	* gas/i386/fma-intel.d: Likewise.
	* gas/i386/x86-64-fma.d: Likewise.
	* gas/i386/x86-64-fma.s: Likewise.
	* gas/i386/x86-64-fma-intel.d: Likewise.

	* gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and
	x86-64-fma-intel.

opcodes/

2009-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (December, 2008)
	* i386-dis.c (OP_VEX_FMA): Removed.
	(OP_EX_VexW): Likewise.
	(OP_EX_VexImmW): Likewise.
	(OP_XMM_VexW): Likewise.
	(VEXI4_Fixup): Likewise.
	(VPERMIL2_Fixup): Likewise.
	(VexI4): Likewise.
	(VexFMA): Likewise.
	(Vex128FMA): Likewise.
	(EXVexW): Likewise.
	(EXdVexW): Likewise.
	(EXqVexW): Likewise.
	(EXVexImmW): Likewise.
	(XMVexW): Likewise.
	(VPERMIL2): Likewise.
	(PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
	(PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
	(PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
	(PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
	(VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
	(VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
	(get_vex_imm8): Likewise.
	(OP_EX_VexReg): Likewise.
	vpermil2_op): Likewise.
	(EXVexWdq): New.
	(vex_w_dq_mode): Likewise.
	(PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
	(PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
	(PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
	(es_reg): Updated.
	(PREFIX_VEX_38DB): Likewise.
	(PREFIX_VEX_3A4A): Likewise.
	(PREFIX_VEX_3A60): Likewise.
	(PREFIX_VEX_3ADF): Likewise.
	(VEX_LEN_3ADF_P_2): Likewise.
	(prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
	PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
	PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
	PREFIX_VEX_3A78...PREFIX_VEX_3A7F.  Add
	PREFIX_VEX_3896...PREFIX_VEX_389F,
	PREFIX_VEX_38A6...PREFIX_VEX_38AF and
	PREFIX_VEX_38B6...PREFIX_VEX_38BF.
	(vex_table): Likewise.
	(vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
	and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
	(putop): Support "%XW".
	(intel_operand_size): Handle vex_w_dq_mode.

	* i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.

	* i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
	instructions.  Add new FMA instructions.
	* i386-tbl.h: Regenerated.

21 files changed, 4458 insertions, 6641 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 10d426a..c3c7a6b 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,352 +1,8 @@
-2008-12-30  Nick Clifton  <nickc@redhat.com>
+2009-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 
-	* gas/ppc/ppc.exp: Do not run the booke_xcoff64 test.
-	* gas/ppc/booke_xcoff64.s: Delete.
-	* gas/ppc/booke_xcoff64.d: Delete.
-
-2008-12-23  Jon Beniston <jon@beniston.com>
-
-	* gas/lm32: New directory.
-	* gas/lm32/all.exp: New file.
-	* gas/lm32/csr.d: New file.
-	* gas/lm32/csr.s: New file.
-	* gas/lm32/insn.d: New file.
-	* gas/lm32/insn.s: New file.
-
-2008-12-23  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.exp: Run x86-64-avx-swap and x86-64-avx-swap-intel.
-
-	* gas/i386/opts.s: Add tests for movsd, movss, vmovsd and
-	vmovss.
-	* gas/i386/x86-64-opts.s: Likewise.
-
-	* gas/i386/opts.d: Updated.
-	* gas/i386/opts-intel.d: Likewise.
-	* gas/i386/sse2avx-opts.d: Likewise.
-	* gas/i386/sse2avx-opts-intel.d: Likewise.
-	* gas/i386/x86-64-opts.d: Likewise.
-	* gas/i386/x86-64-opts-intel.d: Likewise.
-	* gas/i386/x86-64-sse2avx-opts.d: Likewise.
-	* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.
-
-	* gas/i386/x86-64-avx-swap.d: New.
-	* gas/i386/x86-64-avx-swap.s: Likewise.
-	* gas/i386/x86-64-avx-swap-intel.d: Likewise.
-
-2008-12-23  Nick Clifton  <nickc@redhat.com>
-
-	* gas/elf/type.s: Remove test of STT_IFUNC support.
-	* gas/elf/type.e: Update expected output.
-
-2008-12-21  Hans-Peter Nilsson  <hp@axis.com>
-
-	* gas/cris/rd-dtpoffd1.d, gas/cris/rd-dtpoffd1.s: New test.
-
-2008-12-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.exp: Run opts, opts-intel, sse2avx-opts,
-	sse2avx-opts-intel, x86-64-opts, x86-64-opts-intel,
-	x86-64-sse2avx-opts and x86-64-sse2avx-opts-intel.
-
-	* gas/i386/opts.d: New.
-	* gas/i386/opts-intel.d: Likewise.
-	* gas/i386/opts.s: Likewise.
-	* gas/i386/sse2avx-opts.d: Likewise.
-	* gas/i386/sse2avx-opts-intel.d: Likewise.
-	* gas/i386/x86-64-opts.d: Likewise.
-	* gas/i386/x86-64-opts-intel.d: Likewise.
-	* gas/i386/x86-64-opts.s: Likewise.
-	* gas/i386/x86-64-sse2avx-opts.d: Likewise.
-	* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.
-
-2008-12-20  Hans-Peter Nilsson  <hp@axis.com>
-
-	* gas/cris/rd-tls-1.s, gas/cris/rd-tls-1.d: Test :IE and
-	decoration on double-indirect.
-	* gas/cris/tls-err-1.s: Test :IE on wrong-size operand.
-
-2008-12-18  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/intel.d: Remove trailing white spaces after nop.
-	* gas/i386/intelpic.d: Likewise.
-	* gas/i386/nops16-1.d: Likewise.
-	* gas/i386/nops-1-i686.d: Likewise.
-	* gas/i386/nops-3.d: Likewise.
-	* gas/i386/nops-3-i386.d: Likewise.
-	* gas/i386/nops-3-i686.d: Likewise.
-	* gas/i386/nops-4.d: Likewise.
-	* gas/i386/nops-4-i386.d: Likewise.
-	* gas/i386/nops-4-i686.d: Likewise.
-	* gas/i386/opcode.d: Likewise.
-	* gas/i386/opcode-suffix.d: Likewise.
-	* gas/i386/reloc.d: Likewise.
-	* gas/i386/tlsnopic.d: Likewise.
-	* gas/i386/x86-64-nops-1.d: Likewise.
-	* gas/i386/x86-64-nops-1-nocona.d: Likewise.
-	* gas/i386/x86-64-nops-2.d: Likewise.
-	* gas/i386/x86-64-nops-3.d: Likewise.
-	* gas/i386/x86-64-nops-4-core2.d: Likewise.
-	* gas/i386/x86-64-nops-4.d: Likewise.
-	* gas/i386/x86-64-nops-4-k8.d: Likewise.
-	* gas/i386/x86-64-opcode.d: Likewise.
-
-2008-12-15  Richard Earnshaw  <rearnsha@arm.com>
-
-	* gas/arm/group-reloc-ldc.d: Disassembly of VFP instructions now uses
-	unified syntax.
-	* gas/arm/vfp-non-overlap.d: Likewise.
-	* gas/arm/vfp-neon-syntax.d: Likewise.
-	* gas/arm/vfp-neon-syntax_t2.d: Likewise.
-	* gas/arm/vfp1.d: Likewise.
-	* gas/arm/vfp1_t2.d: Likewise.
-	* gas/arm/vfp1xD.d: Likewise.
-	* gas/arm/vfp1xD_t2.d: Likewise.
-	* gas/arm/vfp2.d: Likewise.
-	* gas/arm/vfp2_t2.d: Likewise.
-	* gas/arm/vfpv3-32drs.d: Likewise.
-	* gas/arm/vfpv3-const-conv.d: Likewise.
-
-2008-12-04  Ben Elliston  <bje@au.ibm.com>
-
-	* gas/ppc/booke.s: Remove booke64 instructions.
-	* gas/ppc/booke.d: Update expected disassembly output.
-	* gas/ppc/booke_xcoff.s: Use -mbooke/-Mbooke.
-	* gas/ppc/booke_xcoff.d: Likewise.
-	* gas/ppc/booke_xcoff64.d: Likewise.
-	* gas/ppc/booke_xcoff64.s: Likewise.
-
-2008-12-03  Nick Clifton  <nickc@redhat.com>
-
-	* gas/elf/type.s: Add test of STT_IFUNC symbol type.
-	* gas/elf/type.e: Update expected disassembly.
-	* gas/elf/elf.exp: Update grep of symbol types.
-
-2008-11-27  M R Swami Reddy  <MR.Swami.Reddy@nsc.com>
-
-	* gas/cr16/pic-1.s: New.
-	* gas/cr16/pic-1.d: New.
-	* gas/cr16/pic-2.s: New.
-	* gas/cr16/pic-2.d: New.
-	* gas/cr16/pic.exp: Run pic tests.
-
-2008-11-19  Hans-Peter Nilsson  <hp@axis.com>
-
-	* gas/cris/rd-tls-1.d, gas/cris/rd-tls-1.s: Use a local thread
-	variable instead of .text location for :GD decoration test.
-
-2008-11-18  Catherine Moore  <clm@codesourcery.com>
-
-	* gas/arm/half-prec-neon.d: New.
-	* gas/arm/half-prec-neon.s: New.
-	* gas/arm/half-prec-vfp3.d: New.
-	* gas/arm/half-prec-vfp3.s: New.
-	* gas/arm/half-prec-psyntax.d: New.
-	* gas/arm/half-prec-psyntax.s: New.
-
-2008-11-12  Hans-Peter Nilsson  <hp@axis.com>
-
-	* gas/cris/rd-bcnst2-pic.d, gas/cris/rd-bcnst2.d,
-	gas/cris/rd-bcnst2.s: New tests.
-
-2008-11-06  Adam Nemet  <anemet@caviumnetworks.com>
-
-	* gas/mips/mips1-fp.s, testsuite/gas/mips/mips1-fp.d,
-	testsuite/gas/mips/mips1-fp.l: New tests.
-	* gas/mips/mips.exp: Run them.
-
-2008-11-06  Chao-ying Fu  <fu@mips.com>
-
-	* gas/mips/mips32-sync.d, gas/mip/mips32-sync.s: New tests.
-	* gas/mips/mips.exp: Run them.
-
-2008-11-04  Bob Wilson  <bob.wilson@acm.org>
-
-	* gas/xtensa/all.exp: Run jlong test.
-	* gas/xtensa/jlong.d: New.
-	* gas/xtensa/jlong.s: New.
-
-2008-11-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/intel.s: Add tests for cmovpe and cmovpo.
-	* gas/i386/opcode.s: Likewise.
-
-	* gas/i386/intel.d: Updated.
-	* gas/i386/opcode.d: Likewise.
-	* gas/i386/opcode-intel.d: Likewise. 
-	* gas/i386/opcode-suffix.d: Likewise.
-
-2008-10-12  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.exp: Run nops-5, nops-5-i686, x86-64-nops-5 and
-	x86-64-nops-5-k8.
-
-	* gas/i386/nops-5.d: New.
-	* gas/i386/nops-5.s: Likewise.
-	* gas/i386/nops-5-i686.d: Likewise.
-	* gas/i386/x86-64-nops-5.d: Likewise.
-	* gas/i386/x86-64-nops-5-k8.d: Likewise.
-
-2008-10-06  Tom Tromey  <tromey@redhat.com>
-
-	* gas/cfi/cfi-alpha-1.d, gas/cfi/cfi-alpha-3.d,
-	gas/cfi/cfi-arm-1.d, gas/cfi/cfi-common-1.d,
-	gas/cfi/cfi-common-2.d, gas/cfi/cfi-common-3.d,
-	gas/cfi/cfi-common-4.d, gas/cfi/cfi-common-5.d,
-	gas/cfi/cfi-common-6.d, gas/cfi/cfi-hppa-1.d,
-	gas/cfi/cfi-i386-2.d, gas/cfi/cfi-i386.d, gas/cfi/cfi-m68k.d,
-	gas/cfi/cfi-mips-1.d, gas/cfi/cfi-ppc-1.d, gas/cfi/cfi-s390-1.d,
-	gas/cfi/cfi-s390x-1.d, gas/cfi/cfi-sh-1.d, gas/cfi/cfi-sparc-1.d,
-	gas/cfi/cfi-sparc64-1.d, gas/cfi/cfi-x86_64.d: Update for readelf
-	change.
-
-2008-10-04  Hans-Peter Nilsson  <hp@axis.com>
-
-	* gas/cris/rd-tls-1.s, gas/cris/rd-tls-1.d, gas/cris/rd-tls-2.s,
-	gas/cris/rd-tls-2.d, gas/cris/tls-err-1.s, gas/cris/tls-err-2.s,
-	gas/cris/tls-err-3.s: New tests.
-
-2008-09-26  Andreas Krebbel  <krebbel1@de.ibm.com>
-
-	* gas/s390/esa-g5.d: Adjust according to the s390-opc changes.
-	* gas/s390/esa-g5.s: Likewise.
-	* gas/s390/esa-z990.d: Likewise.
-	* gas/s390/esa-z990.s: Likewise.
-	* gas/s390/zarch-z900.d: Likewise.
-	* gas/s390/zarch-z900.s: Likewise.
-	* gas/s390/zarch-z990.d: Likewise.
-	* gas/s390/zarch-z990.s: Likewise.
-
-2008-09-15  Alan Modra  <amodra@bigpond.net.au>
-
-	* gas/all/gas.exp: Don't run redef tests on a bunch of targets.
-	* gas/elf/elf.exp: Likewise.
-
-2008-09-14  Arnold Metselaar  <arnold.metselaar@planet.nl>
-
-	* gas/z80/ld-group.s, gas/z80/ld-group.d: New test.
-	* gas/z80/block.s, gas/z80/block.d: New test
-	* gas/z80/arith.s, gas/z80/arith.d: New test
-	* gas/z80/rotate.s, gas/z80/rotate.d: New test
-	* gas/z80/bit.s, gas/z80/bit.d: New test
-	* gas/z80/branch.s, gas/z80/branch.d: New test
-	* gas/z80/inout.s, gas/z80/inout.d: New test
-	* gas/z80/misc.s, gas/z80/misc.d: New test
-	* gas/z80/z80.exp: Run them.
-
-2008-09-11  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/sse2avx.s: Remove pclmulXXX tests.  Add tests for
-	Intel syntax.
-	* gas/i386/x86-64-sse2avx.s: Likewise.
-
-	* gas/i386/sse2avx.d: Updated.
-	* gas/i386/x86-64-sse2avx.d: Likewise. 
-
-2008-09-09  Peter Bergner  <bergner@vnet.ibm.com>
-
-	* gas/ppc/common.s: New test.
-	* gas/ppc/common.d: Likewise.
-	* gas/ppc/power4_32.s: Likewise.
-	* gas/ppc/power4_32.d: Likewise.
-	* gas/ppc/power6.s: Add attn, mtcr, mtcrf, mfcr, dcbz.
-	* gas/ppc/power6.d: Likewise.
-	* gas/ppc/ppc.exp: Run power4_32 test.
-
-2008-09-06  Richard Sandiford  <rdsandiford@googlemail.com>
-
-	* gas/mips/cfi-n64-1.s, gas/mips/cfi-n64-1.d: New test.
-	* gas/mips/mips.exp: Run it.
-
-2008-09-05  Nick Clifton  <nickc@redhat.com>
-
-	* gas/arm/abs12.d: Update expected disassembly.
-	* gas/arm/tls_vxworks.d: Likewise.
-	* gas/arm/unwind_vxworks.d: Likewise.
-	* gas/arm/group-reloc-alu-encoding-bad.d: Skip for vxworks
-	targets.
-	* gas/arm/group-reloc-alu.d: Likewise.
-	* gas/arm/group-reloc-ldc-encoding-bad.d: Likewise.
-	* gas/arm/group-reloc-ldc.d: Likewise.
-	* gas/arm/group-reloc-ldr-encoding-bad.d: Likewise.
-	* gas/arm/group-reloc-ldr.d: Likewise.
-	* gas/arm/group-reloc-ldrs-encoding-bad.d: Likewise.
-	* gas/arm/group-reloc-ldrs.d: Likewise.
-	* gas/arm/local_function.d: Likewise.
-	* gas/arm/mapshort-elf.d: Likewise.
-	* gas/arm/undefined.d: Likewise.
-
-2008-09-04  Christian Groessler  <chris@groessler.org>
-
-	* lib/gas-defs.exp (run_dump_test): If the test expects an error,
-	fail the test if gas doesn't report an error.
-
-2008-08-28  Jan Beulich  <jbeulich@novell.com>
-
-	* gas/i386/intel.s: Add retf.
-	* gas/i386/intel.{d,e}: Adjust.
-	* gas/i386/opcode-intel.d: Replace lret with retf.
-
-2008-08-28  Jan Beulich  <jbeulich@novell.com>
-
-	* gas/i386/gas/i386/opcode-suffix.d: Add suffixes to cmovXX.
-
-2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1.
-	* gas/ia64/dv-waw-err.s: Likewise.
-	* gas/ia64/regs.s: Likewise.
-
-	* gas/ia64/dv-raw-err.l: Updated.
-	* gas/ia64/dv-waw-err.l: Likewise.
-	* gas/ia64/regs.d: Likewise.
-
-2008-08-28  Jan Beulich  <jbeulich@novell.com>
-
-	* gas/i386/string-bad.{l,s}, gas/i386/string-ok.{d,e,s}: New.
-	* gas/i386/i386.exp: Run new tests.
-
-2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/intel.s: Add tests for fidivr.
-
-	* gas/i386/intel.d: Updated.
-
-2008-08-26  Jie Zhang  <jie.zhang@analog.com>
-
-	* gas/bfin/arith_mode.d: New test.
-	* gas/bfin/arith_mode.s: New test.
-	* gas/bfin/invalid_arith_mode.l: New test.
-	* gas/bfin/invalid_arith_mode.s: New test.
-	* gas/bfin/bfin.exp: Add arith_mode and invalid_arith_mode.
-
-2008-08-22  Jie Zhang  <jie.zhang@analog.com>
-
-	* gas/bfin/misc.s: New test.
-	* gas/bfin/misc.d: New test.
-	* gas/bfin/bfin.exp: Add misc test.
-
-2008-08-21  Richard Henderson  <rth@redhat.com>
-
-	* gas/cfi/cfi-common-1.d: Allow for differing offsets, and
-	for DW_CFA_offset_extended_sf results.  Allow for differing nops.
-	* gas/cfi/cfi-hppa-1.d: Invert data alignment sign.  Change 
-	offsets to match 64-bit offsets.
-	* gas/cfi/cfi.exp: Don't run common tests on hppa64.
-
-2008-08-20  Bob Wilson  <bob.wilson@acm.org>
-
-	* gas/all/gas.exp: Expect the redef test to fail on Xtensa.
-
-2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	AVX Programming Reference (August, 2008)
-	* gas/i386/avx.s: Add AES + AVX tests.
-	* gas/i386/arch-10.s: Likewise.
-	* gas/i386/sse2avx.s: Likewise.
+	AVX Programming Reference (December, 2008)
+	* gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd.
 	* gas/i386/x86-64-arch-2.s: Likewise.
-	* gas/i386/x86-64-avx.s: Likewise.
-	* gas/i386/x86-64-sse2avx.s: Likewise.
 
 	* gas/i386/arch-10.d: Updated.
 	* gas/i386/arch-10-1.l: Likewise.
@@ -355,999 +11,29 @@
 	* gas/i386/arch-10-4.l: Likewise.
 	* gas/i386/avx.d: Likewise.
 	* gas/i386/avx-intel.d: Likewise.
-	* gas/i386/sse2avx.d: Likewise.
-	* gas/i386/x86-64-arch-2.d: Likewise.
-	* gas/i386/x86-64-avx.d: Likewise.
-	* gas/i386/x86-64-avx-intel.d: Likewise.
-	* gas/i386/x86-64-sse2avx.d: Likewise.
-
-	* gas/i386/i386.exp: Run arch-avx-1, arch-avx-1-1 and
-	arch-avx-1-2.
-
-	* gas/i386/arch-avx-1.d: New.
-	* gas/i386/arch-avx-1.s: Likewise.
-	* gas/i386/arch-avx-1-1.l: Likewise.
-	* gas/i386/arch-avx-1-1.s: Likewise.
-	* gas/i386/arch-avx-1-2.l: Likewise.
-	* gas/i386/arch-avx-1-2.s: Likewise.
-
-2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
-
-	* gas/s390/esa-g5.d: lxr operands are floating point.
-	* gas/s390/esa-g5.s: Likewise.
-	* gas/testsuite/gas/s390/zarch-z9-ec.d: rrdtr, rrxtr third
-	operands is gpr.
-	* gas/testsuite/gas/s390/zarch-z9-ec.s: Likewise.
-
-2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/amd.s: Add syscall and sysret.  Remove padding.
-
-	* gas/i386/amd.d: Updated.
-	* gas/i386/x86-64-opcode.d: Likewise.
-
-	* gas/i386/i386.exp: Run x86-64-intel64.
-
-	* gas/i386/x86-64-intel64.d: New.
-	* gas/i386/x86-64-intel64.s: Likewise.
-
-	* gas/i386/x86-64-opcode.s: Add syscall and sysret.
-
-2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
-
-	* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
-	* gas/mips/mips.exp: Run it.
-
-2008-08-06  Richard Sandiford  <rdsandiford@googlemail.com>
-
-	* gas/mips/elf-rel8-mips16.d, gas/mips/elf-rel8-mips16.s,
-	* gas/mips/elf-rel9-mips16.d, gas/mips/elf-rel9-mips16.s,
-	* gas/mips/elf-rel13-mips16.d, gas/mips/elf-rel13-mips16.s: New tests.
-	* gas/mips/mips.exp: Run them.
-
-2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
-
-	* gas/ppc/power7.d: New.
-	* gas/ppc/power7.s: Likewise.
-	* gas/ppc/ppc.exp: Run power7 test.
-
-2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/cfi/cfi-i386.s: Remove tests for AVX register maps.
-	* gas/cfi/cfi-x86_64.s: Likewise.
-
-	* gas/cfi/cfi-i386.d: Updated.
-	* gas/cfi/cfi-x86_64.d: Likewise.
-
-2008-07-31  Peter Bergner  <bergner@vnet.ibm.com>
-
-	* gas/ppc/cell.s: Add altivec instructions.
-	* gas/ppc/cell.d: Update expected output.
-	* gas/ppc/power6.d: New.
-	* gas/ppc/power6.s: Likewise.
-	* gas/ppc/ppc.exp (powerpc64*-*-*): Move cell from here to...
-	(powerpc*-*-*): Here.  Run power6 test.
-
-2008-07-24  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/nops-1.d: Add -mtune=generic32.
-	* gas/i386/nops-2.d: Likewise.
-	* gas/i386/nops-3.d: Likewise.
-
-	* gas/i386/x86-64-nops-1.d: Add -mtune=generic64.
-	* gas/i386/x86-64-nops-2.d: Likewise.
-	* gas/i386/x86-64-nops-3.d: Likewise.
-	* gas/i386/x86-64-nops-4.d: Likewise.
-
-2008-07-22  Chao-ying Fu  <fu@mips.com>
-
-	* gas/mips/tls-ill.l: Update error message.
-	* gas/mips/octeon-ill.l: Likewise.
-
-2008-07-14  Jie Zhang  <jie.zhang@analog.com>
-
-	* gas/bfin/{bit2.s, cache2.s, control_code2.s, event2.s,
-	logical2.s, move2.s, parallel.s, parallel2.s, parallel3.s,
-	parallel4.s, shift2.s, stack2.s, video2.s}: Remove DOS line
-	endings.
-
-2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
-
-	* gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests.
-	* gas/mips/mips.exp: Run them.
-
-2008-07-09  Kai Tietz  <kai.tietz@onevision.com>
-
-	* gas/i386/i386.exp (x86-64-pcrel): Disable for w64.
-	(x86-64-sse5): Likewise.
-	(x86-64-opcode-inval): Likewise.
-	(x86-64-opcode-inval-intel): Likewise.
-	(x86-64-w64-pcrel): New.
-	* gas/i386/x86-64-w64-pcrel.d: New.
-
-2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
-
-	* gas/mips/mips32.s: Move out coprocessor2 insns from here ...
-	* gas/mips/mips32-cp2.s: ... to here.
-	* gas/mips/mips32.d: Update.
-	* gas/mips/mips32-cp2.d: New file.
-	* gas/mips/mips32r2.s: Move out coprocessor2 insns from here ...
-	* gas/mips/mips32r2-cp2.s: ... to here.
-	* gas/mips/mips32r2.d: Update.
-	* gas/mips/mips32r2-cp2.d: New file.
-	* gas/mips/mips64.s: Move out coprocessor2 insns from here ...
-	* gas/mips/mips64-cp2.s: ... to here.
-	* gas/mips/mips64.d: Update.
-	* gas/mips/mips64-cp2.d: New file.
-	* gas/mips/mips.exp: Run mips32-cp2, mips32r2-cp2 and mips64-cp
-	except for Octeon.
-	* gas/mips/octeon.s: Add supported coprocessor insns.  Move pop
-	down to keep alphabetical order.
-	* gas/mips/octeon.d: Update.
-	* gas/mips/octeon-ill.s: Add unsupported coprocessor insns.
-	* gas/mips/octeon-ill.l: Update.
-
-2008-07-07  Paul Brook  <paul@codesourcery.com>
-
-	* gas/arm/movw-local.d: New test.
-	* gas/arm/movw-local.s: New test. 
-
-2008-06-27  Chao-ying Fu  <fu@mips.com>
-
-	* gas/mips/odd-float.d: Replace ... with #pass.
-	* gas/mips/ldstla-32-shared.d: Add -march=mips1 for as.
-	* gas/mips/ldstla-32.d: Likewise.
-	* gas/mips/mips16-hilo-match.d: Add -mabi=32 -march=mips1 for as.
-	
-2008-06-19  Chao-ying Fu  <fu@mips.com>
-
-	* gas/mips/e32-rel2.d: Add -march=mips1 for as.
-
-2008-06-16  Hans-Peter Nilsson  <hp@bitrange.com>
-
-	PR gas/6607
-	* gas/mmix/err-loc-10.s, gas/mmix/err-loc-9.s, gas/mmix/loc-6.d,
-	gas/mmix/loc-6.s, gas/mmix/loc-7.d, gas/mmix/loc-7.s: New tests.
-
-2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
-
-	* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu,
-	bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw,
-	syncws, vm3mulu, vm0 and vmulu.
-	* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test.
-	* gas/mips/mips.exp: Run it.  Run octeon test with
-	run_dump_test_arches.
-
-	* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*.
-	* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi
-	and snei.
-
-2008-06-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.exp: Run sse-check-none and
-	x86-64-sse-check-none.
-
-	* gas/i386/sse-check-none.d: New.
-	* gas/i386/sse-check-none.s: Likewise.
-	* gas/i386/x86-64-sse-check-none.d: Likewise.
-
-2008-06-03  Paul Brook  <paul@codesourcery.com>
-
-	* gas/arm/thumb32.d: Update expected output.
-
-2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/x86-64-avx.s: Add tests for vmovd on 64bit operands.
-
-	* gas/i386/x86-64-sse2avx.s: Add tests for movd on 64bit
-	operands.
-
-	* gas/testsuite/gas/i386/x86-64-avx.d: Updated.
-	* gas/testsuite/gas/i386/x86-64-avx-intel.d: Likewise.
-	* gas/testsuite/gas/i386/x86-64-sse2avx.d: Likewise.
-
-2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
-
-	* gas/s390/zarch-z990.d (idte): Fix operand format.
-
-2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/sse-noavx.s: Add tests for cvtpd2pi, cvtpi2pd and
-	cvttpd2pi.
-	* gas/i386/x86-64-sse-noavx.s: Likewise.
-
-	* gas/i386/sse-noavx.d: Updated.
-	* gas/i386/x86-64-sse-noavx.d: Likewise.
-
-2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/6517
-	* gas/i386/avx.s: Add tests for unspecified memory operand
-	size in Intel syntax.
-	* gas/i386/x86-64-avx.s: Likewise.
-
-	* gas/i386/simd.s: Add tests for cvtsi2ss and cvtsi2sd with
-	unspecified memory operand size in Intel syntax.
-
-	* gas/i386/avx.d: Updated.
-	* gas/i386/avx-intel.d: Likewise.
-	* gas/i386/simd.d: Likewise.
-	* gas/i386/simd-intel.d: Likewise.
-	* gas/i386/simd-suffix.d: Likewise.
-	* gas/i386/x86-64-avx.d: Likewise.
-	* gas/i386/x86-64-avx-intel.d: Likewise.
-
-2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/sse-noavx.s: Add tests for movdq2q and movq2dq.
-	* gas/i386/x86-64-sse-noavx.s: Likewise.
-
-	* gas/i386/sse-noavx.d: Updated.
-	* gas/i386/x86-64-sse-noavx.d: Likewise.
-
-2008-05-09  Catherine Moore  <clm@codesourcery.com>
-
-	* gas/mips/mips16-hilo-match.s: New test.
-	* gas/mips/mip16-hilo-match.d: New test output.
-
-2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
-	ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
-	x86-64-inval-movbe.  x86-64-ept, x86-64-ept-intel and
-	x86-64-inval-ept.
-
-	* gas/i386/arch-10.s: Add movbe and invept.
-	* gas/i386/x86-64-arch-2.s: Likewise.
-
-	* gas/i386/ept.d: New file
-	* gas/i386/ept-intel.d: Likewise.
-	* gas/i386/ept.s: Likewise.
-	* gas/i386/inval-ept.l: Likewise.
-	* gas/i386/inval-ept.s: Likewise.
-	* gas/i386/inval-movbe.l: Likewise.
-	* gas/i386/inval-movbe.s: Likewise.
-	* gas/i386/movbe.d: Likewise.
-	* gas/i386/movbe-intel.d: Likewise.
-	* gas/i386/movbe.s: Likewise.
-	* gas/i386/x86-64-inval-ept.l: Likewise.
-	* gas/i386/x86-64-inval-ept.s: Likewise.
-	* gas/i386/x86-64-inval-movbe.l: Likewise.
-	* gas/i386/x86-64-inval-movbe.s: Likewise.
-	* gas/i386/x86-64-ept.d: Likewise.
-	* gas/i386/x86-64-ept-intel.d: Likewise.
-	* gas/i386/x86-64-ept.s: Likewise.
-	* gas/i386/x86-64-movbe.d: Likewise.
-	* gas/i386/x86-64-movbe-intel.d: Likewise.
-	* gas/i386/x86-64-movbe.s: Likewise.
-
-	* gas/i386/arch-10.d: Updated.
-	* gas/i386/arch-10-1.l: Likewise.
-	* gas/i386/arch-10-2.l: Likewise.
-	* gas/i386/arch-10-3.l: Likewise.
-	* gas/i386/arch-10-4.l: Likewise.
-	* gas/i386/x86-64-arch-2.d: Likewise.
-
-2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
-
-	* gas/mips/mips4.s: Split out fp instruction from here ...
-	* gas/mips/mips4-fp.s: ... to here.
-	* gas/mips/mips4.d: Update.
-	* gas/mips/mips4-fp.l: New file. Check error messages with
-	-msoft-float.
-	* gas/mips/mips4-fp.d: New file. Check disassembly with
-	hard-float.
-
-	* gas/mips/mips32r2.s: Split out fp instructions from here ...
-	* gas/mips/mips32r2-fp32.s: ... to here.
-	* gas/mips/mips32r2.d: Update.
-	* gas/mips/mips32r2-fp32.l: New file.  Check error messages with
-	-msoft-float.
-	* gas/mips/mips32r2-fp32.d: New file.  Check disassembly with
-	hard-float.
-
-	* gas/mips/mips32r2-ill-nofp.s, gas/mips/mips32r2-ill-nofp.l: New
-	test derived from mips32r2-ill.
-
-	* gas/mips/mips32-sf32.l: New list test for mips32-sf32.s to check
-	error messages for soft-float targets.
-
-	* gas/mips/mips-macro-ill-sfp.s, gas/mips/mips-macro-ill-sfp.l:
-	New test for -msingle-float.
-	* gas/mips/mips-macro-ill-nofp.s, gas/mips/mips-macro-ill-nofp.l:
-	New test for -msoft-float.
-	* gas/mips/mips-hard-float-flag.s,
-	gas/mips/mips-hard-float-flag.l: New test for -mhard-float.
-	* gas/mips/mips-double-float-flag.s,
-	gas/mips/mips-double-float-flag.l: New test for -mdouble-float.
-
-	* gas/mips/mips.exp: Run new mips4-fp and mips32r2-fp dump tests.
-	Run mips4-fp and mips32r2-fp list tests with -msoft-float.  Run
-	new mips32r2-ill-nofp with -msoft-float.  Run new mips32-sf32 list
-	test with -msoft-float.  Run new mips-macro-ill-sfp test with
-	-msingle-float.  Run new mips-macro-ill-nofp test with
-	-msoft-float.  Run new mips-hard-float-flag and
-	mips-double-float-flag tests.
-
-2008-04-23  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.exp: Run sse-noavx and x86-64-sse-noavx.
-
-	* gas/i386/sse-noavx.d: New.
-	* gas/i386/sse-noavx.s: Likewise.
-	* gas/i386/x86-64-sse-noavx.d: Likewise.
-	* gas/i386/x86-64-sse-noavx.s: Likewise.
-
-2008-04-23  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/sse2.s: Add tests for pmuludq, paddq and psubq.
-	* gas/i386/x86-64-simd.s: Likewise.
-
-	* gas/i386/sse2.d: Updated.
-	* gas/i386/x86-64-simd.d: Likewise.
-	* gas/i386/x86-64-simd-intel.d: Likewise.
-	* gas/i386/x86-64-simd-suffix.d: Likewise.
-
-2008-04-23  David S. Miller  <davem@davemloft.net>
-
-	* gas/sparc/pc2210.d: New file.
-	* gas/sparc/pc2210.d: Likewise.
-	* gas/sparc/sparc.exp: Run new %pc22/%pc10 relocation test.
-
-2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/arch-10.d: Updated.
-	* gas/i386/avx.d: Likewise.
-	* gas/i386/avx-intel.d: Likewise.
+	* gas/i386/inval-avx.l: Likewise.
 	* gas/i386/x86-64-arch-2.d: Likewise.
 	* gas/i386/x86-64-avx.d: Likewise.
 	* gas/i386/x86-64-avx-intel.d: Likewise.
+	* gas/i386/x86-64-inval-avx.l: Likewise.
 
-2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
-	    Michael Meissner  <michael.meissner@amd.com>
-
-	* gas/i386/x86-64-sse5.s: Add protX tests to allow memory in the
-	middle operand.
-	* gas/i386/x86-64-sse5.d: Likewise.
-	
-2008-04-16  David S. Miller  <davem@davemloft.net>
-
-	* gas/sparc/gotops32.d: New.
-	* gas/sparc/gotops32.s: Likewise.
-	* gas/sparc/gotops64.d: Likewise.
-	* gas/sparc/gotops64.s: Likewise.
-	* gas/sparc/sparc.exp: Run new gotdata tests.
-
-2008-04-15  Andrew Stubbs  <andrew.stubbs@st.com>
-
-	* gas/sh/arch/arch.exp: Align PC-relative instructions in the gererated
-	assembly files.
-	* gas/sh/arch/sh-dsp.s: Regenerate.
-	* gas/sh/arch/sh.s: Regenerate.
-	* gas/sh/arch/sh2.s: Regenerate.
-	* gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s: Regenerate.
-	* gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Regenerate.
-	* gas/sh/arch/sh2a-nofpu.s: Regenerate.
-	* gas/sh/arch/sh2a-or-sh3e.s: Regenerate.: Regenerate.
-	* gas/sh/arch/sh2a-or-sh4.s: Regenerate.
-	* gas/sh/arch/sh2a.s: Regenerate.
-	* gas/sh/arch/sh2e.s: Regenerate.
-	* gas/sh/arch/sh3-dsp.s: Regenerate.
-	* gas/sh/arch/sh3-nommu.s: Regenerate.
-	* gas/sh/arch/sh3.s: Regenerate.
-	* gas/sh/arch/sh3e.s: Regenerate.
-	* gas/sh/arch/sh4-nofpu.s: Regenerate.
-	* gas/sh/arch/sh4-nommu-nofpu.s: Regenerate.
-	* gas/sh/arch/sh4.s: Regenerate.
-	* gas/sh/arch/sh4a-nofpu.s: Regenerate.
-	* gas/sh/arch/sh4a.s: Regenerate.
-	* gas/sh/arch/sh4al-dsp.s: Regenerate.
-	* gas/sh/err-mova.s: New test.
-
-2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
-
-	* gas/ppc/e500mc.s, gas/ppc/e500mc.d: New test.
-	* gas/ppc/ppc.exp: Run the new test
-
-2008-04-11  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/lns/lns-big-delta.d: Updated.
-	* gas/lns/lns-common-1.d: Likewise.
-	* gas/lns/lns-common-1-alt.d: Likewise.
-	* gas/lns/lns-duplicate.d: Likewise.
-
-2008-04-10  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.exp: Run sse-check, sse-check-warn,
-	sse-check-error, x86-64-sse-check, x86-64-sse-check-warn and
-	x86-64-sse-check-error.
-
-	* gas/i386/sse-check.d: New.
-	* gas/i386/sse-check.s: Likewise.
-	* gas/i386/sse-check-error.l: Likewise.
-	* gas/i386/sse-check-error.s: Likewise.
-	* gas/i386/sse-check-warn.d: Likewise.
-	* gas/i386/sse-check-warn.e: Likewise.
-	* gas/i386/x86-64-sse-check.d: Likewise.
-	* gas/i386/x86-64-sse-check-error.l: Likewise.
-	* gas/i386/x86-64-sse-check-error.s: Likewise.
-	* gas/i386/x86-64-sse-check-warn.d: Likewise.
-
-2008-04-10  Santiago Urueña  <suruena@gmail.com>
-
-	* gas/all/gas.exp: Check the performance of the -ag command line
-	switch.
-
-2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
-
-	* gas/s390/zarch-z10.d: Map the compare and branch variants
-	with odd condition code mask to version with an even mask.
-
-2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/att-regs.s: Add AVX register test.
-	* gas/i386/intel-regs.s: Likewise.
-
-	* gas/i386/att-regs.d: Updated.
-	* gas/i386/intel-regs.d: Likewise.
-
-2008-04-07  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
-
-	PR gas/6043
-	* gas/sh/sh64/eh-1.d: New.
-	* gas/sh/sh64/eh-1.d: Likewise.
-
-2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL.
-	* gas/i386/arch-10-2.l: Likewise.
-	* gas/i386/arch-10-3.l: Likewise.
-	* gas/i386/arch-10-4.l: Likewise.
-	* gas/i386/arch-10.s: Likewise.
-	* gas/i386/clmul-intel.d: Likewise.
-	* gas/i386/clmul.d: Likewise.
-	* gas/i386/clmul.s: Likewise.
-	* gas/i386/x86-64-arch-2.s: Likewise.
-	* gas/i386/x86-64-clmul-intel.d: Likewise.
-	* gas/i386/x86-64-clmul.d: Likewise.
-	* gas/i386/x86-64-clmul.s: Likewise.
-
-	* gas/i386/arch-10.d: Replace clmul with pclmul.
-	* gas/i386/x86-64-arch-2.d: Likewise.
-
-2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
-	x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
-	x86-64-avx-intel and x86-64-inval-avx.
-
-	* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
-	* gas/cfi/cfi-x86_64.s: Likewise.
-
-	* gas/i386/aes.d: New.
-	* gas/i386/aes.s: Likewise.
-	* gas/i386/aes-intel.d: Likewise.
-	* gas/i386/avx.d: Likewise.
-	* gas/i386/avx.s: Likewise.
-	* gas/i386/avx-intel.d: Likewise.
-	* gas/i386/clmul.d: Likewise.
-	* gas/i386/clmul-intel.d: Likewise.
-	* gas/i386/clmul.s: Likewise.
-	* gas/i386/i386.exp: Likewise.
-	* gas/i386/inval-avx.l: Likewise.
+	* gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA
+	instructions.  Update tests.
 	* gas/i386/inval-avx.s: Likewise.
-	* gas/i386/sse2avx.d: Likewise.
-	* gas/i386/sse2avx.s: Likewise.
-	* gas/i386/x86-64-aes.d: Likewise.
-	* gas/i386/x86-64-aes.s: Likewise.
-	* gas/i386/x86-64-aes-intel.d: Likewise.
-	* gas/i386/x86-64-avx.d: Likewise.
 	* gas/i386/x86-64-avx.s: Likewise.
-	* gas/i386/x86-64-avx-intel.d: Likewise.
-	* gas/i386/x86-64-clmul.d: Likewise.
-	* gas/i386/x86-64-clmul-intel.d: Likewise.
-	* gas/i386/x86-64-clmul.s: Likewise.
-	* gas/i386/x86-64-inval-avx.l: Likewise.
 	* gas/i386/x86-64-inval-avx.s: Likewise.
-	* gas/i386/x86-64-sse2avx.d: Likewise.
-	* gas/i386/x86-64-sse2avx.s: Likewise.
-
-	* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
-	* gas/i386/x86-64-arch-2.s: Likewise.
-
-	* gas/i386/rexw.s: Add AVX tests.
-
-	* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
-
-	* gas/cfi/cfi-i386.d: Updated.
-	* gas/cfi/cfi-x86_64.d: Likewise.
-	* gas/i386/arch-10.d:  Likewise.
-	* gas/i386/arch-10-1.l: Likewise.
-	* gas/i386/arch-10-2.l: Likewise.
-	* gas/i386/arch-10-3.l: Likewise.
-	* gas/i386/arch-10-4.l: Likewise.
-	* gas/i386/rexw.d: Likewise.
-	* gas/i386/x86-64-arch-2.d: Likewise.
-	* gas/i386/x86-64-opcode-inval.d: Likewise.
-	* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
-
-2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
-
-	From Jie Zhang  <jie.zhang@analog.com>
-	* gas/bfin/load.d: Update.
-	* gas/bfin/expected_comparison_errors.l: New test.
-	* gas/bfin/expected_comparison_errors.s: New test.
-	* gas/bfin/bfin.exp: Add expected_comparison_errors.
-	* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s: Add
-	tests for bad options of "multiply and multipy-accumulate to
-	accumulator" instructions.  Add new vector instruction option
-	mode tests.
-	* gas/bfin/vector2.s: Add new vector instruction option mode test.
-	* gas/bfin/vector2.d: Adjust accordingly.
-	* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
-	Add check for mismatch of accumulator and data register.
-	* gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check
-	for IU option.
-
-	* gas/bfin/flow.d: Adjust since the generated labels for LOOP_BEGIN
-	and LOOP_END instruction are local now.
-	* gas/bfin/flow2.d: Likewise.
-
-	From  Mike Frysinger  <michael.frysinger@analog.com>
-	* gas/bfin/expected_errors.s, gas/bfin/expected_errors.l: Add test
-	for mismatched half registers in vector multipy-accumulate
-	instructions.
-
-	From Robin Getz  <rgetz@blackfin.uclinux.org>
-	* gas/bfin/arithmetic.d: Update to reflect spaces/capitalization in
-	recent changes in opcodes/bfin-dis.c.
-	gas/bfin/arithmetic.s: Likewise.
-	gas/bfin/bit.d: Likewise.
-	gas/bfin/bit2.d: Likewise.
-	gas/bfin/control_code.d: Likewise.
-	gas/bfin/control_code2.d: Likewise.
-	gas/bfin/event.d: Likewise.
-	gas/bfin/event2.d: Likewise.
-	gas/bfin/flow.d: Likewise.
-	gas/bfin/flow2.d: Likewise.
-	gas/bfin/load.d: Likewise.
-	gas/bfin/logical.d: Likewise.
-	gas/bfin/logical2.d: Likewise.
-	gas/bfin/move.d: Likewise.
-	gas/bfin/move2.d: Likewise.
-	gas/bfin/parallel.d: Likewise.
-	gas/bfin/parallel2.d: Likewise.
-	gas/bfin/parallel3.d: Likewise.
-	gas/bfin/parallel4.d: Likewise.
-	gas/bfin/shift.d: Likewise.
-	gas/bfin/shift2.d: Likewise.
-	gas/bfin/stack.d: Likewise.
-	gas/bfin/stack2.d: Likewise.
-	gas/bfin/store.d: Likewise.
-	gas/bfin/vector.d: Likewise.
-	gas/bfin/vector2.d: Likewise.
-	gas/bfin/video.d: Likewise.
-	gas/bfin/video2.d: Likewise.
-
-2008-03-19  Andreas Krebbel  <krebbel1@de.ibm.com>
-
-	* gas/s390/zarch-z10.d: New file.
-	* gas/s390/zarch-z10.s: New file.
-	* gas/s390/s390.exp: Run the z10 testcases.
-
-2008-03-17  Richard Sandiford  <rsandifo@nildram.co.uk>
-
-	* gas/mips/elf-rel26.d: Add -32.
-	* gas/mips/mips16-intermix.d: Likewise.
-
-2008-03-13  Nick Clifton  <nickc@redhat.com>
-
-	PR gas/5895
-	* gas/macros/exit.s: New test case.
-	* gas/macros/macros.exp: Run the new test, expect it to produce an
-	error result.
-
-2008-03-09  Paul Brook  <paul@codesourcery.com>
-
-	* gas/arm/vfpv3-d16-bad.d: New test.
-	* gas/arm/vfpv3-d16-bad.l: New test.
-
-2008-03-06  Andreas Krebbel  <krebbel1@de.ibm.com>
-
-	* gas/s390/esa-g5.d (cdfbr, cdfr, cefbr, cefr, cxfbr, cxfr,
-	dxr, fidr, fier, fixr, lzdr, lzer, lzxr, sqdr, sqer, tp): Fix
-	operand format.
-	* gas/s390/esa-g5.s: Likewise.
-	* gas/s390/zarch-z900.d (cdgbr, cdgr, cegbr, cegr, cxgbr,
-	cxgr): Likewise.
-	* gas/s390/zarch-z900.s: Likewise.
-	* gas/s390/zarch-z9-109.d (cu41, cu42): Remove mask operand.
-	* gas/s390/zarch-z9-109.s: Likewise.
-
-2008-03-04  Paul Brook  <paul@codesourcery.com>
-
-	* gas/arm/archv6m.d: New test.
-	* gas/arm/archv6m.s: New test.
-	* gas/arm/t16-bad.s: Test low register non flag setting add.
-	* gas/arm/t16-bad.l: Update expected output.
-
-2008-03-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/5543
-	* gas/i386/i386.exp: Run inval-equ-1 and inval-equ-2.
-
-	* gas/i386/inval-equ-1.l: New.
-	* gas/i386/inval-equ-1.s: Likewise.
-	* gas/i386/inval-equ-2.l: Likewise.
-	* gas/i386/inval-equ-2.s: Likewise.
-
-2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/x86-64-branch.s: Add tests for 16-bit near indirect
-	branches.
-
-	* gas/i386/x86-64-inval.s: Remove tests for 16-bit near indirect
-	branches.
-
-	* gas/i386/x86-64-branch.d: Updated.
-	* gas/i386/x86-64-inval.l: Likewise.
-
-2008-02-27  Nick Clifton  <nickc@redhat.com>
-
-	PR 3134
-	* gas/h8300/pr3134.s: New test.
-	* gas/h8300/pr3134.d: Expected disassembly
-	* gas/h8300/h8300.exp: Run the new test.
-
-	* gas/h8300/h8300-coff.exp: Fix test for COFF based ports to
-	accept h8300-rtemscoff not just h8300-rtems.
-
-2008-02-26  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/jump.d: Updated for COFF.
-
-2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/jump.s: Add tests for far branches.
-	* gas/i386/jump16.s: Likewise.
-
-	* gas/i386/jump.d: Updated.
-	* gas/i386/jump16.d: Likewise.
-	* gas/i386/x86-64-inval.l: Likewise.
-
-	* gas/i386/x86-64-inval.s: Add tests for 16-bit near indirect
-	branches.
-
-2008-02-22  Nick Clifton  <nickc@redhat.com>
-
-	* gas/m68hc11/bug-1825.d: Update to match changes in the
-	information generated with source-in-disassembly listings.
-	* gas/m68hc11/indexed12.d: Likewise.
-	* gas/m68hc11/insns-dwarf2.d: Likewise.
-	* gas/m68hc11/lbranch-dwarf2.d: Likewise.
-
-2008-02-18  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* cfi/cfi.exp (gas_x86_64_check): New.
-	(gas_x86_32_check): Likewise.
-	Run 32bit and 64bit tests for x86 targets if they are supportd.
-
-2008-02-18  Jan Beulich  <jbeulich@novell.com>
-
-	* gas/i386/att-regs.s, gas/i386/att-regs.d,
-	gas/i386/intel-regs.s, gas/i386/intel-regs.d: New.
-	* gas/i386/i386.exp: Run new tests.
-
-2008-02-14  Nick Clifton  <nickc@redhat.com>
-
-	PR gas/5712
-	* gas/arm/fp-save.s: New test.
-	* gas/arm/fp-save.d: Expected disassembly.
-
-2008-02-13  Adam Nemet  <anemet@caviumnetworks.com>
-
-	* gas/mips/branch-misc-2pic-64.d (#name): Have a unique name
-	different from the branch-misc-2-64.d test.
-
-2008-02-13  Jan Beulich  <jbeulich@novell.com>
-
-	* gas/i386/intelok.s: Replace invalid offset expression with
-	valid ones.
-	* gas/i386/x86_64.s: Likewise.
-
-2008-02-13  Jan Beulich  <jbeulich@novell.com>
-
-	* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
-	* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
-	gas/i386/opcode-intel.d: Adjust.
-
-2008-02-13  Jan Beulich  <jbeulich@novell.com>
-
-	* gas/cfi/cfi-i386.s: Add code testing use of all registers.
-	Fix a few comments.
-	* gas/cfi/cfi-x86_64.s: Likewise.
-	* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.
-
-2008-02-12  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.exp: Run x86-64-arch-2 instead of
-	x86-64-arch-10.
-
-	* gas/i386/x86-64-arch-10.d: Removed.
-
-	* gas/i386/x86-64-arch-2.d: New.
-	* gas/i386/x86-64-arch-2.s: Likewise.
-
-2008-02-12  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/x86-64-xsave.d: Remove prefix.
-
-2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/arch-10.s: Add xgetbv.
-
-	* gas/i386/arch-10.d: Updated.
-	* gas/i386/arch-10-1.l: Likewise.
-	* gas/i386/arch-10-2.l: Likewise.
-	* gas/i386/arch-10-3.l: Likewise.
-	* gas/i386/arch-10-4.l: Likewise.
-	* gas/i386/x86-64-arch-10.d: Likewise.
-
-2002-02-11  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave
-	and x86-64-xsave-intel.
-
-	* gas/i386/x86-64-xsave-intel.d: New file.
-	* gas/i386/x86-64-xsave.d: Likewise.
-	* gas/i386/x86-64-xsave.s: Likewise.
-	* gas/i386/xsave-intel.d: Likewise.
-	* gas/i386/xsave.d: Likewise.
-	* gas/i386/xsave.s: Likewise.
-
-2008-02-05  Adam Nemet  <anemet@caviumnetworks.com>
-
-	* gas/mips/mips.exp: Invoke the tests smartmips, mips32-dsp,
-	mips32-dspr2, mips64-dsp and mips32-mt with run_dump_test instead
-	of run_dump_test_arches.
-	* gas/mips/smartmips.d: Pass -mips32.
-	* gas/mips/mips64-dsp.d: Pass -mips64r2.
-	* gas/mips/mips32-dsp.d: Pass -mips32r2.
-	* gas/mips/mips32-dspr2.d: Likewise.
-	* gas/mips/mips32-mt.d: Likewise.
-
-2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
-
-	* gas/mips/mips.exp: Call mips_arch_create for Octeon.  Invoke
-	Octeon tests.
-	* gas/mips/octeon.s, gas/mips/octeon.d: New test.
-
-2008-01-31  Marc Gauthier  <marc@tensilica.com>
-
-	* gas/all/gas.exp: Recognize Xtensa processor variants.
-	* gas/elf/elf.exp: Likewise.
-	* gas/lns/lns.exp: Likewise.
-
-2008-01-28  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/cfi/cfi-alpha-1.d: Replace DW_CFA_def_cfa_reg with
-	DW_CFA_def_cfa_register.
-	* gas/cfi/cfi-alpha-3.d: Likewise.
-	* gas/cfi/cfi-hppa-1.d: Likewise.
-	* gas/cfi/cfi-i386.d: Likewise.
-	* gas/cfi/cfi-m68k.d: Likewise.
-	* gas/cfi/cfi-mips-1.d: Likewise.
-	* gas/cfi/cfi-sh-1.d: Likewise.
-	* gas/cfi/cfi-sparc-1.d: Likewise.
-	* gas/cfi/cfi-sparc64-1.d: Likewise.
-	* gas/cfi/cfi-x86_64.d: Likewise.
-
-	* gas/cfi/cfi-common-1.d: Updated for i386/x86-64 register
-	names.
-	* gas/cfi/cfi-common-2.d: Likewise.
-	* gas/cfi/cfi-common-5.d: Likewise.
-	* gas/cfi/cfi-i386.d: Likewise.
-	* gas/cfi/cfi-x86_64.d: Likewise.
-
-2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/x86-64-sib.s: Add tests for r12.
-
-	* gas/i386/x86-64-sib-intel.d: Updated.
-	* gas/i386/x86-64-sib.d: Likewise.
-
-2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10.
-
-	* gas/i386/x86-64-arch-1.d: New.
-	* gas/i386/x86-64-arch-1.s: Likewise.
-	* gas/i386/x86-64-arch-10.d: Likewise.
-
-2008-01-23  Tristan Gingold  <gingold@adacore.com>
-
-	* gas/ia64/regs.d: Updated as the ia64 disassembler now displays
-	symbolic names for all ar registers.
-
-2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/arch-10.d: New.
-	* gas/i386/arch-11.s: Likewise.
-	* gas/i386/arch-12.d: Likewise.
-	* gas/i386/arch-12.s: Likewise.
-
-	* gas/i386/i386.exp: Run arch-11 and arch-12.
-
-2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/arch-10-1.l: New.
-	* gas/i386/arch-10-1.s: Likewise.
-	* gas/i386/arch-10-2.l: Likewise.
-	* gas/i386/arch-10-2.s: Likewise.
-	* gas/i386/arch-10-3.l: Likewise.
-	* gas/i386/arch-10-3.s: Likewise.
-	* gas/i386/arch-10-4.l: Likewise.
-	* gas/i386/arch-10-4.s: Likewise.
-	* gas/i386/arch-10.d: Likewise.
-	* gas/i386/arch-10.s: Likewise.
-
-	* gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2,
-	arch-10-3 and arch-10-4.
-
-	* gas/i386/nops-2.s: Use movsbl instead of cmove.
-	* gas/i386/nops-2-i386.d: Updated.
-	* gas/i386/nops-2-merom.d: Likewise.
-	* gas/i386/nops-2.d: Likewise.
-	* gas/i386/x86-64-nops-2.d: Likewise.
-
-2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/prescott.s: Add tests for movddup in Intel syntax.
-	* gas/i386/x86-64-prescott.s: Likewise.
-
-	* gas/i386/prescott.d: Updated.
-	* gas/i386/x86-64-prescott.d: Likewise.
-
-2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.s: Add more tests for movsx and movzx.
-	* gas/i386/x86_64.s: Likewise.
-
-	* gas/i386/inval.s: Remove tests for movsxw and movzxw.
-
-	* gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw,
-	movsxl, movzxb and movzxw.
-
-	* gas/i386/i386.d: Updated.
-	* gas/i386/inval.l: Likewise.
-	* gas/i386/x86_64.d: Likewise.
-	* gas/i386/x86-64-inval.l: Likewise.
-
-2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.s: Add tests for movsx, movzx and movnti.
-	* gas/i386/inval.s: Likewise. 
-	* gas/i386/x86_64.s: Likewise.
-	* gas/i386/x86-64-inval.s: Likewise.
-
-	* gas/i386/i386.d: Updated.
-	* gas/i386/inval.l: Likewise.
-	* gas/i386/x86_64.d: Likewise.
-	* gas/i386/x86-64-inval.l: Likewise.
-
-2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/5534
-	* gas/i386/i386.s: Add tests for fnstsw and fstsw.
-	* gas/i386/inval.s: Likewise. 
-	* gas/i386/x86_64.s: Likewise.
-
-	* gas/i386/intel.s: Use word instead of dword on ss.
-
-	* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
-	and out.
-
-	* gas/i386/prefix.s: Remove invalid fstsw.
-
-	* gas/i386/inval.l: Updated.
-	* gas/i386/intelbad.l: Likewise.
-	* gas/i386/i386.d: Likewise.
-	* gas/i386/x86_64.d: Likewise.
-	* gas/i386/x86-64-inval.l: Likewise.
-	* gas/i386/prefix.d: Updated.
-
-2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/nops.s: Add more tests with opcodes from 0x0f19
-	to 0x0f1f.
-	* gas/i386/x86-64-nops.s: Likewise.
-
-	* gas/i386/nops.d: Updated.
-	* gas/i386/x86-64-nops.d: Likewise.
-
-2008-01-09  Bob Wilson  <bob.wilson@acm.org>
-	
-	* gas/lns/lns.exp: Run new lns-big-delta test for targets that set
-	DWARF2_USE_FIXED_ADVANCE_PC.
-	* gas/lns/lns-big-delta.s: New.
-	* gas/lns/lns-big-delta.d: New.
-	
-2008-01-08  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
-
-	PR gas/5322
-	* lib/gas-defs.exp (gas_host_run): Add fourth argument to regsub
-	command.
-
-2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
-	fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.
-
-	* gas/i386/intel.d: Updated.
-	* gas/i386/intel.e: Likewise.
-
-2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/rexw.d: New.
-	* gas/i386/rexw.s: Likewise.
-
-	* gas/i386/x86-64-sse4_1-intel.d: Updated.
-	* gas/i386/x86-64-sse4_1.d: Likewise.
-
-2008-01-04  Nick Clifton  <nickc@redhat.com>
-
-	* gas/ppc/altivec_and_spe.s: New test - checks that ISA extension
-	command line options (-maltivec, -mspe) can be specified before
-	CPU selection command line options.
-	* gas/ppc/altivec_and_spe.d: Expected disassembly.
-	* gas/ppc/ppc.exp: Run the new test
-
-2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/arch-9.d: New file.
-	* gas/i386/arch-9.s: Likewise.
-
-	* gas/i386/i386.exp: Run arch-9.
-
-2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/arch-5.d: New file.
-	* gas/i386/arch-5.s: Likewise.
-	* gas/i386/arch-6.d: Likewise.
-	* gas/i386/arch-6.s: Likewise.
-	* gas/i386/arch-7.d: Likewise.
-	* gas/i386/arch-7.s: Likewise.
-	* gas/i386/arch-8.d: Likewise.
-	* gas/i386/arch-8.s: Likewise.
-
-	* gas/i386/i386.exp: Run arch-5, arch-6, arch-7 and arch-8.
-
-2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* gas/i386/i386.s: Add tests for movq.
-	* gas/i386/x86_64.s: Likewise.
-
-	* gas/i386/i386.d Updated.
-	* gas/i386/x86_64.d: Likewise.
-
-2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/5534
-	* gas/i386/intel.s: Use QWORD on movq instead of DWORD.
-
-	* gas/i386/inval.s: Add tests for movq.
-	* gas/i386/x86-64-inval.s: Likewise.
-
-	* gas/i386/inval.l: Updated.
-	* gas/i386/x86-64-inval.l: Likewise.
 
-2008-01-02  Catherine Moore  <clm@codesourcery.com>
+	* gas/i386/fma.d: New.
+	* gas/i386/fma.s: Likewise.
+	* gas/i386/fma-intel.d: Likewise.
+	* gas/i386/x86-64-fma.d: Likewise.
+	* gas/i386/x86-64-fma.s: Likewise.
+	* gas/i386/x86-64-fma-intel.d: Likewise.
 
-	* gas/mips/jalr.s: New test.
-	* gas/mips/jalr.l: New test output.
-	* gas/mips/mips.exp: Run new test.
+	* gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and
+	x86-64-fma-intel.
 
-For older changes see ChangeLog-2007
+For older changes see ChangeLog-2008
 
 Local Variables:
 mode: change-log
diff --git a/gas/testsuite/ChangeLog-2008 b/gas/testsuite/ChangeLog-2008
new file mode 100644
index 0000000..10d426a
--- /dev/null
+++ b/gas/testsuite/ChangeLog-2008
@@ -0,0 +1,1357 @@
+2008-12-30  Nick Clifton  <nickc@redhat.com>
+
+	* gas/ppc/ppc.exp: Do not run the booke_xcoff64 test.
+	* gas/ppc/booke_xcoff64.s: Delete.
+	* gas/ppc/booke_xcoff64.d: Delete.
+
+2008-12-23  Jon Beniston <jon@beniston.com>
+
+	* gas/lm32: New directory.
+	* gas/lm32/all.exp: New file.
+	* gas/lm32/csr.d: New file.
+	* gas/lm32/csr.s: New file.
+	* gas/lm32/insn.d: New file.
+	* gas/lm32/insn.s: New file.
+
+2008-12-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.exp: Run x86-64-avx-swap and x86-64-avx-swap-intel.
+
+	* gas/i386/opts.s: Add tests for movsd, movss, vmovsd and
+	vmovss.
+	* gas/i386/x86-64-opts.s: Likewise.
+
+	* gas/i386/opts.d: Updated.
+	* gas/i386/opts-intel.d: Likewise.
+	* gas/i386/sse2avx-opts.d: Likewise.
+	* gas/i386/sse2avx-opts-intel.d: Likewise.
+	* gas/i386/x86-64-opts.d: Likewise.
+	* gas/i386/x86-64-opts-intel.d: Likewise.
+	* gas/i386/x86-64-sse2avx-opts.d: Likewise.
+	* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.
+
+	* gas/i386/x86-64-avx-swap.d: New.
+	* gas/i386/x86-64-avx-swap.s: Likewise.
+	* gas/i386/x86-64-avx-swap-intel.d: Likewise.
+
+2008-12-23  Nick Clifton  <nickc@redhat.com>
+
+	* gas/elf/type.s: Remove test of STT_IFUNC support.
+	* gas/elf/type.e: Update expected output.
+
+2008-12-21  Hans-Peter Nilsson  <hp@axis.com>
+
+	* gas/cris/rd-dtpoffd1.d, gas/cris/rd-dtpoffd1.s: New test.
+
+2008-12-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.exp: Run opts, opts-intel, sse2avx-opts,
+	sse2avx-opts-intel, x86-64-opts, x86-64-opts-intel,
+	x86-64-sse2avx-opts and x86-64-sse2avx-opts-intel.
+
+	* gas/i386/opts.d: New.
+	* gas/i386/opts-intel.d: Likewise.
+	* gas/i386/opts.s: Likewise.
+	* gas/i386/sse2avx-opts.d: Likewise.
+	* gas/i386/sse2avx-opts-intel.d: Likewise.
+	* gas/i386/x86-64-opts.d: Likewise.
+	* gas/i386/x86-64-opts-intel.d: Likewise.
+	* gas/i386/x86-64-opts.s: Likewise.
+	* gas/i386/x86-64-sse2avx-opts.d: Likewise.
+	* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.
+
+2008-12-20  Hans-Peter Nilsson  <hp@axis.com>
+
+	* gas/cris/rd-tls-1.s, gas/cris/rd-tls-1.d: Test :IE and
+	decoration on double-indirect.
+	* gas/cris/tls-err-1.s: Test :IE on wrong-size operand.
+
+2008-12-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/intel.d: Remove trailing white spaces after nop.
+	* gas/i386/intelpic.d: Likewise.
+	* gas/i386/nops16-1.d: Likewise.
+	* gas/i386/nops-1-i686.d: Likewise.
+	* gas/i386/nops-3.d: Likewise.
+	* gas/i386/nops-3-i386.d: Likewise.
+	* gas/i386/nops-3-i686.d: Likewise.
+	* gas/i386/nops-4.d: Likewise.
+	* gas/i386/nops-4-i386.d: Likewise.
+	* gas/i386/nops-4-i686.d: Likewise.
+	* gas/i386/opcode.d: Likewise.
+	* gas/i386/opcode-suffix.d: Likewise.
+	* gas/i386/reloc.d: Likewise.
+	* gas/i386/tlsnopic.d: Likewise.
+	* gas/i386/x86-64-nops-1.d: Likewise.
+	* gas/i386/x86-64-nops-1-nocona.d: Likewise.
+	* gas/i386/x86-64-nops-2.d: Likewise.
+	* gas/i386/x86-64-nops-3.d: Likewise.
+	* gas/i386/x86-64-nops-4-core2.d: Likewise.
+	* gas/i386/x86-64-nops-4.d: Likewise.
+	* gas/i386/x86-64-nops-4-k8.d: Likewise.
+	* gas/i386/x86-64-opcode.d: Likewise.
+
+2008-12-15  Richard Earnshaw  <rearnsha@arm.com>
+
+	* gas/arm/group-reloc-ldc.d: Disassembly of VFP instructions now uses
+	unified syntax.
+	* gas/arm/vfp-non-overlap.d: Likewise.
+	* gas/arm/vfp-neon-syntax.d: Likewise.
+	* gas/arm/vfp-neon-syntax_t2.d: Likewise.
+	* gas/arm/vfp1.d: Likewise.
+	* gas/arm/vfp1_t2.d: Likewise.
+	* gas/arm/vfp1xD.d: Likewise.
+	* gas/arm/vfp1xD_t2.d: Likewise.
+	* gas/arm/vfp2.d: Likewise.
+	* gas/arm/vfp2_t2.d: Likewise.
+	* gas/arm/vfpv3-32drs.d: Likewise.
+	* gas/arm/vfpv3-const-conv.d: Likewise.
+
+2008-12-04  Ben Elliston  <bje@au.ibm.com>
+
+	* gas/ppc/booke.s: Remove booke64 instructions.
+	* gas/ppc/booke.d: Update expected disassembly output.
+	* gas/ppc/booke_xcoff.s: Use -mbooke/-Mbooke.
+	* gas/ppc/booke_xcoff.d: Likewise.
+	* gas/ppc/booke_xcoff64.d: Likewise.
+	* gas/ppc/booke_xcoff64.s: Likewise.
+
+2008-12-03  Nick Clifton  <nickc@redhat.com>
+
+	* gas/elf/type.s: Add test of STT_IFUNC symbol type.
+	* gas/elf/type.e: Update expected disassembly.
+	* gas/elf/elf.exp: Update grep of symbol types.
+
+2008-11-27  M R Swami Reddy  <MR.Swami.Reddy@nsc.com>
+
+	* gas/cr16/pic-1.s: New.
+	* gas/cr16/pic-1.d: New.
+	* gas/cr16/pic-2.s: New.
+	* gas/cr16/pic-2.d: New.
+	* gas/cr16/pic.exp: Run pic tests.
+
+2008-11-19  Hans-Peter Nilsson  <hp@axis.com>
+
+	* gas/cris/rd-tls-1.d, gas/cris/rd-tls-1.s: Use a local thread
+	variable instead of .text location for :GD decoration test.
+
+2008-11-18  Catherine Moore  <clm@codesourcery.com>
+
+	* gas/arm/half-prec-neon.d: New.
+	* gas/arm/half-prec-neon.s: New.
+	* gas/arm/half-prec-vfp3.d: New.
+	* gas/arm/half-prec-vfp3.s: New.
+	* gas/arm/half-prec-psyntax.d: New.
+	* gas/arm/half-prec-psyntax.s: New.
+
+2008-11-12  Hans-Peter Nilsson  <hp@axis.com>
+
+	* gas/cris/rd-bcnst2-pic.d, gas/cris/rd-bcnst2.d,
+	gas/cris/rd-bcnst2.s: New tests.
+
+2008-11-06  Adam Nemet  <anemet@caviumnetworks.com>
+
+	* gas/mips/mips1-fp.s, testsuite/gas/mips/mips1-fp.d,
+	testsuite/gas/mips/mips1-fp.l: New tests.
+	* gas/mips/mips.exp: Run them.
+
+2008-11-06  Chao-ying Fu  <fu@mips.com>
+
+	* gas/mips/mips32-sync.d, gas/mip/mips32-sync.s: New tests.
+	* gas/mips/mips.exp: Run them.
+
+2008-11-04  Bob Wilson  <bob.wilson@acm.org>
+
+	* gas/xtensa/all.exp: Run jlong test.
+	* gas/xtensa/jlong.d: New.
+	* gas/xtensa/jlong.s: New.
+
+2008-11-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/intel.s: Add tests for cmovpe and cmovpo.
+	* gas/i386/opcode.s: Likewise.
+
+	* gas/i386/intel.d: Updated.
+	* gas/i386/opcode.d: Likewise.
+	* gas/i386/opcode-intel.d: Likewise. 
+	* gas/i386/opcode-suffix.d: Likewise.
+
+2008-10-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.exp: Run nops-5, nops-5-i686, x86-64-nops-5 and
+	x86-64-nops-5-k8.
+
+	* gas/i386/nops-5.d: New.
+	* gas/i386/nops-5.s: Likewise.
+	* gas/i386/nops-5-i686.d: Likewise.
+	* gas/i386/x86-64-nops-5.d: Likewise.
+	* gas/i386/x86-64-nops-5-k8.d: Likewise.
+
+2008-10-06  Tom Tromey  <tromey@redhat.com>
+
+	* gas/cfi/cfi-alpha-1.d, gas/cfi/cfi-alpha-3.d,
+	gas/cfi/cfi-arm-1.d, gas/cfi/cfi-common-1.d,
+	gas/cfi/cfi-common-2.d, gas/cfi/cfi-common-3.d,
+	gas/cfi/cfi-common-4.d, gas/cfi/cfi-common-5.d,
+	gas/cfi/cfi-common-6.d, gas/cfi/cfi-hppa-1.d,
+	gas/cfi/cfi-i386-2.d, gas/cfi/cfi-i386.d, gas/cfi/cfi-m68k.d,
+	gas/cfi/cfi-mips-1.d, gas/cfi/cfi-ppc-1.d, gas/cfi/cfi-s390-1.d,
+	gas/cfi/cfi-s390x-1.d, gas/cfi/cfi-sh-1.d, gas/cfi/cfi-sparc-1.d,
+	gas/cfi/cfi-sparc64-1.d, gas/cfi/cfi-x86_64.d: Update for readelf
+	change.
+
+2008-10-04  Hans-Peter Nilsson  <hp@axis.com>
+
+	* gas/cris/rd-tls-1.s, gas/cris/rd-tls-1.d, gas/cris/rd-tls-2.s,
+	gas/cris/rd-tls-2.d, gas/cris/tls-err-1.s, gas/cris/tls-err-2.s,
+	gas/cris/tls-err-3.s: New tests.
+
+2008-09-26  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	* gas/s390/esa-g5.d: Adjust according to the s390-opc changes.
+	* gas/s390/esa-g5.s: Likewise.
+	* gas/s390/esa-z990.d: Likewise.
+	* gas/s390/esa-z990.s: Likewise.
+	* gas/s390/zarch-z900.d: Likewise.
+	* gas/s390/zarch-z900.s: Likewise.
+	* gas/s390/zarch-z990.d: Likewise.
+	* gas/s390/zarch-z990.s: Likewise.
+
+2008-09-15  Alan Modra  <amodra@bigpond.net.au>
+
+	* gas/all/gas.exp: Don't run redef tests on a bunch of targets.
+	* gas/elf/elf.exp: Likewise.
+
+2008-09-14  Arnold Metselaar  <arnold.metselaar@planet.nl>
+
+	* gas/z80/ld-group.s, gas/z80/ld-group.d: New test.
+	* gas/z80/block.s, gas/z80/block.d: New test
+	* gas/z80/arith.s, gas/z80/arith.d: New test
+	* gas/z80/rotate.s, gas/z80/rotate.d: New test
+	* gas/z80/bit.s, gas/z80/bit.d: New test
+	* gas/z80/branch.s, gas/z80/branch.d: New test
+	* gas/z80/inout.s, gas/z80/inout.d: New test
+	* gas/z80/misc.s, gas/z80/misc.d: New test
+	* gas/z80/z80.exp: Run them.
+
+2008-09-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/sse2avx.s: Remove pclmulXXX tests.  Add tests for
+	Intel syntax.
+	* gas/i386/x86-64-sse2avx.s: Likewise.
+
+	* gas/i386/sse2avx.d: Updated.
+	* gas/i386/x86-64-sse2avx.d: Likewise. 
+
+2008-09-09  Peter Bergner  <bergner@vnet.ibm.com>
+
+	* gas/ppc/common.s: New test.
+	* gas/ppc/common.d: Likewise.
+	* gas/ppc/power4_32.s: Likewise.
+	* gas/ppc/power4_32.d: Likewise.
+	* gas/ppc/power6.s: Add attn, mtcr, mtcrf, mfcr, dcbz.
+	* gas/ppc/power6.d: Likewise.
+	* gas/ppc/ppc.exp: Run power4_32 test.
+
+2008-09-06  Richard Sandiford  <rdsandiford@googlemail.com>
+
+	* gas/mips/cfi-n64-1.s, gas/mips/cfi-n64-1.d: New test.
+	* gas/mips/mips.exp: Run it.
+
+2008-09-05  Nick Clifton  <nickc@redhat.com>
+
+	* gas/arm/abs12.d: Update expected disassembly.
+	* gas/arm/tls_vxworks.d: Likewise.
+	* gas/arm/unwind_vxworks.d: Likewise.
+	* gas/arm/group-reloc-alu-encoding-bad.d: Skip for vxworks
+	targets.
+	* gas/arm/group-reloc-alu.d: Likewise.
+	* gas/arm/group-reloc-ldc-encoding-bad.d: Likewise.
+	* gas/arm/group-reloc-ldc.d: Likewise.
+	* gas/arm/group-reloc-ldr-encoding-bad.d: Likewise.
+	* gas/arm/group-reloc-ldr.d: Likewise.
+	* gas/arm/group-reloc-ldrs-encoding-bad.d: Likewise.
+	* gas/arm/group-reloc-ldrs.d: Likewise.
+	* gas/arm/local_function.d: Likewise.
+	* gas/arm/mapshort-elf.d: Likewise.
+	* gas/arm/undefined.d: Likewise.
+
+2008-09-04  Christian Groessler  <chris@groessler.org>
+
+	* lib/gas-defs.exp (run_dump_test): If the test expects an error,
+	fail the test if gas doesn't report an error.
+
+2008-08-28  Jan Beulich  <jbeulich@novell.com>
+
+	* gas/i386/intel.s: Add retf.
+	* gas/i386/intel.{d,e}: Adjust.
+	* gas/i386/opcode-intel.d: Replace lret with retf.
+
+2008-08-28  Jan Beulich  <jbeulich@novell.com>
+
+	* gas/i386/gas/i386/opcode-suffix.d: Add suffixes to cmovXX.
+
+2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1.
+	* gas/ia64/dv-waw-err.s: Likewise.
+	* gas/ia64/regs.s: Likewise.
+
+	* gas/ia64/dv-raw-err.l: Updated.
+	* gas/ia64/dv-waw-err.l: Likewise.
+	* gas/ia64/regs.d: Likewise.
+
+2008-08-28  Jan Beulich  <jbeulich@novell.com>
+
+	* gas/i386/string-bad.{l,s}, gas/i386/string-ok.{d,e,s}: New.
+	* gas/i386/i386.exp: Run new tests.
+
+2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/intel.s: Add tests for fidivr.
+
+	* gas/i386/intel.d: Updated.
+
+2008-08-26  Jie Zhang  <jie.zhang@analog.com>
+
+	* gas/bfin/arith_mode.d: New test.
+	* gas/bfin/arith_mode.s: New test.
+	* gas/bfin/invalid_arith_mode.l: New test.
+	* gas/bfin/invalid_arith_mode.s: New test.
+	* gas/bfin/bfin.exp: Add arith_mode and invalid_arith_mode.
+
+2008-08-22  Jie Zhang  <jie.zhang@analog.com>
+
+	* gas/bfin/misc.s: New test.
+	* gas/bfin/misc.d: New test.
+	* gas/bfin/bfin.exp: Add misc test.
+
+2008-08-21  Richard Henderson  <rth@redhat.com>
+
+	* gas/cfi/cfi-common-1.d: Allow for differing offsets, and
+	for DW_CFA_offset_extended_sf results.  Allow for differing nops.
+	* gas/cfi/cfi-hppa-1.d: Invert data alignment sign.  Change 
+	offsets to match 64-bit offsets.
+	* gas/cfi/cfi.exp: Don't run common tests on hppa64.
+
+2008-08-20  Bob Wilson  <bob.wilson@acm.org>
+
+	* gas/all/gas.exp: Expect the redef test to fail on Xtensa.
+
+2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	AVX Programming Reference (August, 2008)
+	* gas/i386/avx.s: Add AES + AVX tests.
+	* gas/i386/arch-10.s: Likewise.
+	* gas/i386/sse2avx.s: Likewise.
+	* gas/i386/x86-64-arch-2.s: Likewise.
+	* gas/i386/x86-64-avx.s: Likewise.
+	* gas/i386/x86-64-sse2avx.s: Likewise.
+
+	* gas/i386/arch-10.d: Updated.
+	* gas/i386/arch-10-1.l: Likewise.
+	* gas/i386/arch-10-2.l: Likewise.
+	* gas/i386/arch-10-3.l: Likewise.
+	* gas/i386/arch-10-4.l: Likewise.
+	* gas/i386/avx.d: Likewise.
+	* gas/i386/avx-intel.d: Likewise.
+	* gas/i386/sse2avx.d: Likewise.
+	* gas/i386/x86-64-arch-2.d: Likewise.
+	* gas/i386/x86-64-avx.d: Likewise.
+	* gas/i386/x86-64-avx-intel.d: Likewise.
+	* gas/i386/x86-64-sse2avx.d: Likewise.
+
+	* gas/i386/i386.exp: Run arch-avx-1, arch-avx-1-1 and
+	arch-avx-1-2.
+
+	* gas/i386/arch-avx-1.d: New.
+	* gas/i386/arch-avx-1.s: Likewise.
+	* gas/i386/arch-avx-1-1.l: Likewise.
+	* gas/i386/arch-avx-1-1.s: Likewise.
+	* gas/i386/arch-avx-1-2.l: Likewise.
+	* gas/i386/arch-avx-1-2.s: Likewise.
+
+2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
+
+	* gas/s390/esa-g5.d: lxr operands are floating point.
+	* gas/s390/esa-g5.s: Likewise.
+	* gas/testsuite/gas/s390/zarch-z9-ec.d: rrdtr, rrxtr third
+	operands is gpr.
+	* gas/testsuite/gas/s390/zarch-z9-ec.s: Likewise.
+
+2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/amd.s: Add syscall and sysret.  Remove padding.
+
+	* gas/i386/amd.d: Updated.
+	* gas/i386/x86-64-opcode.d: Likewise.
+
+	* gas/i386/i386.exp: Run x86-64-intel64.
+
+	* gas/i386/x86-64-intel64.d: New.
+	* gas/i386/x86-64-intel64.s: Likewise.
+
+	* gas/i386/x86-64-opcode.s: Add syscall and sysret.
+
+2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
+
+	* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
+	* gas/mips/mips.exp: Run it.
+
+2008-08-06  Richard Sandiford  <rdsandiford@googlemail.com>
+
+	* gas/mips/elf-rel8-mips16.d, gas/mips/elf-rel8-mips16.s,
+	* gas/mips/elf-rel9-mips16.d, gas/mips/elf-rel9-mips16.s,
+	* gas/mips/elf-rel13-mips16.d, gas/mips/elf-rel13-mips16.s: New tests.
+	* gas/mips/mips.exp: Run them.
+
+2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
+
+	* gas/ppc/power7.d: New.
+	* gas/ppc/power7.s: Likewise.
+	* gas/ppc/ppc.exp: Run power7 test.
+
+2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/cfi/cfi-i386.s: Remove tests for AVX register maps.
+	* gas/cfi/cfi-x86_64.s: Likewise.
+
+	* gas/cfi/cfi-i386.d: Updated.
+	* gas/cfi/cfi-x86_64.d: Likewise.
+
+2008-07-31  Peter Bergner  <bergner@vnet.ibm.com>
+
+	* gas/ppc/cell.s: Add altivec instructions.
+	* gas/ppc/cell.d: Update expected output.
+	* gas/ppc/power6.d: New.
+	* gas/ppc/power6.s: Likewise.
+	* gas/ppc/ppc.exp (powerpc64*-*-*): Move cell from here to...
+	(powerpc*-*-*): Here.  Run power6 test.
+
+2008-07-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/nops-1.d: Add -mtune=generic32.
+	* gas/i386/nops-2.d: Likewise.
+	* gas/i386/nops-3.d: Likewise.
+
+	* gas/i386/x86-64-nops-1.d: Add -mtune=generic64.
+	* gas/i386/x86-64-nops-2.d: Likewise.
+	* gas/i386/x86-64-nops-3.d: Likewise.
+	* gas/i386/x86-64-nops-4.d: Likewise.
+
+2008-07-22  Chao-ying Fu  <fu@mips.com>
+
+	* gas/mips/tls-ill.l: Update error message.
+	* gas/mips/octeon-ill.l: Likewise.
+
+2008-07-14  Jie Zhang  <jie.zhang@analog.com>
+
+	* gas/bfin/{bit2.s, cache2.s, control_code2.s, event2.s,
+	logical2.s, move2.s, parallel.s, parallel2.s, parallel3.s,
+	parallel4.s, shift2.s, stack2.s, video2.s}: Remove DOS line
+	endings.
+
+2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
+
+	* gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests.
+	* gas/mips/mips.exp: Run them.
+
+2008-07-09  Kai Tietz  <kai.tietz@onevision.com>
+
+	* gas/i386/i386.exp (x86-64-pcrel): Disable for w64.
+	(x86-64-sse5): Likewise.
+	(x86-64-opcode-inval): Likewise.
+	(x86-64-opcode-inval-intel): Likewise.
+	(x86-64-w64-pcrel): New.
+	* gas/i386/x86-64-w64-pcrel.d: New.
+
+2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
+
+	* gas/mips/mips32.s: Move out coprocessor2 insns from here ...
+	* gas/mips/mips32-cp2.s: ... to here.
+	* gas/mips/mips32.d: Update.
+	* gas/mips/mips32-cp2.d: New file.
+	* gas/mips/mips32r2.s: Move out coprocessor2 insns from here ...
+	* gas/mips/mips32r2-cp2.s: ... to here.
+	* gas/mips/mips32r2.d: Update.
+	* gas/mips/mips32r2-cp2.d: New file.
+	* gas/mips/mips64.s: Move out coprocessor2 insns from here ...
+	* gas/mips/mips64-cp2.s: ... to here.
+	* gas/mips/mips64.d: Update.
+	* gas/mips/mips64-cp2.d: New file.
+	* gas/mips/mips.exp: Run mips32-cp2, mips32r2-cp2 and mips64-cp
+	except for Octeon.
+	* gas/mips/octeon.s: Add supported coprocessor insns.  Move pop
+	down to keep alphabetical order.
+	* gas/mips/octeon.d: Update.
+	* gas/mips/octeon-ill.s: Add unsupported coprocessor insns.
+	* gas/mips/octeon-ill.l: Update.
+
+2008-07-07  Paul Brook  <paul@codesourcery.com>
+
+	* gas/arm/movw-local.d: New test.
+	* gas/arm/movw-local.s: New test. 
+
+2008-06-27  Chao-ying Fu  <fu@mips.com>
+
+	* gas/mips/odd-float.d: Replace ... with #pass.
+	* gas/mips/ldstla-32-shared.d: Add -march=mips1 for as.
+	* gas/mips/ldstla-32.d: Likewise.
+	* gas/mips/mips16-hilo-match.d: Add -mabi=32 -march=mips1 for as.
+	
+2008-06-19  Chao-ying Fu  <fu@mips.com>
+
+	* gas/mips/e32-rel2.d: Add -march=mips1 for as.
+
+2008-06-16  Hans-Peter Nilsson  <hp@bitrange.com>
+
+	PR gas/6607
+	* gas/mmix/err-loc-10.s, gas/mmix/err-loc-9.s, gas/mmix/loc-6.d,
+	gas/mmix/loc-6.s, gas/mmix/loc-7.d, gas/mmix/loc-7.s: New tests.
+
+2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
+
+	* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu,
+	bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw,
+	syncws, vm3mulu, vm0 and vmulu.
+	* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test.
+	* gas/mips/mips.exp: Run it.  Run octeon test with
+	run_dump_test_arches.
+
+	* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*.
+	* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi
+	and snei.
+
+2008-06-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.exp: Run sse-check-none and
+	x86-64-sse-check-none.
+
+	* gas/i386/sse-check-none.d: New.
+	* gas/i386/sse-check-none.s: Likewise.
+	* gas/i386/x86-64-sse-check-none.d: Likewise.
+
+2008-06-03  Paul Brook  <paul@codesourcery.com>
+
+	* gas/arm/thumb32.d: Update expected output.
+
+2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/x86-64-avx.s: Add tests for vmovd on 64bit operands.
+
+	* gas/i386/x86-64-sse2avx.s: Add tests for movd on 64bit
+	operands.
+
+	* gas/testsuite/gas/i386/x86-64-avx.d: Updated.
+	* gas/testsuite/gas/i386/x86-64-avx-intel.d: Likewise.
+	* gas/testsuite/gas/i386/x86-64-sse2avx.d: Likewise.
+
+2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
+
+	* gas/s390/zarch-z990.d (idte): Fix operand format.
+
+2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/sse-noavx.s: Add tests for cvtpd2pi, cvtpi2pd and
+	cvttpd2pi.
+	* gas/i386/x86-64-sse-noavx.s: Likewise.
+
+	* gas/i386/sse-noavx.d: Updated.
+	* gas/i386/x86-64-sse-noavx.d: Likewise.
+
+2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/6517
+	* gas/i386/avx.s: Add tests for unspecified memory operand
+	size in Intel syntax.
+	* gas/i386/x86-64-avx.s: Likewise.
+
+	* gas/i386/simd.s: Add tests for cvtsi2ss and cvtsi2sd with
+	unspecified memory operand size in Intel syntax.
+
+	* gas/i386/avx.d: Updated.
+	* gas/i386/avx-intel.d: Likewise.
+	* gas/i386/simd.d: Likewise.
+	* gas/i386/simd-intel.d: Likewise.
+	* gas/i386/simd-suffix.d: Likewise.
+	* gas/i386/x86-64-avx.d: Likewise.
+	* gas/i386/x86-64-avx-intel.d: Likewise.
+
+2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/sse-noavx.s: Add tests for movdq2q and movq2dq.
+	* gas/i386/x86-64-sse-noavx.s: Likewise.
+
+	* gas/i386/sse-noavx.d: Updated.
+	* gas/i386/x86-64-sse-noavx.d: Likewise.
+
+2008-05-09  Catherine Moore  <clm@codesourcery.com>
+
+	* gas/mips/mips16-hilo-match.s: New test.
+	* gas/mips/mip16-hilo-match.d: New test output.
+
+2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
+	ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
+	x86-64-inval-movbe.  x86-64-ept, x86-64-ept-intel and
+	x86-64-inval-ept.
+
+	* gas/i386/arch-10.s: Add movbe and invept.
+	* gas/i386/x86-64-arch-2.s: Likewise.
+
+	* gas/i386/ept.d: New file
+	* gas/i386/ept-intel.d: Likewise.
+	* gas/i386/ept.s: Likewise.
+	* gas/i386/inval-ept.l: Likewise.
+	* gas/i386/inval-ept.s: Likewise.
+	* gas/i386/inval-movbe.l: Likewise.
+	* gas/i386/inval-movbe.s: Likewise.
+	* gas/i386/movbe.d: Likewise.
+	* gas/i386/movbe-intel.d: Likewise.
+	* gas/i386/movbe.s: Likewise.
+	* gas/i386/x86-64-inval-ept.l: Likewise.
+	* gas/i386/x86-64-inval-ept.s: Likewise.
+	* gas/i386/x86-64-inval-movbe.l: Likewise.
+	* gas/i386/x86-64-inval-movbe.s: Likewise.
+	* gas/i386/x86-64-ept.d: Likewise.
+	* gas/i386/x86-64-ept-intel.d: Likewise.
+	* gas/i386/x86-64-ept.s: Likewise.
+	* gas/i386/x86-64-movbe.d: Likewise.
+	* gas/i386/x86-64-movbe-intel.d: Likewise.
+	* gas/i386/x86-64-movbe.s: Likewise.
+
+	* gas/i386/arch-10.d: Updated.
+	* gas/i386/arch-10-1.l: Likewise.
+	* gas/i386/arch-10-2.l: Likewise.
+	* gas/i386/arch-10-3.l: Likewise.
+	* gas/i386/arch-10-4.l: Likewise.
+	* gas/i386/x86-64-arch-2.d: Likewise.
+
+2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
+
+	* gas/mips/mips4.s: Split out fp instruction from here ...
+	* gas/mips/mips4-fp.s: ... to here.
+	* gas/mips/mips4.d: Update.
+	* gas/mips/mips4-fp.l: New file. Check error messages with
+	-msoft-float.
+	* gas/mips/mips4-fp.d: New file. Check disassembly with
+	hard-float.
+
+	* gas/mips/mips32r2.s: Split out fp instructions from here ...
+	* gas/mips/mips32r2-fp32.s: ... to here.
+	* gas/mips/mips32r2.d: Update.
+	* gas/mips/mips32r2-fp32.l: New file.  Check error messages with
+	-msoft-float.
+	* gas/mips/mips32r2-fp32.d: New file.  Check disassembly with
+	hard-float.
+
+	* gas/mips/mips32r2-ill-nofp.s, gas/mips/mips32r2-ill-nofp.l: New
+	test derived from mips32r2-ill.
+
+	* gas/mips/mips32-sf32.l: New list test for mips32-sf32.s to check
+	error messages for soft-float targets.
+
+	* gas/mips/mips-macro-ill-sfp.s, gas/mips/mips-macro-ill-sfp.l:
+	New test for -msingle-float.
+	* gas/mips/mips-macro-ill-nofp.s, gas/mips/mips-macro-ill-nofp.l:
+	New test for -msoft-float.
+	* gas/mips/mips-hard-float-flag.s,
+	gas/mips/mips-hard-float-flag.l: New test for -mhard-float.
+	* gas/mips/mips-double-float-flag.s,
+	gas/mips/mips-double-float-flag.l: New test for -mdouble-float.
+
+	* gas/mips/mips.exp: Run new mips4-fp and mips32r2-fp dump tests.
+	Run mips4-fp and mips32r2-fp list tests with -msoft-float.  Run
+	new mips32r2-ill-nofp with -msoft-float.  Run new mips32-sf32 list
+	test with -msoft-float.  Run new mips-macro-ill-sfp test with
+	-msingle-float.  Run new mips-macro-ill-nofp test with
+	-msoft-float.  Run new mips-hard-float-flag and
+	mips-double-float-flag tests.
+
+2008-04-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.exp: Run sse-noavx and x86-64-sse-noavx.
+
+	* gas/i386/sse-noavx.d: New.
+	* gas/i386/sse-noavx.s: Likewise.
+	* gas/i386/x86-64-sse-noavx.d: Likewise.
+	* gas/i386/x86-64-sse-noavx.s: Likewise.
+
+2008-04-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/sse2.s: Add tests for pmuludq, paddq and psubq.
+	* gas/i386/x86-64-simd.s: Likewise.
+
+	* gas/i386/sse2.d: Updated.
+	* gas/i386/x86-64-simd.d: Likewise.
+	* gas/i386/x86-64-simd-intel.d: Likewise.
+	* gas/i386/x86-64-simd-suffix.d: Likewise.
+
+2008-04-23  David S. Miller  <davem@davemloft.net>
+
+	* gas/sparc/pc2210.d: New file.
+	* gas/sparc/pc2210.d: Likewise.
+	* gas/sparc/sparc.exp: Run new %pc22/%pc10 relocation test.
+
+2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/arch-10.d: Updated.
+	* gas/i386/avx.d: Likewise.
+	* gas/i386/avx-intel.d: Likewise.
+	* gas/i386/x86-64-arch-2.d: Likewise.
+	* gas/i386/x86-64-avx.d: Likewise.
+	* gas/i386/x86-64-avx-intel.d: Likewise.
+
+2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
+	    Michael Meissner  <michael.meissner@amd.com>
+
+	* gas/i386/x86-64-sse5.s: Add protX tests to allow memory in the
+	middle operand.
+	* gas/i386/x86-64-sse5.d: Likewise.
+	
+2008-04-16  David S. Miller  <davem@davemloft.net>
+
+	* gas/sparc/gotops32.d: New.
+	* gas/sparc/gotops32.s: Likewise.
+	* gas/sparc/gotops64.d: Likewise.
+	* gas/sparc/gotops64.s: Likewise.
+	* gas/sparc/sparc.exp: Run new gotdata tests.
+
+2008-04-15  Andrew Stubbs  <andrew.stubbs@st.com>
+
+	* gas/sh/arch/arch.exp: Align PC-relative instructions in the gererated
+	assembly files.
+	* gas/sh/arch/sh-dsp.s: Regenerate.
+	* gas/sh/arch/sh.s: Regenerate.
+	* gas/sh/arch/sh2.s: Regenerate.
+	* gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s: Regenerate.
+	* gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Regenerate.
+	* gas/sh/arch/sh2a-nofpu.s: Regenerate.
+	* gas/sh/arch/sh2a-or-sh3e.s: Regenerate.: Regenerate.
+	* gas/sh/arch/sh2a-or-sh4.s: Regenerate.
+	* gas/sh/arch/sh2a.s: Regenerate.
+	* gas/sh/arch/sh2e.s: Regenerate.
+	* gas/sh/arch/sh3-dsp.s: Regenerate.
+	* gas/sh/arch/sh3-nommu.s: Regenerate.
+	* gas/sh/arch/sh3.s: Regenerate.
+	* gas/sh/arch/sh3e.s: Regenerate.
+	* gas/sh/arch/sh4-nofpu.s: Regenerate.
+	* gas/sh/arch/sh4-nommu-nofpu.s: Regenerate.
+	* gas/sh/arch/sh4.s: Regenerate.
+	* gas/sh/arch/sh4a-nofpu.s: Regenerate.
+	* gas/sh/arch/sh4a.s: Regenerate.
+	* gas/sh/arch/sh4al-dsp.s: Regenerate.
+	* gas/sh/err-mova.s: New test.
+
+2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
+
+	* gas/ppc/e500mc.s, gas/ppc/e500mc.d: New test.
+	* gas/ppc/ppc.exp: Run the new test
+
+2008-04-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/lns/lns-big-delta.d: Updated.
+	* gas/lns/lns-common-1.d: Likewise.
+	* gas/lns/lns-common-1-alt.d: Likewise.
+	* gas/lns/lns-duplicate.d: Likewise.
+
+2008-04-10  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.exp: Run sse-check, sse-check-warn,
+	sse-check-error, x86-64-sse-check, x86-64-sse-check-warn and
+	x86-64-sse-check-error.
+
+	* gas/i386/sse-check.d: New.
+	* gas/i386/sse-check.s: Likewise.
+	* gas/i386/sse-check-error.l: Likewise.
+	* gas/i386/sse-check-error.s: Likewise.
+	* gas/i386/sse-check-warn.d: Likewise.
+	* gas/i386/sse-check-warn.e: Likewise.
+	* gas/i386/x86-64-sse-check.d: Likewise.
+	* gas/i386/x86-64-sse-check-error.l: Likewise.
+	* gas/i386/x86-64-sse-check-error.s: Likewise.
+	* gas/i386/x86-64-sse-check-warn.d: Likewise.
+
+2008-04-10  Santiago Urueña  <suruena@gmail.com>
+
+	* gas/all/gas.exp: Check the performance of the -ag command line
+	switch.
+
+2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	* gas/s390/zarch-z10.d: Map the compare and branch variants
+	with odd condition code mask to version with an even mask.
+
+2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/att-regs.s: Add AVX register test.
+	* gas/i386/intel-regs.s: Likewise.
+
+	* gas/i386/att-regs.d: Updated.
+	* gas/i386/intel-regs.d: Likewise.
+
+2008-04-07  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
+
+	PR gas/6043
+	* gas/sh/sh64/eh-1.d: New.
+	* gas/sh/sh64/eh-1.d: Likewise.
+
+2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL.
+	* gas/i386/arch-10-2.l: Likewise.
+	* gas/i386/arch-10-3.l: Likewise.
+	* gas/i386/arch-10-4.l: Likewise.
+	* gas/i386/arch-10.s: Likewise.
+	* gas/i386/clmul-intel.d: Likewise.
+	* gas/i386/clmul.d: Likewise.
+	* gas/i386/clmul.s: Likewise.
+	* gas/i386/x86-64-arch-2.s: Likewise.
+	* gas/i386/x86-64-clmul-intel.d: Likewise.
+	* gas/i386/x86-64-clmul.d: Likewise.
+	* gas/i386/x86-64-clmul.s: Likewise.
+
+	* gas/i386/arch-10.d: Replace clmul with pclmul.
+	* gas/i386/x86-64-arch-2.d: Likewise.
+
+2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
+	x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
+	x86-64-avx-intel and x86-64-inval-avx.
+
+	* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
+	* gas/cfi/cfi-x86_64.s: Likewise.
+
+	* gas/i386/aes.d: New.
+	* gas/i386/aes.s: Likewise.
+	* gas/i386/aes-intel.d: Likewise.
+	* gas/i386/avx.d: Likewise.
+	* gas/i386/avx.s: Likewise.
+	* gas/i386/avx-intel.d: Likewise.
+	* gas/i386/clmul.d: Likewise.
+	* gas/i386/clmul-intel.d: Likewise.
+	* gas/i386/clmul.s: Likewise.
+	* gas/i386/i386.exp: Likewise.
+	* gas/i386/inval-avx.l: Likewise.
+	* gas/i386/inval-avx.s: Likewise.
+	* gas/i386/sse2avx.d: Likewise.
+	* gas/i386/sse2avx.s: Likewise.
+	* gas/i386/x86-64-aes.d: Likewise.
+	* gas/i386/x86-64-aes.s: Likewise.
+	* gas/i386/x86-64-aes-intel.d: Likewise.
+	* gas/i386/x86-64-avx.d: Likewise.
+	* gas/i386/x86-64-avx.s: Likewise.
+	* gas/i386/x86-64-avx-intel.d: Likewise.
+	* gas/i386/x86-64-clmul.d: Likewise.
+	* gas/i386/x86-64-clmul-intel.d: Likewise.
+	* gas/i386/x86-64-clmul.s: Likewise.
+	* gas/i386/x86-64-inval-avx.l: Likewise.
+	* gas/i386/x86-64-inval-avx.s: Likewise.
+	* gas/i386/x86-64-sse2avx.d: Likewise.
+	* gas/i386/x86-64-sse2avx.s: Likewise.
+
+	* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
+	* gas/i386/x86-64-arch-2.s: Likewise.
+
+	* gas/i386/rexw.s: Add AVX tests.
+
+	* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
+
+	* gas/cfi/cfi-i386.d: Updated.
+	* gas/cfi/cfi-x86_64.d: Likewise.
+	* gas/i386/arch-10.d:  Likewise.
+	* gas/i386/arch-10-1.l: Likewise.
+	* gas/i386/arch-10-2.l: Likewise.
+	* gas/i386/arch-10-3.l: Likewise.
+	* gas/i386/arch-10-4.l: Likewise.
+	* gas/i386/rexw.d: Likewise.
+	* gas/i386/x86-64-arch-2.d: Likewise.
+	* gas/i386/x86-64-opcode-inval.d: Likewise.
+	* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
+
+2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
+
+	From Jie Zhang  <jie.zhang@analog.com>
+	* gas/bfin/load.d: Update.
+	* gas/bfin/expected_comparison_errors.l: New test.
+	* gas/bfin/expected_comparison_errors.s: New test.
+	* gas/bfin/bfin.exp: Add expected_comparison_errors.
+	* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s: Add
+	tests for bad options of "multiply and multipy-accumulate to
+	accumulator" instructions.  Add new vector instruction option
+	mode tests.
+	* gas/bfin/vector2.s: Add new vector instruction option mode test.
+	* gas/bfin/vector2.d: Adjust accordingly.
+	* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
+	Add check for mismatch of accumulator and data register.
+	* gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check
+	for IU option.
+
+	* gas/bfin/flow.d: Adjust since the generated labels for LOOP_BEGIN
+	and LOOP_END instruction are local now.
+	* gas/bfin/flow2.d: Likewise.
+
+	From  Mike Frysinger  <michael.frysinger@analog.com>
+	* gas/bfin/expected_errors.s, gas/bfin/expected_errors.l: Add test
+	for mismatched half registers in vector multipy-accumulate
+	instructions.
+
+	From Robin Getz  <rgetz@blackfin.uclinux.org>
+	* gas/bfin/arithmetic.d: Update to reflect spaces/capitalization in
+	recent changes in opcodes/bfin-dis.c.
+	gas/bfin/arithmetic.s: Likewise.
+	gas/bfin/bit.d: Likewise.
+	gas/bfin/bit2.d: Likewise.
+	gas/bfin/control_code.d: Likewise.
+	gas/bfin/control_code2.d: Likewise.
+	gas/bfin/event.d: Likewise.
+	gas/bfin/event2.d: Likewise.
+	gas/bfin/flow.d: Likewise.
+	gas/bfin/flow2.d: Likewise.
+	gas/bfin/load.d: Likewise.
+	gas/bfin/logical.d: Likewise.
+	gas/bfin/logical2.d: Likewise.
+	gas/bfin/move.d: Likewise.
+	gas/bfin/move2.d: Likewise.
+	gas/bfin/parallel.d: Likewise.
+	gas/bfin/parallel2.d: Likewise.
+	gas/bfin/parallel3.d: Likewise.
+	gas/bfin/parallel4.d: Likewise.
+	gas/bfin/shift.d: Likewise.
+	gas/bfin/shift2.d: Likewise.
+	gas/bfin/stack.d: Likewise.
+	gas/bfin/stack2.d: Likewise.
+	gas/bfin/store.d: Likewise.
+	gas/bfin/vector.d: Likewise.
+	gas/bfin/vector2.d: Likewise.
+	gas/bfin/video.d: Likewise.
+	gas/bfin/video2.d: Likewise.
+
+2008-03-19  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	* gas/s390/zarch-z10.d: New file.
+	* gas/s390/zarch-z10.s: New file.
+	* gas/s390/s390.exp: Run the z10 testcases.
+
+2008-03-17  Richard Sandiford  <rsandifo@nildram.co.uk>
+
+	* gas/mips/elf-rel26.d: Add -32.
+	* gas/mips/mips16-intermix.d: Likewise.
+
+2008-03-13  Nick Clifton  <nickc@redhat.com>
+
+	PR gas/5895
+	* gas/macros/exit.s: New test case.
+	* gas/macros/macros.exp: Run the new test, expect it to produce an
+	error result.
+
+2008-03-09  Paul Brook  <paul@codesourcery.com>
+
+	* gas/arm/vfpv3-d16-bad.d: New test.
+	* gas/arm/vfpv3-d16-bad.l: New test.
+
+2008-03-06  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	* gas/s390/esa-g5.d (cdfbr, cdfr, cefbr, cefr, cxfbr, cxfr,
+	dxr, fidr, fier, fixr, lzdr, lzer, lzxr, sqdr, sqer, tp): Fix
+	operand format.
+	* gas/s390/esa-g5.s: Likewise.
+	* gas/s390/zarch-z900.d (cdgbr, cdgr, cegbr, cegr, cxgbr,
+	cxgr): Likewise.
+	* gas/s390/zarch-z900.s: Likewise.
+	* gas/s390/zarch-z9-109.d (cu41, cu42): Remove mask operand.
+	* gas/s390/zarch-z9-109.s: Likewise.
+
+2008-03-04  Paul Brook  <paul@codesourcery.com>
+
+	* gas/arm/archv6m.d: New test.
+	* gas/arm/archv6m.s: New test.
+	* gas/arm/t16-bad.s: Test low register non flag setting add.
+	* gas/arm/t16-bad.l: Update expected output.
+
+2008-03-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/5543
+	* gas/i386/i386.exp: Run inval-equ-1 and inval-equ-2.
+
+	* gas/i386/inval-equ-1.l: New.
+	* gas/i386/inval-equ-1.s: Likewise.
+	* gas/i386/inval-equ-2.l: Likewise.
+	* gas/i386/inval-equ-2.s: Likewise.
+
+2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/x86-64-branch.s: Add tests for 16-bit near indirect
+	branches.
+
+	* gas/i386/x86-64-inval.s: Remove tests for 16-bit near indirect
+	branches.
+
+	* gas/i386/x86-64-branch.d: Updated.
+	* gas/i386/x86-64-inval.l: Likewise.
+
+2008-02-27  Nick Clifton  <nickc@redhat.com>
+
+	PR 3134
+	* gas/h8300/pr3134.s: New test.
+	* gas/h8300/pr3134.d: Expected disassembly
+	* gas/h8300/h8300.exp: Run the new test.
+
+	* gas/h8300/h8300-coff.exp: Fix test for COFF based ports to
+	accept h8300-rtemscoff not just h8300-rtems.
+
+2008-02-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/jump.d: Updated for COFF.
+
+2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/jump.s: Add tests for far branches.
+	* gas/i386/jump16.s: Likewise.
+
+	* gas/i386/jump.d: Updated.
+	* gas/i386/jump16.d: Likewise.
+	* gas/i386/x86-64-inval.l: Likewise.
+
+	* gas/i386/x86-64-inval.s: Add tests for 16-bit near indirect
+	branches.
+
+2008-02-22  Nick Clifton  <nickc@redhat.com>
+
+	* gas/m68hc11/bug-1825.d: Update to match changes in the
+	information generated with source-in-disassembly listings.
+	* gas/m68hc11/indexed12.d: Likewise.
+	* gas/m68hc11/insns-dwarf2.d: Likewise.
+	* gas/m68hc11/lbranch-dwarf2.d: Likewise.
+
+2008-02-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* cfi/cfi.exp (gas_x86_64_check): New.
+	(gas_x86_32_check): Likewise.
+	Run 32bit and 64bit tests for x86 targets if they are supportd.
+
+2008-02-18  Jan Beulich  <jbeulich@novell.com>
+
+	* gas/i386/att-regs.s, gas/i386/att-regs.d,
+	gas/i386/intel-regs.s, gas/i386/intel-regs.d: New.
+	* gas/i386/i386.exp: Run new tests.
+
+2008-02-14  Nick Clifton  <nickc@redhat.com>
+
+	PR gas/5712
+	* gas/arm/fp-save.s: New test.
+	* gas/arm/fp-save.d: Expected disassembly.
+
+2008-02-13  Adam Nemet  <anemet@caviumnetworks.com>
+
+	* gas/mips/branch-misc-2pic-64.d (#name): Have a unique name
+	different from the branch-misc-2-64.d test.
+
+2008-02-13  Jan Beulich  <jbeulich@novell.com>
+
+	* gas/i386/intelok.s: Replace invalid offset expression with
+	valid ones.
+	* gas/i386/x86_64.s: Likewise.
+
+2008-02-13  Jan Beulich  <jbeulich@novell.com>
+
+	* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
+	* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
+	gas/i386/opcode-intel.d: Adjust.
+
+2008-02-13  Jan Beulich  <jbeulich@novell.com>
+
+	* gas/cfi/cfi-i386.s: Add code testing use of all registers.
+	Fix a few comments.
+	* gas/cfi/cfi-x86_64.s: Likewise.
+	* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.
+
+2008-02-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.exp: Run x86-64-arch-2 instead of
+	x86-64-arch-10.
+
+	* gas/i386/x86-64-arch-10.d: Removed.
+
+	* gas/i386/x86-64-arch-2.d: New.
+	* gas/i386/x86-64-arch-2.s: Likewise.
+
+2008-02-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/x86-64-xsave.d: Remove prefix.
+
+2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/arch-10.s: Add xgetbv.
+
+	* gas/i386/arch-10.d: Updated.
+	* gas/i386/arch-10-1.l: Likewise.
+	* gas/i386/arch-10-2.l: Likewise.
+	* gas/i386/arch-10-3.l: Likewise.
+	* gas/i386/arch-10-4.l: Likewise.
+	* gas/i386/x86-64-arch-10.d: Likewise.
+
+2002-02-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave
+	and x86-64-xsave-intel.
+
+	* gas/i386/x86-64-xsave-intel.d: New file.
+	* gas/i386/x86-64-xsave.d: Likewise.
+	* gas/i386/x86-64-xsave.s: Likewise.
+	* gas/i386/xsave-intel.d: Likewise.
+	* gas/i386/xsave.d: Likewise.
+	* gas/i386/xsave.s: Likewise.
+
+2008-02-05  Adam Nemet  <anemet@caviumnetworks.com>
+
+	* gas/mips/mips.exp: Invoke the tests smartmips, mips32-dsp,
+	mips32-dspr2, mips64-dsp and mips32-mt with run_dump_test instead
+	of run_dump_test_arches.
+	* gas/mips/smartmips.d: Pass -mips32.
+	* gas/mips/mips64-dsp.d: Pass -mips64r2.
+	* gas/mips/mips32-dsp.d: Pass -mips32r2.
+	* gas/mips/mips32-dspr2.d: Likewise.
+	* gas/mips/mips32-mt.d: Likewise.
+
+2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
+
+	* gas/mips/mips.exp: Call mips_arch_create for Octeon.  Invoke
+	Octeon tests.
+	* gas/mips/octeon.s, gas/mips/octeon.d: New test.
+
+2008-01-31  Marc Gauthier  <marc@tensilica.com>
+
+	* gas/all/gas.exp: Recognize Xtensa processor variants.
+	* gas/elf/elf.exp: Likewise.
+	* gas/lns/lns.exp: Likewise.
+
+2008-01-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/cfi/cfi-alpha-1.d: Replace DW_CFA_def_cfa_reg with
+	DW_CFA_def_cfa_register.
+	* gas/cfi/cfi-alpha-3.d: Likewise.
+	* gas/cfi/cfi-hppa-1.d: Likewise.
+	* gas/cfi/cfi-i386.d: Likewise.
+	* gas/cfi/cfi-m68k.d: Likewise.
+	* gas/cfi/cfi-mips-1.d: Likewise.
+	* gas/cfi/cfi-sh-1.d: Likewise.
+	* gas/cfi/cfi-sparc-1.d: Likewise.
+	* gas/cfi/cfi-sparc64-1.d: Likewise.
+	* gas/cfi/cfi-x86_64.d: Likewise.
+
+	* gas/cfi/cfi-common-1.d: Updated for i386/x86-64 register
+	names.
+	* gas/cfi/cfi-common-2.d: Likewise.
+	* gas/cfi/cfi-common-5.d: Likewise.
+	* gas/cfi/cfi-i386.d: Likewise.
+	* gas/cfi/cfi-x86_64.d: Likewise.
+
+2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/x86-64-sib.s: Add tests for r12.
+
+	* gas/i386/x86-64-sib-intel.d: Updated.
+	* gas/i386/x86-64-sib.d: Likewise.
+
+2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10.
+
+	* gas/i386/x86-64-arch-1.d: New.
+	* gas/i386/x86-64-arch-1.s: Likewise.
+	* gas/i386/x86-64-arch-10.d: Likewise.
+
+2008-01-23  Tristan Gingold  <gingold@adacore.com>
+
+	* gas/ia64/regs.d: Updated as the ia64 disassembler now displays
+	symbolic names for all ar registers.
+
+2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/arch-10.d: New.
+	* gas/i386/arch-11.s: Likewise.
+	* gas/i386/arch-12.d: Likewise.
+	* gas/i386/arch-12.s: Likewise.
+
+	* gas/i386/i386.exp: Run arch-11 and arch-12.
+
+2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/arch-10-1.l: New.
+	* gas/i386/arch-10-1.s: Likewise.
+	* gas/i386/arch-10-2.l: Likewise.
+	* gas/i386/arch-10-2.s: Likewise.
+	* gas/i386/arch-10-3.l: Likewise.
+	* gas/i386/arch-10-3.s: Likewise.
+	* gas/i386/arch-10-4.l: Likewise.
+	* gas/i386/arch-10-4.s: Likewise.
+	* gas/i386/arch-10.d: Likewise.
+	* gas/i386/arch-10.s: Likewise.
+
+	* gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2,
+	arch-10-3 and arch-10-4.
+
+	* gas/i386/nops-2.s: Use movsbl instead of cmove.
+	* gas/i386/nops-2-i386.d: Updated.
+	* gas/i386/nops-2-merom.d: Likewise.
+	* gas/i386/nops-2.d: Likewise.
+	* gas/i386/x86-64-nops-2.d: Likewise.
+
+2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/prescott.s: Add tests for movddup in Intel syntax.
+	* gas/i386/x86-64-prescott.s: Likewise.
+
+	* gas/i386/prescott.d: Updated.
+	* gas/i386/x86-64-prescott.d: Likewise.
+
+2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.s: Add more tests for movsx and movzx.
+	* gas/i386/x86_64.s: Likewise.
+
+	* gas/i386/inval.s: Remove tests for movsxw and movzxw.
+
+	* gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw,
+	movsxl, movzxb and movzxw.
+
+	* gas/i386/i386.d: Updated.
+	* gas/i386/inval.l: Likewise.
+	* gas/i386/x86_64.d: Likewise.
+	* gas/i386/x86-64-inval.l: Likewise.
+
+2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.s: Add tests for movsx, movzx and movnti.
+	* gas/i386/inval.s: Likewise. 
+	* gas/i386/x86_64.s: Likewise.
+	* gas/i386/x86-64-inval.s: Likewise.
+
+	* gas/i386/i386.d: Updated.
+	* gas/i386/inval.l: Likewise.
+	* gas/i386/x86_64.d: Likewise.
+	* gas/i386/x86-64-inval.l: Likewise.
+
+2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/5534
+	* gas/i386/i386.s: Add tests for fnstsw and fstsw.
+	* gas/i386/inval.s: Likewise. 
+	* gas/i386/x86_64.s: Likewise.
+
+	* gas/i386/intel.s: Use word instead of dword on ss.
+
+	* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
+	and out.
+
+	* gas/i386/prefix.s: Remove invalid fstsw.
+
+	* gas/i386/inval.l: Updated.
+	* gas/i386/intelbad.l: Likewise.
+	* gas/i386/i386.d: Likewise.
+	* gas/i386/x86_64.d: Likewise.
+	* gas/i386/x86-64-inval.l: Likewise.
+	* gas/i386/prefix.d: Updated.
+
+2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/nops.s: Add more tests with opcodes from 0x0f19
+	to 0x0f1f.
+	* gas/i386/x86-64-nops.s: Likewise.
+
+	* gas/i386/nops.d: Updated.
+	* gas/i386/x86-64-nops.d: Likewise.
+
+2008-01-09  Bob Wilson  <bob.wilson@acm.org>
+	
+	* gas/lns/lns.exp: Run new lns-big-delta test for targets that set
+	DWARF2_USE_FIXED_ADVANCE_PC.
+	* gas/lns/lns-big-delta.s: New.
+	* gas/lns/lns-big-delta.d: New.
+	
+2008-01-08  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+	PR gas/5322
+	* lib/gas-defs.exp (gas_host_run): Add fourth argument to regsub
+	command.
+
+2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
+	fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.
+
+	* gas/i386/intel.d: Updated.
+	* gas/i386/intel.e: Likewise.
+
+2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/rexw.d: New.
+	* gas/i386/rexw.s: Likewise.
+
+	* gas/i386/x86-64-sse4_1-intel.d: Updated.
+	* gas/i386/x86-64-sse4_1.d: Likewise.
+
+2008-01-04  Nick Clifton  <nickc@redhat.com>
+
+	* gas/ppc/altivec_and_spe.s: New test - checks that ISA extension
+	command line options (-maltivec, -mspe) can be specified before
+	CPU selection command line options.
+	* gas/ppc/altivec_and_spe.d: Expected disassembly.
+	* gas/ppc/ppc.exp: Run the new test
+
+2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/arch-9.d: New file.
+	* gas/i386/arch-9.s: Likewise.
+
+	* gas/i386/i386.exp: Run arch-9.
+
+2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/arch-5.d: New file.
+	* gas/i386/arch-5.s: Likewise.
+	* gas/i386/arch-6.d: Likewise.
+	* gas/i386/arch-6.s: Likewise.
+	* gas/i386/arch-7.d: Likewise.
+	* gas/i386/arch-7.s: Likewise.
+	* gas/i386/arch-8.d: Likewise.
+	* gas/i386/arch-8.s: Likewise.
+
+	* gas/i386/i386.exp: Run arch-5, arch-6, arch-7 and arch-8.
+
+2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/i386.s: Add tests for movq.
+	* gas/i386/x86_64.s: Likewise.
+
+	* gas/i386/i386.d Updated.
+	* gas/i386/x86_64.d: Likewise.
+
+2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/5534
+	* gas/i386/intel.s: Use QWORD on movq instead of DWORD.
+
+	* gas/i386/inval.s: Add tests for movq.
+	* gas/i386/x86-64-inval.s: Likewise.
+
+	* gas/i386/inval.l: Updated.
+	* gas/i386/x86-64-inval.l: Likewise.
+
+2008-01-02  Catherine Moore  <clm@codesourcery.com>
+
+	* gas/mips/jalr.s: New test.
+	* gas/mips/jalr.l: New test output.
+	* gas/mips/mips.exp: Run new test.
+
+For older changes see ChangeLog-2007
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
diff --git a/gas/testsuite/gas/i386/arch-10-1.l b/gas/testsuite/gas/i386/arch-10-1.l
index 706dbde..ed14901 100644
--- a/gas/testsuite/gas/i386/arch-10-1.l
+++ b/gas/testsuite/gas/i386/arch-10-1.l
@@ -61,7 +61,7 @@ GAS LISTING .*
 [ 	]*31[ 	]+\# AES \+ AVX
 [ 	]*32[ 	]+vaesenc  \(%ecx\),%xmm0,%xmm2
 [ 	]*33[ 	]+\# FMA
-[ 	]*34[ 	]+vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*34[ 	]+vfmadd132pd %xmm4,%xmm6,%xmm2
 [ 	]*35[ 	]+\# MOVBE
 [ 	]*36[ 	]+movbe   \(%ecx\),%ebx
 [ 	]*37[ 	]+\# EPT
diff --git a/gas/testsuite/gas/i386/arch-10-2.l b/gas/testsuite/gas/i386/arch-10-2.l
index 621d06b..ebc0e39 100644
--- a/gas/testsuite/gas/i386/arch-10-2.l
+++ b/gas/testsuite/gas/i386/arch-10-2.l
@@ -60,7 +60,7 @@ GAS LISTING .*
 [ 	]*31[ 	]+\# AES \+ AVX
 [ 	]*32[ 	]+vaesenc  \(%ecx\),%xmm0,%xmm2
 [ 	]*33[ 	]+\# FMA
-[ 	]*34[ 	]+vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*34[ 	]+vfmadd132pd %xmm4,%xmm6,%xmm2
 [ 	]*35[ 	]+\# MOVBE
 [ 	]*36[ 	]+movbe   \(%ecx\),%ebx
 [ 	]*37[ 	]+\# EPT
diff --git a/gas/testsuite/gas/i386/arch-10-3.l b/gas/testsuite/gas/i386/arch-10-3.l
index 8e58487..59d3127 100644
--- a/gas/testsuite/gas/i386/arch-10-3.l
+++ b/gas/testsuite/gas/i386/arch-10-3.l
@@ -56,7 +56,7 @@ GAS LISTING .*
 [ 	]*31[ 	]+\# AES \+ AVX
 [ 	]*32[ 	]+vaesenc  \(%ecx\),%xmm0,%xmm2
 [ 	]*33[ 	]+\# FMA
-[ 	]*34[ 	]+vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*34[ 	]+vfmadd132pd %xmm4,%xmm6,%xmm2
 [ 	]*35[ 	]+\# MOVBE
 [ 	]*36[ 	]+movbe   \(%ecx\),%ebx
 [ 	]*37[ 	]+\# EPT
diff --git a/gas/testsuite/gas/i386/arch-10-4.l b/gas/testsuite/gas/i386/arch-10-4.l
index 6356ba1..444297a 100644
--- a/gas/testsuite/gas/i386/arch-10-4.l
+++ b/gas/testsuite/gas/i386/arch-10-4.l
@@ -54,7 +54,7 @@ GAS LISTING .*
 [ 	]*31[ 	]+\# AES \+ AVX
 [ 	]*32[ 	]+vaesenc  \(%ecx\),%xmm0,%xmm2
 [ 	]*33[ 	]+\# FMA
-[ 	]*34[ 	]+vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*34[ 	]+vfmadd132pd %xmm4,%xmm6,%xmm2
 [ 	]*35[ 	]+\# MOVBE
 [ 	]*36[ 	]+movbe   \(%ecx\),%ebx
 [ 	]*37[ 	]+\# EPT
diff --git a/gas/testsuite/gas/i386/arch-10.d b/gas/testsuite/gas/i386/arch-10.d
index dc730bd..9c3db2e 100644
--- a/gas/testsuite/gas/i386/arch-10.d
+++ b/gas/testsuite/gas/i386/arch-10.d
@@ -22,7 +22,7 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f 38 dc 01       	aesenc \(%ecx\),%xmm0
 [ 	]*[a-f0-9]+:	66 0f 3a 44 c1 08    	pclmulqdq \$0x8,%xmm1,%xmm0
 [ 	]*[a-f0-9]+:	c4 e2 79 dc 11       	vaesenc \(%ecx\),%xmm0,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 98 d4       	vfmadd132pd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	0f 38 f0 19          	movbe  \(%ecx\),%ebx
 [ 	]*[a-f0-9]+:	66 0f 38 80 19       	invept \(%ecx\),%ebx
 [ 	]*[a-f0-9]+:	0f 0f dc b7          	pmulhrw %mm4,%mm3
diff --git a/gas/testsuite/gas/i386/arch-10.s b/gas/testsuite/gas/i386/arch-10.s
index 32954c9..eec8143 100644
--- a/gas/testsuite/gas/i386/arch-10.s
+++ b/gas/testsuite/gas/i386/arch-10.s
@@ -31,7 +31,7 @@ pclmulqdq $8,%xmm1,%xmm0
 # AES + AVX
 vaesenc  (%ecx),%xmm0,%xmm2
 # FMA
-vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+vfmadd132pd %xmm4,%xmm6,%xmm2
 # MOVBE
 movbe   (%ecx),%ebx
 # EPT
diff --git a/gas/testsuite/gas/i386/avx-intel.d b/gas/testsuite/gas/i386/avx-intel.d
index ddf6f6e..a8b5705 100644
--- a/gas/testsuite/gas/i386/avx-intel.d
+++ b/gas/testsuite/gas/i386/avx-intel.d
@@ -15,14 +15,14 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e2 4d 2f 21       	vmaskmovpd YMMWORD PTR \[ecx\],ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 5d 2c 31       	vmaskmovps ymm6,ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 4d 2e 21       	vmaskmovps YMMWORD PTR \[ecx\],ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 64    	vpermilpd ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 64    	vpermilpd ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 64    	vpermilps ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 64    	vpermilps ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 64    	vroundpd ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 64    	vroundpd ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 64    	vroundps ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 64    	vroundps ymm6,YMMWORD PTR \[ecx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 07    	vpermilpd ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 07    	vpermilpd ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 07    	vpermilps ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 07    	vpermilps ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 07    	vroundpd ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 07    	vroundpd ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 07    	vroundps ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 07    	vroundps ymm6,YMMWORD PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c5 cd 58 d4          	vaddpd ymm2,ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 cd 58 11          	vaddpd ymm2,ymm6,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 cc 58 d4          	vaddps ymm2,ymm6,ymm4
@@ -221,109 +221,69 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fd 5a 21          	vcvtpd2ps xmm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fd e6 e4          	vcvttpd2dq xmm4,ymm4
 [ 	]*[a-f0-9]+:	c5 fd e6 21          	vcvttpd2dq xmm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fc 5b e4          	vcvtdq2ps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 5b f4          	vcvtdq2ps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 5b 21          	vcvtdq2ps ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fd 5b e4          	vcvtps2dq ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 5b f4          	vcvtps2dq ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 5b 21          	vcvtps2dq ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fe 5b e4          	vcvttps2dq ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 5b f4          	vcvttps2dq ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 5b 21          	vcvttps2dq ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fd 28 e4          	vmovapd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 28 f4          	vmovapd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 28 21          	vmovapd ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fc 28 e4          	vmovaps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 28 f4          	vmovaps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 28 21          	vmovaps ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fd 6f e4          	vmovdqa ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 6f f4          	vmovdqa ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 6f 21          	vmovdqa ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fe 6f e4          	vmovdqu ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 6f f4          	vmovdqu ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 6f 21          	vmovdqu ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 ff 12 e4          	vmovddup ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 ff 12 f4          	vmovddup ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 ff 12 21          	vmovddup ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fe 16 e4          	vmovshdup ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 16 f4          	vmovshdup ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 16 21          	vmovshdup ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fe 12 e4          	vmovsldup ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 12 f4          	vmovsldup ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 12 21          	vmovsldup ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fd 10 e4          	vmovupd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 10 f4          	vmovupd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 10 21          	vmovupd ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fc 10 e4          	vmovups ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 10 f4          	vmovups ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 10 21          	vmovups ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e2 7d 17 e4       	vptest ymm4,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 17 f4       	vptest ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 17 21       	vptest ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fc 53 e4          	vrcpps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 53 f4          	vrcpps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 53 21          	vrcpps ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fc 52 e4          	vrsqrtps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 52 f4          	vrsqrtps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 52 21          	vrsqrtps ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fd 51 e4          	vsqrtpd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 51 f4          	vsqrtpd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 51 21          	vsqrtpd ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fc 51 e4          	vsqrtps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 51 f4          	vsqrtps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 51 21          	vsqrtps ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e2 7d 0f e4       	vtestpd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0f f4       	vtestpd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 0f 21       	vtestpd ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e2 7d 0e e4       	vtestps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0e f4       	vtestps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 0e 21       	vtestps ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 ff f0 21          	vlddqu ymm4,\[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 64    	vblendpd ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 64    	vblendpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 64    	vblendps ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 64    	vblendps ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 cd c2 d4 64       	vcmppd ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cd c2 11 64       	vcmppd ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 cc c2 d4 64       	vcmpps ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cc c2 11 64       	vcmpps ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 64    	vdpps  ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 64    	vdpps  ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 64    	vperm2f128 ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 64    	vperm2f128 ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 cd c6 d4 64       	vshufpd ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cd c6 11 64       	vshufpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 cc c6 d4 64       	vshufps ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cc c6 11 64       	vshufps ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 07    	vblendpd ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 07    	vblendpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 07    	vblendps ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 07    	vblendps ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 cd c2 d4 07       	vcmpordpd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c5 cd c2 11 07       	vcmpordpd ymm2,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cc c2 d4 07       	vcmpordps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c5 cc c2 11 07       	vcmpordps ymm2,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 07    	vdpps  ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 07    	vdpps  ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 07    	vperm2f128 ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 07    	vperm2f128 ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 cd c6 d4 07       	vshufpd ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c5 cd c6 11 07       	vshufpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 cc c6 d4 07       	vshufps ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c5 cc c6 11 07       	vshufps ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b fe 40    	vblendvpd ymm7,ymm2,ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b 39 40    	vblendvpd ymm7,ymm2,YMMWORD PTR \[ecx\],ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a fe 40    	vblendvps ymm7,ymm2,ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a 39 40    	vblendvps ymm7,ymm2,YMMWORD PTR \[ecx\],ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 fc 20    	vfmaddps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d fc 20    	vfmaddsubpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c fc 20    	vfmaddsubps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f fc 20    	vfmsubaddpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e fc 20    	vfmsubaddps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d fc 20    	vfmsubpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c fc 20    	vfmsubps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 fc 20    	vfnmaddpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 fc 20    	vfnmaddps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d fc 20    	vfnmsubpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c fc 20    	vfnmsubps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 62    	vpermilmo2pd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 62    	vpermilmo2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 63    	vpermilmz2pd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 63    	vpermilmz2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 60    	vpermiltd2pd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 60    	vpermiltd2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 62    	vpermilmo2ps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 62    	vpermilmo2ps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 63    	vpermilmz2ps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 63    	vpermilmz2ps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 60    	vpermiltd2ps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 60    	vpermiltd2ps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 6a    	vpermil2pd ymm7,ymm2,ymm6,ymm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 6a    	vpermil2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 6a    	vpermil2ps ymm7,ymm2,ymm6,ymm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 6a    	vpermil2ps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 64    	vinsertf128 ymm6,ymm4,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 64    	vinsertf128 ymm6,ymm4,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 64    	vextractf128 xmm4,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 64    	vextractf128 XMMWORD PTR \[ecx\],ymm4,0x64
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 07    	vinsertf128 ymm6,ymm4,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 07    	vinsertf128 ymm6,ymm4,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 07    	vextractf128 xmm4,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 07    	vextractf128 XMMWORD PTR \[ecx\],ymm4,0x7
 [ 	]*[a-f0-9]+:	c4 e2 7d 1a 21       	vbroadcastf128 ymm4,XMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 f8 5b f4          	vcvtdq2ps xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 f8 5b 21          	vcvtdq2ps xmm4,XMMWORD PTR \[ecx\]
@@ -764,120 +724,60 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 c8 c2 39 1f       	vcmptrue_usps xmm7,xmm6,XMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 59 2c 31       	vmaskmovps xmm6,xmm4,XMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 59 2d 31       	vmaskmovpd xmm6,xmm4,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df f4 64    	vaeskeygenassist xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 df 31 64    	vaeskeygenassist xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 64    	vpcmpestri xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 61 31 64    	vpcmpestri xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 64    	vpcmpestrm xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 60 31 64    	vpcmpestrm xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 64    	vpcmpistri xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 63 31 64    	vpcmpistri xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 64    	vpcmpistrm xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 62 31 64    	vpcmpistrm xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 64    	vpermilpd xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 05 31 64    	vpermilpd xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 64    	vpermilps xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 04 31 64    	vpermilps xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 f9 70 f4 64       	vpshufd xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 f9 70 31 64       	vpshufd xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 fa 70 f4 64       	vpshufhw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 fa 70 31 64       	vpshufhw xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 fb 70 f4 64       	vpshuflw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 fb 70 31 64       	vpshuflw xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 64    	vroundpd xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 09 31 64    	vroundpd xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 64    	vroundps xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 08 31 64    	vroundps xmm6,XMMWORD PTR \[ecx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df f4 07    	vaeskeygenassist xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 df 31 07    	vaeskeygenassist xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 07    	vpcmpestri xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 61 31 07    	vpcmpestri xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 07    	vpcmpestrm xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 60 31 07    	vpcmpestrm xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 07    	vpcmpistri xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 63 31 07    	vpcmpistri xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 07    	vpcmpistrm xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 62 31 07    	vpcmpistrm xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 07    	vpermilpd xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 05 31 07    	vpermilpd xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 07    	vpermilps xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 04 31 07    	vpermilps xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 f9 70 f4 07       	vpshufd xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 f9 70 31 07       	vpshufd xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 fa 70 f4 07       	vpshufhw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 fa 70 31 07       	vpshufhw xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 fb 70 f4 07       	vpshuflw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 fb 70 31 07       	vpshuflw xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 07    	vroundpd xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 09 31 07    	vroundpd xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 07    	vroundps xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 08 31 07    	vroundps xmm6,XMMWORD PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c4 e2 49 2e 21       	vmaskmovps XMMWORD PTR \[ecx\],xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 49 2f 21       	vmaskmovpd XMMWORD PTR \[ecx\],xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 64    	vblendpd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 64    	vblendpd xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 64    	vblendps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 64    	vblendps xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 c9 c2 d4 64       	vcmppd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 c2 11 64       	vcmppd xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 c8 c2 d4 64       	vcmpps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c8 c2 11 64       	vcmpps xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 64    	vdppd  xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 41 11 64    	vdppd  xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 64    	vdpps  xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 40 11 64    	vdpps  xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 64    	vmpsadbw xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 42 11 64    	vmpsadbw xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 64    	vpalignr xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 64    	vpalignr xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 64    	vpblendw xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 64    	vpblendw xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 c9 c6 d4 64       	vshufpd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 c6 11 64       	vshufpd xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 c8 c6 d4 64       	vshufps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c8 c6 11 64       	vshufps xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 07    	vblendpd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 07    	vblendpd xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 07    	vblendps xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 07    	vblendps xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 c9 c2 d4 07       	vcmpordpd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 c9 c2 11 07       	vcmpordpd xmm2,xmm6,XMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 c8 c2 d4 07       	vcmpordps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 c8 c2 11 07       	vcmpordps xmm2,xmm6,XMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 07    	vdppd  xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 41 11 07    	vdppd  xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 07    	vdpps  xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 40 11 07    	vdpps  xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 07    	vmpsadbw xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 42 11 07    	vmpsadbw xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 07    	vpalignr xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 07    	vpalignr xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 07    	vpblendw xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 07    	vpblendw xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 c9 c6 d4 07       	vshufpd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 c6 11 07       	vshufpd xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 c8 c6 d4 07       	vshufps xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c8 c6 11 07       	vshufps xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 69 4b fe 40    	vblendvpd xmm7,xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4b 39 40    	vblendvpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4a fe 40    	vblendvps xmm7,xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4a 39 40    	vblendvps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4c fe 40    	vpblendvb xmm7,xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4c 39 40    	vpblendvb xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 fc 20    	vfmaddpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 fc 20    	vfmaddps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d fc 20    	vfmaddsubpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c fc 20    	vfmaddsubps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f fc 20    	vfmsubaddpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e fc 20    	vfmsubaddps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d fc 20    	vfmsubpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c fc 20    	vfmsubps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 fc 20    	vfnmaddpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 fc 20    	vfnmaddps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d fc 20    	vfnmsubpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c fc 20    	vfnmsubps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 62    	vpermilmo2pd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 62    	vpermilmo2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 42    	vpermilmo2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 63    	vpermilmz2pd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 63    	vpermilmz2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 43    	vpermilmz2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 60    	vpermiltd2pd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 60    	vpermiltd2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 40    	vpermiltd2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 62    	vpermilmo2ps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 62    	vpermilmo2ps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 42    	vpermilmo2ps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 63    	vpermilmz2ps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 63    	vpermilmz2ps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 43    	vpermilmz2ps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 60    	vpermiltd2ps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 60    	vpermiltd2ps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 40    	vpermiltd2ps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 6a    	vpermil2pd xmm7,xmm2,xmm6,xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 6a    	vpermil2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 4a    	vpermil2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 6a    	vpermil2ps xmm7,xmm2,xmm6,xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 6a    	vpermil2ps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 4a    	vpermil2ps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4,0xa
 [ 	]*[a-f0-9]+:	c4 e2 7d 19 21       	vbroadcastsd ymm4,QWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 f9 2f f4          	vcomisd xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 f9 2f 21          	vcomisd xmm4,QWORD PTR \[ecx\]
@@ -917,22 +817,10 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 d8 12 31          	vmovlps xmm6,xmm4,QWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 d9 16 31          	vmovhpd xmm6,xmm4,QWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 d8 16 31          	vmovhps xmm6,xmm4,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 cb c2 d4 64       	vcmpsd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 cb c2 11 64       	vcmpsd xmm2,xmm6,QWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 64    	vroundsd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 64    	vroundsd xmm2,xmm6,QWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b fc 20    	vfmaddsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f fc 20    	vfmsubsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b fc 20    	vfnmaddsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f fc 20    	vfnmsubsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 cb c2 d4 07       	vcmpordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cb c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 07    	vroundsd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 07    	vroundsd xmm2,xmm6,QWORD PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c5 cb 58 d4          	vaddsd xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 cb 58 11          	vaddsd xmm2,xmm6,QWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 cb 5a d4          	vcvtsd2ss xmm2,xmm6,xmm4
@@ -1013,6 +901,8 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1e       	vcmpgt_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 cb c2 d4 1f       	vcmptrue_ussd xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1f       	vcmptrue_ussd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr DWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 ca 58 d4          	vaddss xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 ca 58 11          	vaddss xmm2,xmm6,DWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 ca 5a d4          	vcvtss2sd xmm2,xmm6,xmm4
@@ -1121,49 +1011,37 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fa 2d 09          	vcvtss2si ecx,DWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fa 2c cc          	vcvttss2si ecx,xmm4
 [ 	]*[a-f0-9]+:	c5 fa 2c 09          	vcvttss2si ecx,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps DWORD PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 64    	vpextrd ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 16 21 64    	vpextrd DWORD PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 64    	vextractps ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps DWORD PTR \[ecx\],xmm4,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps DWORD PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 07    	vpextrd ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 16 21 07    	vpextrd DWORD PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 07    	vextractps ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps DWORD PTR \[ecx\],xmm4,0x7
 [ 	]*[a-f0-9]+:	c5 db 2a f1          	vcvtsi2sd xmm6,xmm4,ecx
 [ 	]*[a-f0-9]+:	c5 db 2a 31          	vcvtsi2sd xmm6,xmm4,DWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 da 2a f1          	vcvtsi2ss xmm6,xmm4,ecx
 [ 	]*[a-f0-9]+:	c5 da 2a 31          	vcvtsi2ss xmm6,xmm4,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 ca c2 d4 64       	vcmpss xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 ca c2 11 64       	vcmpss xmm2,xmm6,DWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 64    	vinsertps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 21 11 64    	vinsertps xmm2,xmm6,DWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 64    	vroundss xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 64    	vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a fc 20    	vfmaddss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e fc 20    	vfmsubss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a fc 20    	vfnmaddss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e fc 20    	vfnmsubss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 ca c2 d4 07       	vcmpordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ca c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 07    	vinsertps xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 21 11 07    	vinsertps xmm2,xmm6,DWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 07    	vroundss xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 07    	vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c4 e2 79 22 f4       	vpmovsxbq xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 22 21       	vpmovsxbq xmm4,WORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 79 32 f4       	vpmovzxbq xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 32 21       	vpmovzxbq xmm4,WORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw WORD PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw WORD PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 f1 64       	vpinsrw xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw xmm6,xmm4,WORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 64    	vpextrb ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb BYTE PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb BYTE PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x64
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw WORD PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw WORD PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 f1 07       	vpinsrw xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw xmm6,xmm4,WORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 07    	vpextrb ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb BYTE PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb BYTE PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c5 f9 f7 f4          	vmaskmovdqu xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 fa 7e f4          	vmovq  xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 f9 50 cc          	vmovmskpd ecx,xmm4
@@ -1173,17 +1051,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 c8 16 d4          	vmovlhps xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 cb 10 d4          	vmovsd xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 ca 10 d4          	vmovss xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c5 c9 72 f4 64       	vpslld xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 fc 64       	vpslldq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 f4 64       	vpsllq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 71 f4 64       	vpsllw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 72 e4 64       	vpsrad xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 71 e4 64       	vpsraw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 72 d4 64       	vpsrld xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 dc 64       	vpsrldq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 d4 64       	vpsrlq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 71 d4 64       	vpsrlw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw ecx,xmm4,0x64
+[ 	]*[a-f0-9]+:	c5 c9 72 f4 07       	vpslld xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 fc 07       	vpslldq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 f4 07       	vpsllq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 71 f4 07       	vpsllw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 72 e4 07       	vpsrad xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 71 e4 07       	vpsraw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 72 d4 07       	vpsrld xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 dc 07       	vpsrldq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 d4 07       	vpsrlq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 71 d4 07       	vpsrlw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw ecx,xmm4,0x7
 [ 	]*[a-f0-9]+:	c5 fd 50 cc          	vmovmskpd ecx,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 50 cc          	vmovmskps ecx,ymm4
 [ 	]*[a-f0-9]+:	c5 fb e6 f4          	vcvtpd2dq xmm6,xmm4
@@ -1200,17 +1078,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 05 34 12 00 00 	vcvtdq2pd ymm0,XMMWORD PTR ds:0x1234
 [ 	]*[a-f0-9]+:	c5 fd 5a 05 34 12 00 00 	vcvtpd2ps xmm0,YMMWORD PTR ds:0x1234
 [ 	]*[a-f0-9]+:	c5 f9 e0 3d 34 12 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR ds:0x1234
-[ 	]*[a-f0-9]+:	c4 e3 79 df 05 34 12 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR ds:0x1234,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 05 34 12 00 00 64 	vpextrb BYTE PTR ds:0x1234,xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 05 34 12 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR ds:0x1234,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 05 34 12 00 00 07 	vpextrb BYTE PTR ds:0x1234,xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a 3d 34 12 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR ds:0x1234
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 35 34 12 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR ds:0x1234,xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3d 34 12 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR ds:0x1234,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3d 34 12 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR ds:0x1234,0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 05 34 12 00 00 	vmovdqa ymm0,YMMWORD PTR ds:0x1234
 [ 	]*[a-f0-9]+:	c5 fd 7f 05 34 12 00 00 	vmovdqa YMMWORD PTR ds:0x1234,ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3d 34 12 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR ds:0x1234
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 05 34 12 00 00 64 	vroundpd ymm0,YMMWORD PTR ds:0x1234,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 05 34 12 00 00 64 	vextractf128 XMMWORD PTR ds:0x1234,ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3d 34 12 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR ds:0x1234,0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 05 34 12 00 00 07 	vroundpd ymm0,YMMWORD PTR ds:0x1234,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 05 34 12 00 00 07 	vextractf128 XMMWORD PTR ds:0x1234,ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3d 34 12 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR ds:0x1234,0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 35 34 12 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR ds:0x1234,ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 55 00       	vldmxcsr DWORD PTR \[ebp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 45 00       	vmovdqa xmm0,XMMWORD PTR \[ebp\+0x0\]
@@ -1220,17 +1098,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 45 00       	vcvtdq2pd ymm0,XMMWORD PTR \[ebp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 45 00       	vcvtpd2ps xmm0,YMMWORD PTR \[ebp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 7d 00       	vpavgb xmm7,xmm0,XMMWORD PTR \[ebp\+0x0\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 45 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[ebp\+0x0\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 45 00 64 	vpextrb BYTE PTR \[ebp\+0x0\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 45 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[ebp\+0x0\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 45 00 07 	vpextrb BYTE PTR \[ebp\+0x0\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a 7d 00       	vcvtsi2sd xmm7,xmm0,DWORD PTR \[ebp\+0x0\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 75 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[ebp\+0x0\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 7d 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[ebp\+0x0\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 7d 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[ebp\+0x0\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 45 00       	vmovdqa ymm0,YMMWORD PTR \[ebp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 45 00       	vmovdqa YMMWORD PTR \[ebp\+0x0\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 7d 00    	vpermilpd ymm7,ymm0,YMMWORD PTR \[ebp\+0x0\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 45 00 64 	vroundpd ymm0,YMMWORD PTR \[ebp\+0x0\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 45 00 64 	vextractf128 XMMWORD PTR \[ebp\+0x0\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 7d 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[ebp\+0x0\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 45 00 07 	vroundpd ymm0,YMMWORD PTR \[ebp\+0x0\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 45 00 07 	vextractf128 XMMWORD PTR \[ebp\+0x0\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 7d 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[ebp\+0x0\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 75 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[ebp\+0x0\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 24       	vldmxcsr DWORD PTR \[esp\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 04 24       	vmovdqa xmm0,XMMWORD PTR \[esp\]
@@ -1240,17 +1118,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 04 24       	vcvtdq2pd ymm0,XMMWORD PTR \[esp\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 04 24       	vcvtpd2ps xmm0,YMMWORD PTR \[esp\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 3c 24       	vpavgb xmm7,xmm0,XMMWORD PTR \[esp\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 04 24 64 	vaeskeygenassist xmm0,XMMWORD PTR \[esp\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 04 24 64 	vpextrb BYTE PTR \[esp\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 04 24 07 	vaeskeygenassist xmm0,XMMWORD PTR \[esp\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 04 24 07 	vpextrb BYTE PTR \[esp\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a 3c 24       	vcvtsi2sd xmm7,xmm0,DWORD PTR \[esp\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 34 24 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[esp\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 24 64 	vpinsrb xmm7,xmm0,BYTE PTR \[esp\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 24 07 	vpinsrb xmm7,xmm0,BYTE PTR \[esp\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 04 24       	vmovdqa ymm0,YMMWORD PTR \[esp\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 04 24       	vmovdqa YMMWORD PTR \[esp\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3c 24    	vpermilpd ymm7,ymm0,YMMWORD PTR \[esp\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 24 64 	vroundpd ymm0,YMMWORD PTR \[esp\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 24 64 	vextractf128 XMMWORD PTR \[esp\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 24 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[esp\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 24 07 	vroundpd ymm0,YMMWORD PTR \[esp\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 24 07 	vextractf128 XMMWORD PTR \[esp\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 24 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[esp\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 34 24 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[esp\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 95 99 00 00 00 	vldmxcsr DWORD PTR \[ebp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 85 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[ebp\+0x99\]
@@ -1260,17 +1138,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 85 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[ebp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 85 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[ebp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 bd 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[ebp\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 85 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[ebp\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 85 99 00 00 00 64 	vpextrb BYTE PTR \[ebp\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 85 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[ebp\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 85 99 00 00 00 07 	vpextrb BYTE PTR \[ebp\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a bd 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[ebp\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b5 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[ebp\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bd 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[ebp\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bd 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[ebp\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 85 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[ebp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 85 99 00 00 00 	vmovdqa YMMWORD PTR \[ebp\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bd 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[ebp\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 85 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[ebp\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 85 99 00 00 00 64 	vextractf128 XMMWORD PTR \[ebp\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bd 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[ebp\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 85 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[ebp\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 85 99 00 00 00 07 	vextractf128 XMMWORD PTR \[ebp\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bd 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[ebp\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b5 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[ebp\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 25 99 00 00 00 	vldmxcsr DWORD PTR \[eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 04 25 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[eiz\*1\+0x99\]
@@ -1280,17 +1158,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 04 25 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 04 25 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 3c 25 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[eiz\*1\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 04 25 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[eiz\*1\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 04 25 99 00 00 00 64 	vpextrb BYTE PTR \[eiz\*1\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 04 25 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[eiz\*1\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 04 25 99 00 00 00 07 	vpextrb BYTE PTR \[eiz\*1\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a 3c 25 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 34 25 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[eiz\*1\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 25 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[eiz\*1\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 25 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[eiz\*1\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 04 25 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 04 25 99 00 00 00 	vmovdqa YMMWORD PTR \[eiz\*1\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3c 25 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[eiz\*1\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 25 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[eiz\*1\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 25 99 00 00 00 64 	vextractf128 XMMWORD PTR \[eiz\*1\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 25 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eiz\*1\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 25 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[eiz\*1\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 25 99 00 00 00 07 	vextractf128 XMMWORD PTR \[eiz\*1\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 25 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eiz\*1\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 34 25 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[eiz\*1\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 65 99 00 00 00 	vldmxcsr DWORD PTR \[eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 04 65 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[eiz\*2\+0x99\]
@@ -1300,17 +1178,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 04 65 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 04 65 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 3c 65 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[eiz\*2\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 04 65 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[eiz\*2\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 04 65 99 00 00 00 64 	vpextrb BYTE PTR \[eiz\*2\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 04 65 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[eiz\*2\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 04 65 99 00 00 00 07 	vpextrb BYTE PTR \[eiz\*2\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a 3c 65 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 34 65 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[eiz\*2\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 65 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[eiz\*2\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 65 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[eiz\*2\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 04 65 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 04 65 99 00 00 00 	vmovdqa YMMWORD PTR \[eiz\*2\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3c 65 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[eiz\*2\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 65 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[eiz\*2\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 65 99 00 00 00 64 	vextractf128 XMMWORD PTR \[eiz\*2\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 65 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eiz\*2\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 65 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[eiz\*2\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 65 99 00 00 00 07 	vextractf128 XMMWORD PTR \[eiz\*2\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 65 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eiz\*2\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 34 65 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[eiz\*2\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 20 99 00 00 00 	vldmxcsr DWORD PTR \[eax\+eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 20 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[eax\+eiz\*1\+0x99\]
@@ -1320,17 +1198,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 20 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[eax\+eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 20 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 20 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[eax\+eiz\*1\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 20 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[eax\+eiz\*1\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 20 99 00 00 00 64 	vpextrb BYTE PTR \[eax\+eiz\*1\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 20 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[eax\+eiz\*1\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 20 99 00 00 00 07 	vpextrb BYTE PTR \[eax\+eiz\*1\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 20 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eax\+eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 20 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[eax\+eiz\*1\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 20 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[eax\+eiz\*1\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 20 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[eax\+eiz\*1\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 20 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 20 99 00 00 00 	vmovdqa YMMWORD PTR \[eax\+eiz\*1\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 20 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 20 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 20 99 00 00 00 64 	vextractf128 XMMWORD PTR \[eax\+eiz\*1\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 20 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 20 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 20 99 00 00 00 07 	vextractf128 XMMWORD PTR \[eax\+eiz\*1\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 20 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 20 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[eax\+eiz\*1\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 60 99 00 00 00 	vldmxcsr DWORD PTR \[eax\+eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 60 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[eax\+eiz\*2\+0x99\]
@@ -1340,17 +1218,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 60 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[eax\+eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 60 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 60 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[eax\+eiz\*2\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 60 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[eax\+eiz\*2\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 60 99 00 00 00 64 	vpextrb BYTE PTR \[eax\+eiz\*2\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 60 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[eax\+eiz\*2\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 60 99 00 00 00 07 	vpextrb BYTE PTR \[eax\+eiz\*2\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 60 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eax\+eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 60 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[eax\+eiz\*2\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 60 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[eax\+eiz\*2\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 60 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[eax\+eiz\*2\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 60 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 60 99 00 00 00 	vmovdqa YMMWORD PTR \[eax\+eiz\*2\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 60 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 60 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 60 99 00 00 00 64 	vextractf128 XMMWORD PTR \[eax\+eiz\*2\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 60 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 60 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 60 99 00 00 00 07 	vextractf128 XMMWORD PTR \[eax\+eiz\*2\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 60 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 60 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[eax\+eiz\*2\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 98 99 00 00 00 	vldmxcsr DWORD PTR \[eax\+ebx\*4\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 98 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[eax\+ebx\*4\+0x99\]
@@ -1360,17 +1238,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 98 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[eax\+ebx\*4\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 98 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 98 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[eax\+ebx\*4\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 98 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[eax\+ebx\*4\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 98 99 00 00 00 64 	vpextrb BYTE PTR \[eax\+ebx\*4\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 98 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[eax\+ebx\*4\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 98 99 00 00 00 07 	vpextrb BYTE PTR \[eax\+ebx\*4\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 98 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eax\+ebx\*4\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 98 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[eax\+ebx\*4\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 98 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[eax\+ebx\*4\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 98 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[eax\+ebx\*4\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 98 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 98 99 00 00 00 	vmovdqa YMMWORD PTR \[eax\+ebx\*4\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 98 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 98 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 98 99 00 00 00 64 	vextractf128 XMMWORD PTR \[eax\+ebx\*4\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 98 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 98 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 98 99 00 00 00 07 	vextractf128 XMMWORD PTR \[eax\+ebx\*4\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 98 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 98 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[eax\+ebx\*4\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 cc 99 00 00 00 	vldmxcsr DWORD PTR \[esp\+ecx\*8\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 cc 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[esp\+ecx\*8\+0x99\]
@@ -1380,17 +1258,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 cc 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[esp\+ecx\*8\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 cc 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc cc 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[esp\+ecx\*8\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 cc 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[esp\+ecx\*8\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 cc 99 00 00 00 64 	vpextrb BYTE PTR \[esp\+ecx\*8\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 cc 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[esp\+ecx\*8\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 cc 99 00 00 00 07 	vpextrb BYTE PTR \[esp\+ecx\*8\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a bc cc 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[esp\+ecx\*8\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 cc 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[esp\+ecx\*8\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc cc 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[esp\+ecx\*8\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc cc 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[esp\+ecx\*8\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 cc 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 cc 99 00 00 00 	vmovdqa YMMWORD PTR \[esp\+ecx\*8\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc cc 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 cc 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 cc 99 00 00 00 64 	vextractf128 XMMWORD PTR \[esp\+ecx\*8\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc cc 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 cc 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 cc 99 00 00 00 07 	vextractf128 XMMWORD PTR \[esp\+ecx\*8\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc cc 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 cc 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[esp\+ecx\*8\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 15 99 00 00 00 	vldmxcsr DWORD PTR \[ebp\+edx\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 15 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[ebp\+edx\*1\+0x99\]
@@ -1400,20 +1278,20 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 15 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[ebp\+edx\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 15 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 15 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[ebp\+edx\*1\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 15 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[ebp\+edx\*1\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 15 99 00 00 00 64 	vpextrb BYTE PTR \[ebp\+edx\*1\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 15 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[ebp\+edx\*1\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 15 99 00 00 00 07 	vpextrb BYTE PTR \[ebp\+edx\*1\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 15 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[ebp\+edx\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 15 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[ebp\+edx\*1\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 15 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[ebp\+edx\*1\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 15 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[ebp\+edx\*1\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 15 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 15 99 00 00 00 	vmovdqa YMMWORD PTR \[ebp\+edx\*1\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 15 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 15 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 15 99 00 00 00 64 	vextractf128 XMMWORD PTR \[ebp\+edx\*1\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 15 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 15 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 15 99 00 00 00 07 	vextractf128 XMMWORD PTR \[ebp\+edx\*1\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 15 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 15 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[ebp\+edx\*1\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f9 50 c0          	vmovmskpd eax,xmm0
-[ 	]*[a-f0-9]+:	c5 c1 72 f0 64       	vpslld xmm7,xmm0,0x64
+[ 	]*[a-f0-9]+:	c5 c1 72 f0 07       	vpslld xmm7,xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fc 50 c0          	vmovmskps eax,ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr DWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr DWORD PTR \[ecx\]
@@ -1427,18 +1305,18 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e2 4d 2e 21       	vmaskmovps YMMWORD PTR \[ecx\],ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 5d 2c 31       	vmaskmovps ymm6,ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 4d 2e 21       	vmaskmovps YMMWORD PTR \[ecx\],ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 64    	vpermilpd ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 64    	vpermilpd ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 64    	vpermilpd ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 64    	vpermilps ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 64    	vpermilps ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 64    	vpermilps ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 64    	vroundpd ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 64    	vroundpd ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 64    	vroundpd ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 64    	vroundps ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 64    	vroundps ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 64    	vroundps ymm6,YMMWORD PTR \[ecx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 07    	vpermilpd ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 07    	vpermilpd ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 07    	vpermilpd ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 07    	vpermilps ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 07    	vpermilps ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 07    	vpermilps ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 07    	vroundpd ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 07    	vroundpd ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 07    	vroundpd ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 07    	vroundps ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 07    	vroundps ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 07    	vroundps ymm6,YMMWORD PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c5 cd 58 d4          	vaddpd ymm2,ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 cd 58 11          	vaddpd ymm2,ymm6,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 cd 58 11          	vaddpd ymm2,ymm6,YMMWORD PTR \[ecx\]
@@ -1733,161 +1611,101 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fd 5a 21          	vcvtpd2ps xmm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fd e6 e4          	vcvttpd2dq xmm4,ymm4
 [ 	]*[a-f0-9]+:	c5 fd e6 21          	vcvttpd2dq xmm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fc 5b e4          	vcvtdq2ps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 5b f4          	vcvtdq2ps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 5b 21          	vcvtdq2ps ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fc 5b 21          	vcvtdq2ps ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fd 5b e4          	vcvtps2dq ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 5b f4          	vcvtps2dq ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 5b 21          	vcvtps2dq ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fd 5b 21          	vcvtps2dq ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fe 5b e4          	vcvttps2dq ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 5b f4          	vcvttps2dq ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 5b 21          	vcvttps2dq ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fe 5b 21          	vcvttps2dq ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fd 28 e4          	vmovapd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 28 f4          	vmovapd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 28 21          	vmovapd ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fd 28 21          	vmovapd ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fc 28 e4          	vmovaps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 28 f4          	vmovaps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 28 21          	vmovaps ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fc 28 21          	vmovaps ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fd 6f e4          	vmovdqa ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 6f f4          	vmovdqa ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 6f 21          	vmovdqa ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fd 6f 21          	vmovdqa ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fe 6f e4          	vmovdqu ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 6f f4          	vmovdqu ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 6f 21          	vmovdqu ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fe 6f 21          	vmovdqu ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 ff 12 e4          	vmovddup ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 ff 12 f4          	vmovddup ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 ff 12 21          	vmovddup ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 ff 12 21          	vmovddup ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fe 16 e4          	vmovshdup ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 16 f4          	vmovshdup ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 16 21          	vmovshdup ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fe 16 21          	vmovshdup ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fe 12 e4          	vmovsldup ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 12 f4          	vmovsldup ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 12 21          	vmovsldup ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fe 12 21          	vmovsldup ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fd 10 e4          	vmovupd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 10 f4          	vmovupd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 10 21          	vmovupd ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fd 10 21          	vmovupd ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fc 10 e4          	vmovups ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 10 f4          	vmovups ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 10 21          	vmovups ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fc 10 21          	vmovups ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e2 7d 17 e4       	vptest ymm4,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 17 f4       	vptest ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 17 21       	vptest ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 7d 17 21       	vptest ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fc 53 e4          	vrcpps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 53 f4          	vrcpps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 53 21          	vrcpps ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fc 53 21          	vrcpps ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fc 52 e4          	vrsqrtps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 52 f4          	vrsqrtps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 52 21          	vrsqrtps ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fc 52 21          	vrsqrtps ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fd 51 e4          	vsqrtpd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 51 f4          	vsqrtpd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 51 21          	vsqrtpd ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fd 51 21          	vsqrtpd ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 fc 51 e4          	vsqrtps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 51 f4          	vsqrtps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 51 21          	vsqrtps ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fc 51 21          	vsqrtps ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e2 7d 0f e4       	vtestpd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0f f4       	vtestpd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 0f 21       	vtestpd ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 7d 0f 21       	vtestpd ymm4,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e2 7d 0e e4       	vtestps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0e f4       	vtestps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 0e 21       	vtestps ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 7d 0e 21       	vtestps ymm4,YMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 ff f0 21          	vlddqu ymm4,\[ecx\]
 [ 	]*[a-f0-9]+:	c5 ff f0 21          	vlddqu ymm4,\[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 64    	vblendpd ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 64    	vblendpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 64    	vblendpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 64    	vblendps ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 64    	vblendps ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 64    	vblendps ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 cd c2 d4 64       	vcmppd ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cd c2 11 64       	vcmppd ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 cd c2 11 64       	vcmppd ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 cc c2 d4 64       	vcmpps ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cc c2 11 64       	vcmpps ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 cc c2 11 64       	vcmpps ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 64    	vdpps  ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 64    	vdpps  ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 64    	vdpps  ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 64    	vperm2f128 ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 64    	vperm2f128 ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 64    	vperm2f128 ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 cd c6 d4 64       	vshufpd ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cd c6 11 64       	vshufpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 cd c6 11 64       	vshufpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 cc c6 d4 64       	vshufps ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cc c6 11 64       	vshufps ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 cc c6 11 64       	vshufps ymm2,ymm6,YMMWORD PTR \[ecx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 07    	vblendpd ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 07    	vblendpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 07    	vblendpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 07    	vblendps ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 07    	vblendps ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 07    	vblendps ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 cd c2 d4 07       	vcmpordpd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c5 cd c2 11 07       	vcmpordpd ymm2,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cd c2 11 07       	vcmpordpd ymm2,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cc c2 d4 07       	vcmpordps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c5 cc c2 11 07       	vcmpordps ymm2,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cc c2 11 07       	vcmpordps ymm2,ymm6,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 07    	vdpps  ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 07    	vdpps  ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 07    	vdpps  ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 07    	vperm2f128 ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 07    	vperm2f128 ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 07    	vperm2f128 ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 cd c6 d4 07       	vshufpd ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c5 cd c6 11 07       	vshufpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 cd c6 11 07       	vshufpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 cc c6 d4 07       	vshufps ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c5 cc c6 11 07       	vshufps ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 cc c6 11 07       	vshufps ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b fe 40    	vblendvpd ymm7,ymm2,ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b 39 40    	vblendvpd ymm7,ymm2,YMMWORD PTR \[ecx\],ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b 39 40    	vblendvpd ymm7,ymm2,YMMWORD PTR \[ecx\],ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a fe 40    	vblendvps ymm7,ymm2,ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a 39 40    	vblendvps ymm7,ymm2,YMMWORD PTR \[ecx\],ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a 39 40    	vblendvps ymm7,ymm2,YMMWORD PTR \[ecx\],ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 fc 20    	vfmaddps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d fc 20    	vfmaddsubpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c fc 20    	vfmaddsubps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f fc 20    	vfmsubaddpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e fc 20    	vfmsubaddps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d fc 20    	vfmsubpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c fc 20    	vfmsubps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 fc 20    	vfnmaddpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 fc 20    	vfnmaddps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d fc 20    	vfnmsubpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c fc 20    	vfnmsubps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 62    	vpermilmo2pd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 62    	vpermilmo2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 62    	vpermilmo2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 63    	vpermilmz2pd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 63    	vpermilmz2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 63    	vpermilmz2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 60    	vpermiltd2pd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 60    	vpermiltd2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 60    	vpermiltd2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 62    	vpermilmo2ps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 62    	vpermilmo2ps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 62    	vpermilmo2ps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 63    	vpermilmz2ps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 63    	vpermilmz2ps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 63    	vpermilmz2ps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 60    	vpermiltd2ps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 60    	vpermiltd2ps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 60    	vpermiltd2ps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 6a    	vpermil2pd ymm7,ymm2,ymm6,ymm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 6a    	vpermil2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 6a    	vpermil2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 6a    	vpermil2ps ymm7,ymm2,ymm6,ymm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 6a    	vpermil2ps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 6a    	vpermil2ps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 64    	vinsertf128 ymm6,ymm4,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 64    	vinsertf128 ymm6,ymm4,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 64    	vinsertf128 ymm6,ymm4,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 64    	vextractf128 xmm4,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 64    	vextractf128 XMMWORD PTR \[ecx\],ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 64    	vextractf128 XMMWORD PTR \[ecx\],ymm4,0x64
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 07    	vinsertf128 ymm6,ymm4,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 07    	vinsertf128 ymm6,ymm4,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 07    	vinsertf128 ymm6,ymm4,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 07    	vextractf128 xmm4,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 07    	vextractf128 XMMWORD PTR \[ecx\],ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 07    	vextractf128 XMMWORD PTR \[ecx\],ymm4,0x7
 [ 	]*[a-f0-9]+:	c4 e2 7d 1a 21       	vbroadcastf128 ymm4,XMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 7d 1a 21       	vbroadcastf128 ymm4,XMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 f8 5b f4          	vcvtdq2ps xmm6,xmm4
@@ -2549,79 +2367,79 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e2 59 2c 31       	vmaskmovps xmm6,xmm4,XMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 59 2d 31       	vmaskmovpd xmm6,xmm4,XMMWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 59 2d 31       	vmaskmovpd xmm6,xmm4,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df f4 64    	vaeskeygenassist xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 df 31 64    	vaeskeygenassist xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 df 31 64    	vaeskeygenassist xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 64    	vpcmpestri xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 61 31 64    	vpcmpestri xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 61 31 64    	vpcmpestri xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 64    	vpcmpestrm xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 60 31 64    	vpcmpestrm xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 60 31 64    	vpcmpestrm xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 64    	vpcmpistri xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 63 31 64    	vpcmpistri xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 63 31 64    	vpcmpistri xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 64    	vpcmpistrm xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 62 31 64    	vpcmpistrm xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 62 31 64    	vpcmpistrm xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 64    	vpermilpd xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 05 31 64    	vpermilpd xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 05 31 64    	vpermilpd xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 64    	vpermilps xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 04 31 64    	vpermilps xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 04 31 64    	vpermilps xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 f9 70 f4 64       	vpshufd xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 f9 70 31 64       	vpshufd xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 f9 70 31 64       	vpshufd xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 fa 70 f4 64       	vpshufhw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 fa 70 31 64       	vpshufhw xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 fa 70 31 64       	vpshufhw xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 fb 70 f4 64       	vpshuflw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 fb 70 31 64       	vpshuflw xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 fb 70 31 64       	vpshuflw xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 64    	vroundpd xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 09 31 64    	vroundpd xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 09 31 64    	vroundpd xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 64    	vroundps xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 08 31 64    	vroundps xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 08 31 64    	vroundps xmm6,XMMWORD PTR \[ecx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df f4 07    	vaeskeygenassist xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 df 31 07    	vaeskeygenassist xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 df 31 07    	vaeskeygenassist xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 07    	vpcmpestri xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 61 31 07    	vpcmpestri xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 61 31 07    	vpcmpestri xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 07    	vpcmpestrm xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 60 31 07    	vpcmpestrm xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 60 31 07    	vpcmpestrm xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 07    	vpcmpistri xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 63 31 07    	vpcmpistri xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 63 31 07    	vpcmpistri xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 07    	vpcmpistrm xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 62 31 07    	vpcmpistrm xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 62 31 07    	vpcmpistrm xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 07    	vpermilpd xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 05 31 07    	vpermilpd xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 05 31 07    	vpermilpd xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 07    	vpermilps xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 04 31 07    	vpermilps xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 04 31 07    	vpermilps xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 f9 70 f4 07       	vpshufd xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 f9 70 31 07       	vpshufd xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 f9 70 31 07       	vpshufd xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 fa 70 f4 07       	vpshufhw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 fa 70 31 07       	vpshufhw xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 fa 70 31 07       	vpshufhw xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 fb 70 f4 07       	vpshuflw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 fb 70 31 07       	vpshuflw xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 fb 70 31 07       	vpshuflw xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 07    	vroundpd xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 09 31 07    	vroundpd xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 09 31 07    	vroundpd xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 07    	vroundps xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 08 31 07    	vroundps xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 08 31 07    	vroundps xmm6,XMMWORD PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c4 e2 49 2e 21       	vmaskmovps XMMWORD PTR \[ecx\],xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 49 2e 21       	vmaskmovps XMMWORD PTR \[ecx\],xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 49 2f 21       	vmaskmovpd XMMWORD PTR \[ecx\],xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 49 2f 21       	vmaskmovpd XMMWORD PTR \[ecx\],xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 64    	vblendpd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 64    	vblendpd xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 64    	vblendpd xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 64    	vblendps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 64    	vblendps xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 64    	vblendps xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 c9 c2 d4 64       	vcmppd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 c2 11 64       	vcmppd xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 c9 c2 11 64       	vcmppd xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 c8 c2 d4 64       	vcmpps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c8 c2 11 64       	vcmpps xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 c8 c2 11 64       	vcmpps xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 64    	vdppd  xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 41 11 64    	vdppd  xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 41 11 64    	vdppd  xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 64    	vdpps  xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 40 11 64    	vdpps  xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 40 11 64    	vdpps  xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 64    	vmpsadbw xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 42 11 64    	vmpsadbw xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 42 11 64    	vmpsadbw xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 64    	vpalignr xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 64    	vpalignr xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 64    	vpalignr xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 64    	vpblendw xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 64    	vpblendw xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 64    	vpblendw xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 c9 c6 d4 64       	vshufpd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 c6 11 64       	vshufpd xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 c9 c6 11 64       	vshufpd xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 c8 c6 d4 64       	vshufps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c8 c6 11 64       	vshufps xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 c8 c6 11 64       	vshufps xmm2,xmm6,XMMWORD PTR \[ecx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 07    	vblendpd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 07    	vblendpd xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 07    	vblendpd xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 07    	vblendps xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 07    	vblendps xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 07    	vblendps xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 c9 c2 d4 07       	vcmpordpd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 c9 c2 11 07       	vcmpordpd xmm2,xmm6,XMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 c9 c2 11 07       	vcmpordpd xmm2,xmm6,XMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 c8 c2 d4 07       	vcmpordps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 c8 c2 11 07       	vcmpordps xmm2,xmm6,XMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 c8 c2 11 07       	vcmpordps xmm2,xmm6,XMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 07    	vdppd  xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 41 11 07    	vdppd  xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 41 11 07    	vdppd  xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 07    	vdpps  xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 40 11 07    	vdpps  xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 40 11 07    	vdpps  xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 07    	vmpsadbw xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 42 11 07    	vmpsadbw xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 42 11 07    	vmpsadbw xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 07    	vpalignr xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 07    	vpalignr xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 07    	vpalignr xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 07    	vpblendw xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 07    	vpblendw xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 07    	vpblendw xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 c9 c6 d4 07       	vshufpd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 c6 11 07       	vshufpd xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 c9 c6 11 07       	vshufpd xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 c8 c6 d4 07       	vshufps xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c8 c6 11 07       	vshufps xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 c8 c6 11 07       	vshufps xmm2,xmm6,XMMWORD PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 69 4b fe 40    	vblendvpd xmm7,xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4b 39 40    	vblendvpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4b 39 40    	vblendvpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
@@ -2631,106 +2449,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e3 69 4c fe 40    	vpblendvb xmm7,xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4c 39 40    	vpblendvb xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4c 39 40    	vpblendvb xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 fc 20    	vfmaddpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 fc 20    	vfmaddps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d fc 20    	vfmaddsubpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c fc 20    	vfmaddsubps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f fc 20    	vfmsubaddpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e fc 20    	vfmsubaddps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d fc 20    	vfmsubpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c fc 20    	vfmsubps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 fc 20    	vfnmaddpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 fc 20    	vfnmaddps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d fc 20    	vfnmsubpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c fc 20    	vfnmsubps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 62    	vpermilmo2pd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 62    	vpermilmo2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 42    	vpermilmo2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 62    	vpermilmo2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 42    	vpermilmo2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 63    	vpermilmz2pd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 63    	vpermilmz2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 43    	vpermilmz2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 63    	vpermilmz2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 43    	vpermilmz2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 60    	vpermiltd2pd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 60    	vpermiltd2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 40    	vpermiltd2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 60    	vpermiltd2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 40    	vpermiltd2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 62    	vpermilmo2ps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 62    	vpermilmo2ps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 42    	vpermilmo2ps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 62    	vpermilmo2ps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 42    	vpermilmo2ps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 63    	vpermilmz2ps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 63    	vpermilmz2ps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 43    	vpermilmz2ps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 63    	vpermilmz2ps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 43    	vpermilmz2ps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 60    	vpermiltd2ps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 60    	vpermiltd2ps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 40    	vpermiltd2ps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 60    	vpermiltd2ps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 40    	vpermiltd2ps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 6a    	vpermil2pd xmm7,xmm2,xmm6,xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 6a    	vpermil2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 4a    	vpermil2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 6a    	vpermil2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 4a    	vpermil2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 6a    	vpermil2ps xmm7,xmm2,xmm6,xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 6a    	vpermil2ps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 4a    	vpermil2ps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 6a    	vpermil2ps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 4a    	vpermil2ps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4,0xa
 [ 	]*[a-f0-9]+:	c4 e2 7d 19 21       	vbroadcastsd ymm4,QWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 7d 19 21       	vbroadcastsd ymm4,QWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 f9 2f f4          	vcomisd xmm6,xmm4
@@ -2796,32 +2514,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 d9 16 31          	vmovhpd xmm6,xmm4,QWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 d8 16 31          	vmovhps xmm6,xmm4,QWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 d8 16 31          	vmovhps xmm6,xmm4,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 cb c2 d4 64       	vcmpsd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 cb c2 11 64       	vcmpsd xmm2,xmm6,QWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 cb c2 11 64       	vcmpsd xmm2,xmm6,QWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 64    	vroundsd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 64    	vroundsd xmm2,xmm6,QWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 64    	vroundsd xmm2,xmm6,QWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b fc 20    	vfmaddsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f fc 20    	vfmsubsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b fc 20    	vfnmaddsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f fc 20    	vfnmsubsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 cb c2 d4 07       	vcmpordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cb c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cb c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 07    	vroundsd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 07    	vroundsd xmm2,xmm6,QWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 07    	vroundsd xmm2,xmm6,QWORD PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c5 cb 58 d4          	vaddsd xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 cb 58 11          	vaddsd xmm2,xmm6,QWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 cb 58 11          	vaddsd xmm2,xmm6,QWORD PTR \[ecx\]
@@ -2942,6 +2640,10 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 cb c2 d4 1f       	vcmptrue_ussd xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1f       	vcmptrue_ussd xmm2,xmm6,QWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1f       	vcmptrue_ussd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr DWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 ca 58 d4          	vaddss xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 ca 58 11          	vaddss xmm2,xmm6,DWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 ca 58 11          	vaddss xmm2,xmm6,DWORD PTR \[ecx\]
@@ -3106,74 +2808,54 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fa 2c cc          	vcvttss2si ecx,xmm4
 [ 	]*[a-f0-9]+:	c5 fa 2c 09          	vcvttss2si ecx,DWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 fa 2c 09          	vcvttss2si ecx,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps DWORD PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps DWORD PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 64    	vpextrd ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 16 21 64    	vpextrd DWORD PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 16 21 64    	vpextrd DWORD PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 64    	vextractps ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps DWORD PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps DWORD PTR \[ecx\],xmm4,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps DWORD PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps DWORD PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 07    	vpextrd ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 16 21 07    	vpextrd DWORD PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 16 21 07    	vpextrd DWORD PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 07    	vextractps ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps DWORD PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps DWORD PTR \[ecx\],xmm4,0x7
 [ 	]*[a-f0-9]+:	c5 db 2a f1          	vcvtsi2sd xmm6,xmm4,ecx
 [ 	]*[a-f0-9]+:	c5 db 2a 31          	vcvtsi2sd xmm6,xmm4,DWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 db 2a 31          	vcvtsi2sd xmm6,xmm4,DWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 da 2a f1          	vcvtsi2ss xmm6,xmm4,ecx
 [ 	]*[a-f0-9]+:	c5 da 2a 31          	vcvtsi2ss xmm6,xmm4,DWORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c5 da 2a 31          	vcvtsi2ss xmm6,xmm4,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 ca c2 d4 64       	vcmpss xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 ca c2 11 64       	vcmpss xmm2,xmm6,DWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 ca c2 11 64       	vcmpss xmm2,xmm6,DWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 64    	vinsertps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 21 11 64    	vinsertps xmm2,xmm6,DWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 21 11 64    	vinsertps xmm2,xmm6,DWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 64    	vroundss xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 64    	vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 64    	vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a fc 20    	vfmaddss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e fc 20    	vfmsubss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a fc 20    	vfnmaddss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e fc 20    	vfnmsubss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 ca c2 d4 07       	vcmpordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ca c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ca c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 07    	vinsertps xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 21 11 07    	vinsertps xmm2,xmm6,DWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 21 11 07    	vinsertps xmm2,xmm6,DWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 07    	vroundss xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 07    	vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 07    	vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c4 e2 79 22 f4       	vpmovsxbq xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 22 21       	vpmovsxbq xmm4,WORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 79 22 21       	vpmovsxbq xmm4,WORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 79 32 f4       	vpmovzxbq xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 32 21       	vpmovzxbq xmm4,WORD PTR \[ecx\]
 [ 	]*[a-f0-9]+:	c4 e2 79 32 21       	vpmovzxbq xmm4,WORD PTR \[ecx\]
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw WORD PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw WORD PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw WORD PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw WORD PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 f1 64       	vpinsrw xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw xmm6,xmm4,WORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw xmm6,xmm4,WORD PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 64    	vpextrb ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb BYTE PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb BYTE PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb BYTE PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb BYTE PTR \[ecx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x64
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw WORD PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw WORD PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw WORD PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw WORD PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 f1 07       	vpinsrw xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw xmm6,xmm4,WORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw xmm6,xmm4,WORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 07    	vpextrb ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb BYTE PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb BYTE PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb BYTE PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb BYTE PTR \[ecx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb xmm6,xmm4,BYTE PTR \[ecx\],0x7
 [ 	]*[a-f0-9]+:	c5 f9 f7 f4          	vmaskmovdqu xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 fa 7e f4          	vmovq  xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 f9 50 cc          	vmovmskpd ecx,xmm4
@@ -3183,17 +2865,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 c8 16 d4          	vmovlhps xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 cb 10 d4          	vmovsd xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 ca 10 d4          	vmovss xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c5 c9 72 f4 64       	vpslld xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 fc 64       	vpslldq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 f4 64       	vpsllq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 71 f4 64       	vpsllw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 72 e4 64       	vpsrad xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 71 e4 64       	vpsraw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 72 d4 64       	vpsrld xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 dc 64       	vpsrldq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 d4 64       	vpsrlq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 71 d4 64       	vpsrlw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw ecx,xmm4,0x64
+[ 	]*[a-f0-9]+:	c5 c9 72 f4 07       	vpslld xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 fc 07       	vpslldq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 f4 07       	vpsllq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 71 f4 07       	vpsllw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 72 e4 07       	vpsrad xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 71 e4 07       	vpsraw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 72 d4 07       	vpsrld xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 dc 07       	vpsrldq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 d4 07       	vpsrlq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 71 d4 07       	vpsrlw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw ecx,xmm4,0x7
 [ 	]*[a-f0-9]+:	c5 fd 50 cc          	vmovmskpd ecx,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 50 cc          	vmovmskps ecx,ymm4
 [ 	]*[a-f0-9]+:	c5 fb e6 f4          	vcvtpd2dq xmm6,xmm4
@@ -3210,17 +2892,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 05 34 12 00 00 	vcvtdq2pd ymm0,XMMWORD PTR ds:0x1234
 [ 	]*[a-f0-9]+:	c5 fd 5a 05 34 12 00 00 	vcvtpd2ps xmm0,YMMWORD PTR ds:0x1234
 [ 	]*[a-f0-9]+:	c5 f9 e0 3d 34 12 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR ds:0x1234
-[ 	]*[a-f0-9]+:	c4 e3 79 df 05 34 12 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR ds:0x1234,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 05 34 12 00 00 64 	vpextrb BYTE PTR ds:0x1234,xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 05 34 12 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR ds:0x1234,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 05 34 12 00 00 07 	vpextrb BYTE PTR ds:0x1234,xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a 3d 34 12 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR ds:0x1234
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 35 34 12 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR ds:0x1234,xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3d 34 12 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR ds:0x1234,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3d 34 12 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR ds:0x1234,0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 05 34 12 00 00 	vmovdqa ymm0,YMMWORD PTR ds:0x1234
 [ 	]*[a-f0-9]+:	c5 fd 7f 05 34 12 00 00 	vmovdqa YMMWORD PTR ds:0x1234,ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3d 34 12 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR ds:0x1234
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 05 34 12 00 00 64 	vroundpd ymm0,YMMWORD PTR ds:0x1234,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 05 34 12 00 00 64 	vextractf128 XMMWORD PTR ds:0x1234,ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3d 34 12 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR ds:0x1234,0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 05 34 12 00 00 07 	vroundpd ymm0,YMMWORD PTR ds:0x1234,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 05 34 12 00 00 07 	vextractf128 XMMWORD PTR ds:0x1234,ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3d 34 12 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR ds:0x1234,0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 35 34 12 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR ds:0x1234,ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 55 00       	vldmxcsr DWORD PTR \[ebp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 45 00       	vmovdqa xmm0,XMMWORD PTR \[ebp\+0x0\]
@@ -3230,17 +2912,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 45 00       	vcvtdq2pd ymm0,XMMWORD PTR \[ebp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 45 00       	vcvtpd2ps xmm0,YMMWORD PTR \[ebp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 7d 00       	vpavgb xmm7,xmm0,XMMWORD PTR \[ebp\+0x0\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 45 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[ebp\+0x0\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 45 00 64 	vpextrb BYTE PTR \[ebp\+0x0\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 45 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[ebp\+0x0\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 45 00 07 	vpextrb BYTE PTR \[ebp\+0x0\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a 7d 00       	vcvtsi2sd xmm7,xmm0,DWORD PTR \[ebp\+0x0\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 75 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[ebp\+0x0\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 7d 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[ebp\+0x0\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 7d 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[ebp\+0x0\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 45 00       	vmovdqa ymm0,YMMWORD PTR \[ebp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 45 00       	vmovdqa YMMWORD PTR \[ebp\+0x0\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 7d 00    	vpermilpd ymm7,ymm0,YMMWORD PTR \[ebp\+0x0\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 45 00 64 	vroundpd ymm0,YMMWORD PTR \[ebp\+0x0\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 45 00 64 	vextractf128 XMMWORD PTR \[ebp\+0x0\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 7d 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[ebp\+0x0\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 45 00 07 	vroundpd ymm0,YMMWORD PTR \[ebp\+0x0\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 45 00 07 	vextractf128 XMMWORD PTR \[ebp\+0x0\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 7d 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[ebp\+0x0\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 75 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[ebp\+0x0\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 95 99 00 00 00 	vldmxcsr DWORD PTR \[ebp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 85 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[ebp\+0x99\]
@@ -3250,17 +2932,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 85 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[ebp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 85 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[ebp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 bd 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[ebp\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 85 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[ebp\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 85 99 00 00 00 64 	vpextrb BYTE PTR \[ebp\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 85 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[ebp\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 85 99 00 00 00 07 	vpextrb BYTE PTR \[ebp\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a bd 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[ebp\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b5 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[ebp\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bd 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[ebp\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bd 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[ebp\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 85 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[ebp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 85 99 00 00 00 	vmovdqa YMMWORD PTR \[ebp\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bd 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[ebp\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 85 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[ebp\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 85 99 00 00 00 64 	vextractf128 XMMWORD PTR \[ebp\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bd 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[ebp\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 85 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[ebp\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 85 99 00 00 00 07 	vextractf128 XMMWORD PTR \[ebp\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bd 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[ebp\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b5 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[ebp\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 25 99 00 00 00 	vldmxcsr DWORD PTR \[eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 04 25 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[eiz\*1\+0x99\]
@@ -3270,17 +2952,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 04 25 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 04 25 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 3c 25 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[eiz\*1\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 04 25 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[eiz\*1\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 04 25 99 00 00 00 64 	vpextrb BYTE PTR \[eiz\*1\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 04 25 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[eiz\*1\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 04 25 99 00 00 00 07 	vpextrb BYTE PTR \[eiz\*1\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a 3c 25 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 34 25 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[eiz\*1\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 25 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[eiz\*1\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 25 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[eiz\*1\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 04 25 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 04 25 99 00 00 00 	vmovdqa YMMWORD PTR \[eiz\*1\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3c 25 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[eiz\*1\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 25 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[eiz\*1\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 25 99 00 00 00 64 	vextractf128 XMMWORD PTR \[eiz\*1\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 25 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eiz\*1\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 25 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[eiz\*1\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 25 99 00 00 00 07 	vextractf128 XMMWORD PTR \[eiz\*1\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 25 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eiz\*1\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 34 25 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[eiz\*1\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 65 99 00 00 00 	vldmxcsr DWORD PTR \[eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 04 65 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[eiz\*2\+0x99\]
@@ -3290,17 +2972,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 04 65 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 04 65 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 3c 65 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[eiz\*2\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 04 65 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[eiz\*2\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 04 65 99 00 00 00 64 	vpextrb BYTE PTR \[eiz\*2\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 04 65 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[eiz\*2\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 04 65 99 00 00 00 07 	vpextrb BYTE PTR \[eiz\*2\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a 3c 65 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 34 65 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[eiz\*2\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 65 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[eiz\*2\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 65 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[eiz\*2\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 04 65 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 04 65 99 00 00 00 	vmovdqa YMMWORD PTR \[eiz\*2\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3c 65 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[eiz\*2\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 65 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[eiz\*2\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 65 99 00 00 00 64 	vextractf128 XMMWORD PTR \[eiz\*2\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 65 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eiz\*2\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 65 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[eiz\*2\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 65 99 00 00 00 07 	vextractf128 XMMWORD PTR \[eiz\*2\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 65 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eiz\*2\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 34 65 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[eiz\*2\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 20 99 00 00 00 	vldmxcsr DWORD PTR \[eax\+eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 20 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[eax\+eiz\*1\+0x99\]
@@ -3310,17 +2992,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 20 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[eax\+eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 20 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 20 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[eax\+eiz\*1\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 20 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[eax\+eiz\*1\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 20 99 00 00 00 64 	vpextrb BYTE PTR \[eax\+eiz\*1\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 20 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[eax\+eiz\*1\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 20 99 00 00 00 07 	vpextrb BYTE PTR \[eax\+eiz\*1\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 20 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eax\+eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 20 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[eax\+eiz\*1\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 20 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[eax\+eiz\*1\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 20 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[eax\+eiz\*1\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 20 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 20 99 00 00 00 	vmovdqa YMMWORD PTR \[eax\+eiz\*1\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 20 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 20 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 20 99 00 00 00 64 	vextractf128 XMMWORD PTR \[eax\+eiz\*1\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 20 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 20 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 20 99 00 00 00 07 	vextractf128 XMMWORD PTR \[eax\+eiz\*1\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 20 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eax\+eiz\*1\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 20 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[eax\+eiz\*1\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 60 99 00 00 00 	vldmxcsr DWORD PTR \[eax\+eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 60 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[eax\+eiz\*2\+0x99\]
@@ -3330,17 +3012,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 60 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[eax\+eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 60 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 60 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[eax\+eiz\*2\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 60 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[eax\+eiz\*2\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 60 99 00 00 00 64 	vpextrb BYTE PTR \[eax\+eiz\*2\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 60 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[eax\+eiz\*2\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 60 99 00 00 00 07 	vpextrb BYTE PTR \[eax\+eiz\*2\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 60 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eax\+eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 60 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[eax\+eiz\*2\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 60 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[eax\+eiz\*2\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 60 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[eax\+eiz\*2\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 60 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 60 99 00 00 00 	vmovdqa YMMWORD PTR \[eax\+eiz\*2\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 60 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 60 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 60 99 00 00 00 64 	vextractf128 XMMWORD PTR \[eax\+eiz\*2\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 60 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 60 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 60 99 00 00 00 07 	vextractf128 XMMWORD PTR \[eax\+eiz\*2\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 60 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eax\+eiz\*2\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 60 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[eax\+eiz\*2\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 98 99 00 00 00 	vldmxcsr DWORD PTR \[eax\+ebx\*4\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 98 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[eax\+ebx\*4\+0x99\]
@@ -3350,17 +3032,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 98 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[eax\+ebx\*4\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 98 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 98 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[eax\+ebx\*4\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 98 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[eax\+ebx\*4\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 98 99 00 00 00 64 	vpextrb BYTE PTR \[eax\+ebx\*4\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 98 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[eax\+ebx\*4\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 98 99 00 00 00 07 	vpextrb BYTE PTR \[eax\+ebx\*4\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 98 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eax\+ebx\*4\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 98 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[eax\+ebx\*4\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 98 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[eax\+ebx\*4\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 98 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[eax\+ebx\*4\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 98 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 98 99 00 00 00 	vmovdqa YMMWORD PTR \[eax\+ebx\*4\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 98 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 98 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 98 99 00 00 00 64 	vextractf128 XMMWORD PTR \[eax\+ebx\*4\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 98 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 98 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 98 99 00 00 00 07 	vextractf128 XMMWORD PTR \[eax\+ebx\*4\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 98 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[eax\+ebx\*4\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 98 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[eax\+ebx\*4\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 cc 99 00 00 00 	vldmxcsr DWORD PTR \[esp\+ecx\*8\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 cc 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[esp\+ecx\*8\+0x99\]
@@ -3370,17 +3052,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 cc 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[esp\+ecx\*8\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 cc 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc cc 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[esp\+ecx\*8\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 cc 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[esp\+ecx\*8\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 cc 99 00 00 00 64 	vpextrb BYTE PTR \[esp\+ecx\*8\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 cc 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[esp\+ecx\*8\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 cc 99 00 00 00 07 	vpextrb BYTE PTR \[esp\+ecx\*8\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a bc cc 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[esp\+ecx\*8\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 cc 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[esp\+ecx\*8\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc cc 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[esp\+ecx\*8\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc cc 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[esp\+ecx\*8\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 cc 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 cc 99 00 00 00 	vmovdqa YMMWORD PTR \[esp\+ecx\*8\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc cc 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 cc 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 cc 99 00 00 00 64 	vextractf128 XMMWORD PTR \[esp\+ecx\*8\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc cc 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 cc 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 cc 99 00 00 00 07 	vextractf128 XMMWORD PTR \[esp\+ecx\*8\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc cc 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[esp\+ecx\*8\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 cc 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[esp\+ecx\*8\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 15 99 00 00 00 	vldmxcsr DWORD PTR \[ebp\+edx\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 15 99 00 00 00 	vmovdqa xmm0,XMMWORD PTR \[ebp\+edx\*1\+0x99\]
@@ -3390,19 +3072,19 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 15 99 00 00 00 	vcvtdq2pd ymm0,XMMWORD PTR \[ebp\+edx\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 15 99 00 00 00 	vcvtpd2ps xmm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 15 99 00 00 00 	vpavgb xmm7,xmm0,XMMWORD PTR \[ebp\+edx\*1\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 15 99 00 00 00 64 	vaeskeygenassist xmm0,XMMWORD PTR \[ebp\+edx\*1\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 15 99 00 00 00 64 	vpextrb BYTE PTR \[ebp\+edx\*1\+0x99\],xmm0,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 15 99 00 00 00 07 	vaeskeygenassist xmm0,XMMWORD PTR \[ebp\+edx\*1\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 15 99 00 00 00 07 	vpextrb BYTE PTR \[ebp\+edx\*1\+0x99\],xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 15 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[ebp\+edx\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 15 99 00 00 00 00 	vblendvps xmm6,xmm4,XMMWORD PTR \[ebp\+edx\*1\+0x99\],xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 15 99 00 00 00 64 	vpinsrb xmm7,xmm0,BYTE PTR \[ebp\+edx\*1\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 15 99 00 00 00 07 	vpinsrb xmm7,xmm0,BYTE PTR \[ebp\+edx\*1\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 15 99 00 00 00 	vmovdqa ymm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\]
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 15 99 00 00 00 	vmovdqa YMMWORD PTR \[ebp\+edx\*1\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 15 99 00 00 00 	vpermilpd ymm7,ymm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\]
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 15 99 00 00 00 64 	vroundpd ymm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 15 99 00 00 00 64 	vextractf128 XMMWORD PTR \[ebp\+edx\*1\+0x99\],ymm0,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 15 99 00 00 00 64 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 15 99 00 00 00 07 	vroundpd ymm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 15 99 00 00 00 07 	vextractf128 XMMWORD PTR \[ebp\+edx\*1\+0x99\],ymm0,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 15 99 00 00 00 07 	vperm2f128 ymm7,ymm0,YMMWORD PTR \[ebp\+edx\*1\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 15 99 00 00 00 00 	vblendvpd ymm6,ymm4,YMMWORD PTR \[ebp\+edx\*1\+0x99\],ymm0
 [ 	]*[a-f0-9]+:	c5 f9 50 c0          	vmovmskpd eax,xmm0
-[ 	]*[a-f0-9]+:	c5 c1 72 f0 64       	vpslld xmm7,xmm0,0x64
+[ 	]*[a-f0-9]+:	c5 c1 72 f0 07       	vpslld xmm7,xmm0,0x7
 [ 	]*[a-f0-9]+:	c5 fc 50 c0          	vmovmskps eax,ymm0
 #pass
diff --git a/gas/testsuite/gas/i386/avx.d b/gas/testsuite/gas/i386/avx.d
index 57ebb38..5d0a1ec 100644
--- a/gas/testsuite/gas/i386/avx.d
+++ b/gas/testsuite/gas/i386/avx.d
@@ -14,14 +14,14 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e2 4d 2f 21       	vmaskmovpd %ymm4,%ymm6,\(%ecx\)
 [ 	]*[a-f0-9]+:	c4 e2 5d 2c 31       	vmaskmovps \(%ecx\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 4d 2e 21       	vmaskmovps %ymm4,%ymm6,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 64    	vpermilpd \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 64    	vpermilpd \$0x64,\(%ecx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 64    	vpermilps \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 64    	vpermilps \$0x64,\(%ecx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 64    	vroundpd \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 64    	vroundpd \$0x64,\(%ecx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 64    	vroundps \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 64    	vroundps \$0x64,\(%ecx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 07    	vpermilpd \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 07    	vpermilpd \$0x7,\(%ecx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 07    	vpermilps \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 07    	vpermilps \$0x7,\(%ecx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 07    	vroundpd \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 07    	vroundpd \$0x7,\(%ecx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 07    	vroundps \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 07    	vroundps \$0x7,\(%ecx\),%ymm6
 [ 	]*[a-f0-9]+:	c5 cd 58 d4          	vaddpd %ymm4,%ymm6,%ymm2
 [ 	]*[a-f0-9]+:	c5 cd 58 11          	vaddpd \(%ecx\),%ymm6,%ymm2
 [ 	]*[a-f0-9]+:	c5 cc 58 d4          	vaddps %ymm4,%ymm6,%ymm2
@@ -220,109 +220,69 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fd 5a 21          	vcvtpd2psy \(%ecx\),%xmm4
 [ 	]*[a-f0-9]+:	c5 fd e6 e4          	vcvttpd2dq %ymm4,%xmm4
 [ 	]*[a-f0-9]+:	c5 fd e6 21          	vcvttpd2dqy \(%ecx\),%xmm4
-[ 	]*[a-f0-9]+:	c5 fc 5b e4          	vcvtdq2ps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 5b f4          	vcvtdq2ps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 5b 21          	vcvtdq2ps \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 5b e4          	vcvtps2dq %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 5b f4          	vcvtps2dq %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 5b 21          	vcvtps2dq \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 5b e4          	vcvttps2dq %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 5b f4          	vcvttps2dq %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 5b 21          	vcvttps2dq \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 28 e4          	vmovapd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 28 f4          	vmovapd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 28 21          	vmovapd \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 28 e4          	vmovaps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 28 f4          	vmovaps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 28 21          	vmovaps \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 6f e4          	vmovdqa %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 6f f4          	vmovdqa %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 6f 21          	vmovdqa \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 6f e4          	vmovdqu %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 6f f4          	vmovdqu %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 6f 21          	vmovdqu \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 ff 12 e4          	vmovddup %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 ff 12 f4          	vmovddup %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 ff 12 21          	vmovddup \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 16 e4          	vmovshdup %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 16 f4          	vmovshdup %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 16 21          	vmovshdup \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 12 e4          	vmovsldup %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 12 f4          	vmovsldup %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 12 21          	vmovsldup \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 10 e4          	vmovupd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 10 f4          	vmovupd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 10 21          	vmovupd \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 10 e4          	vmovups %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 10 f4          	vmovups %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 10 21          	vmovups \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e2 7d 17 e4       	vptest %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 17 f4       	vptest %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 7d 17 21       	vptest \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 53 e4          	vrcpps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 53 f4          	vrcpps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 53 21          	vrcpps \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 52 e4          	vrsqrtps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 52 f4          	vrsqrtps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 52 21          	vrsqrtps \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 51 e4          	vsqrtpd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 51 f4          	vsqrtpd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 51 21          	vsqrtpd \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 51 e4          	vsqrtps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 51 f4          	vsqrtps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 51 21          	vsqrtps \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e2 7d 0f e4       	vtestpd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0f f4       	vtestpd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 7d 0f 21       	vtestpd \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e2 7d 0e e4       	vtestps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0e f4       	vtestps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 7d 0e 21       	vtestps \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 ff f0 21          	vlddqu \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 64    	vblendpd \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 64    	vblendpd \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 64    	vblendps \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 64    	vblendps \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c2 d4 64       	vcmppd \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c2 11 64       	vcmppd \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c2 d4 64       	vcmpps \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c2 11 64       	vcmpps \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 64    	vdpps  \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 64    	vdpps  \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 64    	vperm2f128 \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 64    	vperm2f128 \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c6 d4 64       	vshufpd \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c6 11 64       	vshufpd \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c6 d4 64       	vshufps \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c6 11 64       	vshufps \$0x64,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 07    	vblendpd \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 07    	vblendpd \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 07    	vblendps \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 07    	vblendps \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c2 d4 07       	vcmpordpd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c2 11 07       	vcmpordpd \(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c2 d4 07       	vcmpordps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c2 11 07       	vcmpordps \(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 07    	vdpps  \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 07    	vdpps  \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 07    	vperm2f128 \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 07    	vperm2f128 \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c6 d4 07       	vshufpd \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c6 11 07       	vshufpd \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c6 d4 07       	vshufps \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c6 11 07       	vshufps \$0x7,\(%ecx\),%ymm6,%ymm2
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b fe 40    	vblendvpd %ymm4,%ymm6,%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b 39 40    	vblendvpd %ymm4,\(%ecx\),%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a fe 40    	vblendvps %ymm4,%ymm6,%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a 39 40    	vblendvps %ymm4,\(%ecx\),%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 fc 20    	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d fc 20    	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c fc 20    	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f fc 20    	vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e fc 20    	vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d fc 20    	vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c fc 20    	vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 fc 20    	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 fc 20    	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d fc 20    	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c fc 20    	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 62    	vpermilmo2pd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 62    	vpermilmo2pd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 63    	vpermilmz2pd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 63    	vpermilmz2pd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 60    	vpermiltd2pd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 60    	vpermiltd2pd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 62    	vpermilmo2ps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 62    	vpermilmo2ps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 63    	vpermilmz2ps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 63    	vpermilmz2ps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 60    	vpermiltd2ps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 60    	vpermiltd2ps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 6a    	vpermil2pd \$0xa,%ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 6a    	vpermil2pd \$0xa,\(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 6a    	vpermil2ps \$0xa,%ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 6a    	vpermil2ps \$0xa,\(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 64    	vinsertf128 \$0x64,%xmm4,%ymm4,%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 64    	vinsertf128 \$0x64,\(%ecx\),%ymm4,%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 64    	vextractf128 \$0x64,%ymm4,%xmm4
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 64    	vextractf128 \$0x64,%ymm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 07    	vinsertf128 \$0x7,%xmm4,%ymm4,%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 07    	vinsertf128 \$0x7,\(%ecx\),%ymm4,%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 07    	vextractf128 \$0x7,%ymm4,%xmm4
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 07    	vextractf128 \$0x7,%ymm4,\(%ecx\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 1a 21       	vbroadcastf128 \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 f8 5b f4          	vcvtdq2ps %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 f8 5b 21          	vcvtdq2ps \(%ecx\),%xmm4
@@ -763,120 +723,60 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 c8 c2 39 1f       	vcmptrue_usps \(%ecx\),%xmm6,%xmm7
 [ 	]*[a-f0-9]+:	c4 e2 59 2c 31       	vmaskmovps \(%ecx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 59 2d 31       	vmaskmovpd \(%ecx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 df f4 64    	vaeskeygenassist \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 df 31 64    	vaeskeygenassist \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 64    	vpcmpestri \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 61 31 64    	vpcmpestri \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 64    	vpcmpestrm \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 60 31 64    	vpcmpestrm \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 64    	vpcmpistri \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 63 31 64    	vpcmpistri \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 64    	vpcmpistrm \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 62 31 64    	vpcmpistrm \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 64    	vpermilpd \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 05 31 64    	vpermilpd \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 64    	vpermilps \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 04 31 64    	vpermilps \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 70 f4 64       	vpshufd \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 70 31 64       	vpshufd \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 fa 70 f4 64       	vpshufhw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 fa 70 31 64       	vpshufhw \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 fb 70 f4 64       	vpshuflw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 fb 70 31 64       	vpshuflw \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 64    	vroundpd \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 09 31 64    	vroundpd \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 64    	vroundps \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 08 31 64    	vroundps \$0x64,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 df f4 07    	vaeskeygenassist \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 df 31 07    	vaeskeygenassist \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 07    	vpcmpestri \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 61 31 07    	vpcmpestri \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 07    	vpcmpestrm \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 60 31 07    	vpcmpestrm \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 07    	vpcmpistri \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 63 31 07    	vpcmpistri \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 07    	vpcmpistrm \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 62 31 07    	vpcmpistrm \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 07    	vpermilpd \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 05 31 07    	vpermilpd \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 07    	vpermilps \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 04 31 07    	vpermilps \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 70 f4 07       	vpshufd \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 70 31 07       	vpshufd \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 fa 70 f4 07       	vpshufhw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fa 70 31 07       	vpshufhw \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 fb 70 f4 07       	vpshuflw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fb 70 31 07       	vpshuflw \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 07    	vroundpd \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 09 31 07    	vroundpd \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 07    	vroundps \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 08 31 07    	vroundps \$0x7,\(%ecx\),%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 49 2e 21       	vmaskmovps %xmm4,%xmm6,\(%ecx\)
 [ 	]*[a-f0-9]+:	c4 e2 49 2f 21       	vmaskmovpd %xmm4,%xmm6,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 64    	vblendpd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 64    	vblendpd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 64    	vblendps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 64    	vblendps \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c2 d4 64       	vcmppd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c2 11 64       	vcmppd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c2 d4 64       	vcmpps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c2 11 64       	vcmpps \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 64    	vdppd  \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 41 11 64    	vdppd  \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 64    	vdpps  \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 40 11 64    	vdpps  \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 64    	vmpsadbw \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 42 11 64    	vmpsadbw \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 64    	vpalignr \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 64    	vpalignr \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 64    	vpblendw \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 64    	vpblendw \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c6 d4 64       	vshufpd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c6 11 64       	vshufpd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c6 d4 64       	vshufps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c6 11 64       	vshufps \$0x64,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 07    	vblendpd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 07    	vblendpd \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 07    	vblendps \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 07    	vblendps \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c2 d4 07       	vcmpordpd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c2 11 07       	vcmpordpd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c2 d4 07       	vcmpordps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c2 11 07       	vcmpordps \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 07    	vdppd  \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 41 11 07    	vdppd  \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 07    	vdpps  \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 40 11 07    	vdpps  \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 07    	vmpsadbw \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 42 11 07    	vmpsadbw \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 07    	vpalignr \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 07    	vpalignr \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 07    	vpblendw \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 07    	vpblendw \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c6 d4 07       	vshufpd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c6 11 07       	vshufpd \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c6 d4 07       	vshufps \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c6 11 07       	vshufps \$0x7,\(%ecx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c4 e3 69 4b fe 40    	vblendvpd %xmm4,%xmm6,%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4b 39 40    	vblendvpd %xmm4,\(%ecx\),%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4a fe 40    	vblendvps %xmm4,%xmm6,%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4a 39 40    	vblendvps %xmm4,\(%ecx\),%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4c fe 40    	vpblendvb %xmm4,%xmm6,%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4c 39 40    	vpblendvb %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 fc 20    	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 fc 20    	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d fc 20    	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c fc 20    	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f fc 20    	vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e fc 20    	vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d fc 20    	vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c fc 20    	vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 fc 20    	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 fc 20    	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d fc 20    	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c fc 20    	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 62    	vpermilmo2pd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 62    	vpermilmo2pd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 42    	vpermilmo2pd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 63    	vpermilmz2pd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 63    	vpermilmz2pd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 43    	vpermilmz2pd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 60    	vpermiltd2pd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 60    	vpermiltd2pd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 40    	vpermiltd2pd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 62    	vpermilmo2ps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 62    	vpermilmo2ps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 42    	vpermilmo2ps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 63    	vpermilmz2ps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 63    	vpermilmz2ps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 43    	vpermilmz2ps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 60    	vpermiltd2ps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 60    	vpermiltd2ps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 40    	vpermiltd2ps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 6a    	vpermil2pd \$0xa,%xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 6a    	vpermil2pd \$0xa,\(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 4a    	vpermil2pd \$0xa,%xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 6a    	vpermil2ps \$0xa,%xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 6a    	vpermil2ps \$0xa,\(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 4a    	vpermil2ps \$0xa,%xmm4,\(%ecx\),%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e2 7d 19 21       	vbroadcastsd \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 f9 2f f4          	vcomisd %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 f9 2f 21          	vcomisd \(%ecx\),%xmm4
@@ -916,22 +816,10 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 d8 12 31          	vmovlps \(%ecx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 d9 16 31          	vmovhpd \(%ecx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 d8 16 31          	vmovhps \(%ecx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 cb c2 d4 64       	vcmpsd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 cb c2 11 64       	vcmpsd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 64    	vroundsd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 64    	vroundsd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b fc 20    	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f fc 20    	vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b fc 20    	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f fc 20    	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c5 cb c2 d4 07       	vcmpordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cb c2 11 07       	vcmpordsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 07    	vroundsd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 07    	vroundsd \$0x7,\(%ecx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 58 d4          	vaddsd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 58 11          	vaddsd \(%ecx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 5a d4          	vcvtsd2ss %xmm4,%xmm6,%xmm2
@@ -1012,6 +900,8 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1e       	vcmpgt_oqsd \(%ecx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb c2 d4 1f       	vcmptrue_ussd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1f       	vcmptrue_ussd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr \(%ecx\)
+[ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr \(%ecx\)
 [ 	]*[a-f0-9]+:	c5 ca 58 d4          	vaddss %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 ca 58 11          	vaddss \(%ecx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 ca 5a d4          	vcvtss2sd %xmm4,%xmm6,%xmm2
@@ -1120,49 +1010,37 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fa 2d 09          	vcvtss2si \(%ecx\),%ecx
 [ 	]*[a-f0-9]+:	c5 fa 2c cc          	vcvttss2si %xmm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fa 2c 09          	vcvttss2si \(%ecx\),%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 64    	vpextrd \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 16 21 64    	vpextrd \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 64    	vextractps \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps \$0x64,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 07    	vpextrd \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 16 21 07    	vpextrd \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 07    	vextractps \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps \$0x7,%xmm4,\(%ecx\)
 [ 	]*[a-f0-9]+:	c5 db 2a f1          	vcvtsi2sd %ecx,%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 db 2a 31          	vcvtsi2sdl \(%ecx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 da 2a f1          	vcvtsi2ss %ecx,%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 da 2a 31          	vcvtsi2ssl \(%ecx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 ca c2 d4 64       	vcmpss \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 ca c2 11 64       	vcmpss \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 64    	vinsertps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 21 11 64    	vinsertps \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 64    	vroundss \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 64    	vroundss \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a fc 20    	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e fc 20    	vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a fc 20    	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e fc 20    	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c5 ca c2 d4 07       	vcmpordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ca c2 11 07       	vcmpordss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 07    	vinsertps \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 21 11 07    	vinsertps \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 07    	vroundss \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 07    	vroundss \$0x7,\(%ecx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c4 e2 79 22 f4       	vpmovsxbq %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 79 22 21       	vpmovsxbq \(%ecx\),%xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 32 f4       	vpmovzxbq %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 79 32 21       	vpmovzxbq \(%ecx\),%xmm4
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c5 d9 c4 f1 64       	vpinsrw \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw \$0x64,\(%ecx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 64    	vpextrb \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb \$0x64,\(%ecx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb \$0x64,\(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 d9 c4 f1 07       	vpinsrw \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw \$0x7,\(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 07    	vpextrb \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 f9 f7 f4          	vmaskmovdqu %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 fa 7e f4          	vmovq  %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 f9 50 cc          	vmovmskpd %xmm4,%ecx
@@ -1172,17 +1050,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 c8 16 d4          	vmovlhps %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 10 d4          	vmovsd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 ca 10 d4          	vmovss %xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 72 f4 64       	vpslld \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 fc 64       	vpslldq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 f4 64       	vpsllq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 71 f4 64       	vpsllw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 72 e4 64       	vpsrad \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 71 e4 64       	vpsraw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 72 d4 64       	vpsrld \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 dc 64       	vpsrldq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 d4 64       	vpsrlq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 71 d4 64       	vpsrlw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw \$0x64,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 c9 72 f4 07       	vpslld \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 fc 07       	vpslldq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 f4 07       	vpsllq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 71 f4 07       	vpsllw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 72 e4 07       	vpsrad \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 71 e4 07       	vpsraw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 72 d4 07       	vpsrld \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 dc 07       	vpsrldq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 d4 07       	vpsrlq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 71 d4 07       	vpsrlw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw \$0x7,%xmm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fd 50 cc          	vmovmskpd %ymm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fc 50 cc          	vmovmskps %ymm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fb e6 f4          	vcvtpd2dq %xmm4,%xmm6
@@ -1199,17 +1077,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 05 34 12 00 00 	vcvtdq2pd 0x1234,%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 05 34 12 00 00 	vcvtpd2psy 0x1234,%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 3d 34 12 00 00 	vpavgb 0x1234,%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 05 34 12 00 00 64 	vaeskeygenassist \$0x64,0x1234,%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 05 34 12 00 00 64 	vpextrb \$0x64,%xmm0,0x1234
+[ 	]*[a-f0-9]+:	c4 e3 79 df 05 34 12 00 00 07 	vaeskeygenassist \$0x7,0x1234,%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 05 34 12 00 00 07 	vpextrb \$0x7,%xmm0,0x1234
 [ 	]*[a-f0-9]+:	c5 fb 2a 3d 34 12 00 00 	vcvtsi2sdl 0x1234,%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 35 34 12 00 00 00 	vblendvps %xmm0,0x1234,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3d 34 12 00 00 64 	vpinsrb \$0x64,0x1234,%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3d 34 12 00 00 07 	vpinsrb \$0x7,0x1234,%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 05 34 12 00 00 	vmovdqa 0x1234,%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 05 34 12 00 00 	vmovdqa %ymm0,0x1234
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3d 34 12 00 00 	vpermilpd 0x1234,%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 05 34 12 00 00 64 	vroundpd \$0x64,0x1234,%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 05 34 12 00 00 64 	vextractf128 \$0x64,%ymm0,0x1234
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3d 34 12 00 00 64 	vperm2f128 \$0x64,0x1234,%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 05 34 12 00 00 07 	vroundpd \$0x7,0x1234,%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 05 34 12 00 00 07 	vextractf128 \$0x7,%ymm0,0x1234
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3d 34 12 00 00 07 	vperm2f128 \$0x7,0x1234,%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 35 34 12 00 00 00 	vblendvpd %ymm0,0x1234,%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 55 00       	vldmxcsr 0x0\(%ebp\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 45 00       	vmovdqa 0x0\(%ebp\),%xmm0
@@ -1219,17 +1097,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 45 00       	vcvtdq2pd 0x0\(%ebp\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 45 00       	vcvtpd2psy 0x0\(%ebp\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 7d 00       	vpavgb 0x0\(%ebp\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 45 00 64 	vaeskeygenassist \$0x64,0x0\(%ebp\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 45 00 64 	vpextrb \$0x64,%xmm0,0x0\(%ebp\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 45 00 07 	vaeskeygenassist \$0x7,0x0\(%ebp\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 45 00 07 	vpextrb \$0x7,%xmm0,0x0\(%ebp\)
 [ 	]*[a-f0-9]+:	c5 fb 2a 7d 00       	vcvtsi2sdl 0x0\(%ebp\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 75 00 00 	vblendvps %xmm0,0x0\(%ebp\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 7d 00 64 	vpinsrb \$0x64,0x0\(%ebp\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 7d 00 07 	vpinsrb \$0x7,0x0\(%ebp\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 45 00       	vmovdqa 0x0\(%ebp\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 45 00       	vmovdqa %ymm0,0x0\(%ebp\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 7d 00    	vpermilpd 0x0\(%ebp\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 45 00 64 	vroundpd \$0x64,0x0\(%ebp\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 45 00 64 	vextractf128 \$0x64,%ymm0,0x0\(%ebp\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 7d 00 64 	vperm2f128 \$0x64,0x0\(%ebp\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 45 00 07 	vroundpd \$0x7,0x0\(%ebp\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 45 00 07 	vextractf128 \$0x7,%ymm0,0x0\(%ebp\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 7d 00 07 	vperm2f128 \$0x7,0x0\(%ebp\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 75 00 00 	vblendvpd %ymm0,0x0\(%ebp\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 24       	vldmxcsr \(%esp\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 04 24       	vmovdqa \(%esp\),%xmm0
@@ -1239,17 +1117,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 04 24       	vcvtdq2pd \(%esp\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 04 24       	vcvtpd2psy \(%esp\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 3c 24       	vpavgb \(%esp\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 04 24 64 	vaeskeygenassist \$0x64,\(%esp\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 04 24 64 	vpextrb \$0x64,%xmm0,\(%esp\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 04 24 07 	vaeskeygenassist \$0x7,\(%esp\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 04 24 07 	vpextrb \$0x7,%xmm0,\(%esp\)
 [ 	]*[a-f0-9]+:	c5 fb 2a 3c 24       	vcvtsi2sdl \(%esp\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 34 24 00 	vblendvps %xmm0,\(%esp\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 24 64 	vpinsrb \$0x64,\(%esp\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 24 07 	vpinsrb \$0x7,\(%esp\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 04 24       	vmovdqa \(%esp\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 04 24       	vmovdqa %ymm0,\(%esp\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3c 24    	vpermilpd \(%esp\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 24 64 	vroundpd \$0x64,\(%esp\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 24 64 	vextractf128 \$0x64,%ymm0,\(%esp\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 24 64 	vperm2f128 \$0x64,\(%esp\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 24 07 	vroundpd \$0x7,\(%esp\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 24 07 	vextractf128 \$0x7,%ymm0,\(%esp\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 24 07 	vperm2f128 \$0x7,\(%esp\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 34 24 00 	vblendvpd %ymm0,\(%esp\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 95 99 00 00 00 	vldmxcsr 0x99\(%ebp\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 85 99 00 00 00 	vmovdqa 0x99\(%ebp\),%xmm0
@@ -1259,17 +1137,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 85 99 00 00 00 	vcvtdq2pd 0x99\(%ebp\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 85 99 00 00 00 	vcvtpd2psy 0x99\(%ebp\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 bd 99 00 00 00 	vpavgb 0x99\(%ebp\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 85 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%ebp\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 85 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(%ebp\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 85 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%ebp\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 85 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(%ebp\)
 [ 	]*[a-f0-9]+:	c5 fb 2a bd 99 00 00 00 	vcvtsi2sdl 0x99\(%ebp\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b5 99 00 00 00 00 	vblendvps %xmm0,0x99\(%ebp\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bd 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%ebp\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bd 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%ebp\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 85 99 00 00 00 	vmovdqa 0x99\(%ebp\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 85 99 00 00 00 	vmovdqa %ymm0,0x99\(%ebp\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bd 99 00 00 00 	vpermilpd 0x99\(%ebp\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 85 99 00 00 00 64 	vroundpd \$0x64,0x99\(%ebp\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 85 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(%ebp\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bd 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%ebp\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 85 99 00 00 00 07 	vroundpd \$0x7,0x99\(%ebp\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 85 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(%ebp\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bd 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%ebp\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b5 99 00 00 00 00 	vblendvpd %ymm0,0x99\(%ebp\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 25 99 00 00 00 	vldmxcsr 0x99\(,%eiz,1\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 04 25 99 00 00 00 	vmovdqa 0x99\(,%eiz,1\),%xmm0
@@ -1279,17 +1157,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 04 25 99 00 00 00 	vcvtdq2pd 0x99\(,%eiz,1\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 04 25 99 00 00 00 	vcvtpd2psy 0x99\(,%eiz,1\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 3c 25 99 00 00 00 	vpavgb 0x99\(,%eiz,1\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 04 25 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(,%eiz,1\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 04 25 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(,%eiz,1\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 04 25 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(,%eiz,1\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 04 25 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(,%eiz,1\)
 [ 	]*[a-f0-9]+:	c5 fb 2a 3c 25 99 00 00 00 	vcvtsi2sdl 0x99\(,%eiz,1\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 34 25 99 00 00 00 00 	vblendvps %xmm0,0x99\(,%eiz,1\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 25 99 00 00 00 64 	vpinsrb \$0x64,0x99\(,%eiz,1\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 25 99 00 00 00 07 	vpinsrb \$0x7,0x99\(,%eiz,1\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 04 25 99 00 00 00 	vmovdqa 0x99\(,%eiz,1\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 04 25 99 00 00 00 	vmovdqa %ymm0,0x99\(,%eiz,1\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3c 25 99 00 00 00 	vpermilpd 0x99\(,%eiz,1\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 25 99 00 00 00 64 	vroundpd \$0x64,0x99\(,%eiz,1\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 25 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(,%eiz,1\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 25 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(,%eiz,1\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 25 99 00 00 00 07 	vroundpd \$0x7,0x99\(,%eiz,1\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 25 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(,%eiz,1\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 25 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(,%eiz,1\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 34 25 99 00 00 00 00 	vblendvpd %ymm0,0x99\(,%eiz,1\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 65 99 00 00 00 	vldmxcsr 0x99\(,%eiz,2\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 04 65 99 00 00 00 	vmovdqa 0x99\(,%eiz,2\),%xmm0
@@ -1299,17 +1177,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 04 65 99 00 00 00 	vcvtdq2pd 0x99\(,%eiz,2\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 04 65 99 00 00 00 	vcvtpd2psy 0x99\(,%eiz,2\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 3c 65 99 00 00 00 	vpavgb 0x99\(,%eiz,2\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 04 65 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(,%eiz,2\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 04 65 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(,%eiz,2\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 04 65 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(,%eiz,2\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 04 65 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(,%eiz,2\)
 [ 	]*[a-f0-9]+:	c5 fb 2a 3c 65 99 00 00 00 	vcvtsi2sdl 0x99\(,%eiz,2\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 34 65 99 00 00 00 00 	vblendvps %xmm0,0x99\(,%eiz,2\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 65 99 00 00 00 64 	vpinsrb \$0x64,0x99\(,%eiz,2\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 65 99 00 00 00 07 	vpinsrb \$0x7,0x99\(,%eiz,2\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 04 65 99 00 00 00 	vmovdqa 0x99\(,%eiz,2\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 04 65 99 00 00 00 	vmovdqa %ymm0,0x99\(,%eiz,2\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3c 65 99 00 00 00 	vpermilpd 0x99\(,%eiz,2\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 65 99 00 00 00 64 	vroundpd \$0x64,0x99\(,%eiz,2\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 65 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(,%eiz,2\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 65 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(,%eiz,2\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 65 99 00 00 00 07 	vroundpd \$0x7,0x99\(,%eiz,2\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 65 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(,%eiz,2\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 65 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(,%eiz,2\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 34 65 99 00 00 00 00 	vblendvpd %ymm0,0x99\(,%eiz,2\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 20 99 00 00 00 	vldmxcsr 0x99\(%eax,%eiz,1\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 20 99 00 00 00 	vmovdqa 0x99\(%eax,%eiz,1\),%xmm0
@@ -1319,17 +1197,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 20 99 00 00 00 	vcvtdq2pd 0x99\(%eax,%eiz,1\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 20 99 00 00 00 	vcvtpd2psy 0x99\(%eax,%eiz,1\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 20 99 00 00 00 	vpavgb 0x99\(%eax,%eiz,1\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 20 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%eax,%eiz,1\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 20 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(%eax,%eiz,1\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 20 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%eax,%eiz,1\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 20 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(%eax,%eiz,1\)
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 20 99 00 00 00 	vcvtsi2sdl 0x99\(%eax,%eiz,1\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 20 99 00 00 00 00 	vblendvps %xmm0,0x99\(%eax,%eiz,1\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 20 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%eax,%eiz,1\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 20 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%eax,%eiz,1\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 20 99 00 00 00 	vmovdqa 0x99\(%eax,%eiz,1\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 20 99 00 00 00 	vmovdqa %ymm0,0x99\(%eax,%eiz,1\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 20 99 00 00 00 	vpermilpd 0x99\(%eax,%eiz,1\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 20 99 00 00 00 64 	vroundpd \$0x64,0x99\(%eax,%eiz,1\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 20 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(%eax,%eiz,1\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 20 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%eax,%eiz,1\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 20 99 00 00 00 07 	vroundpd \$0x7,0x99\(%eax,%eiz,1\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 20 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(%eax,%eiz,1\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 20 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%eax,%eiz,1\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 20 99 00 00 00 00 	vblendvpd %ymm0,0x99\(%eax,%eiz,1\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 60 99 00 00 00 	vldmxcsr 0x99\(%eax,%eiz,2\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 60 99 00 00 00 	vmovdqa 0x99\(%eax,%eiz,2\),%xmm0
@@ -1339,17 +1217,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 60 99 00 00 00 	vcvtdq2pd 0x99\(%eax,%eiz,2\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 60 99 00 00 00 	vcvtpd2psy 0x99\(%eax,%eiz,2\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 60 99 00 00 00 	vpavgb 0x99\(%eax,%eiz,2\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 60 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%eax,%eiz,2\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 60 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(%eax,%eiz,2\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 60 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%eax,%eiz,2\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 60 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(%eax,%eiz,2\)
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 60 99 00 00 00 	vcvtsi2sdl 0x99\(%eax,%eiz,2\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 60 99 00 00 00 00 	vblendvps %xmm0,0x99\(%eax,%eiz,2\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 60 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%eax,%eiz,2\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 60 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%eax,%eiz,2\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 60 99 00 00 00 	vmovdqa 0x99\(%eax,%eiz,2\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 60 99 00 00 00 	vmovdqa %ymm0,0x99\(%eax,%eiz,2\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 60 99 00 00 00 	vpermilpd 0x99\(%eax,%eiz,2\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 60 99 00 00 00 64 	vroundpd \$0x64,0x99\(%eax,%eiz,2\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 60 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(%eax,%eiz,2\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 60 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%eax,%eiz,2\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 60 99 00 00 00 07 	vroundpd \$0x7,0x99\(%eax,%eiz,2\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 60 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(%eax,%eiz,2\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 60 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%eax,%eiz,2\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 60 99 00 00 00 00 	vblendvpd %ymm0,0x99\(%eax,%eiz,2\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 98 99 00 00 00 	vldmxcsr 0x99\(%eax,%ebx,4\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 98 99 00 00 00 	vmovdqa 0x99\(%eax,%ebx,4\),%xmm0
@@ -1359,17 +1237,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 98 99 00 00 00 	vcvtdq2pd 0x99\(%eax,%ebx,4\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 98 99 00 00 00 	vcvtpd2psy 0x99\(%eax,%ebx,4\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 98 99 00 00 00 	vpavgb 0x99\(%eax,%ebx,4\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 98 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%eax,%ebx,4\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 98 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(%eax,%ebx,4\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 98 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%eax,%ebx,4\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 98 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(%eax,%ebx,4\)
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 98 99 00 00 00 	vcvtsi2sdl 0x99\(%eax,%ebx,4\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 98 99 00 00 00 00 	vblendvps %xmm0,0x99\(%eax,%ebx,4\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 98 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%eax,%ebx,4\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 98 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%eax,%ebx,4\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 98 99 00 00 00 	vmovdqa 0x99\(%eax,%ebx,4\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 98 99 00 00 00 	vmovdqa %ymm0,0x99\(%eax,%ebx,4\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 98 99 00 00 00 	vpermilpd 0x99\(%eax,%ebx,4\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 98 99 00 00 00 64 	vroundpd \$0x64,0x99\(%eax,%ebx,4\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 98 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(%eax,%ebx,4\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 98 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%eax,%ebx,4\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 98 99 00 00 00 07 	vroundpd \$0x7,0x99\(%eax,%ebx,4\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 98 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(%eax,%ebx,4\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 98 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%eax,%ebx,4\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 98 99 00 00 00 00 	vblendvpd %ymm0,0x99\(%eax,%ebx,4\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 cc 99 00 00 00 	vldmxcsr 0x99\(%esp,%ecx,8\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 cc 99 00 00 00 	vmovdqa 0x99\(%esp,%ecx,8\),%xmm0
@@ -1379,17 +1257,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 cc 99 00 00 00 	vcvtdq2pd 0x99\(%esp,%ecx,8\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 cc 99 00 00 00 	vcvtpd2psy 0x99\(%esp,%ecx,8\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc cc 99 00 00 00 	vpavgb 0x99\(%esp,%ecx,8\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 cc 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%esp,%ecx,8\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 cc 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(%esp,%ecx,8\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 cc 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%esp,%ecx,8\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 cc 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(%esp,%ecx,8\)
 [ 	]*[a-f0-9]+:	c5 fb 2a bc cc 99 00 00 00 	vcvtsi2sdl 0x99\(%esp,%ecx,8\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 cc 99 00 00 00 00 	vblendvps %xmm0,0x99\(%esp,%ecx,8\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc cc 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%esp,%ecx,8\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc cc 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%esp,%ecx,8\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 cc 99 00 00 00 	vmovdqa 0x99\(%esp,%ecx,8\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 cc 99 00 00 00 	vmovdqa %ymm0,0x99\(%esp,%ecx,8\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc cc 99 00 00 00 	vpermilpd 0x99\(%esp,%ecx,8\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 cc 99 00 00 00 64 	vroundpd \$0x64,0x99\(%esp,%ecx,8\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 cc 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(%esp,%ecx,8\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc cc 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%esp,%ecx,8\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 cc 99 00 00 00 07 	vroundpd \$0x7,0x99\(%esp,%ecx,8\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 cc 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(%esp,%ecx,8\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc cc 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%esp,%ecx,8\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 cc 99 00 00 00 00 	vblendvpd %ymm0,0x99\(%esp,%ecx,8\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 15 99 00 00 00 	vldmxcsr 0x99\(%ebp,%edx,1\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 15 99 00 00 00 	vmovdqa 0x99\(%ebp,%edx,1\),%xmm0
@@ -1399,20 +1277,20 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 15 99 00 00 00 	vcvtdq2pd 0x99\(%ebp,%edx,1\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 15 99 00 00 00 	vcvtpd2psy 0x99\(%ebp,%edx,1\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 15 99 00 00 00 	vpavgb 0x99\(%ebp,%edx,1\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 15 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%ebp,%edx,1\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 15 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(%ebp,%edx,1\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 15 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%ebp,%edx,1\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 15 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(%ebp,%edx,1\)
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 15 99 00 00 00 	vcvtsi2sdl 0x99\(%ebp,%edx,1\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 15 99 00 00 00 00 	vblendvps %xmm0,0x99\(%ebp,%edx,1\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 15 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%ebp,%edx,1\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 15 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%ebp,%edx,1\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 15 99 00 00 00 	vmovdqa 0x99\(%ebp,%edx,1\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 15 99 00 00 00 	vmovdqa %ymm0,0x99\(%ebp,%edx,1\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 15 99 00 00 00 	vpermilpd 0x99\(%ebp,%edx,1\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 15 99 00 00 00 64 	vroundpd \$0x64,0x99\(%ebp,%edx,1\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 15 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(%ebp,%edx,1\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 15 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%ebp,%edx,1\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 15 99 00 00 00 07 	vroundpd \$0x7,0x99\(%ebp,%edx,1\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 15 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(%ebp,%edx,1\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 15 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%ebp,%edx,1\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 15 99 00 00 00 00 	vblendvpd %ymm0,0x99\(%ebp,%edx,1\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f9 50 c0          	vmovmskpd %xmm0,%eax
-[ 	]*[a-f0-9]+:	c5 c1 72 f0 64       	vpslld \$0x64,%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 c1 72 f0 07       	vpslld \$0x7,%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fc 50 c0          	vmovmskps %ymm0,%eax
 [ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr \(%ecx\)
 [ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr \(%ecx\)
@@ -1426,18 +1304,18 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e2 4d 2e 21       	vmaskmovps %ymm4,%ymm6,\(%ecx\)
 [ 	]*[a-f0-9]+:	c4 e2 5d 2c 31       	vmaskmovps \(%ecx\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 4d 2e 21       	vmaskmovps %ymm4,%ymm6,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 64    	vpermilpd \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 64    	vpermilpd \$0x64,\(%ecx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 64    	vpermilpd \$0x64,\(%ecx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 64    	vpermilps \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 64    	vpermilps \$0x64,\(%ecx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 64    	vpermilps \$0x64,\(%ecx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 64    	vroundpd \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 64    	vroundpd \$0x64,\(%ecx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 64    	vroundpd \$0x64,\(%ecx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 64    	vroundps \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 64    	vroundps \$0x64,\(%ecx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 64    	vroundps \$0x64,\(%ecx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 07    	vpermilpd \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 07    	vpermilpd \$0x7,\(%ecx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 07    	vpermilpd \$0x7,\(%ecx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 07    	vpermilps \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 07    	vpermilps \$0x7,\(%ecx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 07    	vpermilps \$0x7,\(%ecx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 07    	vroundpd \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 07    	vroundpd \$0x7,\(%ecx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 07    	vroundpd \$0x7,\(%ecx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 07    	vroundps \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 07    	vroundps \$0x7,\(%ecx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 07    	vroundps \$0x7,\(%ecx\),%ymm6
 [ 	]*[a-f0-9]+:	c5 cd 58 d4          	vaddpd %ymm4,%ymm6,%ymm2
 [ 	]*[a-f0-9]+:	c5 cd 58 11          	vaddpd \(%ecx\),%ymm6,%ymm2
 [ 	]*[a-f0-9]+:	c5 cd 58 11          	vaddpd \(%ecx\),%ymm6,%ymm2
@@ -1732,161 +1610,101 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fd 5a 21          	vcvtpd2psy \(%ecx\),%xmm4
 [ 	]*[a-f0-9]+:	c5 fd e6 e4          	vcvttpd2dq %ymm4,%xmm4
 [ 	]*[a-f0-9]+:	c5 fd e6 21          	vcvttpd2dqy \(%ecx\),%xmm4
-[ 	]*[a-f0-9]+:	c5 fc 5b e4          	vcvtdq2ps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 5b f4          	vcvtdq2ps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 5b 21          	vcvtdq2ps \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fc 5b 21          	vcvtdq2ps \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 5b e4          	vcvtps2dq %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 5b f4          	vcvtps2dq %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 5b 21          	vcvtps2dq \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fd 5b 21          	vcvtps2dq \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 5b e4          	vcvttps2dq %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 5b f4          	vcvttps2dq %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 5b 21          	vcvttps2dq \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fe 5b 21          	vcvttps2dq \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 28 e4          	vmovapd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 28 f4          	vmovapd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 28 21          	vmovapd \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fd 28 21          	vmovapd \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 28 e4          	vmovaps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 28 f4          	vmovaps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 28 21          	vmovaps \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fc 28 21          	vmovaps \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 6f e4          	vmovdqa %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 6f f4          	vmovdqa %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 6f 21          	vmovdqa \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fd 6f 21          	vmovdqa \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 6f e4          	vmovdqu %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 6f f4          	vmovdqu %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 6f 21          	vmovdqu \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fe 6f 21          	vmovdqu \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 ff 12 e4          	vmovddup %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 ff 12 f4          	vmovddup %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 ff 12 21          	vmovddup \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 ff 12 21          	vmovddup \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 16 e4          	vmovshdup %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 16 f4          	vmovshdup %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 16 21          	vmovshdup \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fe 16 21          	vmovshdup \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 12 e4          	vmovsldup %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 12 f4          	vmovsldup %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 12 21          	vmovsldup \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fe 12 21          	vmovsldup \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 10 e4          	vmovupd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 10 f4          	vmovupd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 10 21          	vmovupd \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fd 10 21          	vmovupd \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 10 e4          	vmovups %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 10 f4          	vmovups %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 10 21          	vmovups \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fc 10 21          	vmovups \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e2 7d 17 e4       	vptest %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 17 f4       	vptest %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 7d 17 21       	vptest \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 17 21       	vptest \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 53 e4          	vrcpps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 53 f4          	vrcpps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 53 21          	vrcpps \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fc 53 21          	vrcpps \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 52 e4          	vrsqrtps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 52 f4          	vrsqrtps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 52 21          	vrsqrtps \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fc 52 21          	vrsqrtps \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 51 e4          	vsqrtpd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 51 f4          	vsqrtpd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 51 21          	vsqrtpd \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fd 51 21          	vsqrtpd \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 51 e4          	vsqrtps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 51 f4          	vsqrtps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 51 21          	vsqrtps \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fc 51 21          	vsqrtps \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e2 7d 0f e4       	vtestpd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0f f4       	vtestpd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 7d 0f 21       	vtestpd \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 0f 21       	vtestpd \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e2 7d 0e e4       	vtestps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0e f4       	vtestps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 7d 0e 21       	vtestps \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 0e 21       	vtestps \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 ff f0 21          	vlddqu \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 ff f0 21          	vlddqu \(%ecx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 64    	vblendpd \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 64    	vblendpd \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 64    	vblendpd \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 64    	vblendps \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 64    	vblendps \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 64    	vblendps \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c2 d4 64       	vcmppd \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c2 11 64       	vcmppd \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c2 11 64       	vcmppd \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c2 d4 64       	vcmpps \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c2 11 64       	vcmpps \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c2 11 64       	vcmpps \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 64    	vdpps  \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 64    	vdpps  \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 64    	vdpps  \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 64    	vperm2f128 \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 64    	vperm2f128 \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 64    	vperm2f128 \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c6 d4 64       	vshufpd \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c6 11 64       	vshufpd \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c6 11 64       	vshufpd \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c6 d4 64       	vshufps \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c6 11 64       	vshufps \$0x64,\(%ecx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c6 11 64       	vshufps \$0x64,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 07    	vblendpd \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 07    	vblendpd \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 07    	vblendpd \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 07    	vblendps \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 07    	vblendps \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 07    	vblendps \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c2 d4 07       	vcmpordpd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c2 11 07       	vcmpordpd \(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c2 11 07       	vcmpordpd \(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c2 d4 07       	vcmpordps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c2 11 07       	vcmpordps \(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c2 11 07       	vcmpordps \(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 07    	vdpps  \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 07    	vdpps  \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 07    	vdpps  \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 07    	vperm2f128 \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 07    	vperm2f128 \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 07    	vperm2f128 \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c6 d4 07       	vshufpd \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c6 11 07       	vshufpd \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c6 11 07       	vshufpd \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c6 d4 07       	vshufps \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c6 11 07       	vshufps \$0x7,\(%ecx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c6 11 07       	vshufps \$0x7,\(%ecx\),%ymm6,%ymm2
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b fe 40    	vblendvpd %ymm4,%ymm6,%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b 39 40    	vblendvpd %ymm4,\(%ecx\),%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b 39 40    	vblendvpd %ymm4,\(%ecx\),%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a fe 40    	vblendvps %ymm4,%ymm6,%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a 39 40    	vblendvps %ymm4,\(%ecx\),%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a 39 40    	vblendvps %ymm4,\(%ecx\),%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 fc 20    	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d fc 20    	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c fc 20    	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f fc 20    	vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e fc 20    	vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d fc 20    	vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c fc 20    	vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 fc 20    	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 fc 20    	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d fc 20    	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c fc 20    	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 62    	vpermilmo2pd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 62    	vpermilmo2pd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 62    	vpermilmo2pd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 63    	vpermilmz2pd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 63    	vpermilmz2pd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 63    	vpermilmz2pd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 60    	vpermiltd2pd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 60    	vpermiltd2pd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 60    	vpermiltd2pd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 62    	vpermilmo2ps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 62    	vpermilmo2ps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 62    	vpermilmo2ps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 63    	vpermilmz2ps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 63    	vpermilmz2ps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 63    	vpermilmz2ps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 60    	vpermiltd2ps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 60    	vpermiltd2ps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 60    	vpermiltd2ps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 6a    	vpermil2pd \$0xa,%ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 6a    	vpermil2pd \$0xa,\(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 6a    	vpermil2pd \$0xa,\(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 6a    	vpermil2ps \$0xa,%ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 6a    	vpermil2ps \$0xa,\(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 6a    	vpermil2ps \$0xa,\(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 64    	vinsertf128 \$0x64,%xmm4,%ymm4,%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 64    	vinsertf128 \$0x64,\(%ecx\),%ymm4,%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 64    	vinsertf128 \$0x64,\(%ecx\),%ymm4,%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 64    	vextractf128 \$0x64,%ymm4,%xmm4
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 64    	vextractf128 \$0x64,%ymm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 64    	vextractf128 \$0x64,%ymm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 07    	vinsertf128 \$0x7,%xmm4,%ymm4,%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 07    	vinsertf128 \$0x7,\(%ecx\),%ymm4,%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 07    	vinsertf128 \$0x7,\(%ecx\),%ymm4,%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 07    	vextractf128 \$0x7,%ymm4,%xmm4
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 07    	vextractf128 \$0x7,%ymm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 07    	vextractf128 \$0x7,%ymm4,\(%ecx\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 1a 21       	vbroadcastf128 \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 1a 21       	vbroadcastf128 \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 f8 5b f4          	vcvtdq2ps %xmm4,%xmm6
@@ -2548,79 +2366,79 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e2 59 2c 31       	vmaskmovps \(%ecx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 59 2d 31       	vmaskmovpd \(%ecx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 59 2d 31       	vmaskmovpd \(%ecx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 df f4 64    	vaeskeygenassist \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 df 31 64    	vaeskeygenassist \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 df 31 64    	vaeskeygenassist \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 64    	vpcmpestri \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 61 31 64    	vpcmpestri \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 61 31 64    	vpcmpestri \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 64    	vpcmpestrm \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 60 31 64    	vpcmpestrm \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 60 31 64    	vpcmpestrm \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 64    	vpcmpistri \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 63 31 64    	vpcmpistri \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 63 31 64    	vpcmpistri \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 64    	vpcmpistrm \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 62 31 64    	vpcmpistrm \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 62 31 64    	vpcmpistrm \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 64    	vpermilpd \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 05 31 64    	vpermilpd \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 05 31 64    	vpermilpd \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 64    	vpermilps \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 04 31 64    	vpermilps \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 04 31 64    	vpermilps \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 70 f4 64       	vpshufd \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 70 31 64       	vpshufd \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 70 31 64       	vpshufd \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 fa 70 f4 64       	vpshufhw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 fa 70 31 64       	vpshufhw \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 fa 70 31 64       	vpshufhw \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 fb 70 f4 64       	vpshuflw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 fb 70 31 64       	vpshuflw \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 fb 70 31 64       	vpshuflw \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 64    	vroundpd \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 09 31 64    	vroundpd \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 09 31 64    	vroundpd \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 64    	vroundps \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 08 31 64    	vroundps \$0x64,\(%ecx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 08 31 64    	vroundps \$0x64,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 df f4 07    	vaeskeygenassist \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 df 31 07    	vaeskeygenassist \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 df 31 07    	vaeskeygenassist \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 07    	vpcmpestri \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 61 31 07    	vpcmpestri \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 61 31 07    	vpcmpestri \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 07    	vpcmpestrm \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 60 31 07    	vpcmpestrm \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 60 31 07    	vpcmpestrm \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 07    	vpcmpistri \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 63 31 07    	vpcmpistri \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 63 31 07    	vpcmpistri \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 07    	vpcmpistrm \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 62 31 07    	vpcmpistrm \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 62 31 07    	vpcmpistrm \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 07    	vpermilpd \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 05 31 07    	vpermilpd \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 05 31 07    	vpermilpd \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 07    	vpermilps \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 04 31 07    	vpermilps \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 04 31 07    	vpermilps \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 70 f4 07       	vpshufd \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 70 31 07       	vpshufd \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 70 31 07       	vpshufd \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 fa 70 f4 07       	vpshufhw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fa 70 31 07       	vpshufhw \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 fa 70 31 07       	vpshufhw \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 fb 70 f4 07       	vpshuflw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fb 70 31 07       	vpshuflw \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 fb 70 31 07       	vpshuflw \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 07    	vroundpd \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 09 31 07    	vroundpd \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 09 31 07    	vroundpd \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 07    	vroundps \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 08 31 07    	vroundps \$0x7,\(%ecx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 08 31 07    	vroundps \$0x7,\(%ecx\),%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 49 2e 21       	vmaskmovps %xmm4,%xmm6,\(%ecx\)
 [ 	]*[a-f0-9]+:	c4 e2 49 2e 21       	vmaskmovps %xmm4,%xmm6,\(%ecx\)
 [ 	]*[a-f0-9]+:	c4 e2 49 2f 21       	vmaskmovpd %xmm4,%xmm6,\(%ecx\)
 [ 	]*[a-f0-9]+:	c4 e2 49 2f 21       	vmaskmovpd %xmm4,%xmm6,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 64    	vblendpd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 64    	vblendpd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 64    	vblendpd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 64    	vblendps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 64    	vblendps \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 64    	vblendps \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c2 d4 64       	vcmppd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c2 11 64       	vcmppd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c2 11 64       	vcmppd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c2 d4 64       	vcmpps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c2 11 64       	vcmpps \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c2 11 64       	vcmpps \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 64    	vdppd  \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 41 11 64    	vdppd  \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 41 11 64    	vdppd  \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 64    	vdpps  \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 40 11 64    	vdpps  \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 40 11 64    	vdpps  \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 64    	vmpsadbw \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 42 11 64    	vmpsadbw \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 42 11 64    	vmpsadbw \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 64    	vpalignr \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 64    	vpalignr \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 64    	vpalignr \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 64    	vpblendw \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 64    	vpblendw \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 64    	vpblendw \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c6 d4 64       	vshufpd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c6 11 64       	vshufpd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c6 11 64       	vshufpd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c6 d4 64       	vshufps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c6 11 64       	vshufps \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c6 11 64       	vshufps \$0x64,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 07    	vblendpd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 07    	vblendpd \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 07    	vblendpd \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 07    	vblendps \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 07    	vblendps \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 07    	vblendps \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c2 d4 07       	vcmpordpd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c2 11 07       	vcmpordpd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c2 11 07       	vcmpordpd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c2 d4 07       	vcmpordps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c2 11 07       	vcmpordps \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c2 11 07       	vcmpordps \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 07    	vdppd  \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 41 11 07    	vdppd  \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 41 11 07    	vdppd  \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 07    	vdpps  \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 40 11 07    	vdpps  \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 40 11 07    	vdpps  \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 07    	vmpsadbw \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 42 11 07    	vmpsadbw \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 42 11 07    	vmpsadbw \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 07    	vpalignr \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 07    	vpalignr \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 07    	vpalignr \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 07    	vpblendw \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 07    	vpblendw \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 07    	vpblendw \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c6 d4 07       	vshufpd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c6 11 07       	vshufpd \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c6 11 07       	vshufpd \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c6 d4 07       	vshufps \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c6 11 07       	vshufps \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c6 11 07       	vshufps \$0x7,\(%ecx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c4 e3 69 4b fe 40    	vblendvpd %xmm4,%xmm6,%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4b 39 40    	vblendvpd %xmm4,\(%ecx\),%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4b 39 40    	vblendvpd %xmm4,\(%ecx\),%xmm2,%xmm7
@@ -2630,106 +2448,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e3 69 4c fe 40    	vpblendvb %xmm4,%xmm6,%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4c 39 40    	vpblendvb %xmm4,\(%ecx\),%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4c 39 40    	vpblendvb %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 fc 20    	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 fc 20    	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d fc 20    	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c fc 20    	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f fc 20    	vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e fc 20    	vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d fc 20    	vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c fc 20    	vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 fc 20    	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 fc 20    	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d fc 20    	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c fc 20    	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 62    	vpermilmo2pd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 62    	vpermilmo2pd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 42    	vpermilmo2pd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 62    	vpermilmo2pd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 42    	vpermilmo2pd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 63    	vpermilmz2pd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 63    	vpermilmz2pd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 43    	vpermilmz2pd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 63    	vpermilmz2pd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 43    	vpermilmz2pd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 60    	vpermiltd2pd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 60    	vpermiltd2pd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 40    	vpermiltd2pd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 60    	vpermiltd2pd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 40    	vpermiltd2pd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 62    	vpermilmo2ps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 62    	vpermilmo2ps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 42    	vpermilmo2ps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 62    	vpermilmo2ps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 42    	vpermilmo2ps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 63    	vpermilmz2ps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 63    	vpermilmz2ps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 43    	vpermilmz2ps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 63    	vpermilmz2ps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 43    	vpermilmz2ps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 60    	vpermiltd2ps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 60    	vpermiltd2ps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 40    	vpermiltd2ps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 60    	vpermiltd2ps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 40    	vpermiltd2ps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 6a    	vpermil2pd \$0xa,%xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 6a    	vpermil2pd \$0xa,\(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 4a    	vpermil2pd \$0xa,%xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 6a    	vpermil2pd \$0xa,\(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 4a    	vpermil2pd \$0xa,%xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 6a    	vpermil2ps \$0xa,%xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 6a    	vpermil2ps \$0xa,\(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 4a    	vpermil2ps \$0xa,%xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 6a    	vpermil2ps \$0xa,\(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 4a    	vpermil2ps \$0xa,%xmm4,\(%ecx\),%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e2 7d 19 21       	vbroadcastsd \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 19 21       	vbroadcastsd \(%ecx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 f9 2f f4          	vcomisd %xmm4,%xmm6
@@ -2795,32 +2513,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 d9 16 31          	vmovhpd \(%ecx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 d8 16 31          	vmovhps \(%ecx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 d8 16 31          	vmovhps \(%ecx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 cb c2 d4 64       	vcmpsd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 cb c2 11 64       	vcmpsd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 cb c2 11 64       	vcmpsd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 64    	vroundsd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 64    	vroundsd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 64    	vroundsd \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b fc 20    	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f fc 20    	vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b fc 20    	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f fc 20    	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c5 cb c2 d4 07       	vcmpordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cb c2 11 07       	vcmpordsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cb c2 11 07       	vcmpordsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 07    	vroundsd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 07    	vroundsd \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 07    	vroundsd \$0x7,\(%ecx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 58 d4          	vaddsd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 58 11          	vaddsd \(%ecx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 58 11          	vaddsd \(%ecx\),%xmm6,%xmm2
@@ -2941,6 +2639,10 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 cb c2 d4 1f       	vcmptrue_ussd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1f       	vcmptrue_ussd \(%ecx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1f       	vcmptrue_ussd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr \(%ecx\)
+[ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr \(%ecx\)
+[ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr \(%ecx\)
+[ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr \(%ecx\)
 [ 	]*[a-f0-9]+:	c5 ca 58 d4          	vaddss %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 ca 58 11          	vaddss \(%ecx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 ca 58 11          	vaddss \(%ecx\),%xmm6,%xmm2
@@ -3105,74 +2807,54 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fa 2c cc          	vcvttss2si %xmm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fa 2c 09          	vcvttss2si \(%ecx\),%ecx
 [ 	]*[a-f0-9]+:	c5 fa 2c 09          	vcvttss2si \(%ecx\),%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 64    	vpextrd \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 16 21 64    	vpextrd \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 16 21 64    	vpextrd \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 64    	vextractps \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps \$0x64,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 07    	vpextrd \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 16 21 07    	vpextrd \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 16 21 07    	vpextrd \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 07    	vextractps \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps \$0x7,%xmm4,\(%ecx\)
 [ 	]*[a-f0-9]+:	c5 db 2a f1          	vcvtsi2sd %ecx,%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 db 2a 31          	vcvtsi2sdl \(%ecx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 db 2a 31          	vcvtsi2sdl \(%ecx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 da 2a f1          	vcvtsi2ss %ecx,%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 da 2a 31          	vcvtsi2ssl \(%ecx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 da 2a 31          	vcvtsi2ssl \(%ecx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 ca c2 d4 64       	vcmpss \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 ca c2 11 64       	vcmpss \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 ca c2 11 64       	vcmpss \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 64    	vinsertps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 21 11 64    	vinsertps \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 21 11 64    	vinsertps \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 64    	vroundss \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 64    	vroundss \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 64    	vroundss \$0x64,\(%ecx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a fc 20    	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e fc 20    	vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a fc 20    	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e fc 20    	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c5 ca c2 d4 07       	vcmpordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ca c2 11 07       	vcmpordss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ca c2 11 07       	vcmpordss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 07    	vinsertps \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 21 11 07    	vinsertps \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 21 11 07    	vinsertps \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 07    	vroundss \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 07    	vroundss \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 07    	vroundss \$0x7,\(%ecx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c4 e2 79 22 f4       	vpmovsxbq %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 79 22 21       	vpmovsxbq \(%ecx\),%xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 22 21       	vpmovsxbq \(%ecx\),%xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 32 f4       	vpmovzxbq %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 79 32 21       	vpmovzxbq \(%ecx\),%xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 32 21       	vpmovzxbq \(%ecx\),%xmm4
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c5 d9 c4 f1 64       	vpinsrw \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw \$0x64,\(%ecx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw \$0x64,\(%ecx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 64    	vpextrb \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb \$0x64,\(%ecx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb \$0x64,\(%ecx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb \$0x64,%xmm4,\(%ecx\)
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb \$0x64,\(%ecx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb \$0x64,\(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 d9 c4 f1 07       	vpinsrw \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw \$0x7,\(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw \$0x7,\(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 07    	vpextrb \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb \$0x7,%xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb \$0x7,\(%ecx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 f9 f7 f4          	vmaskmovdqu %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 fa 7e f4          	vmovq  %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 f9 50 cc          	vmovmskpd %xmm4,%ecx
@@ -3182,17 +2864,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 c8 16 d4          	vmovlhps %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 10 d4          	vmovsd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 ca 10 d4          	vmovss %xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 72 f4 64       	vpslld \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 fc 64       	vpslldq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 f4 64       	vpsllq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 71 f4 64       	vpsllw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 72 e4 64       	vpsrad \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 71 e4 64       	vpsraw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 72 d4 64       	vpsrld \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 dc 64       	vpsrldq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 d4 64       	vpsrlq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 71 d4 64       	vpsrlw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw \$0x64,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 c9 72 f4 07       	vpslld \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 fc 07       	vpslldq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 f4 07       	vpsllq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 71 f4 07       	vpsllw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 72 e4 07       	vpsrad \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 71 e4 07       	vpsraw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 72 d4 07       	vpsrld \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 dc 07       	vpsrldq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 d4 07       	vpsrlq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 71 d4 07       	vpsrlw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw \$0x7,%xmm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fd 50 cc          	vmovmskpd %ymm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fc 50 cc          	vmovmskps %ymm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fb e6 f4          	vcvtpd2dq %xmm4,%xmm6
@@ -3209,17 +2891,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 05 34 12 00 00 	vcvtdq2pd 0x1234,%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 05 34 12 00 00 	vcvtpd2psy 0x1234,%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 3d 34 12 00 00 	vpavgb 0x1234,%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 05 34 12 00 00 64 	vaeskeygenassist \$0x64,0x1234,%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 05 34 12 00 00 64 	vpextrb \$0x64,%xmm0,0x1234
+[ 	]*[a-f0-9]+:	c4 e3 79 df 05 34 12 00 00 07 	vaeskeygenassist \$0x7,0x1234,%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 05 34 12 00 00 07 	vpextrb \$0x7,%xmm0,0x1234
 [ 	]*[a-f0-9]+:	c5 fb 2a 3d 34 12 00 00 	vcvtsi2sdl 0x1234,%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 35 34 12 00 00 00 	vblendvps %xmm0,0x1234,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3d 34 12 00 00 64 	vpinsrb \$0x64,0x1234,%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3d 34 12 00 00 07 	vpinsrb \$0x7,0x1234,%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 05 34 12 00 00 	vmovdqa 0x1234,%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 05 34 12 00 00 	vmovdqa %ymm0,0x1234
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3d 34 12 00 00 	vpermilpd 0x1234,%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 05 34 12 00 00 64 	vroundpd \$0x64,0x1234,%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 05 34 12 00 00 64 	vextractf128 \$0x64,%ymm0,0x1234
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3d 34 12 00 00 64 	vperm2f128 \$0x64,0x1234,%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 05 34 12 00 00 07 	vroundpd \$0x7,0x1234,%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 05 34 12 00 00 07 	vextractf128 \$0x7,%ymm0,0x1234
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3d 34 12 00 00 07 	vperm2f128 \$0x7,0x1234,%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 35 34 12 00 00 00 	vblendvpd %ymm0,0x1234,%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 55 00       	vldmxcsr 0x0\(%ebp\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 45 00       	vmovdqa 0x0\(%ebp\),%xmm0
@@ -3229,17 +2911,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 45 00       	vcvtdq2pd 0x0\(%ebp\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 45 00       	vcvtpd2psy 0x0\(%ebp\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 7d 00       	vpavgb 0x0\(%ebp\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 45 00 64 	vaeskeygenassist \$0x64,0x0\(%ebp\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 45 00 64 	vpextrb \$0x64,%xmm0,0x0\(%ebp\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 45 00 07 	vaeskeygenassist \$0x7,0x0\(%ebp\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 45 00 07 	vpextrb \$0x7,%xmm0,0x0\(%ebp\)
 [ 	]*[a-f0-9]+:	c5 fb 2a 7d 00       	vcvtsi2sdl 0x0\(%ebp\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 75 00 00 	vblendvps %xmm0,0x0\(%ebp\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 7d 00 64 	vpinsrb \$0x64,0x0\(%ebp\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 7d 00 07 	vpinsrb \$0x7,0x0\(%ebp\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 45 00       	vmovdqa 0x0\(%ebp\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 45 00       	vmovdqa %ymm0,0x0\(%ebp\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 7d 00    	vpermilpd 0x0\(%ebp\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 45 00 64 	vroundpd \$0x64,0x0\(%ebp\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 45 00 64 	vextractf128 \$0x64,%ymm0,0x0\(%ebp\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 7d 00 64 	vperm2f128 \$0x64,0x0\(%ebp\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 45 00 07 	vroundpd \$0x7,0x0\(%ebp\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 45 00 07 	vextractf128 \$0x7,%ymm0,0x0\(%ebp\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 7d 00 07 	vperm2f128 \$0x7,0x0\(%ebp\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 75 00 00 	vblendvpd %ymm0,0x0\(%ebp\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 95 99 00 00 00 	vldmxcsr 0x99\(%ebp\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 85 99 00 00 00 	vmovdqa 0x99\(%ebp\),%xmm0
@@ -3249,17 +2931,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 85 99 00 00 00 	vcvtdq2pd 0x99\(%ebp\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 85 99 00 00 00 	vcvtpd2psy 0x99\(%ebp\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 bd 99 00 00 00 	vpavgb 0x99\(%ebp\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 85 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%ebp\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 85 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(%ebp\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 85 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%ebp\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 85 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(%ebp\)
 [ 	]*[a-f0-9]+:	c5 fb 2a bd 99 00 00 00 	vcvtsi2sdl 0x99\(%ebp\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b5 99 00 00 00 00 	vblendvps %xmm0,0x99\(%ebp\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bd 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%ebp\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bd 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%ebp\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 85 99 00 00 00 	vmovdqa 0x99\(%ebp\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 85 99 00 00 00 	vmovdqa %ymm0,0x99\(%ebp\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bd 99 00 00 00 	vpermilpd 0x99\(%ebp\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 85 99 00 00 00 64 	vroundpd \$0x64,0x99\(%ebp\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 85 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(%ebp\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bd 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%ebp\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 85 99 00 00 00 07 	vroundpd \$0x7,0x99\(%ebp\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 85 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(%ebp\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bd 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%ebp\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b5 99 00 00 00 00 	vblendvpd %ymm0,0x99\(%ebp\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 25 99 00 00 00 	vldmxcsr 0x99\(,%eiz,1\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 04 25 99 00 00 00 	vmovdqa 0x99\(,%eiz,1\),%xmm0
@@ -3269,17 +2951,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 04 25 99 00 00 00 	vcvtdq2pd 0x99\(,%eiz,1\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 04 25 99 00 00 00 	vcvtpd2psy 0x99\(,%eiz,1\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 3c 25 99 00 00 00 	vpavgb 0x99\(,%eiz,1\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 04 25 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(,%eiz,1\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 04 25 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(,%eiz,1\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 04 25 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(,%eiz,1\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 04 25 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(,%eiz,1\)
 [ 	]*[a-f0-9]+:	c5 fb 2a 3c 25 99 00 00 00 	vcvtsi2sdl 0x99\(,%eiz,1\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 34 25 99 00 00 00 00 	vblendvps %xmm0,0x99\(,%eiz,1\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 25 99 00 00 00 64 	vpinsrb \$0x64,0x99\(,%eiz,1\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 25 99 00 00 00 07 	vpinsrb \$0x7,0x99\(,%eiz,1\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 04 25 99 00 00 00 	vmovdqa 0x99\(,%eiz,1\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 04 25 99 00 00 00 	vmovdqa %ymm0,0x99\(,%eiz,1\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3c 25 99 00 00 00 	vpermilpd 0x99\(,%eiz,1\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 25 99 00 00 00 64 	vroundpd \$0x64,0x99\(,%eiz,1\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 25 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(,%eiz,1\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 25 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(,%eiz,1\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 25 99 00 00 00 07 	vroundpd \$0x7,0x99\(,%eiz,1\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 25 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(,%eiz,1\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 25 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(,%eiz,1\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 34 25 99 00 00 00 00 	vblendvpd %ymm0,0x99\(,%eiz,1\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 65 99 00 00 00 	vldmxcsr 0x99\(,%eiz,2\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 04 65 99 00 00 00 	vmovdqa 0x99\(,%eiz,2\),%xmm0
@@ -3289,17 +2971,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 04 65 99 00 00 00 	vcvtdq2pd 0x99\(,%eiz,2\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 04 65 99 00 00 00 	vcvtpd2psy 0x99\(,%eiz,2\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 3c 65 99 00 00 00 	vpavgb 0x99\(,%eiz,2\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 04 65 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(,%eiz,2\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 04 65 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(,%eiz,2\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 04 65 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(,%eiz,2\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 04 65 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(,%eiz,2\)
 [ 	]*[a-f0-9]+:	c5 fb 2a 3c 65 99 00 00 00 	vcvtsi2sdl 0x99\(,%eiz,2\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a 34 65 99 00 00 00 00 	vblendvps %xmm0,0x99\(,%eiz,2\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 65 99 00 00 00 64 	vpinsrb \$0x64,0x99\(,%eiz,2\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 3c 65 99 00 00 00 07 	vpinsrb \$0x7,0x99\(,%eiz,2\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 04 65 99 00 00 00 	vmovdqa 0x99\(,%eiz,2\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 04 65 99 00 00 00 	vmovdqa %ymm0,0x99\(,%eiz,2\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d 3c 65 99 00 00 00 	vpermilpd 0x99\(,%eiz,2\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 65 99 00 00 00 64 	vroundpd \$0x64,0x99\(,%eiz,2\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 65 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(,%eiz,2\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 65 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(,%eiz,2\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 04 65 99 00 00 00 07 	vroundpd \$0x7,0x99\(,%eiz,2\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 04 65 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(,%eiz,2\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 3c 65 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(,%eiz,2\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b 34 65 99 00 00 00 00 	vblendvpd %ymm0,0x99\(,%eiz,2\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 20 99 00 00 00 	vldmxcsr 0x99\(%eax,%eiz,1\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 20 99 00 00 00 	vmovdqa 0x99\(%eax,%eiz,1\),%xmm0
@@ -3309,17 +2991,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 20 99 00 00 00 	vcvtdq2pd 0x99\(%eax,%eiz,1\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 20 99 00 00 00 	vcvtpd2psy 0x99\(%eax,%eiz,1\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 20 99 00 00 00 	vpavgb 0x99\(%eax,%eiz,1\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 20 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%eax,%eiz,1\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 20 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(%eax,%eiz,1\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 20 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%eax,%eiz,1\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 20 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(%eax,%eiz,1\)
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 20 99 00 00 00 	vcvtsi2sdl 0x99\(%eax,%eiz,1\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 20 99 00 00 00 00 	vblendvps %xmm0,0x99\(%eax,%eiz,1\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 20 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%eax,%eiz,1\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 20 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%eax,%eiz,1\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 20 99 00 00 00 	vmovdqa 0x99\(%eax,%eiz,1\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 20 99 00 00 00 	vmovdqa %ymm0,0x99\(%eax,%eiz,1\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 20 99 00 00 00 	vpermilpd 0x99\(%eax,%eiz,1\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 20 99 00 00 00 64 	vroundpd \$0x64,0x99\(%eax,%eiz,1\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 20 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(%eax,%eiz,1\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 20 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%eax,%eiz,1\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 20 99 00 00 00 07 	vroundpd \$0x7,0x99\(%eax,%eiz,1\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 20 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(%eax,%eiz,1\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 20 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%eax,%eiz,1\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 20 99 00 00 00 00 	vblendvpd %ymm0,0x99\(%eax,%eiz,1\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 60 99 00 00 00 	vldmxcsr 0x99\(%eax,%eiz,2\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 60 99 00 00 00 	vmovdqa 0x99\(%eax,%eiz,2\),%xmm0
@@ -3329,17 +3011,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 60 99 00 00 00 	vcvtdq2pd 0x99\(%eax,%eiz,2\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 60 99 00 00 00 	vcvtpd2psy 0x99\(%eax,%eiz,2\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 60 99 00 00 00 	vpavgb 0x99\(%eax,%eiz,2\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 60 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%eax,%eiz,2\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 60 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(%eax,%eiz,2\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 60 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%eax,%eiz,2\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 60 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(%eax,%eiz,2\)
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 60 99 00 00 00 	vcvtsi2sdl 0x99\(%eax,%eiz,2\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 60 99 00 00 00 00 	vblendvps %xmm0,0x99\(%eax,%eiz,2\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 60 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%eax,%eiz,2\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 60 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%eax,%eiz,2\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 60 99 00 00 00 	vmovdqa 0x99\(%eax,%eiz,2\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 60 99 00 00 00 	vmovdqa %ymm0,0x99\(%eax,%eiz,2\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 60 99 00 00 00 	vpermilpd 0x99\(%eax,%eiz,2\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 60 99 00 00 00 64 	vroundpd \$0x64,0x99\(%eax,%eiz,2\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 60 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(%eax,%eiz,2\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 60 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%eax,%eiz,2\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 60 99 00 00 00 07 	vroundpd \$0x7,0x99\(%eax,%eiz,2\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 60 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(%eax,%eiz,2\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 60 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%eax,%eiz,2\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 60 99 00 00 00 00 	vblendvpd %ymm0,0x99\(%eax,%eiz,2\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 98 99 00 00 00 	vldmxcsr 0x99\(%eax,%ebx,4\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 98 99 00 00 00 	vmovdqa 0x99\(%eax,%ebx,4\),%xmm0
@@ -3349,17 +3031,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 98 99 00 00 00 	vcvtdq2pd 0x99\(%eax,%ebx,4\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 98 99 00 00 00 	vcvtpd2psy 0x99\(%eax,%ebx,4\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 98 99 00 00 00 	vpavgb 0x99\(%eax,%ebx,4\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 98 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%eax,%ebx,4\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 98 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(%eax,%ebx,4\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 98 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%eax,%ebx,4\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 98 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(%eax,%ebx,4\)
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 98 99 00 00 00 	vcvtsi2sdl 0x99\(%eax,%ebx,4\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 98 99 00 00 00 00 	vblendvps %xmm0,0x99\(%eax,%ebx,4\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 98 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%eax,%ebx,4\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 98 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%eax,%ebx,4\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 98 99 00 00 00 	vmovdqa 0x99\(%eax,%ebx,4\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 98 99 00 00 00 	vmovdqa %ymm0,0x99\(%eax,%ebx,4\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 98 99 00 00 00 	vpermilpd 0x99\(%eax,%ebx,4\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 98 99 00 00 00 64 	vroundpd \$0x64,0x99\(%eax,%ebx,4\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 98 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(%eax,%ebx,4\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 98 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%eax,%ebx,4\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 98 99 00 00 00 07 	vroundpd \$0x7,0x99\(%eax,%ebx,4\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 98 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(%eax,%ebx,4\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 98 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%eax,%ebx,4\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 98 99 00 00 00 00 	vblendvpd %ymm0,0x99\(%eax,%ebx,4\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 cc 99 00 00 00 	vldmxcsr 0x99\(%esp,%ecx,8\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 cc 99 00 00 00 	vmovdqa 0x99\(%esp,%ecx,8\),%xmm0
@@ -3369,17 +3051,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 cc 99 00 00 00 	vcvtdq2pd 0x99\(%esp,%ecx,8\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 cc 99 00 00 00 	vcvtpd2psy 0x99\(%esp,%ecx,8\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc cc 99 00 00 00 	vpavgb 0x99\(%esp,%ecx,8\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 cc 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%esp,%ecx,8\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 cc 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(%esp,%ecx,8\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 cc 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%esp,%ecx,8\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 cc 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(%esp,%ecx,8\)
 [ 	]*[a-f0-9]+:	c5 fb 2a bc cc 99 00 00 00 	vcvtsi2sdl 0x99\(%esp,%ecx,8\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 cc 99 00 00 00 00 	vblendvps %xmm0,0x99\(%esp,%ecx,8\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc cc 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%esp,%ecx,8\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc cc 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%esp,%ecx,8\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 cc 99 00 00 00 	vmovdqa 0x99\(%esp,%ecx,8\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 cc 99 00 00 00 	vmovdqa %ymm0,0x99\(%esp,%ecx,8\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc cc 99 00 00 00 	vpermilpd 0x99\(%esp,%ecx,8\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 cc 99 00 00 00 64 	vroundpd \$0x64,0x99\(%esp,%ecx,8\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 cc 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(%esp,%ecx,8\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc cc 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%esp,%ecx,8\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 cc 99 00 00 00 07 	vroundpd \$0x7,0x99\(%esp,%ecx,8\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 cc 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(%esp,%ecx,8\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc cc 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%esp,%ecx,8\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 cc 99 00 00 00 00 	vblendvpd %ymm0,0x99\(%esp,%ecx,8\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 15 99 00 00 00 	vldmxcsr 0x99\(%ebp,%edx,1\)
 [ 	]*[a-f0-9]+:	c5 f9 6f 84 15 99 00 00 00 	vmovdqa 0x99\(%ebp,%edx,1\),%xmm0
@@ -3389,19 +3071,19 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fe e6 84 15 99 00 00 00 	vcvtdq2pd 0x99\(%ebp,%edx,1\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 5a 84 15 99 00 00 00 	vcvtpd2psy 0x99\(%ebp,%edx,1\),%xmm0
 [ 	]*[a-f0-9]+:	c5 f9 e0 bc 15 99 00 00 00 	vpavgb 0x99\(%ebp,%edx,1\),%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 79 df 84 15 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%ebp,%edx,1\),%xmm0
-[ 	]*[a-f0-9]+:	c4 e3 79 14 84 15 99 00 00 00 64 	vpextrb \$0x64,%xmm0,0x99\(%ebp,%edx,1\)
+[ 	]*[a-f0-9]+:	c4 e3 79 df 84 15 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%ebp,%edx,1\),%xmm0
+[ 	]*[a-f0-9]+:	c4 e3 79 14 84 15 99 00 00 00 07 	vpextrb \$0x7,%xmm0,0x99\(%ebp,%edx,1\)
 [ 	]*[a-f0-9]+:	c5 fb 2a bc 15 99 00 00 00 	vcvtsi2sdl 0x99\(%ebp,%edx,1\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 59 4a b4 15 99 00 00 00 00 	vblendvps %xmm0,0x99\(%ebp,%edx,1\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 15 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%ebp,%edx,1\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 79 20 bc 15 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%ebp,%edx,1\),%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fd 6f 84 15 99 00 00 00 	vmovdqa 0x99\(%ebp,%edx,1\),%ymm0
 [ 	]*[a-f0-9]+:	c5 fd 7f 84 15 99 00 00 00 	vmovdqa %ymm0,0x99\(%ebp,%edx,1\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 0d bc 15 99 00 00 00 	vpermilpd 0x99\(%ebp,%edx,1\),%ymm0,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 15 99 00 00 00 64 	vroundpd \$0x64,0x99\(%ebp,%edx,1\),%ymm0
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 15 99 00 00 00 64 	vextractf128 \$0x64,%ymm0,0x99\(%ebp,%edx,1\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 15 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%ebp,%edx,1\),%ymm0,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 84 15 99 00 00 00 07 	vroundpd \$0x7,0x99\(%ebp,%edx,1\),%ymm0
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 84 15 99 00 00 00 07 	vextractf128 \$0x7,%ymm0,0x99\(%ebp,%edx,1\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 06 bc 15 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%ebp,%edx,1\),%ymm0,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 5d 4b b4 15 99 00 00 00 00 	vblendvpd %ymm0,0x99\(%ebp,%edx,1\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 f9 50 c0          	vmovmskpd %xmm0,%eax
-[ 	]*[a-f0-9]+:	c5 c1 72 f0 64       	vpslld \$0x64,%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 c1 72 f0 07       	vpslld \$0x7,%xmm0,%xmm7
 [ 	]*[a-f0-9]+:	c5 fc 50 c0          	vmovmskps %ymm0,%eax
 #pass
diff --git a/gas/testsuite/gas/i386/avx.s b/gas/testsuite/gas/i386/avx.s
index 7e78e34..95b1215 100644
--- a/gas/testsuite/gas/i386/avx.s
+++ b/gas/testsuite/gas/i386/avx.s
@@ -19,14 +19,14 @@ _start:
 	vmaskmovps %ymm4,%ymm6,(%ecx)
 
 # Tests for op imm8, ymm/mem256, ymm
-	vpermilpd $100,%ymm6,%ymm2
-	vpermilpd $100,(%ecx),%ymm6
-	vpermilps $100,%ymm6,%ymm2
-	vpermilps $100,(%ecx),%ymm6
-	vroundpd $100,%ymm6,%ymm2
-	vroundpd $100,(%ecx),%ymm6
-	vroundps $100,%ymm6,%ymm2
-	vroundps $100,(%ecx),%ymm6
+	vpermilpd $7,%ymm6,%ymm2
+	vpermilpd $7,(%ecx),%ymm6
+	vpermilps $7,%ymm6,%ymm2
+	vpermilps $7,(%ecx),%ymm6
+	vroundpd $7,%ymm6,%ymm2
+	vroundpd $7,(%ecx),%ymm6
+	vroundps $7,%ymm6,%ymm2
+	vroundps $7,(%ecx),%ymm6
 
 # Tests for op ymm/mem256, ymm, ymm
 	vaddpd %ymm4,%ymm6,%ymm2
@@ -231,65 +231,65 @@ _start:
 	vcvttpd2dqy (%ecx),%xmm4
 
 # Tests for op ymm/mem256, ymm
-	vcvtdq2ps %ymm4,%ymm4
+	vcvtdq2ps %ymm4,%ymm6
 	vcvtdq2ps (%ecx),%ymm4
-	vcvtps2dq %ymm4,%ymm4
+	vcvtps2dq %ymm4,%ymm6
 	vcvtps2dq (%ecx),%ymm4
-	vcvttps2dq %ymm4,%ymm4
+	vcvttps2dq %ymm4,%ymm6
 	vcvttps2dq (%ecx),%ymm4
-	vmovapd %ymm4,%ymm4
+	vmovapd %ymm4,%ymm6
 	vmovapd (%ecx),%ymm4
-	vmovaps %ymm4,%ymm4
+	vmovaps %ymm4,%ymm6
 	vmovaps (%ecx),%ymm4
-	vmovdqa %ymm4,%ymm4
+	vmovdqa %ymm4,%ymm6
 	vmovdqa (%ecx),%ymm4
-	vmovdqu %ymm4,%ymm4
+	vmovdqu %ymm4,%ymm6
 	vmovdqu (%ecx),%ymm4
-	vmovddup %ymm4,%ymm4
+	vmovddup %ymm4,%ymm6
 	vmovddup (%ecx),%ymm4
-	vmovshdup %ymm4,%ymm4
+	vmovshdup %ymm4,%ymm6
 	vmovshdup (%ecx),%ymm4
-	vmovsldup %ymm4,%ymm4
+	vmovsldup %ymm4,%ymm6
 	vmovsldup (%ecx),%ymm4
-	vmovupd %ymm4,%ymm4
+	vmovupd %ymm4,%ymm6
 	vmovupd (%ecx),%ymm4
-	vmovups %ymm4,%ymm4
+	vmovups %ymm4,%ymm6
 	vmovups (%ecx),%ymm4
-	vptest %ymm4,%ymm4
+	vptest %ymm4,%ymm6
 	vptest (%ecx),%ymm4
-	vrcpps %ymm4,%ymm4
+	vrcpps %ymm4,%ymm6
 	vrcpps (%ecx),%ymm4
-	vrsqrtps %ymm4,%ymm4
+	vrsqrtps %ymm4,%ymm6
 	vrsqrtps (%ecx),%ymm4
-	vsqrtpd %ymm4,%ymm4
+	vsqrtpd %ymm4,%ymm6
 	vsqrtpd (%ecx),%ymm4
-	vsqrtps %ymm4,%ymm4
+	vsqrtps %ymm4,%ymm6
 	vsqrtps (%ecx),%ymm4
-	vtestpd %ymm4,%ymm4
+	vtestpd %ymm4,%ymm6
 	vtestpd (%ecx),%ymm4
-	vtestps %ymm4,%ymm4
+	vtestps %ymm4,%ymm6
 	vtestps (%ecx),%ymm4
 
 # Tests for op mem256, ymm
 	vlddqu (%ecx),%ymm4
 
 # Tests for op imm8, ymm/mem256, ymm, ymm
-	vblendpd $100,%ymm4,%ymm6,%ymm2
-	vblendpd $100,(%ecx),%ymm6,%ymm2
-	vblendps $100,%ymm4,%ymm6,%ymm2
-	vblendps $100,(%ecx),%ymm6,%ymm2
-	vcmppd $100,%ymm4,%ymm6,%ymm2
-	vcmppd $100,(%ecx),%ymm6,%ymm2
-	vcmpps $100,%ymm4,%ymm6,%ymm2
-	vcmpps $100,(%ecx),%ymm6,%ymm2
-	vdpps $100,%ymm4,%ymm6,%ymm2
-	vdpps $100,(%ecx),%ymm6,%ymm2
-	vperm2f128 $100,%ymm4,%ymm6,%ymm2
-	vperm2f128 $100,(%ecx),%ymm6,%ymm2
-	vshufpd $100,%ymm4,%ymm6,%ymm2
-	vshufpd $100,(%ecx),%ymm6,%ymm2
-	vshufps $100,%ymm4,%ymm6,%ymm2
-	vshufps $100,(%ecx),%ymm6,%ymm2
+	vblendpd $7,%ymm4,%ymm6,%ymm2
+	vblendpd $7,(%ecx),%ymm6,%ymm2
+	vblendps $7,%ymm4,%ymm6,%ymm2
+	vblendps $7,(%ecx),%ymm6,%ymm2
+	vcmppd $7,%ymm4,%ymm6,%ymm2
+	vcmppd $7,(%ecx),%ymm6,%ymm2
+	vcmpps $7,%ymm4,%ymm6,%ymm2
+	vcmpps $7,(%ecx),%ymm6,%ymm2
+	vdpps $7,%ymm4,%ymm6,%ymm2
+	vdpps $7,(%ecx),%ymm6,%ymm2
+	vperm2f128 $7,%ymm4,%ymm6,%ymm2
+	vperm2f128 $7,(%ecx),%ymm6,%ymm2
+	vshufpd $7,%ymm4,%ymm6,%ymm2
+	vshufpd $7,(%ecx),%ymm6,%ymm2
+	vshufps $7,%ymm4,%ymm6,%ymm2
+	vshufps $7,(%ecx),%ymm6,%ymm2
 
 # Tests for op ymm, ymm/mem256, ymm, ymm
 	vblendvpd %ymm4,%ymm6,%ymm2,%ymm7
@@ -297,59 +297,13 @@ _start:
 	vblendvps %ymm4,%ymm6,%ymm2,%ymm7
 	vblendvps %ymm4,(%ecx),%ymm2,%ymm7
 
-# Tests for op ymm/mem256, ymm, ymm, ymm
-# Tests for op ymm, ymm/mem256, ymm, ymm
-	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-	vfmaddpd (%ecx),%ymm6,%ymm2,%ymm7
-	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
-	vfmaddps (%ecx),%ymm6,%ymm2,%ymm7
-	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
-	vfmaddsubpd (%ecx),%ymm6,%ymm2,%ymm7
-	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
-	vfmaddsubps (%ecx),%ymm6,%ymm2,%ymm7
-	vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
-	vfmsubaddpd (%ecx),%ymm6,%ymm2,%ymm7
-	vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
-	vfmsubaddps (%ecx),%ymm6,%ymm2,%ymm7
-	vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-	vfmsubpd (%ecx),%ymm6,%ymm2,%ymm7
-	vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
-	vfmsubps (%ecx),%ymm6,%ymm2,%ymm7
-	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-	vfnmaddpd (%ecx),%ymm6,%ymm2,%ymm7
-	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
-	vfnmaddps (%ecx),%ymm6,%ymm2,%ymm7
-	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-	vfnmsubpd (%ecx),%ymm6,%ymm2,%ymm7
-	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
-	vfnmsubps (%ecx),%ymm6,%ymm2,%ymm7
-	vpermilmo2pd %ymm4,%ymm6,%ymm2,%ymm7
-	vpermilmo2pd (%ecx),%ymm6,%ymm2,%ymm7
-	vpermilmz2pd %ymm4,%ymm6,%ymm2,%ymm7
-	vpermilmz2pd (%ecx),%ymm6,%ymm2,%ymm7
-	vpermiltd2pd %ymm4,%ymm6,%ymm2,%ymm7
-	vpermiltd2pd (%ecx),%ymm6,%ymm2,%ymm7
-	vpermilmo2ps %ymm4,%ymm6,%ymm2,%ymm7
-	vpermilmo2ps (%ecx),%ymm6,%ymm2,%ymm7
-	vpermilmz2ps %ymm4,%ymm6,%ymm2,%ymm7
-	vpermilmz2ps (%ecx),%ymm6,%ymm2,%ymm7
-	vpermiltd2ps %ymm4,%ymm6,%ymm2,%ymm7
-	vpermiltd2ps (%ecx),%ymm6,%ymm2,%ymm7
-
-# Tests for op imm4, ymm/mem256, ymm, ymm, ymm
-# Tests for op imm4, ymm, ymm/mem256, ymm, ymm
-	vpermil2pd $10,%ymm4,%ymm6,%ymm2,%ymm7
-	vpermil2pd $10,(%ecx),%ymm6,%ymm2,%ymm7
-	vpermil2ps $10,%ymm4,%ymm6,%ymm2,%ymm7
-	vpermil2ps $10,(%ecx),%ymm6,%ymm2,%ymm7
-
 # Tests for op imm8, xmm/mem128, ymm, ymm
-	vinsertf128 $100,%xmm4,%ymm4,%ymm6
-	vinsertf128 $100,(%ecx),%ymm4,%ymm6
+	vinsertf128 $7,%xmm4,%ymm4,%ymm6
+	vinsertf128 $7,(%ecx),%ymm4,%ymm6
 
 # Tests for op imm8, ymm, xmm/mem128
-	vextractf128 $100,%ymm4,%xmm4
-	vextractf128 $100,%ymm4,(%ecx)
+	vextractf128 $7,%ymm4,%xmm4
+	vextractf128 $7,%ymm4,(%ecx)
 
 # Tests for op mem128, ymm
 	vbroadcastf128 (%ecx),%ymm4
@@ -808,58 +762,58 @@ _start:
 	vmaskmovpd (%ecx),%xmm4,%xmm6
 
 # Tests for op imm8, xmm/mem128, xmm
-	vaeskeygenassist $100,%xmm4,%xmm6
-	vaeskeygenassist $100,(%ecx),%xmm6
-	vpcmpestri $100,%xmm4,%xmm6
-	vpcmpestri $100,(%ecx),%xmm6
-	vpcmpestrm $100,%xmm4,%xmm6
-	vpcmpestrm $100,(%ecx),%xmm6
-	vpcmpistri $100,%xmm4,%xmm6
-	vpcmpistri $100,(%ecx),%xmm6
-	vpcmpistrm $100,%xmm4,%xmm6
-	vpcmpistrm $100,(%ecx),%xmm6
-	vpermilpd $100,%xmm4,%xmm6
-	vpermilpd $100,(%ecx),%xmm6
-	vpermilps $100,%xmm4,%xmm6
-	vpermilps $100,(%ecx),%xmm6
-	vpshufd $100,%xmm4,%xmm6
-	vpshufd $100,(%ecx),%xmm6
-	vpshufhw $100,%xmm4,%xmm6
-	vpshufhw $100,(%ecx),%xmm6
-	vpshuflw $100,%xmm4,%xmm6
-	vpshuflw $100,(%ecx),%xmm6
-	vroundpd $100,%xmm4,%xmm6
-	vroundpd $100,(%ecx),%xmm6
-	vroundps $100,%xmm4,%xmm6
-	vroundps $100,(%ecx),%xmm6
+	vaeskeygenassist $7,%xmm4,%xmm6
+	vaeskeygenassist $7,(%ecx),%xmm6
+	vpcmpestri $7,%xmm4,%xmm6
+	vpcmpestri $7,(%ecx),%xmm6
+	vpcmpestrm $7,%xmm4,%xmm6
+	vpcmpestrm $7,(%ecx),%xmm6
+	vpcmpistri $7,%xmm4,%xmm6
+	vpcmpistri $7,(%ecx),%xmm6
+	vpcmpistrm $7,%xmm4,%xmm6
+	vpcmpistrm $7,(%ecx),%xmm6
+	vpermilpd $7,%xmm4,%xmm6
+	vpermilpd $7,(%ecx),%xmm6
+	vpermilps $7,%xmm4,%xmm6
+	vpermilps $7,(%ecx),%xmm6
+	vpshufd $7,%xmm4,%xmm6
+	vpshufd $7,(%ecx),%xmm6
+	vpshufhw $7,%xmm4,%xmm6
+	vpshufhw $7,(%ecx),%xmm6
+	vpshuflw $7,%xmm4,%xmm6
+	vpshuflw $7,(%ecx),%xmm6
+	vroundpd $7,%xmm4,%xmm6
+	vroundpd $7,(%ecx),%xmm6
+	vroundps $7,%xmm4,%xmm6
+	vroundps $7,(%ecx),%xmm6
 
 # Tests for op xmm, xmm, mem128
 	vmaskmovps %xmm4,%xmm6,(%ecx)
 	vmaskmovpd %xmm4,%xmm6,(%ecx)
 
 # Tests for op imm8, xmm/mem128, xmm, xmm
-	vblendpd $100,%xmm4,%xmm6,%xmm2
-	vblendpd $100,(%ecx),%xmm6,%xmm2
-	vblendps $100,%xmm4,%xmm6,%xmm2
-	vblendps $100,(%ecx),%xmm6,%xmm2
-	vcmppd $100,%xmm4,%xmm6,%xmm2
-	vcmppd $100,(%ecx),%xmm6,%xmm2
-	vcmpps $100,%xmm4,%xmm6,%xmm2
-	vcmpps $100,(%ecx),%xmm6,%xmm2
-	vdppd $100,%xmm4,%xmm6,%xmm2
-	vdppd $100,(%ecx),%xmm6,%xmm2
-	vdpps $100,%xmm4,%xmm6,%xmm2
-	vdpps $100,(%ecx),%xmm6,%xmm2
-	vmpsadbw $100,%xmm4,%xmm6,%xmm2
-	vmpsadbw $100,(%ecx),%xmm6,%xmm2
-	vpalignr $100,%xmm4,%xmm6,%xmm2
-	vpalignr $100,(%ecx),%xmm6,%xmm2
-	vpblendw $100,%xmm4,%xmm6,%xmm2
-	vpblendw $100,(%ecx),%xmm6,%xmm2
-	vshufpd $100,%xmm4,%xmm6,%xmm2
-	vshufpd $100,(%ecx),%xmm6,%xmm2
-	vshufps $100,%xmm4,%xmm6,%xmm2
-	vshufps $100,(%ecx),%xmm6,%xmm2
+	vblendpd $7,%xmm4,%xmm6,%xmm2
+	vblendpd $7,(%ecx),%xmm6,%xmm2
+	vblendps $7,%xmm4,%xmm6,%xmm2
+	vblendps $7,(%ecx),%xmm6,%xmm2
+	vcmppd $7,%xmm4,%xmm6,%xmm2
+	vcmppd $7,(%ecx),%xmm6,%xmm2
+	vcmpps $7,%xmm4,%xmm6,%xmm2
+	vcmpps $7,(%ecx),%xmm6,%xmm2
+	vdppd $7,%xmm4,%xmm6,%xmm2
+	vdppd $7,(%ecx),%xmm6,%xmm2
+	vdpps $7,%xmm4,%xmm6,%xmm2
+	vdpps $7,(%ecx),%xmm6,%xmm2
+	vmpsadbw $7,%xmm4,%xmm6,%xmm2
+	vmpsadbw $7,(%ecx),%xmm6,%xmm2
+	vpalignr $7,%xmm4,%xmm6,%xmm2
+	vpalignr $7,(%ecx),%xmm6,%xmm2
+	vpblendw $7,%xmm4,%xmm6,%xmm2
+	vpblendw $7,(%ecx),%xmm6,%xmm2
+	vshufpd $7,%xmm4,%xmm6,%xmm2
+	vshufpd $7,(%ecx),%xmm6,%xmm2
+	vshufps $7,%xmm4,%xmm6,%xmm2
+	vshufps $7,(%ecx),%xmm6,%xmm2
 
 # Tests for op xmm, xmm/mem128, xmm, xmm
 	vblendvpd %xmm4,%xmm6,%xmm2,%xmm7
@@ -869,72 +823,6 @@ _start:
 	vpblendvb %xmm4,%xmm6,%xmm2,%xmm7
 	vpblendvb %xmm4,(%ecx),%xmm2,%xmm7
 
-# Tests for op xmm/mem128, xmm, xmm, xmm
-# Tests for op xmm, xmm/mem128, xmm, xmm
-	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-	vfmaddpd (%ecx),%xmm6,%xmm2,%xmm7
-	vfmaddpd %xmm4,(%ecx),%xmm2,%xmm7
-	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
-	vfmaddps (%ecx),%xmm6,%xmm2,%xmm7
-	vfmaddps %xmm4,(%ecx),%xmm2,%xmm7
-	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
-	vfmaddsubpd (%ecx),%xmm6,%xmm2,%xmm7
-	vfmaddsubpd %xmm4,(%ecx),%xmm2,%xmm7
-	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
-	vfmaddsubps (%ecx),%xmm6,%xmm2,%xmm7
-	vfmaddsubps %xmm4,(%ecx),%xmm2,%xmm7
-	vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
-	vfmsubaddpd (%ecx),%xmm6,%xmm2,%xmm7
-	vfmsubaddpd %xmm4,(%ecx),%xmm2,%xmm7
-	vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
-	vfmsubaddps (%ecx),%xmm6,%xmm2,%xmm7
-	vfmsubaddps %xmm4,(%ecx),%xmm2,%xmm7
-	vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-	vfmsubpd (%ecx),%xmm6,%xmm2,%xmm7
-	vfmsubpd %xmm4,(%ecx),%xmm2,%xmm7
-	vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
-	vfmsubps (%ecx),%xmm6,%xmm2,%xmm7
-	vfmsubps %xmm4,(%ecx),%xmm2,%xmm7
-	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmaddpd (%ecx),%xmm6,%xmm2,%xmm7
-	vfnmaddpd %xmm4,(%ecx),%xmm2,%xmm7
-	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmaddps (%ecx),%xmm6,%xmm2,%xmm7
-	vfnmaddps %xmm4,(%ecx),%xmm2,%xmm7
-	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmsubpd (%ecx),%xmm6,%xmm2,%xmm7
-	vfnmsubpd %xmm4,(%ecx),%xmm2,%xmm7
-	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmsubps (%ecx),%xmm6,%xmm2,%xmm7
-	vfnmsubps %xmm4,(%ecx),%xmm2,%xmm7
-	vpermilmo2pd %xmm4,%xmm6,%xmm2,%xmm7
-	vpermilmo2pd (%ecx),%xmm6,%xmm2,%xmm7
-	vpermilmo2pd %xmm4,(%ecx),%xmm2,%xmm7
-	vpermilmz2pd %xmm4,%xmm6,%xmm2,%xmm7
-	vpermilmz2pd (%ecx),%xmm6,%xmm2,%xmm7
-	vpermilmz2pd %xmm4,(%ecx),%xmm2,%xmm7
-	vpermiltd2pd %xmm4,%xmm6,%xmm2,%xmm7
-	vpermiltd2pd (%ecx),%xmm6,%xmm2,%xmm7
-	vpermiltd2pd %xmm4,(%ecx),%xmm2,%xmm7
-	vpermilmo2ps %xmm4,%xmm6,%xmm2,%xmm7
-	vpermilmo2ps (%ecx),%xmm6,%xmm2,%xmm7
-	vpermilmo2ps %xmm4,(%ecx),%xmm2,%xmm7
-	vpermilmz2ps %xmm4,%xmm6,%xmm2,%xmm7
-	vpermilmz2ps (%ecx),%xmm6,%xmm2,%xmm7
-	vpermilmz2ps %xmm4,(%ecx),%xmm2,%xmm7
-	vpermiltd2ps %xmm4,%xmm6,%xmm2,%xmm7
-	vpermiltd2ps (%ecx),%xmm6,%xmm2,%xmm7
-	vpermiltd2ps %xmm4,(%ecx),%xmm2,%xmm7
-
-# Tests for op imm4, xmm/mem128, xmm, xmm, xmm
-# Tests for op imm4, xmm, xmm/mem128, xmm, xmm
-	vpermil2pd $10,%xmm4,%xmm6,%xmm2,%xmm7
-	vpermil2pd $10,(%ecx),%xmm6,%xmm2,%xmm7
-	vpermil2pd $10,%xmm4,(%ecx),%xmm2,%xmm7
-	vpermil2ps $10,%xmm4,%xmm6,%xmm2,%xmm7
-	vpermil2ps $10,(%ecx),%xmm6,%xmm2,%xmm7
-	vpermil2ps $10,%xmm4,(%ecx),%xmm2,%xmm7
-
 # Tests for op mem64, ymm
 	vbroadcastsd (%ecx),%ymm4
 
@@ -990,25 +878,10 @@ _start:
 	vmovhps (%ecx),%xmm4,%xmm6
 
 # Tests for op imm8, xmm/mem64, xmm, xmm
-	vcmpsd $100,%xmm4,%xmm6,%xmm2
-	vcmpsd $100,(%ecx),%xmm6,%xmm2
-	vroundsd $100,%xmm4,%xmm6,%xmm2
-	vroundsd $100,(%ecx),%xmm6,%xmm2
-
-# Tests for op xmm/mem64, xmm, xmm, xmm
-# Tests for op xmm, xmm/mem64, xmm, xmm
-	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-	vfmaddsd (%ecx),%xmm6,%xmm2,%xmm7
-	vfmaddsd %xmm4,(%ecx),%xmm2,%xmm7
-	vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-	vfmsubsd (%ecx),%xmm6,%xmm2,%xmm7
-	vfmsubsd %xmm4,(%ecx),%xmm2,%xmm7
-	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmaddsd (%ecx),%xmm6,%xmm2,%xmm7
-	vfnmaddsd %xmm4,(%ecx),%xmm2,%xmm7
-	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmsubsd (%ecx),%xmm6,%xmm2,%xmm7
-	vfnmsubsd %xmm4,(%ecx),%xmm2,%xmm7
+	vcmpsd $7,%xmm4,%xmm6,%xmm2
+	vcmpsd $7,(%ecx),%xmm6,%xmm2
+	vroundsd $7,%xmm4,%xmm6,%xmm2
+	vroundsd $7,(%ecx),%xmm6,%xmm2
 
 # Tests for op xmm/mem64, xmm, xmm
 	vaddsd %xmm4,%xmm6,%xmm2
@@ -1092,6 +965,10 @@ _start:
 	vcmptrue_ussd %xmm4,%xmm6,%xmm2
 	vcmptrue_ussd (%ecx),%xmm6,%xmm2
 
+# Tests for op mem64
+	vldmxcsr (%ecx)
+	vstmxcsr (%ecx)
+
 # Tests for op xmm/mem32, xmm, xmm
 	vaddss %xmm4,%xmm6,%xmm2
 	vaddss (%ecx),%xmm6,%xmm2
@@ -1216,12 +1093,13 @@ _start:
 	vcvttss2si (%ecx),%ecx
 
 # Tests for op imm8, xmm, regq/mem32
-	vextractps $100,%xmm4,(%ecx)
+	vextractps $7,%xmm4,(%ecx)
+
 # Tests for op imm8, xmm, regl/mem32
-	vpextrd $100,%xmm4,%ecx
-	vpextrd $100,%xmm4,(%ecx)
-	vextractps $100,%xmm4,%ecx
-	vextractps $100,%xmm4,(%ecx)
+	vpextrd $7,%xmm4,%ecx
+	vpextrd $7,%xmm4,(%ecx)
+	vextractps $7,%xmm4,%ecx
+	vextractps $7,%xmm4,(%ecx)
 
 # Tests for op regl/mem32, xmm, xmm
 	vcvtsi2sd %ecx,%xmm4,%xmm6
@@ -1230,27 +1108,12 @@ _start:
 	vcvtsi2ss (%ecx),%xmm4,%xmm6
 
 # Tests for op imm8, xmm/mem32, xmm, xmm
-	vcmpss $100,%xmm4,%xmm6,%xmm2
-	vcmpss $100,(%ecx),%xmm6,%xmm2
-	vinsertps $100,%xmm4,%xmm6,%xmm2
-	vinsertps $100,(%ecx),%xmm6,%xmm2
-	vroundss $100,%xmm4,%xmm6,%xmm2
-	vroundss $100,(%ecx),%xmm6,%xmm2
-
-# Tests for op xmm/mem32, xmm, xmm, xmm
-# Tests for op xmm, xmm/mem32, xmm, xmm
-	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
-	vfmaddss (%ecx),%xmm6,%xmm2,%xmm7
-	vfmaddss %xmm4,(%ecx),%xmm2,%xmm7
-	vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
-	vfmsubss (%ecx),%xmm6,%xmm2,%xmm7
-	vfmsubss %xmm4,(%ecx),%xmm2,%xmm7
-	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmaddss (%ecx),%xmm6,%xmm2,%xmm7
-	vfnmaddss %xmm4,(%ecx),%xmm2,%xmm7
-	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmsubss (%ecx),%xmm6,%xmm2,%xmm7
-	vfnmsubss %xmm4,(%ecx),%xmm2,%xmm7
+	vcmpss $7,%xmm4,%xmm6,%xmm2
+	vcmpss $7,(%ecx),%xmm6,%xmm2
+	vinsertps $7,%xmm4,%xmm6,%xmm2
+	vinsertps $7,(%ecx),%xmm6,%xmm2
+	vroundss $7,%xmm4,%xmm6,%xmm2
+	vroundss $7,(%ecx),%xmm6,%xmm2
 
 # Tests for op xmm/m16, xmm
 	vpmovsxbq %xmm4,%xmm6
@@ -1259,31 +1122,30 @@ _start:
 	vpmovzxbq (%ecx),%xmm4
 
 # Tests for op imm8, xmm, regl/mem16
-	vpextrw $100,%xmm4,%ecx
-	vpextrw $100,%xmm4,(%ecx)
+	vpextrw $7,%xmm4,%ecx
+	vpextrw $7,%xmm4,(%ecx)
 
 # Tests for op imm8, xmm, regq/mem16
-	vpextrw $100,%xmm4,(%ecx)
+	vpextrw $7,%xmm4,(%ecx)
 
 # Tests for op imm8, regl/mem16, xmm, xmm
-	vpinsrw $100,%ecx,%xmm4,%xmm6
-	vpinsrw $100,(%ecx),%xmm4,%xmm6
-
+	vpinsrw $7,%ecx,%xmm4,%xmm6
+	vpinsrw $7,(%ecx),%xmm4,%xmm6
 
 # Tests for op imm8, xmm, regl/mem8
-	vpextrb $100,%xmm4,%ecx
-	vpextrb $100,%xmm4,(%ecx)
+	vpextrb $7,%xmm4,%ecx
+	vpextrb $7,%xmm4,(%ecx)
 
 # Tests for op imm8, regl/mem8, xmm, xmm
-	vpinsrb $100,%ecx,%xmm4,%xmm6
-	vpinsrb $100,(%ecx),%xmm4,%xmm6
+	vpinsrb $7,%ecx,%xmm4,%xmm6
+	vpinsrb $7,(%ecx),%xmm4,%xmm6
 
 # Tests for op imm8, xmm, regq/mem8
-	vpextrb $100,%xmm4,(%ecx)
+	vpextrb $7,%xmm4,(%ecx)
 
 # Tests for op imm8, regl/mem8, xmm, xmm
-	vpinsrb $100,%ecx,%xmm4,%xmm6
-	vpinsrb $100,(%ecx),%xmm4,%xmm6
+	vpinsrb $7,%ecx,%xmm4,%xmm6
+	vpinsrb $7,(%ecx),%xmm4,%xmm6
 
 # Tests for op xmm, xmm
 	vmaskmovdqu %xmm4,%xmm6
@@ -1293,6 +1155,7 @@ _start:
 	vmovmskpd %xmm4,%ecx
 	vmovmskps %xmm4,%ecx
 	vpmovmskb %xmm4,%ecx
+
 # Tests for op xmm, xmm, xmm
 	vmovhlps %xmm4,%xmm6,%xmm2
 	vmovlhps %xmm4,%xmm6,%xmm2
@@ -1300,25 +1163,24 @@ _start:
 	vmovss %xmm4,%xmm6,%xmm2
 
 # Tests for op imm8, xmm, xmm
-	vpslld $100,%xmm4,%xmm6
-	vpslldq $100,%xmm4,%xmm6
-	vpsllq $100,%xmm4,%xmm6
-	vpsllw $100,%xmm4,%xmm6
-	vpsrad $100,%xmm4,%xmm6
-	vpsraw $100,%xmm4,%xmm6
-	vpsrld $100,%xmm4,%xmm6
-	vpsrldq $100,%xmm4,%xmm6
-	vpsrlq $100,%xmm4,%xmm6
-	vpsrlw $100,%xmm4,%xmm6
+	vpslld $7,%xmm4,%xmm6
+	vpslldq $7,%xmm4,%xmm6
+	vpsllq $7,%xmm4,%xmm6
+	vpsllw $7,%xmm4,%xmm6
+	vpsrad $7,%xmm4,%xmm6
+	vpsraw $7,%xmm4,%xmm6
+	vpsrld $7,%xmm4,%xmm6
+	vpsrldq $7,%xmm4,%xmm6
+	vpsrlq $7,%xmm4,%xmm6
+	vpsrlw $7,%xmm4,%xmm6
 
 # Tests for op imm8, xmm, regl
-	vpextrw $100,%xmm4,%ecx
+	vpextrw $7,%xmm4,%ecx
 
 # Tests for op ymm, regl
 	vmovmskpd %ymm4,%ecx
 	vmovmskps %ymm4,%ecx
 
-
 # Default instructions without suffixes.
 	vcvtpd2dq %xmm4,%xmm6
 	vcvtpd2dq %ymm4,%xmm6
@@ -1336,17 +1198,17 @@ _start:
 	vcvtdq2pd 0x1234,%ymm0
 	vcvtpd2psy 0x1234,%xmm0
 	vpavgb 0x1234,%xmm0,%xmm7
-	vaeskeygenassist $100,0x1234,%xmm0
-	vpextrb $100,%xmm0,0x1234
+	vaeskeygenassist $7,0x1234,%xmm0
+	vpextrb $7,%xmm0,0x1234
 	vcvtsi2sdl 0x1234,%xmm0,%xmm7
 	vblendvps %xmm0,0x1234,%xmm4,%xmm6
-	vpinsrb $100,0x1234,%xmm0,%xmm7
+	vpinsrb $7,0x1234,%xmm0,%xmm7
 	vmovdqa 0x1234,%ymm0
 	vmovdqa %ymm0,0x1234
 	vpermilpd 0x1234,%ymm0,%ymm7
-	vroundpd $100,0x1234,%ymm0
-	vextractf128 $100,%ymm0,0x1234
-	vperm2f128 $100,0x1234,%ymm0,%ymm7
+	vroundpd $7,0x1234,%ymm0
+	vextractf128 $7,%ymm0,0x1234
+	vperm2f128 $7,0x1234,%ymm0,%ymm7
 	vblendvpd %ymm0,0x1234,%ymm4,%ymm6
 	vldmxcsr (%ebp)
 	vmovdqa (%ebp),%xmm0
@@ -1356,17 +1218,17 @@ _start:
 	vcvtdq2pd (%ebp),%ymm0
 	vcvtpd2psy (%ebp),%xmm0
 	vpavgb (%ebp),%xmm0,%xmm7
-	vaeskeygenassist $100,(%ebp),%xmm0
-	vpextrb $100,%xmm0,(%ebp)
+	vaeskeygenassist $7,(%ebp),%xmm0
+	vpextrb $7,%xmm0,(%ebp)
 	vcvtsi2sdl (%ebp),%xmm0,%xmm7
 	vblendvps %xmm0,(%ebp),%xmm4,%xmm6
-	vpinsrb $100,(%ebp),%xmm0,%xmm7
+	vpinsrb $7,(%ebp),%xmm0,%xmm7
 	vmovdqa (%ebp),%ymm0
 	vmovdqa %ymm0,(%ebp)
 	vpermilpd (%ebp),%ymm0,%ymm7
-	vroundpd $100,(%ebp),%ymm0
-	vextractf128 $100,%ymm0,(%ebp)
-	vperm2f128 $100,(%ebp),%ymm0,%ymm7
+	vroundpd $7,(%ebp),%ymm0
+	vextractf128 $7,%ymm0,(%ebp)
+	vperm2f128 $7,(%ebp),%ymm0,%ymm7
 	vblendvpd %ymm0,(%ebp),%ymm4,%ymm6
 	vldmxcsr (%esp)
 	vmovdqa (%esp),%xmm0
@@ -1376,17 +1238,17 @@ _start:
 	vcvtdq2pd (%esp),%ymm0
 	vcvtpd2psy (%esp),%xmm0
 	vpavgb (%esp),%xmm0,%xmm7
-	vaeskeygenassist $100,(%esp),%xmm0
-	vpextrb $100,%xmm0,(%esp)
+	vaeskeygenassist $7,(%esp),%xmm0
+	vpextrb $7,%xmm0,(%esp)
 	vcvtsi2sdl (%esp),%xmm0,%xmm7
 	vblendvps %xmm0,(%esp),%xmm4,%xmm6
-	vpinsrb $100,(%esp),%xmm0,%xmm7
+	vpinsrb $7,(%esp),%xmm0,%xmm7
 	vmovdqa (%esp),%ymm0
 	vmovdqa %ymm0,(%esp)
 	vpermilpd (%esp),%ymm0,%ymm7
-	vroundpd $100,(%esp),%ymm0
-	vextractf128 $100,%ymm0,(%esp)
-	vperm2f128 $100,(%esp),%ymm0,%ymm7
+	vroundpd $7,(%esp),%ymm0
+	vextractf128 $7,%ymm0,(%esp)
+	vperm2f128 $7,(%esp),%ymm0,%ymm7
 	vblendvpd %ymm0,(%esp),%ymm4,%ymm6
 	vldmxcsr 0x99(%ebp)
 	vmovdqa 0x99(%ebp),%xmm0
@@ -1396,17 +1258,17 @@ _start:
 	vcvtdq2pd 0x99(%ebp),%ymm0
 	vcvtpd2psy 0x99(%ebp),%xmm0
 	vpavgb 0x99(%ebp),%xmm0,%xmm7
-	vaeskeygenassist $100,0x99(%ebp),%xmm0
-	vpextrb $100,%xmm0,0x99(%ebp)
+	vaeskeygenassist $7,0x99(%ebp),%xmm0
+	vpextrb $7,%xmm0,0x99(%ebp)
 	vcvtsi2sdl 0x99(%ebp),%xmm0,%xmm7
 	vblendvps %xmm0,0x99(%ebp),%xmm4,%xmm6
-	vpinsrb $100,0x99(%ebp),%xmm0,%xmm7
+	vpinsrb $7,0x99(%ebp),%xmm0,%xmm7
 	vmovdqa 0x99(%ebp),%ymm0
 	vmovdqa %ymm0,0x99(%ebp)
 	vpermilpd 0x99(%ebp),%ymm0,%ymm7
-	vroundpd $100,0x99(%ebp),%ymm0
-	vextractf128 $100,%ymm0,0x99(%ebp)
-	vperm2f128 $100,0x99(%ebp),%ymm0,%ymm7
+	vroundpd $7,0x99(%ebp),%ymm0
+	vextractf128 $7,%ymm0,0x99(%ebp)
+	vperm2f128 $7,0x99(%ebp),%ymm0,%ymm7
 	vblendvpd %ymm0,0x99(%ebp),%ymm4,%ymm6
 	vldmxcsr 0x99(,%eiz)
 	vmovdqa 0x99(,%eiz),%xmm0
@@ -1416,17 +1278,17 @@ _start:
 	vcvtdq2pd 0x99(,%eiz),%ymm0
 	vcvtpd2psy 0x99(,%eiz),%xmm0
 	vpavgb 0x99(,%eiz),%xmm0,%xmm7
-	vaeskeygenassist $100,0x99(,%eiz),%xmm0
-	vpextrb $100,%xmm0,0x99(,%eiz)
+	vaeskeygenassist $7,0x99(,%eiz),%xmm0
+	vpextrb $7,%xmm0,0x99(,%eiz)
 	vcvtsi2sdl 0x99(,%eiz),%xmm0,%xmm7
 	vblendvps %xmm0,0x99(,%eiz),%xmm4,%xmm6
-	vpinsrb $100,0x99(,%eiz),%xmm0,%xmm7
+	vpinsrb $7,0x99(,%eiz),%xmm0,%xmm7
 	vmovdqa 0x99(,%eiz),%ymm0
 	vmovdqa %ymm0,0x99(,%eiz)
 	vpermilpd 0x99(,%eiz),%ymm0,%ymm7
-	vroundpd $100,0x99(,%eiz),%ymm0
-	vextractf128 $100,%ymm0,0x99(,%eiz)
-	vperm2f128 $100,0x99(,%eiz),%ymm0,%ymm7
+	vroundpd $7,0x99(,%eiz),%ymm0
+	vextractf128 $7,%ymm0,0x99(,%eiz)
+	vperm2f128 $7,0x99(,%eiz),%ymm0,%ymm7
 	vblendvpd %ymm0,0x99(,%eiz),%ymm4,%ymm6
 	vldmxcsr 0x99(,%eiz,2)
 	vmovdqa 0x99(,%eiz,2),%xmm0
@@ -1436,17 +1298,17 @@ _start:
 	vcvtdq2pd 0x99(,%eiz,2),%ymm0
 	vcvtpd2psy 0x99(,%eiz,2),%xmm0
 	vpavgb 0x99(,%eiz,2),%xmm0,%xmm7
-	vaeskeygenassist $100,0x99(,%eiz,2),%xmm0
-	vpextrb $100,%xmm0,0x99(,%eiz,2)
+	vaeskeygenassist $7,0x99(,%eiz,2),%xmm0
+	vpextrb $7,%xmm0,0x99(,%eiz,2)
 	vcvtsi2sdl 0x99(,%eiz,2),%xmm0,%xmm7
 	vblendvps %xmm0,0x99(,%eiz,2),%xmm4,%xmm6
-	vpinsrb $100,0x99(,%eiz,2),%xmm0,%xmm7
+	vpinsrb $7,0x99(,%eiz,2),%xmm0,%xmm7
 	vmovdqa 0x99(,%eiz,2),%ymm0
 	vmovdqa %ymm0,0x99(,%eiz,2)
 	vpermilpd 0x99(,%eiz,2),%ymm0,%ymm7
-	vroundpd $100,0x99(,%eiz,2),%ymm0
-	vextractf128 $100,%ymm0,0x99(,%eiz,2)
-	vperm2f128 $100,0x99(,%eiz,2),%ymm0,%ymm7
+	vroundpd $7,0x99(,%eiz,2),%ymm0
+	vextractf128 $7,%ymm0,0x99(,%eiz,2)
+	vperm2f128 $7,0x99(,%eiz,2),%ymm0,%ymm7
 	vblendvpd %ymm0,0x99(,%eiz,2),%ymm4,%ymm6
 	vldmxcsr 0x99(%eax,%eiz)
 	vmovdqa 0x99(%eax,%eiz),%xmm0
@@ -1456,17 +1318,17 @@ _start:
 	vcvtdq2pd 0x99(%eax,%eiz),%ymm0
 	vcvtpd2psy 0x99(%eax,%eiz),%xmm0
 	vpavgb 0x99(%eax,%eiz),%xmm0,%xmm7
-	vaeskeygenassist $100,0x99(%eax,%eiz),%xmm0
-	vpextrb $100,%xmm0,0x99(%eax,%eiz)
+	vaeskeygenassist $7,0x99(%eax,%eiz),%xmm0
+	vpextrb $7,%xmm0,0x99(%eax,%eiz)
 	vcvtsi2sdl 0x99(%eax,%eiz),%xmm0,%xmm7
 	vblendvps %xmm0,0x99(%eax,%eiz),%xmm4,%xmm6
-	vpinsrb $100,0x99(%eax,%eiz),%xmm0,%xmm7
+	vpinsrb $7,0x99(%eax,%eiz),%xmm0,%xmm7
 	vmovdqa 0x99(%eax,%eiz),%ymm0
 	vmovdqa %ymm0,0x99(%eax,%eiz)
 	vpermilpd 0x99(%eax,%eiz),%ymm0,%ymm7
-	vroundpd $100,0x99(%eax,%eiz),%ymm0
-	vextractf128 $100,%ymm0,0x99(%eax,%eiz)
-	vperm2f128 $100,0x99(%eax,%eiz),%ymm0,%ymm7
+	vroundpd $7,0x99(%eax,%eiz),%ymm0
+	vextractf128 $7,%ymm0,0x99(%eax,%eiz)
+	vperm2f128 $7,0x99(%eax,%eiz),%ymm0,%ymm7
 	vblendvpd %ymm0,0x99(%eax,%eiz),%ymm4,%ymm6
 	vldmxcsr 0x99(%eax,%eiz,2)
 	vmovdqa 0x99(%eax,%eiz,2),%xmm0
@@ -1476,17 +1338,17 @@ _start:
 	vcvtdq2pd 0x99(%eax,%eiz,2),%ymm0
 	vcvtpd2psy 0x99(%eax,%eiz,2),%xmm0
 	vpavgb 0x99(%eax,%eiz,2),%xmm0,%xmm7
-	vaeskeygenassist $100,0x99(%eax,%eiz,2),%xmm0
-	vpextrb $100,%xmm0,0x99(%eax,%eiz,2)
+	vaeskeygenassist $7,0x99(%eax,%eiz,2),%xmm0
+	vpextrb $7,%xmm0,0x99(%eax,%eiz,2)
 	vcvtsi2sdl 0x99(%eax,%eiz,2),%xmm0,%xmm7
 	vblendvps %xmm0,0x99(%eax,%eiz,2),%xmm4,%xmm6
-	vpinsrb $100,0x99(%eax,%eiz,2),%xmm0,%xmm7
+	vpinsrb $7,0x99(%eax,%eiz,2),%xmm0,%xmm7
 	vmovdqa 0x99(%eax,%eiz,2),%ymm0
 	vmovdqa %ymm0,0x99(%eax,%eiz,2)
 	vpermilpd 0x99(%eax,%eiz,2),%ymm0,%ymm7
-	vroundpd $100,0x99(%eax,%eiz,2),%ymm0
-	vextractf128 $100,%ymm0,0x99(%eax,%eiz,2)
-	vperm2f128 $100,0x99(%eax,%eiz,2),%ymm0,%ymm7
+	vroundpd $7,0x99(%eax,%eiz,2),%ymm0
+	vextractf128 $7,%ymm0,0x99(%eax,%eiz,2)
+	vperm2f128 $7,0x99(%eax,%eiz,2),%ymm0,%ymm7
 	vblendvpd %ymm0,0x99(%eax,%eiz,2),%ymm4,%ymm6
 	vldmxcsr 0x99(%eax,%ebx,4)
 	vmovdqa 0x99(%eax,%ebx,4),%xmm0
@@ -1496,17 +1358,17 @@ _start:
 	vcvtdq2pd 0x99(%eax,%ebx,4),%ymm0
 	vcvtpd2psy 0x99(%eax,%ebx,4),%xmm0
 	vpavgb 0x99(%eax,%ebx,4),%xmm0,%xmm7
-	vaeskeygenassist $100,0x99(%eax,%ebx,4),%xmm0
-	vpextrb $100,%xmm0,0x99(%eax,%ebx,4)
+	vaeskeygenassist $7,0x99(%eax,%ebx,4),%xmm0
+	vpextrb $7,%xmm0,0x99(%eax,%ebx,4)
 	vcvtsi2sdl 0x99(%eax,%ebx,4),%xmm0,%xmm7
 	vblendvps %xmm0,0x99(%eax,%ebx,4),%xmm4,%xmm6
-	vpinsrb $100,0x99(%eax,%ebx,4),%xmm0,%xmm7
+	vpinsrb $7,0x99(%eax,%ebx,4),%xmm0,%xmm7
 	vmovdqa 0x99(%eax,%ebx,4),%ymm0
 	vmovdqa %ymm0,0x99(%eax,%ebx,4)
 	vpermilpd 0x99(%eax,%ebx,4),%ymm0,%ymm7
-	vroundpd $100,0x99(%eax,%ebx,4),%ymm0
-	vextractf128 $100,%ymm0,0x99(%eax,%ebx,4)
-	vperm2f128 $100,0x99(%eax,%ebx,4),%ymm0,%ymm7
+	vroundpd $7,0x99(%eax,%ebx,4),%ymm0
+	vextractf128 $7,%ymm0,0x99(%eax,%ebx,4)
+	vperm2f128 $7,0x99(%eax,%ebx,4),%ymm0,%ymm7
 	vblendvpd %ymm0,0x99(%eax,%ebx,4),%ymm4,%ymm6
 	vldmxcsr 0x99(%esp,%ecx,8)
 	vmovdqa 0x99(%esp,%ecx,8),%xmm0
@@ -1516,17 +1378,17 @@ _start:
 	vcvtdq2pd 0x99(%esp,%ecx,8),%ymm0
 	vcvtpd2psy 0x99(%esp,%ecx,8),%xmm0
 	vpavgb 0x99(%esp,%ecx,8),%xmm0,%xmm7
-	vaeskeygenassist $100,0x99(%esp,%ecx,8),%xmm0
-	vpextrb $100,%xmm0,0x99(%esp,%ecx,8)
+	vaeskeygenassist $7,0x99(%esp,%ecx,8),%xmm0
+	vpextrb $7,%xmm0,0x99(%esp,%ecx,8)
 	vcvtsi2sdl 0x99(%esp,%ecx,8),%xmm0,%xmm7
 	vblendvps %xmm0,0x99(%esp,%ecx,8),%xmm4,%xmm6
-	vpinsrb $100,0x99(%esp,%ecx,8),%xmm0,%xmm7
+	vpinsrb $7,0x99(%esp,%ecx,8),%xmm0,%xmm7
 	vmovdqa 0x99(%esp,%ecx,8),%ymm0
 	vmovdqa %ymm0,0x99(%esp,%ecx,8)
 	vpermilpd 0x99(%esp,%ecx,8),%ymm0,%ymm7
-	vroundpd $100,0x99(%esp,%ecx,8),%ymm0
-	vextractf128 $100,%ymm0,0x99(%esp,%ecx,8)
-	vperm2f128 $100,0x99(%esp,%ecx,8),%ymm0,%ymm7
+	vroundpd $7,0x99(%esp,%ecx,8),%ymm0
+	vextractf128 $7,%ymm0,0x99(%esp,%ecx,8)
+	vperm2f128 $7,0x99(%esp,%ecx,8),%ymm0,%ymm7
 	vblendvpd %ymm0,0x99(%esp,%ecx,8),%ymm4,%ymm6
 	vldmxcsr 0x99(%ebp,%edx,1)
 	vmovdqa 0x99(%ebp,%edx,1),%xmm0
@@ -1536,24 +1398,25 @@ _start:
 	vcvtdq2pd 0x99(%ebp,%edx,1),%ymm0
 	vcvtpd2psy 0x99(%ebp,%edx,1),%xmm0
 	vpavgb 0x99(%ebp,%edx,1),%xmm0,%xmm7
-	vaeskeygenassist $100,0x99(%ebp,%edx,1),%xmm0
-	vpextrb $100,%xmm0,0x99(%ebp,%edx,1)
+	vaeskeygenassist $7,0x99(%ebp,%edx,1),%xmm0
+	vpextrb $7,%xmm0,0x99(%ebp,%edx,1)
 	vcvtsi2sdl 0x99(%ebp,%edx,1),%xmm0,%xmm7
 	vblendvps %xmm0,0x99(%ebp,%edx,1),%xmm4,%xmm6
-	vpinsrb $100,0x99(%ebp,%edx,1),%xmm0,%xmm7
+	vpinsrb $7,0x99(%ebp,%edx,1),%xmm0,%xmm7
 	vmovdqa 0x99(%ebp,%edx,1),%ymm0
 	vmovdqa %ymm0,0x99(%ebp,%edx,1)
 	vpermilpd 0x99(%ebp,%edx,1),%ymm0,%ymm7
-	vroundpd $100,0x99(%ebp,%edx,1),%ymm0
-	vextractf128 $100,%ymm0,0x99(%ebp,%edx,1)
-	vperm2f128 $100,0x99(%ebp,%edx,1),%ymm0,%ymm7
+	vroundpd $7,0x99(%ebp,%edx,1),%ymm0
+	vextractf128 $7,%ymm0,0x99(%ebp,%edx,1)
+	vperm2f128 $7,0x99(%ebp,%edx,1),%ymm0,%ymm7
 	vblendvpd %ymm0,0x99(%ebp,%edx,1),%ymm4,%ymm6
 # Tests for all register operands.
 	vmovmskpd %xmm0,%eax
-	vpslld $100,%xmm0,%xmm7
+	vpslld $7,%xmm0,%xmm7
 	vmovmskps %ymm0,%eax
 
 	.intel_syntax noprefix
+
 # Tests for op mem64
 	vldmxcsr DWORD PTR [ecx]
 	vldmxcsr [ecx]
@@ -1572,18 +1435,18 @@ _start:
 	vmaskmovps [ecx],ymm6,ymm4
 
 # Tests for op imm8, ymm/mem256, ymm
-	vpermilpd ymm2,ymm6,100
-	vpermilpd ymm6,YMMWORD PTR [ecx],100
-	vpermilpd ymm6,[ecx],100
-	vpermilps ymm2,ymm6,100
-	vpermilps ymm6,YMMWORD PTR [ecx],100
-	vpermilps ymm6,[ecx],100
-	vroundpd ymm2,ymm6,100
-	vroundpd ymm6,YMMWORD PTR [ecx],100
-	vroundpd ymm6,[ecx],100
-	vroundps ymm2,ymm6,100
-	vroundps ymm6,YMMWORD PTR [ecx],100
-	vroundps ymm6,[ecx],100
+	vpermilpd ymm2,ymm6,7
+	vpermilpd ymm6,YMMWORD PTR [ecx],7
+	vpermilpd ymm6,[ecx],7
+	vpermilps ymm2,ymm6,7
+	vpermilps ymm6,YMMWORD PTR [ecx],7
+	vpermilps ymm6,[ecx],7
+	vroundpd ymm2,ymm6,7
+	vroundpd ymm6,YMMWORD PTR [ecx],7
+	vroundpd ymm6,[ecx],7
+	vroundps ymm2,ymm6,7
+	vroundps ymm6,YMMWORD PTR [ecx],7
+	vroundps ymm6,[ecx],7
 
 # Tests for op ymm/mem256, ymm, ymm
 	vaddpd ymm2,ymm6,ymm4
@@ -1884,61 +1747,61 @@ _start:
 	vcvttpd2dq xmm4,YMMWORD PTR [ecx]
 
 # Tests for op ymm/mem256, ymm
-	vcvtdq2ps ymm4,ymm4
+	vcvtdq2ps ymm6,ymm4
 	vcvtdq2ps ymm4,YMMWORD PTR [ecx]
 	vcvtdq2ps ymm4,[ecx]
-	vcvtps2dq ymm4,ymm4
+	vcvtps2dq ymm6,ymm4
 	vcvtps2dq ymm4,YMMWORD PTR [ecx]
 	vcvtps2dq ymm4,[ecx]
-	vcvttps2dq ymm4,ymm4
+	vcvttps2dq ymm6,ymm4
 	vcvttps2dq ymm4,YMMWORD PTR [ecx]
 	vcvttps2dq ymm4,[ecx]
-	vmovapd ymm4,ymm4
+	vmovapd ymm6,ymm4
 	vmovapd ymm4,YMMWORD PTR [ecx]
 	vmovapd ymm4,[ecx]
-	vmovaps ymm4,ymm4
+	vmovaps ymm6,ymm4
 	vmovaps ymm4,YMMWORD PTR [ecx]
 	vmovaps ymm4,[ecx]
-	vmovdqa ymm4,ymm4
+	vmovdqa ymm6,ymm4
 	vmovdqa ymm4,YMMWORD PTR [ecx]
 	vmovdqa ymm4,[ecx]
-	vmovdqu ymm4,ymm4
+	vmovdqu ymm6,ymm4
 	vmovdqu ymm4,YMMWORD PTR [ecx]
 	vmovdqu ymm4,[ecx]
-	vmovddup ymm4,ymm4
+	vmovddup ymm6,ymm4
 	vmovddup ymm4,YMMWORD PTR [ecx]
 	vmovddup ymm4,[ecx]
-	vmovshdup ymm4,ymm4
+	vmovshdup ymm6,ymm4
 	vmovshdup ymm4,YMMWORD PTR [ecx]
 	vmovshdup ymm4,[ecx]
-	vmovsldup ymm4,ymm4
+	vmovsldup ymm6,ymm4
 	vmovsldup ymm4,YMMWORD PTR [ecx]
 	vmovsldup ymm4,[ecx]
-	vmovupd ymm4,ymm4
+	vmovupd ymm6,ymm4
 	vmovupd ymm4,YMMWORD PTR [ecx]
 	vmovupd ymm4,[ecx]
-	vmovups ymm4,ymm4
+	vmovups ymm6,ymm4
 	vmovups ymm4,YMMWORD PTR [ecx]
 	vmovups ymm4,[ecx]
-	vptest ymm4,ymm4
+	vptest ymm6,ymm4
 	vptest ymm4,YMMWORD PTR [ecx]
 	vptest ymm4,[ecx]
-	vrcpps ymm4,ymm4
+	vrcpps ymm6,ymm4
 	vrcpps ymm4,YMMWORD PTR [ecx]
 	vrcpps ymm4,[ecx]
-	vrsqrtps ymm4,ymm4
+	vrsqrtps ymm6,ymm4
 	vrsqrtps ymm4,YMMWORD PTR [ecx]
 	vrsqrtps ymm4,[ecx]
-	vsqrtpd ymm4,ymm4
+	vsqrtpd ymm6,ymm4
 	vsqrtpd ymm4,YMMWORD PTR [ecx]
 	vsqrtpd ymm4,[ecx]
-	vsqrtps ymm4,ymm4
+	vsqrtps ymm6,ymm4
 	vsqrtps ymm4,YMMWORD PTR [ecx]
 	vsqrtps ymm4,[ecx]
-	vtestpd ymm4,ymm4
+	vtestpd ymm6,ymm4
 	vtestpd ymm4,YMMWORD PTR [ecx]
 	vtestpd ymm4,[ecx]
-	vtestps ymm4,ymm4
+	vtestps ymm6,ymm4
 	vtestps ymm4,YMMWORD PTR [ecx]
 	vtestps ymm4,[ecx]
 
@@ -1947,30 +1810,30 @@ _start:
 	vlddqu ymm4,[ecx]
 
 # Tests for op imm8, ymm/mem256, ymm, ymm
-	vblendpd ymm2,ymm6,ymm4,100
-	vblendpd ymm2,ymm6,YMMWORD PTR [ecx],100
-	vblendpd ymm2,ymm6,[ecx],100
-	vblendps ymm2,ymm6,ymm4,100
-	vblendps ymm2,ymm6,YMMWORD PTR [ecx],100
-	vblendps ymm2,ymm6,[ecx],100
-	vcmppd ymm2,ymm6,ymm4,100
-	vcmppd ymm2,ymm6,YMMWORD PTR [ecx],100
-	vcmppd ymm2,ymm6,[ecx],100
-	vcmpps ymm2,ymm6,ymm4,100
-	vcmpps ymm2,ymm6,YMMWORD PTR [ecx],100
-	vcmpps ymm2,ymm6,[ecx],100
-	vdpps ymm2,ymm6,ymm4,100
-	vdpps ymm2,ymm6,YMMWORD PTR [ecx],100
-	vdpps ymm2,ymm6,[ecx],100
-	vperm2f128 ymm2,ymm6,ymm4,100
-	vperm2f128 ymm2,ymm6,YMMWORD PTR [ecx],100
-	vperm2f128 ymm2,ymm6,[ecx],100
-	vshufpd ymm2,ymm6,ymm4,100
-	vshufpd ymm2,ymm6,YMMWORD PTR [ecx],100
-	vshufpd ymm2,ymm6,[ecx],100
-	vshufps ymm2,ymm6,ymm4,100
-	vshufps ymm2,ymm6,YMMWORD PTR [ecx],100
-	vshufps ymm2,ymm6,[ecx],100
+	vblendpd ymm2,ymm6,ymm4,7
+	vblendpd ymm2,ymm6,YMMWORD PTR [ecx],7
+	vblendpd ymm2,ymm6,[ecx],7
+	vblendps ymm2,ymm6,ymm4,7
+	vblendps ymm2,ymm6,YMMWORD PTR [ecx],7
+	vblendps ymm2,ymm6,[ecx],7
+	vcmppd ymm2,ymm6,ymm4,7
+	vcmppd ymm2,ymm6,YMMWORD PTR [ecx],7
+	vcmppd ymm2,ymm6,[ecx],7
+	vcmpps ymm2,ymm6,ymm4,7
+	vcmpps ymm2,ymm6,YMMWORD PTR [ecx],7
+	vcmpps ymm2,ymm6,[ecx],7
+	vdpps ymm2,ymm6,ymm4,7
+	vdpps ymm2,ymm6,YMMWORD PTR [ecx],7
+	vdpps ymm2,ymm6,[ecx],7
+	vperm2f128 ymm2,ymm6,ymm4,7
+	vperm2f128 ymm2,ymm6,YMMWORD PTR [ecx],7
+	vperm2f128 ymm2,ymm6,[ecx],7
+	vshufpd ymm2,ymm6,ymm4,7
+	vshufpd ymm2,ymm6,YMMWORD PTR [ecx],7
+	vshufpd ymm2,ymm6,[ecx],7
+	vshufps ymm2,ymm6,ymm4,7
+	vshufps ymm2,ymm6,YMMWORD PTR [ecx],7
+	vshufps ymm2,ymm6,[ecx],7
 
 # Tests for op ymm, ymm/mem256, ymm, ymm
 	vblendvpd ymm7,ymm2,ymm6,ymm4
@@ -1980,81 +1843,15 @@ _start:
 	vblendvps ymm7,ymm2,YMMWORD PTR [ecx],ymm4
 	vblendvps ymm7,ymm2,[ecx],ymm4
 
-# Tests for op ymm/mem256, ymm, ymm, ymm
-# Tests for op ymm, ymm/mem256, ymm, ymm
-	vfmaddpd ymm7,ymm2,ymm6,ymm4
-	vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vfmaddpd ymm7,ymm2,ymm6,[ecx]
-	vfmaddps ymm7,ymm2,ymm6,ymm4
-	vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vfmaddps ymm7,ymm2,ymm6,[ecx]
-	vfmaddsubpd ymm7,ymm2,ymm6,ymm4
-	vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vfmaddsubpd ymm7,ymm2,ymm6,[ecx]
-	vfmaddsubps ymm7,ymm2,ymm6,ymm4
-	vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vfmaddsubps ymm7,ymm2,ymm6,[ecx]
-	vfmsubaddpd ymm7,ymm2,ymm6,ymm4
-	vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vfmsubaddpd ymm7,ymm2,ymm6,[ecx]
-	vfmsubaddps ymm7,ymm2,ymm6,ymm4
-	vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vfmsubaddps ymm7,ymm2,ymm6,[ecx]
-	vfmsubpd ymm7,ymm2,ymm6,ymm4
-	vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vfmsubpd ymm7,ymm2,ymm6,[ecx]
-	vfmsubps ymm7,ymm2,ymm6,ymm4
-	vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vfmsubps ymm7,ymm2,ymm6,[ecx]
-	vfnmaddpd ymm7,ymm2,ymm6,ymm4
-	vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vfnmaddpd ymm7,ymm2,ymm6,[ecx]
-	vfnmaddps ymm7,ymm2,ymm6,ymm4
-	vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vfnmaddps ymm7,ymm2,ymm6,[ecx]
-	vfnmsubpd ymm7,ymm2,ymm6,ymm4
-	vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vfnmsubpd ymm7,ymm2,ymm6,[ecx]
-	vfnmsubps ymm7,ymm2,ymm6,ymm4
-	vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vfnmsubps ymm7,ymm2,ymm6,[ecx]
-	vpermilmo2pd ymm7,ymm2,ymm6,ymm4
-	vpermilmo2pd ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vpermilmo2pd ymm7,ymm2,ymm6,[ecx]
-	vpermilmz2pd ymm7,ymm2,ymm6,ymm4
-	vpermilmz2pd ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vpermilmz2pd ymm7,ymm2,ymm6,[ecx]
-	vpermiltd2pd ymm7,ymm2,ymm6,ymm4
-	vpermiltd2pd ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vpermiltd2pd ymm7,ymm2,ymm6,[ecx]
-	vpermilmo2ps ymm7,ymm2,ymm6,ymm4
-	vpermilmo2ps ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vpermilmo2ps ymm7,ymm2,ymm6,[ecx]
-	vpermilmz2ps ymm7,ymm2,ymm6,ymm4
-	vpermilmz2ps ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vpermilmz2ps ymm7,ymm2,ymm6,[ecx]
-	vpermiltd2ps ymm7,ymm2,ymm6,ymm4
-	vpermiltd2ps ymm7,ymm2,ymm6,YMMWORD PTR [ecx]
-	vpermiltd2ps ymm7,ymm2,ymm6,[ecx]
-
-# Tests for op imm4, ymm/mem256, ymm, ymm, ymm
-# Tests for op imm4, ymm, ymm/mem256, ymm, ymm
-	vpermil2pd ymm7,ymm2,ymm6,ymm4,10
-	vpermil2pd ymm7,ymm2,ymm6,YMMWORD PTR [ecx],10
-	vpermil2pd ymm7,ymm2,ymm6,[ecx],10
-	vpermil2ps ymm7,ymm2,ymm6,ymm4,10
-	vpermil2ps ymm7,ymm2,ymm6,YMMWORD PTR [ecx],10
-	vpermil2ps ymm7,ymm2,ymm6,[ecx],10
-
 # Tests for op imm8, xmm/mem128, ymm, ymm
-	vinsertf128 ymm6,ymm4,xmm4,100
-	vinsertf128 ymm6,ymm4,XMMWORD PTR [ecx],100
-	vinsertf128 ymm6,ymm4,[ecx],100
+	vinsertf128 ymm6,ymm4,xmm4,7
+	vinsertf128 ymm6,ymm4,XMMWORD PTR [ecx],7
+	vinsertf128 ymm6,ymm4,[ecx],7
 
 # Tests for op imm8, ymm, xmm/mem128
-	vextractf128 xmm4,ymm4,100
-	vextractf128 XMMWORD PTR [ecx],ymm4,100
-	vextractf128 [ecx],ymm4,100
+	vextractf128 xmm4,ymm4,7
+	vextractf128 XMMWORD PTR [ecx],ymm4,7
+	vextractf128 [ecx],ymm4,7
 
 # Tests for op mem128, ymm
 	vbroadcastf128 ymm4,XMMWORD PTR [ecx]
@@ -2734,42 +2531,42 @@ _start:
 	vmaskmovpd xmm6,xmm4,[ecx]
 
 # Tests for op imm8, xmm/mem128, xmm
-	vaeskeygenassist xmm6,xmm4,100
-	vaeskeygenassist xmm6,XMMWORD PTR [ecx],100
-	vaeskeygenassist xmm6,[ecx],100
-	vpcmpestri xmm6,xmm4,100
-	vpcmpestri xmm6,XMMWORD PTR [ecx],100
-	vpcmpestri xmm6,[ecx],100
-	vpcmpestrm xmm6,xmm4,100
-	vpcmpestrm xmm6,XMMWORD PTR [ecx],100
-	vpcmpestrm xmm6,[ecx],100
-	vpcmpistri xmm6,xmm4,100
-	vpcmpistri xmm6,XMMWORD PTR [ecx],100
-	vpcmpistri xmm6,[ecx],100
-	vpcmpistrm xmm6,xmm4,100
-	vpcmpistrm xmm6,XMMWORD PTR [ecx],100
-	vpcmpistrm xmm6,[ecx],100
-	vpermilpd xmm6,xmm4,100
-	vpermilpd xmm6,XMMWORD PTR [ecx],100
-	vpermilpd xmm6,[ecx],100
-	vpermilps xmm6,xmm4,100
-	vpermilps xmm6,XMMWORD PTR [ecx],100
-	vpermilps xmm6,[ecx],100
-	vpshufd xmm6,xmm4,100
-	vpshufd xmm6,XMMWORD PTR [ecx],100
-	vpshufd xmm6,[ecx],100
-	vpshufhw xmm6,xmm4,100
-	vpshufhw xmm6,XMMWORD PTR [ecx],100
-	vpshufhw xmm6,[ecx],100
-	vpshuflw xmm6,xmm4,100
-	vpshuflw xmm6,XMMWORD PTR [ecx],100
-	vpshuflw xmm6,[ecx],100
-	vroundpd xmm6,xmm4,100
-	vroundpd xmm6,XMMWORD PTR [ecx],100
-	vroundpd xmm6,[ecx],100
-	vroundps xmm6,xmm4,100
-	vroundps xmm6,XMMWORD PTR [ecx],100
-	vroundps xmm6,[ecx],100
+	vaeskeygenassist xmm6,xmm4,7
+	vaeskeygenassist xmm6,XMMWORD PTR [ecx],7
+	vaeskeygenassist xmm6,[ecx],7
+	vpcmpestri xmm6,xmm4,7
+	vpcmpestri xmm6,XMMWORD PTR [ecx],7
+	vpcmpestri xmm6,[ecx],7
+	vpcmpestrm xmm6,xmm4,7
+	vpcmpestrm xmm6,XMMWORD PTR [ecx],7
+	vpcmpestrm xmm6,[ecx],7
+	vpcmpistri xmm6,xmm4,7
+	vpcmpistri xmm6,XMMWORD PTR [ecx],7
+	vpcmpistri xmm6,[ecx],7
+	vpcmpistrm xmm6,xmm4,7
+	vpcmpistrm xmm6,XMMWORD PTR [ecx],7
+	vpcmpistrm xmm6,[ecx],7
+	vpermilpd xmm6,xmm4,7
+	vpermilpd xmm6,XMMWORD PTR [ecx],7
+	vpermilpd xmm6,[ecx],7
+	vpermilps xmm6,xmm4,7
+	vpermilps xmm6,XMMWORD PTR [ecx],7
+	vpermilps xmm6,[ecx],7
+	vpshufd xmm6,xmm4,7
+	vpshufd xmm6,XMMWORD PTR [ecx],7
+	vpshufd xmm6,[ecx],7
+	vpshufhw xmm6,xmm4,7
+	vpshufhw xmm6,XMMWORD PTR [ecx],7
+	vpshufhw xmm6,[ecx],7
+	vpshuflw xmm6,xmm4,7
+	vpshuflw xmm6,XMMWORD PTR [ecx],7
+	vpshuflw xmm6,[ecx],7
+	vroundpd xmm6,xmm4,7
+	vroundpd xmm6,XMMWORD PTR [ecx],7
+	vroundpd xmm6,[ecx],7
+	vroundps xmm6,xmm4,7
+	vroundps xmm6,XMMWORD PTR [ecx],7
+	vroundps xmm6,[ecx],7
 
 # Tests for op xmm, xmm, mem128
 	vmaskmovps XMMWORD PTR [ecx],xmm6,xmm4
@@ -2778,39 +2575,39 @@ _start:
 	vmaskmovpd [ecx],xmm6,xmm4
 
 # Tests for op imm8, xmm/mem128, xmm, xmm
-	vblendpd xmm2,xmm6,xmm4,100
-	vblendpd xmm2,xmm6,XMMWORD PTR [ecx],100
-	vblendpd xmm2,xmm6,[ecx],100
-	vblendps xmm2,xmm6,xmm4,100
-	vblendps xmm2,xmm6,XMMWORD PTR [ecx],100
-	vblendps xmm2,xmm6,[ecx],100
-	vcmppd xmm2,xmm6,xmm4,100
-	vcmppd xmm2,xmm6,XMMWORD PTR [ecx],100
-	vcmppd xmm2,xmm6,[ecx],100
-	vcmpps xmm2,xmm6,xmm4,100
-	vcmpps xmm2,xmm6,XMMWORD PTR [ecx],100
-	vcmpps xmm2,xmm6,[ecx],100
-	vdppd xmm2,xmm6,xmm4,100
-	vdppd xmm2,xmm6,XMMWORD PTR [ecx],100
-	vdppd xmm2,xmm6,[ecx],100
-	vdpps xmm2,xmm6,xmm4,100
-	vdpps xmm2,xmm6,XMMWORD PTR [ecx],100
-	vdpps xmm2,xmm6,[ecx],100
-	vmpsadbw xmm2,xmm6,xmm4,100
-	vmpsadbw xmm2,xmm6,XMMWORD PTR [ecx],100
-	vmpsadbw xmm2,xmm6,[ecx],100
-	vpalignr xmm2,xmm6,xmm4,100
-	vpalignr xmm2,xmm6,XMMWORD PTR [ecx],100
-	vpalignr xmm2,xmm6,[ecx],100
-	vpblendw xmm2,xmm6,xmm4,100
-	vpblendw xmm2,xmm6,XMMWORD PTR [ecx],100
-	vpblendw xmm2,xmm6,[ecx],100
-	vshufpd xmm2,xmm6,xmm4,100
-	vshufpd xmm2,xmm6,XMMWORD PTR [ecx],100
-	vshufpd xmm2,xmm6,[ecx],100
-	vshufps xmm2,xmm6,xmm4,100
-	vshufps xmm2,xmm6,XMMWORD PTR [ecx],100
-	vshufps xmm2,xmm6,[ecx],100
+	vblendpd xmm2,xmm6,xmm4,7
+	vblendpd xmm2,xmm6,XMMWORD PTR [ecx],7
+	vblendpd xmm2,xmm6,[ecx],7
+	vblendps xmm2,xmm6,xmm4,7
+	vblendps xmm2,xmm6,XMMWORD PTR [ecx],7
+	vblendps xmm2,xmm6,[ecx],7
+	vcmppd xmm2,xmm6,xmm4,7
+	vcmppd xmm2,xmm6,XMMWORD PTR [ecx],7
+	vcmppd xmm2,xmm6,[ecx],7
+	vcmpps xmm2,xmm6,xmm4,7
+	vcmpps xmm2,xmm6,XMMWORD PTR [ecx],7
+	vcmpps xmm2,xmm6,[ecx],7
+	vdppd xmm2,xmm6,xmm4,7
+	vdppd xmm2,xmm6,XMMWORD PTR [ecx],7
+	vdppd xmm2,xmm6,[ecx],7
+	vdpps xmm2,xmm6,xmm4,7
+	vdpps xmm2,xmm6,XMMWORD PTR [ecx],7
+	vdpps xmm2,xmm6,[ecx],7
+	vmpsadbw xmm2,xmm6,xmm4,7
+	vmpsadbw xmm2,xmm6,XMMWORD PTR [ecx],7
+	vmpsadbw xmm2,xmm6,[ecx],7
+	vpalignr xmm2,xmm6,xmm4,7
+	vpalignr xmm2,xmm6,XMMWORD PTR [ecx],7
+	vpalignr xmm2,xmm6,[ecx],7
+	vpblendw xmm2,xmm6,xmm4,7
+	vpblendw xmm2,xmm6,XMMWORD PTR [ecx],7
+	vpblendw xmm2,xmm6,[ecx],7
+	vshufpd xmm2,xmm6,xmm4,7
+	vshufpd xmm2,xmm6,XMMWORD PTR [ecx],7
+	vshufpd xmm2,xmm6,[ecx],7
+	vshufps xmm2,xmm6,xmm4,7
+	vshufps xmm2,xmm6,XMMWORD PTR [ecx],7
+	vshufps xmm2,xmm6,[ecx],7
 
 # Tests for op xmm, xmm/mem128, xmm, xmm
 	vblendvpd xmm7,xmm2,xmm6,xmm4
@@ -2823,112 +2620,6 @@ _start:
 	vpblendvb xmm7,xmm2,XMMWORD PTR [ecx],xmm4
 	vpblendvb xmm7,xmm2,[ecx],xmm4
 
-# Tests for op xmm/mem128, xmm, xmm, xmm
-# Tests for op xmm, xmm/mem128, xmm, xmm
-	vfmaddpd xmm7,xmm2,xmm6,xmm4
-	vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vfmaddpd xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vfmaddpd xmm7,xmm2,xmm6,[ecx]
-	vfmaddpd xmm7,xmm2,[ecx],xmm4
-	vfmaddps xmm7,xmm2,xmm6,xmm4
-	vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vfmaddps xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vfmaddps xmm7,xmm2,xmm6,[ecx]
-	vfmaddps xmm7,xmm2,[ecx],xmm4
-	vfmaddsubpd xmm7,xmm2,xmm6,xmm4
-	vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vfmaddsubpd xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vfmaddsubpd xmm7,xmm2,xmm6,[ecx]
-	vfmaddsubpd xmm7,xmm2,[ecx],xmm4
-	vfmaddsubps xmm7,xmm2,xmm6,xmm4
-	vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vfmaddsubps xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vfmaddsubps xmm7,xmm2,xmm6,[ecx]
-	vfmaddsubps xmm7,xmm2,[ecx],xmm4
-	vfmsubaddpd xmm7,xmm2,xmm6,xmm4
-	vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vfmsubaddpd xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vfmsubaddpd xmm7,xmm2,xmm6,[ecx]
-	vfmsubaddpd xmm7,xmm2,[ecx],xmm4
-	vfmsubaddps xmm7,xmm2,xmm6,xmm4
-	vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vfmsubaddps xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vfmsubaddps xmm7,xmm2,xmm6,[ecx]
-	vfmsubaddps xmm7,xmm2,[ecx],xmm4
-	vfmsubpd xmm7,xmm2,xmm6,xmm4
-	vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vfmsubpd xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vfmsubpd xmm7,xmm2,xmm6,[ecx]
-	vfmsubpd xmm7,xmm2,[ecx],xmm4
-	vfmsubps xmm7,xmm2,xmm6,xmm4
-	vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vfmsubps xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vfmsubps xmm7,xmm2,xmm6,[ecx]
-	vfmsubps xmm7,xmm2,[ecx],xmm4
-	vfnmaddpd xmm7,xmm2,xmm6,xmm4
-	vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vfnmaddpd xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vfnmaddpd xmm7,xmm2,xmm6,[ecx]
-	vfnmaddpd xmm7,xmm2,[ecx],xmm4
-	vfnmaddps xmm7,xmm2,xmm6,xmm4
-	vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vfnmaddps xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vfnmaddps xmm7,xmm2,xmm6,[ecx]
-	vfnmaddps xmm7,xmm2,[ecx],xmm4
-	vfnmsubpd xmm7,xmm2,xmm6,xmm4
-	vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vfnmsubpd xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vfnmsubpd xmm7,xmm2,xmm6,[ecx]
-	vfnmsubpd xmm7,xmm2,[ecx],xmm4
-	vfnmsubps xmm7,xmm2,xmm6,xmm4
-	vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vfnmsubps xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vfnmsubps xmm7,xmm2,xmm6,[ecx]
-	vfnmsubps xmm7,xmm2,[ecx],xmm4
-	vpermilmo2pd xmm7,xmm2,xmm6,xmm4
-	vpermilmo2pd xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vpermilmo2pd xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vpermilmo2pd xmm7,xmm2,xmm6,[ecx]
-	vpermilmo2pd xmm7,xmm2,[ecx],xmm4
-	vpermilmz2pd xmm7,xmm2,xmm6,xmm4
-	vpermilmz2pd xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vpermilmz2pd xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vpermilmz2pd xmm7,xmm2,xmm6,[ecx]
-	vpermilmz2pd xmm7,xmm2,[ecx],xmm4
-	vpermiltd2pd xmm7,xmm2,xmm6,xmm4
-	vpermiltd2pd xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vpermiltd2pd xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vpermiltd2pd xmm7,xmm2,xmm6,[ecx]
-	vpermiltd2pd xmm7,xmm2,[ecx],xmm4
-	vpermilmo2ps xmm7,xmm2,xmm6,xmm4
-	vpermilmo2ps xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vpermilmo2ps xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vpermilmo2ps xmm7,xmm2,xmm6,[ecx]
-	vpermilmo2ps xmm7,xmm2,[ecx],xmm4
-	vpermilmz2ps xmm7,xmm2,xmm6,xmm4
-	vpermilmz2ps xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vpermilmz2ps xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vpermilmz2ps xmm7,xmm2,xmm6,[ecx]
-	vpermilmz2ps xmm7,xmm2,[ecx],xmm4
-	vpermiltd2ps xmm7,xmm2,xmm6,xmm4
-	vpermiltd2ps xmm7,xmm2,xmm6,XMMWORD PTR [ecx]
-	vpermiltd2ps xmm7,xmm2,XMMWORD PTR [ecx],xmm4
-	vpermiltd2ps xmm7,xmm2,xmm6,[ecx]
-	vpermiltd2ps xmm7,xmm2,[ecx],xmm4
-
-# Tests for op imm4, xmm/mem128, xmm, xmm, xmm
-# Tests for op imm4, xmm, xmm/mem128, xmm, xmm
-	vpermil2pd xmm7,xmm2,xmm6,xmm4,10
-	vpermil2pd xmm7,xmm2,xmm6,XMMWORD PTR [ecx],10
-	vpermil2pd xmm7,xmm2,XMMWORD PTR [ecx],xmm4,10
-	vpermil2pd xmm7,xmm2,xmm6,[ecx],10
-	vpermil2pd xmm7,xmm2,[ecx],xmm4,10
-	vpermil2ps xmm7,xmm2,xmm6,xmm4,10
-	vpermil2ps xmm7,xmm2,xmm6,XMMWORD PTR [ecx],10
-	vpermil2ps xmm7,xmm2,XMMWORD PTR [ecx],xmm4,10
-	vpermil2ps xmm7,xmm2,xmm6,[ecx],10
-	vpermil2ps xmm7,xmm2,[ecx],xmm4,10
-
 # Tests for op mem64, ymm
 	vbroadcastsd ymm4,QWORD PTR [ecx]
 	vbroadcastsd ymm4,[ecx]
@@ -3010,35 +2701,12 @@ _start:
 	vmovhps xmm6,xmm4,[ecx]
 
 # Tests for op imm8, xmm/mem64, xmm, xmm
-	vcmpsd xmm2,xmm6,xmm4,100
-	vcmpsd xmm2,xmm6,QWORD PTR [ecx],100
-	vcmpsd xmm2,xmm6,[ecx],100
-	vroundsd xmm2,xmm6,xmm4,100
-	vroundsd xmm2,xmm6,QWORD PTR [ecx],100
-	vroundsd xmm2,xmm6,[ecx],100
-
-# Tests for op xmm/mem64, xmm, xmm, xmm
-# Tests for op xmm, xmm/mem64, xmm, xmm
-	vfmaddsd xmm7,xmm2,xmm6,xmm4
-	vfmaddsd xmm7,xmm2,xmm6,QWORD PTR [ecx]
-	vfmaddsd xmm7,xmm2,QWORD PTR [ecx],xmm4
-	vfmaddsd xmm7,xmm2,xmm6,[ecx]
-	vfmaddsd xmm7,xmm2,[ecx],xmm4
-	vfmsubsd xmm7,xmm2,xmm6,xmm4
-	vfmsubsd xmm7,xmm2,xmm6,QWORD PTR [ecx]
-	vfmsubsd xmm7,xmm2,QWORD PTR [ecx],xmm4
-	vfmsubsd xmm7,xmm2,xmm6,[ecx]
-	vfmsubsd xmm7,xmm2,[ecx],xmm4
-	vfnmaddsd xmm7,xmm2,xmm6,xmm4
-	vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR [ecx]
-	vfnmaddsd xmm7,xmm2,QWORD PTR [ecx],xmm4
-	vfnmaddsd xmm7,xmm2,xmm6,[ecx]
-	vfnmaddsd xmm7,xmm2,[ecx],xmm4
-	vfnmsubsd xmm7,xmm2,xmm6,xmm4
-	vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR [ecx]
-	vfnmsubsd xmm7,xmm2,QWORD PTR [ecx],xmm4
-	vfnmsubsd xmm7,xmm2,xmm6,[ecx]
-	vfnmsubsd xmm7,xmm2,[ecx],xmm4
+	vcmpsd xmm2,xmm6,xmm4,7
+	vcmpsd xmm2,xmm6,QWORD PTR [ecx],7
+	vcmpsd xmm2,xmm6,[ecx],7
+	vroundsd xmm2,xmm6,xmm4,7
+	vroundsd xmm2,xmm6,QWORD PTR [ecx],7
+	vroundsd xmm2,xmm6,[ecx],7
 
 # Tests for op xmm/mem64, xmm, xmm
 	vaddsd xmm2,xmm6,xmm4
@@ -3162,6 +2830,12 @@ _start:
 	vcmptrue_ussd xmm2,xmm6,QWORD PTR [ecx]
 	vcmptrue_ussd xmm2,xmm6,[ecx]
 
+# Tests for op mem64
+	vldmxcsr DWORD PTR [ecx]
+	vldmxcsr [ecx]
+	vstmxcsr DWORD PTR [ecx]
+	vstmxcsr [ecx]
+
 # Tests for op xmm/mem32, xmm, xmm
 	vaddss xmm2,xmm6,xmm4
 	vaddss xmm2,xmm6,DWORD PTR [ecx]
@@ -3342,15 +3016,16 @@ _start:
 	vcvttss2si ecx,[ecx]
 
 # Tests for op imm8, xmm, regq/mem32
-	vextractps DWORD PTR [ecx],xmm4,100
-	vextractps [ecx],xmm4,100
+	vextractps DWORD PTR [ecx],xmm4,7
+	vextractps [ecx],xmm4,7
+
 # Tests for op imm8, xmm, regl/mem32
-	vpextrd ecx,xmm4,100
-	vpextrd DWORD PTR [ecx],xmm4,100
-	vpextrd [ecx],xmm4,100
-	vextractps ecx,xmm4,100
-	vextractps DWORD PTR [ecx],xmm4,100
-	vextractps [ecx],xmm4,100
+	vpextrd ecx,xmm4,7
+	vpextrd DWORD PTR [ecx],xmm4,7
+	vpextrd [ecx],xmm4,7
+	vextractps ecx,xmm4,7
+	vextractps DWORD PTR [ecx],xmm4,7
+	vextractps [ecx],xmm4,7
 
 # Tests for op regl/mem32, xmm, xmm
 	vcvtsi2sd xmm6,xmm4,ecx
@@ -3361,38 +3036,15 @@ _start:
 	vcvtsi2ss xmm6,xmm4,[ecx]
 
 # Tests for op imm8, xmm/mem32, xmm, xmm
-	vcmpss xmm2,xmm6,xmm4,100
-	vcmpss xmm2,xmm6,DWORD PTR [ecx],100
-	vcmpss xmm2,xmm6,[ecx],100
-	vinsertps xmm2,xmm6,xmm4,100
-	vinsertps xmm2,xmm6,DWORD PTR [ecx],100
-	vinsertps xmm2,xmm6,[ecx],100
-	vroundss xmm2,xmm6,xmm4,100
-	vroundss xmm2,xmm6,DWORD PTR [ecx],100
-	vroundss xmm2,xmm6,[ecx],100
-
-# Tests for op xmm/mem32, xmm, xmm, xmm
-# Tests for op xmm, xmm/mem32, xmm, xmm
-	vfmaddss xmm7,xmm2,xmm6,xmm4
-	vfmaddss xmm7,xmm2,xmm6,DWORD PTR [ecx]
-	vfmaddss xmm7,xmm2,DWORD PTR [ecx],xmm4
-	vfmaddss xmm7,xmm2,xmm6,[ecx]
-	vfmaddss xmm7,xmm2,[ecx],xmm4
-	vfmsubss xmm7,xmm2,xmm6,xmm4
-	vfmsubss xmm7,xmm2,xmm6,DWORD PTR [ecx]
-	vfmsubss xmm7,xmm2,DWORD PTR [ecx],xmm4
-	vfmsubss xmm7,xmm2,xmm6,[ecx]
-	vfmsubss xmm7,xmm2,[ecx],xmm4
-	vfnmaddss xmm7,xmm2,xmm6,xmm4
-	vfnmaddss xmm7,xmm2,xmm6,DWORD PTR [ecx]
-	vfnmaddss xmm7,xmm2,DWORD PTR [ecx],xmm4
-	vfnmaddss xmm7,xmm2,xmm6,[ecx]
-	vfnmaddss xmm7,xmm2,[ecx],xmm4
-	vfnmsubss xmm7,xmm2,xmm6,xmm4
-	vfnmsubss xmm7,xmm2,xmm6,DWORD PTR [ecx]
-	vfnmsubss xmm7,xmm2,DWORD PTR [ecx],xmm4
-	vfnmsubss xmm7,xmm2,xmm6,[ecx]
-	vfnmsubss xmm7,xmm2,[ecx],xmm4
+	vcmpss xmm2,xmm6,xmm4,7
+	vcmpss xmm2,xmm6,DWORD PTR [ecx],7
+	vcmpss xmm2,xmm6,[ecx],7
+	vinsertps xmm2,xmm6,xmm4,7
+	vinsertps xmm2,xmm6,DWORD PTR [ecx],7
+	vinsertps xmm2,xmm6,[ecx],7
+	vroundss xmm2,xmm6,xmm4,7
+	vroundss xmm2,xmm6,DWORD PTR [ecx],7
+	vroundss xmm2,xmm6,[ecx],7
 
 # Tests for op xmm/m16, xmm
 	vpmovsxbq xmm6,xmm4
@@ -3403,38 +3055,37 @@ _start:
 	vpmovzxbq xmm4,[ecx]
 
 # Tests for op imm8, xmm, regl/mem16
-	vpextrw ecx,xmm4,100
-	vpextrw WORD PTR [ecx],xmm4,100
-	vpextrw [ecx],xmm4,100
+	vpextrw ecx,xmm4,7
+	vpextrw WORD PTR [ecx],xmm4,7
+	vpextrw [ecx],xmm4,7
 
 # Tests for op imm8, xmm, regq/mem16
-	vpextrw WORD PTR [ecx],xmm4,100
-	vpextrw [ecx],xmm4,100
+	vpextrw WORD PTR [ecx],xmm4,7
+	vpextrw [ecx],xmm4,7
 
 # Tests for op imm8, regl/mem16, xmm, xmm
-	vpinsrw xmm6,xmm4,ecx,100
-	vpinsrw xmm6,xmm4,WORD PTR [ecx],100
-	vpinsrw xmm6,xmm4,[ecx],100
-
+	vpinsrw xmm6,xmm4,ecx,7
+	vpinsrw xmm6,xmm4,WORD PTR [ecx],7
+	vpinsrw xmm6,xmm4,[ecx],7
 
 # Tests for op imm8, xmm, regl/mem8
-	vpextrb ecx,xmm4,100
-	vpextrb BYTE PTR [ecx],xmm4,100
-	vpextrb [ecx],xmm4,100
+	vpextrb ecx,xmm4,7
+	vpextrb BYTE PTR [ecx],xmm4,7
+	vpextrb [ecx],xmm4,7
 
 # Tests for op imm8, regl/mem8, xmm, xmm
-	vpinsrb xmm6,xmm4,ecx,100
-	vpinsrb xmm6,xmm4,BYTE PTR [ecx],100
-	vpinsrb xmm6,xmm4,[ecx],100
+	vpinsrb xmm6,xmm4,ecx,7
+	vpinsrb xmm6,xmm4,BYTE PTR [ecx],7
+	vpinsrb xmm6,xmm4,[ecx],7
 
 # Tests for op imm8, xmm, regq/mem8
-	vpextrb BYTE PTR [ecx],xmm4,100
-	vpextrb [ecx],xmm4,100
+	vpextrb BYTE PTR [ecx],xmm4,7
+	vpextrb [ecx],xmm4,7
 
 # Tests for op imm8, regl/mem8, xmm, xmm
-	vpinsrb xmm6,xmm4,ecx,100
-	vpinsrb xmm6,xmm4,BYTE PTR [ecx],100
-	vpinsrb xmm6,xmm4,[ecx],100
+	vpinsrb xmm6,xmm4,ecx,7
+	vpinsrb xmm6,xmm4,BYTE PTR [ecx],7
+	vpinsrb xmm6,xmm4,[ecx],7
 
 # Tests for op xmm, xmm
 	vmaskmovdqu xmm6,xmm4
@@ -3444,6 +3095,7 @@ _start:
 	vmovmskpd ecx,xmm4
 	vmovmskps ecx,xmm4
 	vpmovmskb ecx,xmm4
+
 # Tests for op xmm, xmm, xmm
 	vmovhlps xmm2,xmm6,xmm4
 	vmovlhps xmm2,xmm6,xmm4
@@ -3451,25 +3103,24 @@ _start:
 	vmovss xmm2,xmm6,xmm4
 
 # Tests for op imm8, xmm, xmm
-	vpslld xmm6,xmm4,100
-	vpslldq xmm6,xmm4,100
-	vpsllq xmm6,xmm4,100
-	vpsllw xmm6,xmm4,100
-	vpsrad xmm6,xmm4,100
-	vpsraw xmm6,xmm4,100
-	vpsrld xmm6,xmm4,100
-	vpsrldq xmm6,xmm4,100
-	vpsrlq xmm6,xmm4,100
-	vpsrlw xmm6,xmm4,100
+	vpslld xmm6,xmm4,7
+	vpslldq xmm6,xmm4,7
+	vpsllq xmm6,xmm4,7
+	vpsllw xmm6,xmm4,7
+	vpsrad xmm6,xmm4,7
+	vpsraw xmm6,xmm4,7
+	vpsrld xmm6,xmm4,7
+	vpsrldq xmm6,xmm4,7
+	vpsrlq xmm6,xmm4,7
+	vpsrlw xmm6,xmm4,7
 
 # Tests for op imm8, xmm, regl
-	vpextrw ecx,xmm4,100
+	vpextrw ecx,xmm4,7
 
 # Tests for op ymm, regl
 	vmovmskpd ecx,ymm4
 	vmovmskps ecx,ymm4
 
-
 # Default instructions without suffixes.
 	vcvtpd2dq xmm6,xmm4
 	vcvtpd2dq xmm6,ymm4
@@ -3487,17 +3138,17 @@ _start:
 	vcvtdq2pd ymm0,XMMWORD PTR ds:0x1234
 	vcvtpd2ps xmm0,YMMWORD PTR ds:0x1234
 	vpavgb xmm7,xmm0,XMMWORD PTR ds:0x1234
-	vaeskeygenassist xmm0,XMMWORD PTR ds:0x1234,100
-	vpextrb ds:0x1234,xmm0,100
+	vaeskeygenassist xmm0,XMMWORD PTR ds:0x1234,7
+	vpextrb ds:0x1234,xmm0,7
 	vcvtsi2sd xmm7,xmm0,DWORD PTR ds:0x1234
 	vblendvps xmm6,xmm4,XMMWORD PTR ds:0x1234,xmm0
-	vpinsrb xmm7,xmm0,ds:0x1234,100
+	vpinsrb xmm7,xmm0,ds:0x1234,7
 	vmovdqa ymm0,YMMWORD PTR ds:0x1234
 	vmovdqa YMMWORD PTR ds:0x1234,ymm0
 	vpermilpd ymm7,ymm0,YMMWORD PTR ds:0x1234
-	vroundpd ymm0,YMMWORD PTR ds:0x1234,100
-	vextractf128 XMMWORD PTR ds:0x1234,ymm0,100
-	vperm2f128 ymm7,ymm0,YMMWORD PTR ds:0x1234,100
+	vroundpd ymm0,YMMWORD PTR ds:0x1234,7
+	vextractf128 XMMWORD PTR ds:0x1234,ymm0,7
+	vperm2f128 ymm7,ymm0,YMMWORD PTR ds:0x1234,7
 	vblendvpd ymm6,ymm4,YMMWORD PTR ds:0x1234,ymm0
 	vldmxcsr DWORD PTR [ebp]
 	vmovdqa xmm0,XMMWORD PTR [ebp]
@@ -3507,17 +3158,17 @@ _start:
 	vcvtdq2pd ymm0,XMMWORD PTR [ebp]
 	vcvtpd2ps xmm0,YMMWORD PTR [ebp]
 	vpavgb xmm7,xmm0,XMMWORD PTR [ebp]
-	vaeskeygenassist xmm0,XMMWORD PTR [ebp],100
-	vpextrb [ebp],xmm0,100
+	vaeskeygenassist xmm0,XMMWORD PTR [ebp],7
+	vpextrb [ebp],xmm0,7
 	vcvtsi2sd xmm7,xmm0,DWORD PTR [ebp]
 	vblendvps xmm6,xmm4,XMMWORD PTR [ebp],xmm0
-	vpinsrb xmm7,xmm0,[ebp],100
+	vpinsrb xmm7,xmm0,[ebp],7
 	vmovdqa ymm0,YMMWORD PTR [ebp]
 	vmovdqa YMMWORD PTR [ebp],ymm0
 	vpermilpd ymm7,ymm0,YMMWORD PTR [ebp]
-	vroundpd ymm0,YMMWORD PTR [ebp],100
-	vextractf128 XMMWORD PTR [ebp],ymm0,100
-	vperm2f128 ymm7,ymm0,YMMWORD PTR [ebp],100
+	vroundpd ymm0,YMMWORD PTR [ebp],7
+	vextractf128 XMMWORD PTR [ebp],ymm0,7
+	vperm2f128 ymm7,ymm0,YMMWORD PTR [ebp],7
 	vblendvpd ymm6,ymm4,YMMWORD PTR [ebp],ymm0
 	vldmxcsr DWORD PTR [ebp+0x99]
 	vmovdqa xmm0,XMMWORD PTR [ebp+0x99]
@@ -3527,17 +3178,17 @@ _start:
 	vcvtdq2pd ymm0,XMMWORD PTR [ebp+0x99]
 	vcvtpd2ps xmm0,YMMWORD PTR [ebp+0x99]
 	vpavgb xmm7,xmm0,XMMWORD PTR [ebp+0x99]
-	vaeskeygenassist xmm0,XMMWORD PTR [ebp+0x99],100
-	vpextrb [ebp+0x99],xmm0,100
+	vaeskeygenassist xmm0,XMMWORD PTR [ebp+0x99],7
+	vpextrb [ebp+0x99],xmm0,7
 	vcvtsi2sd xmm7,xmm0,DWORD PTR [ebp+0x99]
 	vblendvps xmm6,xmm4,XMMWORD PTR [ebp+0x99],xmm0
-	vpinsrb xmm7,xmm0,[ebp+0x99],100
+	vpinsrb xmm7,xmm0,[ebp+0x99],7
 	vmovdqa ymm0,YMMWORD PTR [ebp+0x99]
 	vmovdqa YMMWORD PTR [ebp+0x99],ymm0
 	vpermilpd ymm7,ymm0,YMMWORD PTR [ebp+0x99]
-	vroundpd ymm0,YMMWORD PTR [ebp+0x99],100
-	vextractf128 XMMWORD PTR [ebp+0x99],ymm0,100
-	vperm2f128 ymm7,ymm0,YMMWORD PTR [ebp+0x99],100
+	vroundpd ymm0,YMMWORD PTR [ebp+0x99],7
+	vextractf128 XMMWORD PTR [ebp+0x99],ymm0,7
+	vperm2f128 ymm7,ymm0,YMMWORD PTR [ebp+0x99],7
 	vblendvpd ymm6,ymm4,YMMWORD PTR [ebp+0x99],ymm0
 	vldmxcsr DWORD PTR [eiz*1+0x99]
 	vmovdqa xmm0,XMMWORD PTR [eiz*1+0x99]
@@ -3547,17 +3198,17 @@ _start:
 	vcvtdq2pd ymm0,XMMWORD PTR [eiz*1+0x99]
 	vcvtpd2ps xmm0,YMMWORD PTR [eiz*1+0x99]
 	vpavgb xmm7,xmm0,XMMWORD PTR [eiz*1+0x99]
-	vaeskeygenassist xmm0,XMMWORD PTR [eiz*1+0x99],100
-	vpextrb [eiz*1+0x99],xmm0,100
+	vaeskeygenassist xmm0,XMMWORD PTR [eiz*1+0x99],7
+	vpextrb [eiz*1+0x99],xmm0,7
 	vcvtsi2sd xmm7,xmm0,DWORD PTR [eiz*1+0x99]
 	vblendvps xmm6,xmm4,XMMWORD PTR [eiz*1+0x99],xmm0
-	vpinsrb xmm7,xmm0,[eiz*1+0x99],100
+	vpinsrb xmm7,xmm0,[eiz*1+0x99],7
 	vmovdqa ymm0,YMMWORD PTR [eiz*1+0x99]
 	vmovdqa YMMWORD PTR [eiz*1+0x99],ymm0
 	vpermilpd ymm7,ymm0,YMMWORD PTR [eiz*1+0x99]
-	vroundpd ymm0,YMMWORD PTR [eiz*1+0x99],100
-	vextractf128 XMMWORD PTR [eiz*1+0x99],ymm0,100
-	vperm2f128 ymm7,ymm0,YMMWORD PTR [eiz*1+0x99],100
+	vroundpd ymm0,YMMWORD PTR [eiz*1+0x99],7
+	vextractf128 XMMWORD PTR [eiz*1+0x99],ymm0,7
+	vperm2f128 ymm7,ymm0,YMMWORD PTR [eiz*1+0x99],7
 	vblendvpd ymm6,ymm4,YMMWORD PTR [eiz*1+0x99],ymm0
 	vldmxcsr DWORD PTR [eiz*2+0x99]
 	vmovdqa xmm0,XMMWORD PTR [eiz*2+0x99]
@@ -3567,17 +3218,17 @@ _start:
 	vcvtdq2pd ymm0,XMMWORD PTR [eiz*2+0x99]
 	vcvtpd2ps xmm0,YMMWORD PTR [eiz*2+0x99]
 	vpavgb xmm7,xmm0,XMMWORD PTR [eiz*2+0x99]
-	vaeskeygenassist xmm0,XMMWORD PTR [eiz*2+0x99],100
-	vpextrb [eiz*2+0x99],xmm0,100
+	vaeskeygenassist xmm0,XMMWORD PTR [eiz*2+0x99],7
+	vpextrb [eiz*2+0x99],xmm0,7
 	vcvtsi2sd xmm7,xmm0,DWORD PTR [eiz*2+0x99]
 	vblendvps xmm6,xmm4,XMMWORD PTR [eiz*2+0x99],xmm0
-	vpinsrb xmm7,xmm0,[eiz*2+0x99],100
+	vpinsrb xmm7,xmm0,[eiz*2+0x99],7
 	vmovdqa ymm0,YMMWORD PTR [eiz*2+0x99]
 	vmovdqa YMMWORD PTR [eiz*2+0x99],ymm0
 	vpermilpd ymm7,ymm0,YMMWORD PTR [eiz*2+0x99]
-	vroundpd ymm0,YMMWORD PTR [eiz*2+0x99],100
-	vextractf128 XMMWORD PTR [eiz*2+0x99],ymm0,100
-	vperm2f128 ymm7,ymm0,YMMWORD PTR [eiz*2+0x99],100
+	vroundpd ymm0,YMMWORD PTR [eiz*2+0x99],7
+	vextractf128 XMMWORD PTR [eiz*2+0x99],ymm0,7
+	vperm2f128 ymm7,ymm0,YMMWORD PTR [eiz*2+0x99],7
 	vblendvpd ymm6,ymm4,YMMWORD PTR [eiz*2+0x99],ymm0
 	vldmxcsr DWORD PTR [eax+eiz*1+0x99]
 	vmovdqa xmm0,XMMWORD PTR [eax+eiz*1+0x99]
@@ -3587,17 +3238,17 @@ _start:
 	vcvtdq2pd ymm0,XMMWORD PTR [eax+eiz*1+0x99]
 	vcvtpd2ps xmm0,YMMWORD PTR [eax+eiz*1+0x99]
 	vpavgb xmm7,xmm0,XMMWORD PTR [eax+eiz*1+0x99]
-	vaeskeygenassist xmm0,XMMWORD PTR [eax+eiz*1+0x99],100
-	vpextrb [eax+eiz*1+0x99],xmm0,100
+	vaeskeygenassist xmm0,XMMWORD PTR [eax+eiz*1+0x99],7
+	vpextrb [eax+eiz*1+0x99],xmm0,7
 	vcvtsi2sd xmm7,xmm0,DWORD PTR [eax+eiz*1+0x99]
 	vblendvps xmm6,xmm4,XMMWORD PTR [eax+eiz*1+0x99],xmm0
-	vpinsrb xmm7,xmm0,[eax+eiz*1+0x99],100
+	vpinsrb xmm7,xmm0,[eax+eiz*1+0x99],7
 	vmovdqa ymm0,YMMWORD PTR [eax+eiz*1+0x99]
 	vmovdqa YMMWORD PTR [eax+eiz*1+0x99],ymm0
 	vpermilpd ymm7,ymm0,YMMWORD PTR [eax+eiz*1+0x99]
-	vroundpd ymm0,YMMWORD PTR [eax+eiz*1+0x99],100
-	vextractf128 XMMWORD PTR [eax+eiz*1+0x99],ymm0,100
-	vperm2f128 ymm7,ymm0,YMMWORD PTR [eax+eiz*1+0x99],100
+	vroundpd ymm0,YMMWORD PTR [eax+eiz*1+0x99],7
+	vextractf128 XMMWORD PTR [eax+eiz*1+0x99],ymm0,7
+	vperm2f128 ymm7,ymm0,YMMWORD PTR [eax+eiz*1+0x99],7
 	vblendvpd ymm6,ymm4,YMMWORD PTR [eax+eiz*1+0x99],ymm0
 	vldmxcsr DWORD PTR [eax+eiz*2+0x99]
 	vmovdqa xmm0,XMMWORD PTR [eax+eiz*2+0x99]
@@ -3607,17 +3258,17 @@ _start:
 	vcvtdq2pd ymm0,XMMWORD PTR [eax+eiz*2+0x99]
 	vcvtpd2ps xmm0,YMMWORD PTR [eax+eiz*2+0x99]
 	vpavgb xmm7,xmm0,XMMWORD PTR [eax+eiz*2+0x99]
-	vaeskeygenassist xmm0,XMMWORD PTR [eax+eiz*2+0x99],100
-	vpextrb [eax+eiz*2+0x99],xmm0,100
+	vaeskeygenassist xmm0,XMMWORD PTR [eax+eiz*2+0x99],7
+	vpextrb [eax+eiz*2+0x99],xmm0,7
 	vcvtsi2sd xmm7,xmm0,DWORD PTR [eax+eiz*2+0x99]
 	vblendvps xmm6,xmm4,XMMWORD PTR [eax+eiz*2+0x99],xmm0
-	vpinsrb xmm7,xmm0,[eax+eiz*2+0x99],100
+	vpinsrb xmm7,xmm0,[eax+eiz*2+0x99],7
 	vmovdqa ymm0,YMMWORD PTR [eax+eiz*2+0x99]
 	vmovdqa YMMWORD PTR [eax+eiz*2+0x99],ymm0
 	vpermilpd ymm7,ymm0,YMMWORD PTR [eax+eiz*2+0x99]
-	vroundpd ymm0,YMMWORD PTR [eax+eiz*2+0x99],100
-	vextractf128 XMMWORD PTR [eax+eiz*2+0x99],ymm0,100
-	vperm2f128 ymm7,ymm0,YMMWORD PTR [eax+eiz*2+0x99],100
+	vroundpd ymm0,YMMWORD PTR [eax+eiz*2+0x99],7
+	vextractf128 XMMWORD PTR [eax+eiz*2+0x99],ymm0,7
+	vperm2f128 ymm7,ymm0,YMMWORD PTR [eax+eiz*2+0x99],7
 	vblendvpd ymm6,ymm4,YMMWORD PTR [eax+eiz*2+0x99],ymm0
 	vldmxcsr DWORD PTR [eax+ebx*4+0x99]
 	vmovdqa xmm0,XMMWORD PTR [eax+ebx*4+0x99]
@@ -3627,17 +3278,17 @@ _start:
 	vcvtdq2pd ymm0,XMMWORD PTR [eax+ebx*4+0x99]
 	vcvtpd2ps xmm0,YMMWORD PTR [eax+ebx*4+0x99]
 	vpavgb xmm7,xmm0,XMMWORD PTR [eax+ebx*4+0x99]
-	vaeskeygenassist xmm0,XMMWORD PTR [eax+ebx*4+0x99],100
-	vpextrb [eax+ebx*4+0x99],xmm0,100
+	vaeskeygenassist xmm0,XMMWORD PTR [eax+ebx*4+0x99],7
+	vpextrb [eax+ebx*4+0x99],xmm0,7
 	vcvtsi2sd xmm7,xmm0,DWORD PTR [eax+ebx*4+0x99]
 	vblendvps xmm6,xmm4,XMMWORD PTR [eax+ebx*4+0x99],xmm0
-	vpinsrb xmm7,xmm0,[eax+ebx*4+0x99],100
+	vpinsrb xmm7,xmm0,[eax+ebx*4+0x99],7
 	vmovdqa ymm0,YMMWORD PTR [eax+ebx*4+0x99]
 	vmovdqa YMMWORD PTR [eax+ebx*4+0x99],ymm0
 	vpermilpd ymm7,ymm0,YMMWORD PTR [eax+ebx*4+0x99]
-	vroundpd ymm0,YMMWORD PTR [eax+ebx*4+0x99],100
-	vextractf128 XMMWORD PTR [eax+ebx*4+0x99],ymm0,100
-	vperm2f128 ymm7,ymm0,YMMWORD PTR [eax+ebx*4+0x99],100
+	vroundpd ymm0,YMMWORD PTR [eax+ebx*4+0x99],7
+	vextractf128 XMMWORD PTR [eax+ebx*4+0x99],ymm0,7
+	vperm2f128 ymm7,ymm0,YMMWORD PTR [eax+ebx*4+0x99],7
 	vblendvpd ymm6,ymm4,YMMWORD PTR [eax+ebx*4+0x99],ymm0
 	vldmxcsr DWORD PTR [esp+ecx*8+0x99]
 	vmovdqa xmm0,XMMWORD PTR [esp+ecx*8+0x99]
@@ -3647,17 +3298,17 @@ _start:
 	vcvtdq2pd ymm0,XMMWORD PTR [esp+ecx*8+0x99]
 	vcvtpd2ps xmm0,YMMWORD PTR [esp+ecx*8+0x99]
 	vpavgb xmm7,xmm0,XMMWORD PTR [esp+ecx*8+0x99]
-	vaeskeygenassist xmm0,XMMWORD PTR [esp+ecx*8+0x99],100
-	vpextrb [esp+ecx*8+0x99],xmm0,100
+	vaeskeygenassist xmm0,XMMWORD PTR [esp+ecx*8+0x99],7
+	vpextrb [esp+ecx*8+0x99],xmm0,7
 	vcvtsi2sd xmm7,xmm0,DWORD PTR [esp+ecx*8+0x99]
 	vblendvps xmm6,xmm4,XMMWORD PTR [esp+ecx*8+0x99],xmm0
-	vpinsrb xmm7,xmm0,[esp+ecx*8+0x99],100
+	vpinsrb xmm7,xmm0,[esp+ecx*8+0x99],7
 	vmovdqa ymm0,YMMWORD PTR [esp+ecx*8+0x99]
 	vmovdqa YMMWORD PTR [esp+ecx*8+0x99],ymm0
 	vpermilpd ymm7,ymm0,YMMWORD PTR [esp+ecx*8+0x99]
-	vroundpd ymm0,YMMWORD PTR [esp+ecx*8+0x99],100
-	vextractf128 XMMWORD PTR [esp+ecx*8+0x99],ymm0,100
-	vperm2f128 ymm7,ymm0,YMMWORD PTR [esp+ecx*8+0x99],100
+	vroundpd ymm0,YMMWORD PTR [esp+ecx*8+0x99],7
+	vextractf128 XMMWORD PTR [esp+ecx*8+0x99],ymm0,7
+	vperm2f128 ymm7,ymm0,YMMWORD PTR [esp+ecx*8+0x99],7
 	vblendvpd ymm6,ymm4,YMMWORD PTR [esp+ecx*8+0x99],ymm0
 	vldmxcsr DWORD PTR [ebp+edx*1+0x99]
 	vmovdqa xmm0,XMMWORD PTR [ebp+edx*1+0x99]
@@ -3667,19 +3318,19 @@ _start:
 	vcvtdq2pd ymm0,XMMWORD PTR [ebp+edx*1+0x99]
 	vcvtpd2ps xmm0,YMMWORD PTR [ebp+edx*1+0x99]
 	vpavgb xmm7,xmm0,XMMWORD PTR [ebp+edx*1+0x99]
-	vaeskeygenassist xmm0,XMMWORD PTR [ebp+edx*1+0x99],100
-	vpextrb [ebp+edx*1+0x99],xmm0,100
+	vaeskeygenassist xmm0,XMMWORD PTR [ebp+edx*1+0x99],7
+	vpextrb [ebp+edx*1+0x99],xmm0,7
 	vcvtsi2sd xmm7,xmm0,DWORD PTR [ebp+edx*1+0x99]
 	vblendvps xmm6,xmm4,XMMWORD PTR [ebp+edx*1+0x99],xmm0
-	vpinsrb xmm7,xmm0,[ebp+edx*1+0x99],100
+	vpinsrb xmm7,xmm0,[ebp+edx*1+0x99],7
 	vmovdqa ymm0,YMMWORD PTR [ebp+edx*1+0x99]
 	vmovdqa YMMWORD PTR [ebp+edx*1+0x99],ymm0
 	vpermilpd ymm7,ymm0,YMMWORD PTR [ebp+edx*1+0x99]
-	vroundpd ymm0,YMMWORD PTR [ebp+edx*1+0x99],100
-	vextractf128 XMMWORD PTR [ebp+edx*1+0x99],ymm0,100
-	vperm2f128 ymm7,ymm0,YMMWORD PTR [ebp+edx*1+0x99],100
+	vroundpd ymm0,YMMWORD PTR [ebp+edx*1+0x99],7
+	vextractf128 XMMWORD PTR [ebp+edx*1+0x99],ymm0,7
+	vperm2f128 ymm7,ymm0,YMMWORD PTR [ebp+edx*1+0x99],7
 	vblendvpd ymm6,ymm4,YMMWORD PTR [ebp+edx*1+0x99],ymm0
 # Tests for all register operands.
 	vmovmskpd eax,xmm0
-	vpslld xmm7,xmm0,100
+	vpslld xmm7,xmm0,7
 	vmovmskps eax,ymm0
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index a0ad997..71fe103 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -144,6 +144,8 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "opts-intel"
     run_dump_test "sse2avx-opts"
     run_dump_test "sse2avx-opts-intel"
+    run_dump_test "fma"
+    run_dump_test "fma-intel"
 
     # These tests require support for 8 and 16 bit relocs,
     # so we only run them for ELF and COFF targets.
@@ -303,6 +305,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-sse2avx-opts-intel"
     run_dump_test "x86-64-avx-swap"
     run_dump_test "x86-64-avx-swap-intel"
+    run_dump_test "x86-64-fma"
+    run_dump_test "x86-64-fma-intel"
 
     if { ![istarget "*-*-aix*"]
       && ![istarget "*-*-beos*"]
diff --git a/gas/testsuite/gas/i386/inval-avx.l b/gas/testsuite/gas/i386/inval-avx.l
index 796b1e4..a9fb8de 100644
--- a/gas/testsuite/gas/i386/inval-avx.l
+++ b/gas/testsuite/gas/i386/inval-avx.l
@@ -2,53 +2,9 @@
 .*:4: Error: .*
 .*:5: Error: .*
 .*:6: Error: .*
-.*:7: Error: .*
-.*:8: Error: .*
 .*:9: Error: .*
 .*:10: Error: .*
 .*:11: Error: .*
-.*:12: Error: .*
-.*:13: Error: .*
-.*:14: Error: .*
-.*:15: Error: .*
-.*:16: Error: .*
-.*:17: Error: .*
-.*:18: Error: .*
-.*:19: Error: .*
-.*:20: Error: .*
-.*:21: Error: .*
-.*:22: Error: .*
-.*:23: Error: .*
-.*:24: Error: .*
-.*:25: Error: .*
-.*:26: Error: .*
-.*:27: Error: .*
-.*:28: Error: .*
-.*:31: Error: .*
-.*:32: Error: .*
-.*:33: Error: .*
-.*:34: Error: .*
-.*:35: Error: .*
-.*:36: Error: .*
-.*:37: Error: .*
-.*:38: Error: .*
-.*:39: Error: .*
-.*:40: Error: .*
-.*:41: Error: .*
-.*:42: Error: .*
-.*:43: Error: .*
-.*:44: Error: .*
-.*:45: Error: .*
-.*:46: Error: .*
-.*:47: Error: .*
-.*:48: Error: .*
-.*:49: Error: .*
-.*:50: Error: .*
-.*:51: Error: .*
-.*:52: Error: .*
-.*:53: Error: .*
-.*:54: Error: .*
-.*:55: Error: .*
 GAS LISTING .*
 
 
@@ -58,52 +14,8 @@ GAS LISTING .*
 [ 	]*4[ 	]+vcvtpd2dq \(%ecx\),%xmm2
 [ 	]*5[ 	]+vcvtpd2ps \(%ecx\),%xmm2
 [ 	]*6[ 	]+vcvttpd2dq \(%ecx\),%xmm2
-[ 	]*7[ 	]+vfmaddpd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*8[ 	]+vfmaddps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*9[ 	]+vfmaddsd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*10[ 	]+vfmaddss \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*11[ 	]+vfmaddsubpd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*12[ 	]+vfmaddsubps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*13[ 	]+vfmsubaddpd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*14[ 	]+vfmsubaddps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*15[ 	]+vfmsubpd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*16[ 	]+vfmsubps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*17[ 	]+vfmsubsd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*18[ 	]+vfmsubss \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*19[ 	]+vfnmaddpd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*20[ 	]+vfnmaddps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*21[ 	]+vfnmaddsd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*22[ 	]+vfnmaddss \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*23[ 	]+vfnmsubpd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*24[ 	]+vfnmsubps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*25[ 	]+vfnmsubsd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*26[ 	]+vfnmsubss \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*27[ 	]+vpermil2pd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*28[ 	]+vpermil2ps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*29[ 	]+
-[ 	]*30[ 	]+\.intel_syntax noprefix
-[ 	]*31[ 	]+vcvtpd2dq xmm2,\[ecx\]
-[ 	]*32[ 	]+vcvtpd2ps xmm2,\[ecx\]
-[ 	]*33[ 	]+vcvttpd2dq xmm2,\[ecx\]
-[ 	]*34[ 	]+vfmaddpd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*35[ 	]+vfmaddps xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*36[ 	]+vfmaddsd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*37[ 	]+vfmaddss xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*38[ 	]+vfmaddsubpd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*39[ 	]+vfmaddsubps xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*40[ 	]+vfmsubaddpd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*41[ 	]+vfmsubaddps xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*42[ 	]+vfmsubpd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*43[ 	]+vfmsubps xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*44[ 	]+vfmsubsd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*45[ 	]+vfmsubss xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*46[ 	]+vfnmaddpd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*47[ 	]+vfnmaddps xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*48[ 	]+vfnmaddsd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*49[ 	]+vfnmaddss xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*50[ 	]+vfnmsubpd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*51[ 	]+vfnmsubps xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*52[ 	]+vfnmsubsd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*53[ 	]+vfnmsubss xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*54[ 	]+vpermil2pd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*55[ 	]+vpermil2ps xmm3,xmm1,xmm2,xmm4,0x10
+[ 	]*7[ 	]+
+[ 	]*8[ 	]+\.intel_syntax noprefix
+[ 	]*9[ 	]+vcvtpd2dq xmm2,\[ecx\]
+[ 	]*10[ 	]+vcvtpd2ps xmm2,\[ecx\]
+[ 	]*11[ 	]+vcvttpd2dq xmm2,\[ecx\]
diff --git a/gas/testsuite/gas/i386/inval-avx.s b/gas/testsuite/gas/i386/inval-avx.s
index bf42a8d..94a64f6 100644
--- a/gas/testsuite/gas/i386/inval-avx.s
+++ b/gas/testsuite/gas/i386/inval-avx.s
@@ -4,52 +4,8 @@ _start:
 	vcvtpd2dq (%ecx),%xmm2
 	vcvtpd2ps (%ecx),%xmm2
 	vcvttpd2dq (%ecx),%xmm2
-	vfmaddpd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmaddps $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmaddsd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmaddss $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmaddsubpd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmaddsubps $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmsubaddpd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmsubaddps $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmsubpd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmsubps $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmsubsd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmsubss $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmaddpd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmaddps $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmaddsd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmaddss $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmsubpd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmsubps $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmsubsd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmsubss $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vpermil2pd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vpermil2ps $17,%xmm4,%xmm2,%xmm1,%xmm3
 
 	.intel_syntax noprefix
 	vcvtpd2dq xmm2,[ecx]
 	vcvtpd2ps xmm2,[ecx]
 	vcvttpd2dq xmm2,[ecx]
-	vfmaddpd xmm3,xmm1,xmm2,xmm4,0x10
-	vfmaddps xmm3,xmm1,xmm2,xmm4,0x10
-	vfmaddsd xmm3,xmm1,xmm2,xmm4,0x10
-	vfmaddss xmm3,xmm1,xmm2,xmm4,0x10
-	vfmaddsubpd xmm3,xmm1,xmm2,xmm4,0x10
-	vfmaddsubps xmm3,xmm1,xmm2,xmm4,0x10
-	vfmsubaddpd xmm3,xmm1,xmm2,xmm4,0x10
-	vfmsubaddps xmm3,xmm1,xmm2,xmm4,0x10
-	vfmsubpd xmm3,xmm1,xmm2,xmm4,0x10
-	vfmsubps xmm3,xmm1,xmm2,xmm4,0x10
-	vfmsubsd xmm3,xmm1,xmm2,xmm4,0x10
-	vfmsubss xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmaddpd xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmaddps xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmaddsd xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmaddss xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmsubpd xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmsubps xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmsubsd xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmsubss xmm3,xmm1,xmm2,xmm4,0x10
-	vpermil2pd xmm3,xmm1,xmm2,xmm4,0x10
-	vpermil2ps xmm3,xmm1,xmm2,xmm4,0x10
diff --git a/gas/testsuite/gas/i386/x86-64-arch-2.d b/gas/testsuite/gas/i386/x86-64-arch-2.d
index 84ce100..2413f87 100644
--- a/gas/testsuite/gas/i386/x86-64-arch-2.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2.d
@@ -22,7 +22,7 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	66 0f 38 dc 01       	aesenc \(%rcx\),%xmm0
 [ 	]*[a-f0-9]+:	66 0f 3a 44 c1 08    	pclmulqdq \$0x8,%xmm1,%xmm0
 [ 	]*[a-f0-9]+:	c4 e2 79 dc 11       	vaesenc \(%rcx\),%xmm0,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 c9 98 d4       	vfmadd132pd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	0f 38 f0 19          	movbe  \(%rcx\),%ebx
 [ 	]*[a-f0-9]+:	66 0f 38 80 19       	invept \(%rcx\),%rbx
 [ 	]*[a-f0-9]+:	0f 0f dc b7          	pmulhrw %mm4,%mm3
diff --git a/gas/testsuite/gas/i386/x86-64-arch-2.s b/gas/testsuite/gas/i386/x86-64-arch-2.s
index bbe34cb..be1093a 100644
--- a/gas/testsuite/gas/i386/x86-64-arch-2.s
+++ b/gas/testsuite/gas/i386/x86-64-arch-2.s
@@ -31,7 +31,7 @@ pclmulqdq $8,%xmm1,%xmm0
 # AES + AVX
 vaesenc  (%rcx),%xmm0,%xmm2
 # FMA
-vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+vfmadd132pd %xmm4,%xmm6,%xmm2
 # MOVBE
 movbe   (%rcx),%ebx
 # EPT
diff --git a/gas/testsuite/gas/i386/x86-64-avx-intel.d b/gas/testsuite/gas/i386/x86-64-avx-intel.d
index e9de6bf..6a7ec3a 100644
--- a/gas/testsuite/gas/i386/x86-64-avx-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-avx-intel.d
@@ -15,14 +15,14 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e2 4d 2f 21       	vmaskmovpd YMMWORD PTR \[rcx\],ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 5d 2c 31       	vmaskmovps ymm6,ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 4d 2e 21       	vmaskmovps YMMWORD PTR \[rcx\],ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 64    	vpermilpd ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 64    	vpermilpd ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 64    	vpermilps ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 64    	vpermilps ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 64    	vroundpd ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 64    	vroundpd ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 64    	vroundps ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 64    	vroundps ymm6,YMMWORD PTR \[rcx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 07    	vpermilpd ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 07    	vpermilpd ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 07    	vpermilps ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 07    	vpermilps ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 07    	vroundpd ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 07    	vroundpd ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 07    	vroundps ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 07    	vroundps ymm6,YMMWORD PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c5 cd 58 d4          	vaddpd ymm2,ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 cd 58 11          	vaddpd ymm2,ymm6,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 cc 58 d4          	vaddps ymm2,ymm6,ymm4
@@ -221,109 +221,69 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fd 5a 21          	vcvtpd2ps xmm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fd e6 e4          	vcvttpd2dq xmm4,ymm4
 [ 	]*[a-f0-9]+:	c5 fd e6 21          	vcvttpd2dq xmm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fc 5b e4          	vcvtdq2ps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 5b f4          	vcvtdq2ps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 5b 21          	vcvtdq2ps ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fd 5b e4          	vcvtps2dq ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 5b f4          	vcvtps2dq ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 5b 21          	vcvtps2dq ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fe 5b e4          	vcvttps2dq ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 5b f4          	vcvttps2dq ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 5b 21          	vcvttps2dq ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fd 28 e4          	vmovapd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 28 f4          	vmovapd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 28 21          	vmovapd ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fc 28 e4          	vmovaps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 28 f4          	vmovaps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 28 21          	vmovaps ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fd 6f e4          	vmovdqa ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 6f f4          	vmovdqa ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 6f 21          	vmovdqa ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fe 6f e4          	vmovdqu ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 6f f4          	vmovdqu ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 6f 21          	vmovdqu ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 ff 12 e4          	vmovddup ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 ff 12 f4          	vmovddup ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 ff 12 21          	vmovddup ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fe 16 e4          	vmovshdup ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 16 f4          	vmovshdup ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 16 21          	vmovshdup ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fe 12 e4          	vmovsldup ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 12 f4          	vmovsldup ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 12 21          	vmovsldup ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fd 10 e4          	vmovupd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 10 f4          	vmovupd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 10 21          	vmovupd ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fc 10 e4          	vmovups ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 10 f4          	vmovups ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 10 21          	vmovups ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e2 7d 17 e4       	vptest ymm4,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 17 f4       	vptest ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 17 21       	vptest ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fc 53 e4          	vrcpps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 53 f4          	vrcpps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 53 21          	vrcpps ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fc 52 e4          	vrsqrtps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 52 f4          	vrsqrtps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 52 21          	vrsqrtps ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fd 51 e4          	vsqrtpd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 51 f4          	vsqrtpd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 51 21          	vsqrtpd ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fc 51 e4          	vsqrtps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 51 f4          	vsqrtps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 51 21          	vsqrtps ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e2 7d 0f e4       	vtestpd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0f f4       	vtestpd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 0f 21       	vtestpd ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e2 7d 0e e4       	vtestps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0e f4       	vtestps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 0e 21       	vtestps ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 ff f0 21          	vlddqu ymm4,\[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 64    	vblendpd ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 64    	vblendpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 64    	vblendps ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 64    	vblendps ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 cd c2 d4 64       	vcmppd ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cd c2 11 64       	vcmppd ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 cc c2 d4 64       	vcmpps ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cc c2 11 64       	vcmpps ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 64    	vdpps  ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 64    	vdpps  ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 64    	vperm2f128 ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 64    	vperm2f128 ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 cd c6 d4 64       	vshufpd ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cd c6 11 64       	vshufpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 cc c6 d4 64       	vshufps ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cc c6 11 64       	vshufps ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 07    	vblendpd ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 07    	vblendpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 07    	vblendps ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 07    	vblendps ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 cd c2 d4 07       	vcmpordpd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c5 cd c2 11 07       	vcmpordpd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cc c2 d4 07       	vcmpordps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c5 cc c2 11 07       	vcmpordps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 07    	vdpps  ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 07    	vdpps  ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 07    	vperm2f128 ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 07    	vperm2f128 ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 cd c6 d4 07       	vshufpd ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c5 cd c6 11 07       	vshufpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 cc c6 d4 07       	vshufps ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c5 cc c6 11 07       	vshufps ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b fe 40    	vblendvpd ymm7,ymm2,ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b 39 40    	vblendvpd ymm7,ymm2,YMMWORD PTR \[rcx\],ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a fe 40    	vblendvps ymm7,ymm2,ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a 39 40    	vblendvps ymm7,ymm2,YMMWORD PTR \[rcx\],ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 fc 20    	vfmaddps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d fc 20    	vfmaddsubpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c fc 20    	vfmaddsubps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f fc 20    	vfmsubaddpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e fc 20    	vfmsubaddps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d fc 20    	vfmsubpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c fc 20    	vfmsubps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 fc 20    	vfnmaddpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 fc 20    	vfnmaddps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d fc 20    	vfnmsubpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c fc 20    	vfnmsubps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 62    	vpermilmo2pd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 62    	vpermilmo2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 63    	vpermilmz2pd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 63    	vpermilmz2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 60    	vpermiltd2pd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 60    	vpermiltd2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 62    	vpermilmo2ps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 62    	vpermilmo2ps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 63    	vpermilmz2ps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 63    	vpermilmz2ps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 60    	vpermiltd2ps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 60    	vpermiltd2ps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 6a    	vpermil2pd ymm7,ymm2,ymm6,ymm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 6a    	vpermil2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 6a    	vpermil2ps ymm7,ymm2,ymm6,ymm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 6a    	vpermil2ps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 64    	vinsertf128 ymm6,ymm4,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 64    	vinsertf128 ymm6,ymm4,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 64    	vextractf128 xmm4,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 64    	vextractf128 XMMWORD PTR \[rcx\],ymm4,0x64
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 07    	vinsertf128 ymm6,ymm4,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 07    	vinsertf128 ymm6,ymm4,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 07    	vextractf128 xmm4,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 07    	vextractf128 XMMWORD PTR \[rcx\],ymm4,0x7
 [ 	]*[a-f0-9]+:	c4 e2 7d 1a 21       	vbroadcastf128 ymm4,XMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 f8 5b f4          	vcvtdq2ps xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 f8 5b 21          	vcvtdq2ps xmm4,XMMWORD PTR \[rcx\]
@@ -764,120 +724,60 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 c8 c2 39 1f       	vcmptrue_usps xmm7,xmm6,XMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 59 2c 31       	vmaskmovps xmm6,xmm4,XMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 59 2d 31       	vmaskmovpd xmm6,xmm4,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df f4 64    	vaeskeygenassist xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 df 31 64    	vaeskeygenassist xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 64    	vpcmpestri xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 61 31 64    	vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 64    	vpcmpestrm xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 60 31 64    	vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 64    	vpcmpistri xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 63 31 64    	vpcmpistri xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 64    	vpcmpistrm xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 62 31 64    	vpcmpistrm xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 64    	vpermilpd xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 05 31 64    	vpermilpd xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 64    	vpermilps xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 04 31 64    	vpermilps xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 f9 70 f4 64       	vpshufd xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 f9 70 31 64       	vpshufd xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 fa 70 f4 64       	vpshufhw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 fa 70 31 64       	vpshufhw xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 fb 70 f4 64       	vpshuflw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 fb 70 31 64       	vpshuflw xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 64    	vroundpd xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 09 31 64    	vroundpd xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 64    	vroundps xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 08 31 64    	vroundps xmm6,XMMWORD PTR \[rcx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df f4 07    	vaeskeygenassist xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 df 31 07    	vaeskeygenassist xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 07    	vpcmpestri xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 61 31 07    	vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 07    	vpcmpestrm xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 60 31 07    	vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 07    	vpcmpistri xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 63 31 07    	vpcmpistri xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 07    	vpcmpistrm xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 62 31 07    	vpcmpistrm xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 07    	vpermilpd xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 05 31 07    	vpermilpd xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 07    	vpermilps xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 04 31 07    	vpermilps xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 f9 70 f4 07       	vpshufd xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 f9 70 31 07       	vpshufd xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 fa 70 f4 07       	vpshufhw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 fa 70 31 07       	vpshufhw xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 fb 70 f4 07       	vpshuflw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 fb 70 31 07       	vpshuflw xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 07    	vroundpd xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 09 31 07    	vroundpd xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 07    	vroundps xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 08 31 07    	vroundps xmm6,XMMWORD PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c4 e2 49 2e 21       	vmaskmovps XMMWORD PTR \[rcx\],xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 49 2f 21       	vmaskmovpd XMMWORD PTR \[rcx\],xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 64    	vblendpd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 64    	vblendpd xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 64    	vblendps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 64    	vblendps xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 c9 c2 d4 64       	vcmppd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 c2 11 64       	vcmppd xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 c8 c2 d4 64       	vcmpps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c8 c2 11 64       	vcmpps xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 64    	vdppd  xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 41 11 64    	vdppd  xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 64    	vdpps  xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 40 11 64    	vdpps  xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 64    	vmpsadbw xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 42 11 64    	vmpsadbw xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 64    	vpalignr xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 64    	vpalignr xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 64    	vpblendw xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 64    	vpblendw xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 c9 c6 d4 64       	vshufpd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 c6 11 64       	vshufpd xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 c8 c6 d4 64       	vshufps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c8 c6 11 64       	vshufps xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 07    	vblendpd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 07    	vblendpd xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 07    	vblendps xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 07    	vblendps xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 c9 c2 d4 07       	vcmpordpd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 c9 c2 11 07       	vcmpordpd xmm2,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 c8 c2 d4 07       	vcmpordps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 c8 c2 11 07       	vcmpordps xmm2,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 07    	vdppd  xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 41 11 07    	vdppd  xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 07    	vdpps  xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 40 11 07    	vdpps  xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 07    	vmpsadbw xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 42 11 07    	vmpsadbw xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 07    	vpalignr xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 07    	vpalignr xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 07    	vpblendw xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 07    	vpblendw xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 c9 c6 d4 07       	vshufpd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 c6 11 07       	vshufpd xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 c8 c6 d4 07       	vshufps xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c8 c6 11 07       	vshufps xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 69 4b fe 40    	vblendvpd xmm7,xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4b 39 40    	vblendvpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4a fe 40    	vblendvps xmm7,xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4a 39 40    	vblendvps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4c fe 40    	vpblendvb xmm7,xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4c 39 40    	vpblendvb xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 fc 20    	vfmaddpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 fc 20    	vfmaddps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d fc 20    	vfmaddsubpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c fc 20    	vfmaddsubps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f fc 20    	vfmsubaddpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e fc 20    	vfmsubaddps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d fc 20    	vfmsubpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c fc 20    	vfmsubps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 fc 20    	vfnmaddpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 fc 20    	vfnmaddps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d fc 20    	vfnmsubpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c fc 20    	vfnmsubps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 62    	vpermilmo2pd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 62    	vpermilmo2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 42    	vpermilmo2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 63    	vpermilmz2pd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 63    	vpermilmz2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 43    	vpermilmz2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 60    	vpermiltd2pd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 60    	vpermiltd2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 40    	vpermiltd2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 62    	vpermilmo2ps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 62    	vpermilmo2ps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 42    	vpermilmo2ps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 63    	vpermilmz2ps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 63    	vpermilmz2ps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 43    	vpermilmz2ps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 60    	vpermiltd2ps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 60    	vpermiltd2ps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 40    	vpermiltd2ps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 6a    	vpermil2pd xmm7,xmm2,xmm6,xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 6a    	vpermil2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 4a    	vpermil2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 6a    	vpermil2ps xmm7,xmm2,xmm6,xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 6a    	vpermil2ps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 4a    	vpermil2ps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4,0xa
 [ 	]*[a-f0-9]+:	c4 e2 7d 19 21       	vbroadcastsd ymm4,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 f9 2f f4          	vcomisd xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 f9 2f 21          	vcomisd xmm4,QWORD PTR \[rcx\]
@@ -925,30 +825,18 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e1 db 2a 31       	vcvtsi2sd xmm6,xmm4,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e1 da 2a f1       	vcvtsi2ss xmm6,xmm4,rcx
 [ 	]*[a-f0-9]+:	c4 e1 da 2a 31       	vcvtsi2ss xmm6,xmm4,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 d9 22 f1 64    	vpinsrq xmm6,xmm4,rcx,0x64
-[ 	]*[a-f0-9]+:	c4 e3 d9 22 31 64    	vpinsrq xmm6,xmm4,QWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 f9 16 e1 64    	vpextrq rcx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 f9 16 21 64    	vpextrq QWORD PTR \[rcx\],xmm4,0x64
+[ 	]*[a-f0-9]+:	c4 e3 d9 22 f1 07    	vpinsrq xmm6,xmm4,rcx,0x7
+[ 	]*[a-f0-9]+:	c4 e3 d9 22 31 07    	vpinsrq xmm6,xmm4,QWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 f9 16 e1 07    	vpextrq rcx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 f9 16 21 07    	vpextrq QWORD PTR \[rcx\],xmm4,0x7
 [ 	]*[a-f0-9]+:	c5 d9 12 31          	vmovlpd xmm6,xmm4,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 d8 12 31          	vmovlps xmm6,xmm4,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 d9 16 31          	vmovhpd xmm6,xmm4,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 d8 16 31          	vmovhps xmm6,xmm4,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 cb c2 d4 64       	vcmpsd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 cb c2 11 64       	vcmpsd xmm2,xmm6,QWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 64    	vroundsd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 64    	vroundsd xmm2,xmm6,QWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b fc 20    	vfmaddsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f fc 20    	vfmsubsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b fc 20    	vfnmaddsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f fc 20    	vfnmsubsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 cb c2 d4 07       	vcmpordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cb c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 07    	vroundsd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 07    	vroundsd xmm2,xmm6,QWORD PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c5 cb 58 d4          	vaddsd xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 cb 58 11          	vaddsd xmm2,xmm6,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 cb 5a d4          	vcvtsd2ss xmm2,xmm6,xmm4
@@ -1029,6 +917,8 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1e       	vcmpgt_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 cb c2 d4 1f       	vcmptrue_ussd xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1f       	vcmptrue_ussd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr DWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 ca 58 d4          	vaddss xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 ca 58 11          	vaddss xmm2,xmm6,DWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 ca 5a d4          	vcvtss2sd xmm2,xmm6,xmm4
@@ -1144,55 +1034,43 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 f9 50 cc          	vmovmskpd ecx,xmm4
 [ 	]*[a-f0-9]+:	c5 f8 50 cc          	vmovmskps ecx,xmm4
 [ 	]*[a-f0-9]+:	c5 f9 d7 cc          	vpmovmskb ecx,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 64    	vextractps ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps DWORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 64    	vpextrd ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 16 21 64    	vpextrd DWORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 64    	vextractps ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps DWORD PTR \[rcx\],xmm4,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 07    	vextractps ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps DWORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 07    	vpextrd ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 16 21 07    	vpextrd DWORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 07    	vextractps ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps DWORD PTR \[rcx\],xmm4,0x7
 [ 	]*[a-f0-9]+:	c5 db 2a f1          	vcvtsi2sd xmm6,xmm4,ecx
 [ 	]*[a-f0-9]+:	c5 db 2a 31          	vcvtsi2sd xmm6,xmm4,DWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 da 2a f1          	vcvtsi2ss xmm6,xmm4,ecx
 [ 	]*[a-f0-9]+:	c5 da 2a 31          	vcvtsi2ss xmm6,xmm4,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 ca c2 d4 64       	vcmpss xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 ca c2 11 64       	vcmpss xmm2,xmm6,DWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 64    	vinsertps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 21 11 64    	vinsertps xmm2,xmm6,DWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 64    	vroundss xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 64    	vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a fc 20    	vfmaddss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e fc 20    	vfmsubss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a fc 20    	vfnmaddss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e fc 20    	vfnmsubss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 ca c2 d4 07       	vcmpordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ca c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 07    	vinsertps xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 21 11 07    	vinsertps xmm2,xmm6,DWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 07    	vroundss xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 07    	vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c4 e2 79 22 f4       	vpmovsxbq xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 22 21       	vpmovsxbq xmm4,WORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 79 32 f4       	vpmovzxbq xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 32 21       	vpmovzxbq xmm4,WORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw WORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw WORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 f1 64       	vpinsrw xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw xmm6,xmm4,WORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 f1 64       	vpinsrw xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw xmm6,xmm4,WORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 64    	vpextrb ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb BYTE PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 64    	vpextrb ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb BYTE PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x64
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw WORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw WORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 f1 07       	vpinsrw xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw xmm6,xmm4,WORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 f1 07       	vpinsrw xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw xmm6,xmm4,WORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 07    	vpextrb ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb BYTE PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 07    	vpextrb ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb BYTE PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c5 f9 f7 f4          	vmaskmovdqu xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 fa 7e f4          	vmovq  xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 f9 50 cc          	vmovmskpd ecx,xmm4
@@ -1202,17 +1080,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 c8 16 d4          	vmovlhps xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 cb 10 d4          	vmovsd xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 ca 10 d4          	vmovss xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c5 c9 72 f4 64       	vpslld xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 fc 64       	vpslldq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 f4 64       	vpsllq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 71 f4 64       	vpsllw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 72 e4 64       	vpsrad xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 71 e4 64       	vpsraw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 72 d4 64       	vpsrld xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 dc 64       	vpsrldq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 d4 64       	vpsrlq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 71 d4 64       	vpsrlw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw ecx,xmm4,0x64
+[ 	]*[a-f0-9]+:	c5 c9 72 f4 07       	vpslld xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 fc 07       	vpslldq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 f4 07       	vpsllq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 71 f4 07       	vpsllw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 72 e4 07       	vpsrad xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 71 e4 07       	vpsraw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 72 d4 07       	vpsrld xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 dc 07       	vpsrldq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 d4 07       	vpsrlq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 71 d4 07       	vpsrlw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw ecx,xmm4,0x7
 [ 	]*[a-f0-9]+:	c5 fd 50 cc          	vmovmskpd ecx,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 50 cc          	vmovmskps ecx,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 50 cc          	vmovmskpd ecx,ymm4
@@ -1231,17 +1109,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 25 78 56 34 12 	vcvtdq2pd ymm8,XMMWORD PTR ds:0x12345678
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 25 78 56 34 12 	vcvtpd2ps xmm8,YMMWORD PTR ds:0x12345678
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 25 78 56 34 12 	vpavgb xmm15,xmm8,XMMWORD PTR ds:0x12345678
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 78 56 34 12 64 	vaeskeygenassist xmm8,XMMWORD PTR ds:0x12345678,0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 78 56 34 12 64 	vpextrb BYTE PTR ds:0x12345678,xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 78 56 34 12 07 	vaeskeygenassist xmm8,XMMWORD PTR ds:0x12345678,0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 78 56 34 12 07 	vpextrb BYTE PTR ds:0x12345678,xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 25 78 56 34 12 	vcvtsi2sd xmm15,xmm8,DWORD PTR ds:0x12345678
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 25 78 56 34 12 80 	vblendvps xmm14,xmm12,XMMWORD PTR ds:0x12345678,xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 78 56 34 12 64 	vpinsrb xmm15,xmm8,BYTE PTR ds:0x12345678,0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 78 56 34 12 07 	vpinsrb xmm15,xmm8,BYTE PTR ds:0x12345678,0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 25 78 56 34 12 	vmovdqa ymm8,YMMWORD PTR ds:0x12345678
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 25 78 56 34 12 	vmovdqa YMMWORD PTR ds:0x12345678,ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 25 78 56 34 12 	vpermilpd ymm15,ymm8,YMMWORD PTR ds:0x12345678
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 78 56 34 12 64 	vroundpd ymm8,YMMWORD PTR ds:0x12345678,0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 78 56 34 12 64 	vextractf128 XMMWORD PTR ds:0x12345678,ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 78 56 34 12 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR ds:0x12345678,0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 78 56 34 12 07 	vroundpd ymm8,YMMWORD PTR ds:0x12345678,0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 78 56 34 12 07 	vextractf128 XMMWORD PTR ds:0x12345678,ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 78 56 34 12 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR ds:0x12345678,0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 25 78 56 34 12 80 	vblendvpd ymm14,ymm12,YMMWORD PTR ds:0x12345678,ymm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 55 00       	vldmxcsr DWORD PTR \[rbp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 79 6f 45 00       	vmovdqa xmm8,XMMWORD PTR \[rbp\+0x0\]
@@ -1251,17 +1129,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 45 00       	vcvtdq2pd ymm8,XMMWORD PTR \[rbp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 7d 5a 45 00       	vcvtpd2ps xmm8,YMMWORD PTR \[rbp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 39 e0 7d 00       	vpavgb xmm15,xmm8,XMMWORD PTR \[rbp\+0x0\]
-[ 	]*[a-f0-9]+:	c4 63 79 df 45 00 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rbp\+0x0\],0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 45 00 64 	vpextrb BYTE PTR \[rbp\+0x0\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 45 00 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rbp\+0x0\],0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 45 00 07 	vpextrb BYTE PTR \[rbp\+0x0\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a 7d 00       	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbp\+0x0\]
 [ 	]*[a-f0-9]+:	c4 63 19 4a 75 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rbp\+0x0\],xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 7d 00 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rbp\+0x0\],0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 7d 00 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rbp\+0x0\],0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 45 00       	vmovdqa ymm8,YMMWORD PTR \[rbp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 7d 7f 45 00       	vmovdqa YMMWORD PTR \[rbp\+0x0\],ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 7d 00    	vpermilpd ymm15,ymm8,YMMWORD PTR \[rbp\+0x0\]
-[ 	]*[a-f0-9]+:	c4 63 7d 09 45 00 64 	vroundpd ymm8,YMMWORD PTR \[rbp\+0x0\],0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 45 00 64 	vextractf128 XMMWORD PTR \[rbp\+0x0\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 7d 00 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbp\+0x0\],0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 45 00 07 	vroundpd ymm8,YMMWORD PTR \[rbp\+0x0\],0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 45 00 07 	vextractf128 XMMWORD PTR \[rbp\+0x0\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 7d 00 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbp\+0x0\],0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 75 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rbp\+0x0\],ymm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 24       	vldmxcsr DWORD PTR \[rsp\]
 [ 	]*[a-f0-9]+:	c5 79 6f 04 24       	vmovdqa xmm8,XMMWORD PTR \[rsp\]
@@ -1271,17 +1149,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 24       	vcvtdq2pd ymm8,XMMWORD PTR \[rsp\]
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 24       	vcvtpd2ps xmm8,YMMWORD PTR \[rsp\]
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 24       	vpavgb xmm15,xmm8,XMMWORD PTR \[rsp\]
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 24 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rsp\],0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 24 64 	vpextrb BYTE PTR \[rsp\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 24 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rsp\],0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 24 07 	vpextrb BYTE PTR \[rsp\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 24       	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rsp\]
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 24 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rsp\],xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 24 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rsp\],0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 24 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rsp\],0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 24       	vmovdqa ymm8,YMMWORD PTR \[rsp\]
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 24       	vmovdqa YMMWORD PTR \[rsp\],ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 24    	vpermilpd ymm15,ymm8,YMMWORD PTR \[rsp\]
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 24 64 	vroundpd ymm8,YMMWORD PTR \[rsp\],0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 24 64 	vextractf128 XMMWORD PTR \[rsp\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 24 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rsp\],0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 24 07 	vroundpd ymm8,YMMWORD PTR \[rsp\],0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 24 07 	vextractf128 XMMWORD PTR \[rsp\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 24 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rsp\],0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 24 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rsp\],ymm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 95 99 00 00 00 	vldmxcsr DWORD PTR \[rbp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 79 6f 85 99 00 00 00 	vmovdqa xmm8,XMMWORD PTR \[rbp\+0x99\]
@@ -1291,17 +1169,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 85 99 00 00 00 	vcvtdq2pd ymm8,XMMWORD PTR \[rbp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 5a 85 99 00 00 00 	vcvtpd2ps xmm8,YMMWORD PTR \[rbp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 39 e0 bd 99 00 00 00 	vpavgb xmm15,xmm8,XMMWORD PTR \[rbp\+0x99\]
-[ 	]*[a-f0-9]+:	c4 63 79 df 85 99 00 00 00 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rbp\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 85 99 00 00 00 64 	vpextrb BYTE PTR \[rbp\+0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 85 99 00 00 00 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rbp\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 85 99 00 00 00 07 	vpextrb BYTE PTR \[rbp\+0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a bd 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbp\+0x99\]
 [ 	]*[a-f0-9]+:	c4 63 19 4a b5 99 00 00 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rbp\+0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 bd 99 00 00 00 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rbp\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 bd 99 00 00 00 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rbp\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 85 99 00 00 00 	vmovdqa ymm8,YMMWORD PTR \[rbp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 7f 85 99 00 00 00 	vmovdqa YMMWORD PTR \[rbp\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bd 99 00 00 00 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rbp\+0x99\]
-[ 	]*[a-f0-9]+:	c4 63 7d 09 85 99 00 00 00 64 	vroundpd ymm8,YMMWORD PTR \[rbp\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 85 99 00 00 00 64 	vextractf128 XMMWORD PTR \[rbp\+0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bd 99 00 00 00 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbp\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 85 99 00 00 00 07 	vroundpd ymm8,YMMWORD PTR \[rbp\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 85 99 00 00 00 07 	vextractf128 XMMWORD PTR \[rbp\+0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bd 99 00 00 00 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbp\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b5 99 00 00 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rbp\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 c1 78 ae 97 99 00 00 00 	vldmxcsr DWORD PTR \[r15\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 79 6f 87 99 00 00 00 	vmovdqa xmm8,XMMWORD PTR \[r15\+0x99\]
@@ -1311,38 +1189,38 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 41 7e e6 87 99 00 00 00 	vcvtdq2pd ymm8,XMMWORD PTR \[r15\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 7d 5a 87 99 00 00 00 	vcvtpd2ps xmm8,YMMWORD PTR \[r15\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 39 e0 bf 99 00 00 00 	vpavgb xmm15,xmm8,XMMWORD PTR \[r15\+0x99\]
-[ 	]*[a-f0-9]+:	c4 43 79 df 87 99 00 00 00 64 	vaeskeygenassist xmm8,XMMWORD PTR \[r15\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 43 79 14 87 99 00 00 00 64 	vpextrb BYTE PTR \[r15\+0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 43 79 df 87 99 00 00 00 07 	vaeskeygenassist xmm8,XMMWORD PTR \[r15\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 43 79 14 87 99 00 00 00 07 	vpextrb BYTE PTR \[r15\+0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 41 3b 2a bf 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r15\+0x99\]
 [ 	]*[a-f0-9]+:	c4 43 19 4a b7 99 00 00 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[r15\+0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 43 39 20 bf 99 00 00 00 64 	vpinsrb xmm15,xmm8,BYTE PTR \[r15\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 43 39 20 bf 99 00 00 00 07 	vpinsrb xmm15,xmm8,BYTE PTR \[r15\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 41 7d 6f 87 99 00 00 00 	vmovdqa ymm8,YMMWORD PTR \[r15\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 7d 7f 87 99 00 00 00 	vmovdqa YMMWORD PTR \[r15\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 42 3d 0d bf 99 00 00 00 	vpermilpd ymm15,ymm8,YMMWORD PTR \[r15\+0x99\]
-[ 	]*[a-f0-9]+:	c4 43 7d 09 87 99 00 00 00 64 	vroundpd ymm8,YMMWORD PTR \[r15\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 43 7d 19 87 99 00 00 00 64 	vextractf128 XMMWORD PTR \[r15\+0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 43 3d 06 bf 99 00 00 00 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r15\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 43 7d 09 87 99 00 00 00 07 	vroundpd ymm8,YMMWORD PTR \[r15\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 43 7d 19 87 99 00 00 00 07 	vextractf128 XMMWORD PTR \[r15\+0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 43 3d 06 bf 99 00 00 00 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r15\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 43 1d 4b b7 99 00 00 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[r15\+0x99\],ymm8
-[ 	]*[a-f0-9]+:	c5 f8 ae 15 99 00 00 00 	vldmxcsr DWORD PTR \[rip\+0x99\]        # 1a9c <_start\+0x1a9c>
-[ 	]*[a-f0-9]+:	c5 79 6f 05 99 00 00 00 	vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\]        # 1aa4 <_start\+0x1aa4>
-[ 	]*[a-f0-9]+:	c5 79 7f 05 99 00 00 00 	vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8        # 1aac <_start\+0x1aac>
-[ 	]*[a-f0-9]+:	c5 79 7e 05 99 00 00 00 	vmovd  DWORD PTR \[rip\+0x99\],xmm8        # 1ab4 <_start\+0x1ab4>
-[ 	]*[a-f0-9]+:	c5 7b 2d 05 99 00 00 00 	vcvtsd2si r8d,QWORD PTR \[rip\+0x99\]        # 1abc <_start\+0x1abc>
-[ 	]*[a-f0-9]+:	c5 7e e6 05 99 00 00 00 	vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\]        # 1ac4 <_start\+0x1ac4>
-[ 	]*[a-f0-9]+:	c5 7d 5a 05 99 00 00 00 	vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\]        # 1acc <_start\+0x1acc>
-[ 	]*[a-f0-9]+:	c5 39 e0 3d 99 00 00 00 	vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\]        # 1ad4 <_start\+0x1ad4>
-[ 	]*[a-f0-9]+:	c4 63 79 df 05 99 00 00 00 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x64        # 1ade <_start\+0x1ade>
-[ 	]*[a-f0-9]+:	c4 63 79 14 05 99 00 00 00 64 	vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x64        # 1ae8 <_start\+0x1ae8>
-[ 	]*[a-f0-9]+:	c5 3b 2a 3d 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\]        # 1af0 <_start\+0x1af0>
-[ 	]*[a-f0-9]+:	c4 63 19 4a 35 99 00 00 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8        # 1afa <_start\+0x1afa>
-[ 	]*[a-f0-9]+:	c4 63 39 20 3d 99 00 00 00 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x64        # 1b04 <_start\+0x1b04>
-[ 	]*[a-f0-9]+:	c5 7d 6f 05 99 00 00 00 	vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\]        # 1b0c <_start\+0x1b0c>
-[ 	]*[a-f0-9]+:	c5 7d 7f 05 99 00 00 00 	vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8        # 1b14 <_start\+0x1b14>
-[ 	]*[a-f0-9]+:	c4 62 3d 0d 3d 99 00 00 00 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\]        # 1b1d <_start\+0x1b1d>
-[ 	]*[a-f0-9]+:	c4 63 7d 09 05 99 00 00 00 64 	vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x64        # 1b27 <_start\+0x1b27>
-[ 	]*[a-f0-9]+:	c4 63 7d 19 05 99 00 00 00 64 	vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x64        # 1b31 <_start\+0x1b31>
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3d 99 00 00 00 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x64        # 1b3b <_start\+0x1b3b>
-[ 	]*[a-f0-9]+:	c4 63 1d 4b 35 99 00 00 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8        # 1b45 <_start\+0x1b45>
+[ 	]*[a-f0-9]+:	c5 f8 ae 15 99 00 00 00 	vldmxcsr DWORD PTR \[rip\+0x99\]        # 17bc <_start\+0x17bc>
+[ 	]*[a-f0-9]+:	c5 79 6f 05 99 00 00 00 	vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\]        # 17c4 <_start\+0x17c4>
+[ 	]*[a-f0-9]+:	c5 79 7f 05 99 00 00 00 	vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8        # 17cc <_start\+0x17cc>
+[ 	]*[a-f0-9]+:	c5 79 7e 05 99 00 00 00 	vmovd  DWORD PTR \[rip\+0x99\],xmm8        # 17d4 <_start\+0x17d4>
+[ 	]*[a-f0-9]+:	c5 7b 2d 05 99 00 00 00 	vcvtsd2si r8d,QWORD PTR \[rip\+0x99\]        # 17dc <_start\+0x17dc>
+[ 	]*[a-f0-9]+:	c5 7e e6 05 99 00 00 00 	vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\]        # 17e4 <_start\+0x17e4>
+[ 	]*[a-f0-9]+:	c5 7d 5a 05 99 00 00 00 	vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\]        # 17ec <_start\+0x17ec>
+[ 	]*[a-f0-9]+:	c5 39 e0 3d 99 00 00 00 	vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\]        # 17f4 <_start\+0x17f4>
+[ 	]*[a-f0-9]+:	c4 63 79 df 05 99 00 00 00 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7        # 17fe <_start\+0x17fe>
+[ 	]*[a-f0-9]+:	c4 63 79 14 05 99 00 00 00 07 	vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7        # 1808 <_start\+0x1808>
+[ 	]*[a-f0-9]+:	c5 3b 2a 3d 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\]        # 1810 <_start\+0x1810>
+[ 	]*[a-f0-9]+:	c4 63 19 4a 35 99 00 00 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8        # 181a <_start\+0x181a>
+[ 	]*[a-f0-9]+:	c4 63 39 20 3d 99 00 00 00 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7        # 1824 <_start\+0x1824>
+[ 	]*[a-f0-9]+:	c5 7d 6f 05 99 00 00 00 	vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\]        # 182c <_start\+0x182c>
+[ 	]*[a-f0-9]+:	c5 7d 7f 05 99 00 00 00 	vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8        # 1834 <_start\+0x1834>
+[ 	]*[a-f0-9]+:	c4 62 3d 0d 3d 99 00 00 00 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\]        # 183d <_start\+0x183d>
+[ 	]*[a-f0-9]+:	c4 63 7d 09 05 99 00 00 00 07 	vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7        # 1847 <_start\+0x1847>
+[ 	]*[a-f0-9]+:	c4 63 7d 19 05 99 00 00 00 07 	vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7        # 1851 <_start\+0x1851>
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3d 99 00 00 00 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7        # 185b <_start\+0x185b>
+[ 	]*[a-f0-9]+:	c4 63 1d 4b 35 99 00 00 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8        # 1865 <_start\+0x1865>
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 24 99 00 00 00 	vldmxcsr DWORD PTR \[rsp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 79 6f 84 24 99 00 00 00 	vmovdqa xmm8,XMMWORD PTR \[rsp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 79 7f 84 24 99 00 00 00 	vmovdqa XMMWORD PTR \[rsp\+0x99\],xmm8
@@ -1351,17 +1229,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 84 24 99 00 00 00 	vcvtdq2pd ymm8,XMMWORD PTR \[rsp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 5a 84 24 99 00 00 00 	vcvtpd2ps xmm8,YMMWORD PTR \[rsp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 39 e0 bc 24 99 00 00 00 	vpavgb xmm15,xmm8,XMMWORD PTR \[rsp\+0x99\]
-[ 	]*[a-f0-9]+:	c4 63 79 df 84 24 99 00 00 00 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rsp\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 84 24 99 00 00 00 64 	vpextrb BYTE PTR \[rsp\+0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 84 24 99 00 00 00 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rsp\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 84 24 99 00 00 00 07 	vpextrb BYTE PTR \[rsp\+0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a bc 24 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rsp\+0x99\]
 [ 	]*[a-f0-9]+:	c4 63 19 4a b4 24 99 00 00 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rsp\+0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 bc 24 99 00 00 00 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rsp\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 bc 24 99 00 00 00 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rsp\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 84 24 99 00 00 00 	vmovdqa ymm8,YMMWORD PTR \[rsp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 7f 84 24 99 00 00 00 	vmovdqa YMMWORD PTR \[rsp\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bc 24 99 00 00 00 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rsp\+0x99\]
-[ 	]*[a-f0-9]+:	c4 63 7d 09 84 24 99 00 00 00 64 	vroundpd ymm8,YMMWORD PTR \[rsp\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 84 24 99 00 00 00 64 	vextractf128 XMMWORD PTR \[rsp\+0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 24 99 00 00 00 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rsp\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 84 24 99 00 00 00 07 	vroundpd ymm8,YMMWORD PTR \[rsp\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 84 24 99 00 00 00 07 	vextractf128 XMMWORD PTR \[rsp\+0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 24 99 00 00 00 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rsp\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b4 24 99 00 00 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rsp\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 c1 78 ae 94 24 99 00 00 00 	vldmxcsr DWORD PTR \[r12\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 79 6f 84 24 99 00 00 00 	vmovdqa xmm8,XMMWORD PTR \[r12\+0x99\]
@@ -1371,17 +1249,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 41 7e e6 84 24 99 00 00 00 	vcvtdq2pd ymm8,XMMWORD PTR \[r12\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 7d 5a 84 24 99 00 00 00 	vcvtpd2ps xmm8,YMMWORD PTR \[r12\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 39 e0 bc 24 99 00 00 00 	vpavgb xmm15,xmm8,XMMWORD PTR \[r12\+0x99\]
-[ 	]*[a-f0-9]+:	c4 43 79 df 84 24 99 00 00 00 64 	vaeskeygenassist xmm8,XMMWORD PTR \[r12\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 43 79 14 84 24 99 00 00 00 64 	vpextrb BYTE PTR \[r12\+0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 43 79 df 84 24 99 00 00 00 07 	vaeskeygenassist xmm8,XMMWORD PTR \[r12\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 43 79 14 84 24 99 00 00 00 07 	vpextrb BYTE PTR \[r12\+0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 41 3b 2a bc 24 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r12\+0x99\]
 [ 	]*[a-f0-9]+:	c4 43 19 4a b4 24 99 00 00 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[r12\+0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 43 39 20 bc 24 99 00 00 00 64 	vpinsrb xmm15,xmm8,BYTE PTR \[r12\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 43 39 20 bc 24 99 00 00 00 07 	vpinsrb xmm15,xmm8,BYTE PTR \[r12\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 41 7d 6f 84 24 99 00 00 00 	vmovdqa ymm8,YMMWORD PTR \[r12\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 7d 7f 84 24 99 00 00 00 	vmovdqa YMMWORD PTR \[r12\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 42 3d 0d bc 24 99 00 00 00 	vpermilpd ymm15,ymm8,YMMWORD PTR \[r12\+0x99\]
-[ 	]*[a-f0-9]+:	c4 43 7d 09 84 24 99 00 00 00 64 	vroundpd ymm8,YMMWORD PTR \[r12\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 43 7d 19 84 24 99 00 00 00 64 	vextractf128 XMMWORD PTR \[r12\+0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 43 3d 06 bc 24 99 00 00 00 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r12\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 43 7d 09 84 24 99 00 00 00 07 	vroundpd ymm8,YMMWORD PTR \[r12\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 43 7d 19 84 24 99 00 00 00 07 	vextractf128 XMMWORD PTR \[r12\+0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 43 3d 06 bc 24 99 00 00 00 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r12\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 43 1d 4b b4 24 99 00 00 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[r12\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 25 67 ff ff ff 	vldmxcsr DWORD PTR ds:0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c5 79 6f 04 25 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR ds:0xffffffffffffff67
@@ -1391,17 +1269,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 25 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR ds:0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 25 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR ds:0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 25 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR ds:0xffffffffffffff67
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR ds:0xffffffffffffff67,0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 67 ff ff ff 64 	vpextrb BYTE PTR ds:0xffffffffffffff67,xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR ds:0xffffffffffffff67,0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 67 ff ff ff 07 	vpextrb BYTE PTR ds:0xffffffffffffff67,xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 25 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR ds:0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 25 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR ds:0xffffffffffffff67,xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR ds:0xffffffffffffff67,0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR ds:0xffffffffffffff67,0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 25 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR ds:0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 25 67 ff ff ff 	vmovdqa YMMWORD PTR ds:0xffffffffffffff67,ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 25 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR ds:0xffffffffffffff67
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR ds:0xffffffffffffff67,0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 67 ff ff ff 64 	vextractf128 XMMWORD PTR ds:0xffffffffffffff67,ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR ds:0xffffffffffffff67,0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR ds:0xffffffffffffff67,0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 67 ff ff ff 07 	vextractf128 XMMWORD PTR ds:0xffffffffffffff67,ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR ds:0xffffffffffffff67,0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 25 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR ds:0xffffffffffffff67,ymm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 65 67 ff ff ff 	vldmxcsr DWORD PTR \[riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 79 6f 04 65 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[riz\*2-0x99\]
@@ -1411,17 +1289,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 65 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 65 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 65 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[riz\*2-0x99\]
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 65 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[riz\*2-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 65 67 ff ff ff 64 	vpextrb BYTE PTR \[riz\*2-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 65 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[riz\*2-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 65 67 ff ff ff 07 	vpextrb BYTE PTR \[riz\*2-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 65 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 65 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[riz\*2-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 65 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[riz\*2-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 65 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[riz\*2-0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 65 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 65 67 ff ff ff 	vmovdqa YMMWORD PTR \[riz\*2-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 65 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[riz\*2-0x99\]
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 65 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[riz\*2-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 65 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[riz\*2-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 65 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[riz\*2-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 65 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[riz\*2-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 65 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[riz\*2-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 65 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[riz\*2-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 65 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[riz\*2-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 23 67 ff ff ff 	vldmxcsr DWORD PTR \[rbx\+riz\*1-0x99\]
 [ 	]*[a-f0-9]+:	c5 79 6f 84 23 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[rbx\+riz\*1-0x99\]
@@ -1431,17 +1309,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 84 23 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[rbx\+riz\*1-0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 5a 84 23 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[rbx\+riz\*1-0x99\]
 [ 	]*[a-f0-9]+:	c5 39 e0 bc 23 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[rbx\+riz\*1-0x99\]
-[ 	]*[a-f0-9]+:	c4 63 79 df 84 23 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rbx\+riz\*1-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 84 23 67 ff ff ff 64 	vpextrb BYTE PTR \[rbx\+riz\*1-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 84 23 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rbx\+riz\*1-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 84 23 67 ff ff ff 07 	vpextrb BYTE PTR \[rbx\+riz\*1-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a bc 23 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbx\+riz\*1-0x99\]
 [ 	]*[a-f0-9]+:	c4 63 19 4a b4 23 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rbx\+riz\*1-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 bc 23 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rbx\+riz\*1-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 bc 23 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rbx\+riz\*1-0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 84 23 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[rbx\+riz\*1-0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 7f 84 23 67 ff ff ff 	vmovdqa YMMWORD PTR \[rbx\+riz\*1-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bc 23 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rbx\+riz\*1-0x99\]
-[ 	]*[a-f0-9]+:	c4 63 7d 09 84 23 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[rbx\+riz\*1-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 84 23 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[rbx\+riz\*1-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 23 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbx\+riz\*1-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 84 23 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[rbx\+riz\*1-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 84 23 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[rbx\+riz\*1-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 23 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbx\+riz\*1-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b4 23 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rbx\+riz\*1-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 63 67 ff ff ff 	vldmxcsr DWORD PTR \[rbx\+riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 79 6f 84 63 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[rbx\+riz\*2-0x99\]
@@ -1451,17 +1329,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 84 63 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[rbx\+riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 5a 84 63 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[rbx\+riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 39 e0 bc 63 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[rbx\+riz\*2-0x99\]
-[ 	]*[a-f0-9]+:	c4 63 79 df 84 63 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rbx\+riz\*2-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 84 63 67 ff ff ff 64 	vpextrb BYTE PTR \[rbx\+riz\*2-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 84 63 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rbx\+riz\*2-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 84 63 67 ff ff ff 07 	vpextrb BYTE PTR \[rbx\+riz\*2-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a bc 63 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbx\+riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c4 63 19 4a b4 63 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rbx\+riz\*2-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 bc 63 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rbx\+riz\*2-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 bc 63 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rbx\+riz\*2-0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 84 63 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[rbx\+riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 7f 84 63 67 ff ff ff 	vmovdqa YMMWORD PTR \[rbx\+riz\*2-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bc 63 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rbx\+riz\*2-0x99\]
-[ 	]*[a-f0-9]+:	c4 63 7d 09 84 63 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[rbx\+riz\*2-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 84 63 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[rbx\+riz\*2-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 63 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbx\+riz\*2-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 84 63 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[rbx\+riz\*2-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 84 63 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[rbx\+riz\*2-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 63 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbx\+riz\*2-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b4 63 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rbx\+riz\*2-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 81 78 ae 94 bc 67 ff ff ff 	vldmxcsr DWORD PTR \[r12\+r15\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 79 6f 84 bc 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[r12\+r15\*4-0x99\]
@@ -1471,17 +1349,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 01 7e e6 84 bc 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[r12\+r15\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 7d 5a 84 bc 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[r12\+r15\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 39 e0 bc bc 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[r12\+r15\*4-0x99\]
-[ 	]*[a-f0-9]+:	c4 03 79 df 84 bc 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[r12\+r15\*4-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 03 79 14 84 bc 67 ff ff ff 64 	vpextrb BYTE PTR \[r12\+r15\*4-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 03 79 df 84 bc 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[r12\+r15\*4-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 03 79 14 84 bc 67 ff ff ff 07 	vpextrb BYTE PTR \[r12\+r15\*4-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 01 3b 2a bc bc 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r12\+r15\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 03 19 4a b4 bc 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[r12\+r15\*4-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 03 39 20 bc bc 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[r12\+r15\*4-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 03 39 20 bc bc 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[r12\+r15\*4-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 01 7d 6f 84 bc 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[r12\+r15\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 7d 7f 84 bc 67 ff ff ff 	vmovdqa YMMWORD PTR \[r12\+r15\*4-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 02 3d 0d bc bc 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[r12\+r15\*4-0x99\]
-[ 	]*[a-f0-9]+:	c4 03 7d 09 84 bc 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[r12\+r15\*4-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 03 7d 19 84 bc 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[r12\+r15\*4-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 03 3d 06 bc bc 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r12\+r15\*4-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 03 7d 09 84 bc 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[r12\+r15\*4-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 03 7d 19 84 bc 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[r12\+r15\*4-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 03 3d 06 bc bc 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r12\+r15\*4-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 03 1d 4b b4 bc 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[r12\+r15\*4-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 81 78 ae 94 f8 67 ff ff ff 	vldmxcsr DWORD PTR \[r8\+r15\*8-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 79 6f 84 f8 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[r8\+r15\*8-0x99\]
@@ -1491,17 +1369,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 01 7e e6 84 f8 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[r8\+r15\*8-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 7d 5a 84 f8 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[r8\+r15\*8-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 39 e0 bc f8 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[r8\+r15\*8-0x99\]
-[ 	]*[a-f0-9]+:	c4 03 79 df 84 f8 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[r8\+r15\*8-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 03 79 14 84 f8 67 ff ff ff 64 	vpextrb BYTE PTR \[r8\+r15\*8-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 03 79 df 84 f8 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[r8\+r15\*8-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 03 79 14 84 f8 67 ff ff ff 07 	vpextrb BYTE PTR \[r8\+r15\*8-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 01 3b 2a bc f8 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r8\+r15\*8-0x99\]
 [ 	]*[a-f0-9]+:	c4 03 19 4a b4 f8 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[r8\+r15\*8-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 03 39 20 bc f8 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[r8\+r15\*8-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 03 39 20 bc f8 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[r8\+r15\*8-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 01 7d 6f 84 f8 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[r8\+r15\*8-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 7d 7f 84 f8 67 ff ff ff 	vmovdqa YMMWORD PTR \[r8\+r15\*8-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 02 3d 0d bc f8 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[r8\+r15\*8-0x99\]
-[ 	]*[a-f0-9]+:	c4 03 7d 09 84 f8 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[r8\+r15\*8-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 03 7d 19 84 f8 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[r8\+r15\*8-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 03 3d 06 bc f8 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r8\+r15\*8-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 03 7d 09 84 f8 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[r8\+r15\*8-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 03 7d 19 84 f8 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[r8\+r15\*8-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 03 3d 06 bc f8 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r8\+r15\*8-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 03 1d 4b b4 f8 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[r8\+r15\*8-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 a1 78 ae 94 ad 67 ff ff ff 	vldmxcsr DWORD PTR \[rbp\+r13\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 79 6f 84 ad 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[rbp\+r13\*4-0x99\]
@@ -1511,17 +1389,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 21 7e e6 84 ad 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[rbp\+r13\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 7d 5a 84 ad 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[rbp\+r13\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 39 e0 bc ad 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[rbp\+r13\*4-0x99\]
-[ 	]*[a-f0-9]+:	c4 23 79 df 84 ad 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rbp\+r13\*4-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 23 79 14 84 ad 67 ff ff ff 64 	vpextrb BYTE PTR \[rbp\+r13\*4-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 23 79 df 84 ad 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rbp\+r13\*4-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 23 79 14 84 ad 67 ff ff ff 07 	vpextrb BYTE PTR \[rbp\+r13\*4-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 21 3b 2a bc ad 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbp\+r13\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 23 19 4a b4 ad 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rbp\+r13\*4-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 23 39 20 bc ad 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rbp\+r13\*4-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 23 39 20 bc ad 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rbp\+r13\*4-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 21 7d 6f 84 ad 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[rbp\+r13\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 7d 7f 84 ad 67 ff ff ff 	vmovdqa YMMWORD PTR \[rbp\+r13\*4-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 22 3d 0d bc ad 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rbp\+r13\*4-0x99\]
-[ 	]*[a-f0-9]+:	c4 23 7d 09 84 ad 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[rbp\+r13\*4-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 23 7d 19 84 ad 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[rbp\+r13\*4-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 23 3d 06 bc ad 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbp\+r13\*4-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 23 7d 09 84 ad 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[rbp\+r13\*4-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 23 7d 19 84 ad 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[rbp\+r13\*4-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 23 3d 06 bc ad 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbp\+r13\*4-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 23 1d 4b b4 ad 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rbp\+r13\*4-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 a1 78 ae 94 24 67 ff ff ff 	vldmxcsr DWORD PTR \[rsp\+r12\*1-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 79 6f 84 24 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[rsp\+r12\*1-0x99\]
@@ -1531,42 +1409,42 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 21 7e e6 84 24 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[rsp\+r12\*1-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 7d 5a 84 24 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[rsp\+r12\*1-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 39 e0 bc 24 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[rsp\+r12\*1-0x99\]
-[ 	]*[a-f0-9]+:	c4 23 79 df 84 24 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rsp\+r12\*1-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 23 79 14 84 24 67 ff ff ff 64 	vpextrb BYTE PTR \[rsp\+r12\*1-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 23 79 df 84 24 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rsp\+r12\*1-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 23 79 14 84 24 67 ff ff ff 07 	vpextrb BYTE PTR \[rsp\+r12\*1-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 21 3b 2a bc 24 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rsp\+r12\*1-0x99\]
 [ 	]*[a-f0-9]+:	c4 23 19 4a b4 24 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rsp\+r12\*1-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 23 39 20 bc 24 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rsp\+r12\*1-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 23 39 20 bc 24 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rsp\+r12\*1-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 21 7d 6f 84 24 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[rsp\+r12\*1-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 7d 7f 84 24 67 ff ff ff 	vmovdqa YMMWORD PTR \[rsp\+r12\*1-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 22 3d 0d bc 24 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rsp\+r12\*1-0x99\]
-[ 	]*[a-f0-9]+:	c4 23 7d 09 84 24 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[rsp\+r12\*1-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 23 7d 19 84 24 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[rsp\+r12\*1-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 23 3d 06 bc 24 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rsp\+r12\*1-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 23 7d 09 84 24 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[rsp\+r12\*1-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 23 7d 19 84 24 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[rsp\+r12\*1-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 23 3d 06 bc 24 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rsp\+r12\*1-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 23 1d 4b b4 24 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rsp\+r12\*1-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 41 79 50 c0       	vmovmskpd r8d,xmm8
-[ 	]*[a-f0-9]+:	c4 c1 01 72 f0 64    	vpslld xmm15,xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 c1 01 72 f0 07    	vpslld xmm15,xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 41 7c 50 c0       	vmovmskps r8d,ymm8
 [ 	]*[a-f0-9]+:	c4 41 79 6f f8       	vmovdqa xmm15,xmm8
 [ 	]*[a-f0-9]+:	c4 41 79 7e c0       	vmovd  r8d,xmm8
 [ 	]*[a-f0-9]+:	c4 41 7b 2d c0       	vcvtsd2si r8d,xmm8
 [ 	]*[a-f0-9]+:	c4 41 7e e6 c0       	vcvtdq2pd ymm8,xmm8
 [ 	]*[a-f0-9]+:	c4 41 7d 5a c0       	vcvtpd2ps xmm8,ymm8
-[ 	]*[a-f0-9]+:	c4 43 79 df f8 64    	vaeskeygenassist xmm15,xmm8,0x64
-[ 	]*[a-f0-9]+:	c4 43 79 14 c0 64    	vpextrb r8d,xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 43 79 df f8 07    	vaeskeygenassist xmm15,xmm8,0x7
+[ 	]*[a-f0-9]+:	c4 43 79 14 c0 07    	vpextrb r8d,xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 41 3b 2a f8       	vcvtsi2sd xmm15,xmm8,r8d
 [ 	]*[a-f0-9]+:	c4 43 19 4a f0 80    	vblendvps xmm14,xmm12,xmm8,xmm8
-[ 	]*[a-f0-9]+:	c4 43 39 20 f8 64    	vpinsrb xmm15,xmm8,r8d,0x64
+[ 	]*[a-f0-9]+:	c4 43 39 20 f8 07    	vpinsrb xmm15,xmm8,r8d,0x7
 [ 	]*[a-f0-9]+:	c4 41 7d 6f f8       	vmovdqa ymm15,ymm8
 [ 	]*[a-f0-9]+:	c4 42 05 0d e0       	vpermilpd ymm12,ymm15,ymm8
-[ 	]*[a-f0-9]+:	c4 43 7d 09 f8 64    	vroundpd ymm15,ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 43 7d 19 c0 64    	vextractf128 xmm8,ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 43 05 06 e0 64    	vperm2f128 ymm12,ymm15,ymm8,0x64
+[ 	]*[a-f0-9]+:	c4 43 7d 09 f8 07    	vroundpd ymm15,ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 43 7d 19 c0 07    	vextractf128 xmm8,ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 43 05 06 e0 07    	vperm2f128 ymm12,ymm15,ymm8,0x7
 [ 	]*[a-f0-9]+:	c4 43 1d 4b f7 80    	vblendvpd ymm14,ymm12,ymm15,ymm8
-[ 	]*[a-f0-9]+:	c4 43 3d 18 f8 64    	vinsertf128 ymm15,ymm8,xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 43 3d 18 f8 07    	vinsertf128 ymm15,ymm8,xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 61 fb 2d 01       	vcvtsd2si r8,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 43 79 17 c0 0a    	vextractps r8d,xmm8,0xa
 [ 	]*[a-f0-9]+:	c4 61 fa 2d 01       	vcvtss2si r8,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 41 01 c4 c0 64    	vpinsrw xmm8,xmm15,r8d,0x64
+[ 	]*[a-f0-9]+:	c4 41 01 c4 c0 07    	vpinsrw xmm8,xmm15,r8d,0x7
 [ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr DWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr DWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr DWORD PTR \[rcx\]
@@ -1579,18 +1457,18 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e2 4d 2e 21       	vmaskmovps YMMWORD PTR \[rcx\],ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 5d 2c 31       	vmaskmovps ymm6,ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 4d 2e 21       	vmaskmovps YMMWORD PTR \[rcx\],ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 64    	vpermilpd ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 64    	vpermilpd ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 64    	vpermilpd ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 64    	vpermilps ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 64    	vpermilps ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 64    	vpermilps ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 64    	vroundpd ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 64    	vroundpd ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 64    	vroundpd ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 64    	vroundps ymm2,ymm6,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 64    	vroundps ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 64    	vroundps ymm6,YMMWORD PTR \[rcx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 07    	vpermilpd ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 07    	vpermilpd ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 07    	vpermilpd ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 07    	vpermilps ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 07    	vpermilps ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 07    	vpermilps ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 07    	vroundpd ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 07    	vroundpd ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 07    	vroundpd ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 07    	vroundps ymm2,ymm6,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 07    	vroundps ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 07    	vroundps ymm6,YMMWORD PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c5 cd 58 d4          	vaddpd ymm2,ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 cd 58 11          	vaddpd ymm2,ymm6,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 cd 58 11          	vaddpd ymm2,ymm6,YMMWORD PTR \[rcx\]
@@ -1885,161 +1763,101 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fd 5a 21          	vcvtpd2ps xmm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fd e6 e4          	vcvttpd2dq xmm4,ymm4
 [ 	]*[a-f0-9]+:	c5 fd e6 21          	vcvttpd2dq xmm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fc 5b e4          	vcvtdq2ps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 5b f4          	vcvtdq2ps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 5b 21          	vcvtdq2ps ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fc 5b 21          	vcvtdq2ps ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fd 5b e4          	vcvtps2dq ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 5b f4          	vcvtps2dq ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 5b 21          	vcvtps2dq ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fd 5b 21          	vcvtps2dq ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fe 5b e4          	vcvttps2dq ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 5b f4          	vcvttps2dq ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 5b 21          	vcvttps2dq ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fe 5b 21          	vcvttps2dq ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fd 28 e4          	vmovapd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 28 f4          	vmovapd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 28 21          	vmovapd ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fd 28 21          	vmovapd ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fc 28 e4          	vmovaps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 28 f4          	vmovaps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 28 21          	vmovaps ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fc 28 21          	vmovaps ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fd 6f e4          	vmovdqa ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 6f f4          	vmovdqa ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 6f 21          	vmovdqa ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fd 6f 21          	vmovdqa ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fe 6f e4          	vmovdqu ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 6f f4          	vmovdqu ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 6f 21          	vmovdqu ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fe 6f 21          	vmovdqu ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 ff 12 e4          	vmovddup ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 ff 12 f4          	vmovddup ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 ff 12 21          	vmovddup ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 ff 12 21          	vmovddup ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fe 16 e4          	vmovshdup ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 16 f4          	vmovshdup ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 16 21          	vmovshdup ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fe 16 21          	vmovshdup ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fe 12 e4          	vmovsldup ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fe 12 f4          	vmovsldup ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fe 12 21          	vmovsldup ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fe 12 21          	vmovsldup ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fd 10 e4          	vmovupd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 10 f4          	vmovupd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 10 21          	vmovupd ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fd 10 21          	vmovupd ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fc 10 e4          	vmovups ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 10 f4          	vmovups ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 10 21          	vmovups ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fc 10 21          	vmovups ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e2 7d 17 e4       	vptest ymm4,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 17 f4       	vptest ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 17 21       	vptest ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 7d 17 21       	vptest ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fc 53 e4          	vrcpps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 53 f4          	vrcpps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 53 21          	vrcpps ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fc 53 21          	vrcpps ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fc 52 e4          	vrsqrtps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 52 f4          	vrsqrtps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 52 21          	vrsqrtps ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fc 52 21          	vrsqrtps ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fd 51 e4          	vsqrtpd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fd 51 f4          	vsqrtpd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 51 21          	vsqrtpd ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fd 51 21          	vsqrtpd ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 fc 51 e4          	vsqrtps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c5 fc 51 f4          	vsqrtps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 51 21          	vsqrtps ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 fc 51 21          	vsqrtps ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e2 7d 0f e4       	vtestpd ymm4,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0f f4       	vtestpd ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 0f 21       	vtestpd ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 7d 0f 21       	vtestpd ymm4,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e2 7d 0e e4       	vtestps ymm4,ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0e f4       	vtestps ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 0e 21       	vtestps ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 7d 0e 21       	vtestps ymm4,YMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 ff f0 21          	vlddqu ymm4,\[rcx\]
 [ 	]*[a-f0-9]+:	c5 ff f0 21          	vlddqu ymm4,\[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 64    	vblendpd ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 64    	vblendpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 64    	vblendpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 64    	vblendps ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 64    	vblendps ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 64    	vblendps ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 cd c2 d4 64       	vcmppd ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cd c2 11 64       	vcmppd ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 cd c2 11 64       	vcmppd ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 cc c2 d4 64       	vcmpps ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cc c2 11 64       	vcmpps ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 cc c2 11 64       	vcmpps ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 64    	vdpps  ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 64    	vdpps  ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 64    	vdpps  ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 64    	vperm2f128 ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 64    	vperm2f128 ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 64    	vperm2f128 ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 cd c6 d4 64       	vshufpd ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cd c6 11 64       	vshufpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 cd c6 11 64       	vshufpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 cc c6 d4 64       	vshufps ymm2,ymm6,ymm4,0x64
-[ 	]*[a-f0-9]+:	c5 cc c6 11 64       	vshufps ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 cc c6 11 64       	vshufps ymm2,ymm6,YMMWORD PTR \[rcx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 07    	vblendpd ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 07    	vblendpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 07    	vblendpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 07    	vblendps ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 07    	vblendps ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 07    	vblendps ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 cd c2 d4 07       	vcmpordpd ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c5 cd c2 11 07       	vcmpordpd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cd c2 11 07       	vcmpordpd ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cc c2 d4 07       	vcmpordps ymm2,ymm6,ymm4
+[ 	]*[a-f0-9]+:	c5 cc c2 11 07       	vcmpordps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cc c2 11 07       	vcmpordps ymm2,ymm6,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 07    	vdpps  ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 07    	vdpps  ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 07    	vdpps  ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 07    	vperm2f128 ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 07    	vperm2f128 ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 07    	vperm2f128 ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 cd c6 d4 07       	vshufpd ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c5 cd c6 11 07       	vshufpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 cd c6 11 07       	vshufpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 cc c6 d4 07       	vshufps ymm2,ymm6,ymm4,0x7
+[ 	]*[a-f0-9]+:	c5 cc c6 11 07       	vshufps ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 cc c6 11 07       	vshufps ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b fe 40    	vblendvpd ymm7,ymm2,ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b 39 40    	vblendvpd ymm7,ymm2,YMMWORD PTR \[rcx\],ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b 39 40    	vblendvpd ymm7,ymm2,YMMWORD PTR \[rcx\],ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a fe 40    	vblendvps ymm7,ymm2,ymm6,ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a 39 40    	vblendvps ymm7,ymm2,YMMWORD PTR \[rcx\],ymm4
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a 39 40    	vblendvps ymm7,ymm2,YMMWORD PTR \[rcx\],ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 fc 20    	vfmaddps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d fc 20    	vfmaddsubpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c fc 20    	vfmaddsubps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f fc 20    	vfmsubaddpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e fc 20    	vfmsubaddps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d fc 20    	vfmsubpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c fc 20    	vfmsubps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 fc 20    	vfnmaddpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 fc 20    	vfnmaddps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d fc 20    	vfnmsubpd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c fc 20    	vfnmsubps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 62    	vpermilmo2pd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 62    	vpermilmo2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 62    	vpermilmo2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 63    	vpermilmz2pd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 63    	vpermilmz2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 63    	vpermilmz2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 60    	vpermiltd2pd ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 60    	vpermiltd2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 60    	vpermiltd2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 62    	vpermilmo2ps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 62    	vpermilmo2ps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 62    	vpermilmo2ps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 63    	vpermilmz2ps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 63    	vpermilmz2ps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 63    	vpermilmz2ps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 60    	vpermiltd2ps ymm7,ymm2,ymm6,ymm4
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 60    	vpermiltd2ps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 60    	vpermiltd2ps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 6a    	vpermil2pd ymm7,ymm2,ymm6,ymm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 6a    	vpermil2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 6a    	vpermil2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 6a    	vpermil2ps ymm7,ymm2,ymm6,ymm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 6a    	vpermil2ps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 6a    	vpermil2ps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 64    	vinsertf128 ymm6,ymm4,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 64    	vinsertf128 ymm6,ymm4,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 64    	vinsertf128 ymm6,ymm4,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 64    	vextractf128 xmm4,ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 64    	vextractf128 XMMWORD PTR \[rcx\],ymm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 64    	vextractf128 XMMWORD PTR \[rcx\],ymm4,0x64
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 07    	vinsertf128 ymm6,ymm4,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 07    	vinsertf128 ymm6,ymm4,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 07    	vinsertf128 ymm6,ymm4,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 07    	vextractf128 xmm4,ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 07    	vextractf128 XMMWORD PTR \[rcx\],ymm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 07    	vextractf128 XMMWORD PTR \[rcx\],ymm4,0x7
 [ 	]*[a-f0-9]+:	c4 e2 7d 1a 21       	vbroadcastf128 ymm4,XMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 7d 1a 21       	vbroadcastf128 ymm4,XMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 f8 5b f4          	vcvtdq2ps xmm6,xmm4
@@ -2701,79 +2519,79 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e2 59 2c 31       	vmaskmovps xmm6,xmm4,XMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 59 2d 31       	vmaskmovpd xmm6,xmm4,XMMWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 59 2d 31       	vmaskmovpd xmm6,xmm4,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 79 df f4 64    	vaeskeygenassist xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 df 31 64    	vaeskeygenassist xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 df 31 64    	vaeskeygenassist xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 64    	vpcmpestri xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 61 31 64    	vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 61 31 64    	vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 64    	vpcmpestrm xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 60 31 64    	vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 60 31 64    	vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 64    	vpcmpistri xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 63 31 64    	vpcmpistri xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 63 31 64    	vpcmpistri xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 64    	vpcmpistrm xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 62 31 64    	vpcmpistrm xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 62 31 64    	vpcmpistrm xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 64    	vpermilpd xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 05 31 64    	vpermilpd xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 05 31 64    	vpermilpd xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 64    	vpermilps xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 04 31 64    	vpermilps xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 04 31 64    	vpermilps xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 f9 70 f4 64       	vpshufd xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 f9 70 31 64       	vpshufd xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 f9 70 31 64       	vpshufd xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 fa 70 f4 64       	vpshufhw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 fa 70 31 64       	vpshufhw xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 fa 70 31 64       	vpshufhw xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 fb 70 f4 64       	vpshuflw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 fb 70 31 64       	vpshuflw xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 fb 70 31 64       	vpshuflw xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 64    	vroundpd xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 09 31 64    	vroundpd xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 09 31 64    	vroundpd xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 64    	vroundps xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 08 31 64    	vroundps xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 08 31 64    	vroundps xmm6,XMMWORD PTR \[rcx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 df f4 07    	vaeskeygenassist xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 df 31 07    	vaeskeygenassist xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 df 31 07    	vaeskeygenassist xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 07    	vpcmpestri xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 61 31 07    	vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 61 31 07    	vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 07    	vpcmpestrm xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 60 31 07    	vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 60 31 07    	vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 07    	vpcmpistri xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 63 31 07    	vpcmpistri xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 63 31 07    	vpcmpistri xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 07    	vpcmpistrm xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 62 31 07    	vpcmpistrm xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 62 31 07    	vpcmpistrm xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 07    	vpermilpd xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 05 31 07    	vpermilpd xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 05 31 07    	vpermilpd xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 07    	vpermilps xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 04 31 07    	vpermilps xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 04 31 07    	vpermilps xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 f9 70 f4 07       	vpshufd xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 f9 70 31 07       	vpshufd xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 f9 70 31 07       	vpshufd xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 fa 70 f4 07       	vpshufhw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 fa 70 31 07       	vpshufhw xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 fa 70 31 07       	vpshufhw xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 fb 70 f4 07       	vpshuflw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 fb 70 31 07       	vpshuflw xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 fb 70 31 07       	vpshuflw xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 07    	vroundpd xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 09 31 07    	vroundpd xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 09 31 07    	vroundpd xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 07    	vroundps xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 08 31 07    	vroundps xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 08 31 07    	vroundps xmm6,XMMWORD PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c4 e2 49 2e 21       	vmaskmovps XMMWORD PTR \[rcx\],xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 49 2e 21       	vmaskmovps XMMWORD PTR \[rcx\],xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 49 2f 21       	vmaskmovpd XMMWORD PTR \[rcx\],xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 49 2f 21       	vmaskmovpd XMMWORD PTR \[rcx\],xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 64    	vblendpd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 64    	vblendpd xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 64    	vblendpd xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 64    	vblendps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 64    	vblendps xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 64    	vblendps xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 c9 c2 d4 64       	vcmppd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 c2 11 64       	vcmppd xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 c9 c2 11 64       	vcmppd xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 c8 c2 d4 64       	vcmpps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c8 c2 11 64       	vcmpps xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 c8 c2 11 64       	vcmpps xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 64    	vdppd  xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 41 11 64    	vdppd  xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 41 11 64    	vdppd  xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 64    	vdpps  xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 40 11 64    	vdpps  xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 40 11 64    	vdpps  xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 64    	vmpsadbw xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 42 11 64    	vmpsadbw xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 42 11 64    	vmpsadbw xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 64    	vpalignr xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 64    	vpalignr xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 64    	vpalignr xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 64    	vpblendw xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 64    	vpblendw xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 64    	vpblendw xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 c9 c6 d4 64       	vshufpd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 c6 11 64       	vshufpd xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 c9 c6 11 64       	vshufpd xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 c8 c6 d4 64       	vshufps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c8 c6 11 64       	vshufps xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 c8 c6 11 64       	vshufps xmm2,xmm6,XMMWORD PTR \[rcx\],0x64
+[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 07    	vblendpd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 07    	vblendpd xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 07    	vblendpd xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 07    	vblendps xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 07    	vblendps xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 07    	vblendps xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 c9 c2 d4 07       	vcmpordpd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 c9 c2 11 07       	vcmpordpd xmm2,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 c9 c2 11 07       	vcmpordpd xmm2,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 c8 c2 d4 07       	vcmpordps xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 c8 c2 11 07       	vcmpordps xmm2,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 c8 c2 11 07       	vcmpordps xmm2,xmm6,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 07    	vdppd  xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 41 11 07    	vdppd  xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 41 11 07    	vdppd  xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 07    	vdpps  xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 40 11 07    	vdpps  xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 40 11 07    	vdpps  xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 07    	vmpsadbw xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 42 11 07    	vmpsadbw xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 42 11 07    	vmpsadbw xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 07    	vpalignr xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 07    	vpalignr xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 07    	vpalignr xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 07    	vpblendw xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 07    	vpblendw xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 07    	vpblendw xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 c9 c6 d4 07       	vshufpd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 c6 11 07       	vshufpd xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 c9 c6 11 07       	vshufpd xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 c8 c6 d4 07       	vshufps xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c8 c6 11 07       	vshufps xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 c8 c6 11 07       	vshufps xmm2,xmm6,XMMWORD PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c4 e3 69 4b fe 40    	vblendvpd xmm7,xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4b 39 40    	vblendvpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4b 39 40    	vblendvpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
@@ -2783,106 +2601,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e3 69 4c fe 40    	vpblendvb xmm7,xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4c 39 40    	vpblendvb xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
 [ 	]*[a-f0-9]+:	c4 e3 69 4c 39 40    	vpblendvb xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 fc 20    	vfmaddpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 fc 20    	vfmaddps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d fc 20    	vfmaddsubpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c fc 20    	vfmaddsubps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f fc 20    	vfmsubaddpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e fc 20    	vfmsubaddps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d fc 20    	vfmsubpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c fc 20    	vfmsubps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 fc 20    	vfnmaddpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 fc 20    	vfnmaddps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d fc 20    	vfnmsubpd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c fc 20    	vfnmsubps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 62    	vpermilmo2pd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 62    	vpermilmo2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 42    	vpermilmo2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 62    	vpermilmo2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 42    	vpermilmo2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 63    	vpermilmz2pd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 63    	vpermilmz2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 43    	vpermilmz2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 63    	vpermilmz2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 43    	vpermilmz2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 60    	vpermiltd2pd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 60    	vpermiltd2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 40    	vpermiltd2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 60    	vpermiltd2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 40    	vpermiltd2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 62    	vpermilmo2ps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 62    	vpermilmo2ps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 42    	vpermilmo2ps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 62    	vpermilmo2ps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 42    	vpermilmo2ps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 63    	vpermilmz2ps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 63    	vpermilmz2ps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 43    	vpermilmz2ps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 63    	vpermilmz2ps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 43    	vpermilmz2ps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 60    	vpermiltd2ps xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 60    	vpermiltd2ps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 40    	vpermiltd2ps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 60    	vpermiltd2ps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 40    	vpermiltd2ps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 6a    	vpermil2pd xmm7,xmm2,xmm6,xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 6a    	vpermil2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 4a    	vpermil2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 6a    	vpermil2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 4a    	vpermil2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 6a    	vpermil2ps xmm7,xmm2,xmm6,xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 6a    	vpermil2ps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 4a    	vpermil2ps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4,0xa
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 6a    	vpermil2ps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\],0xa
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 4a    	vpermil2ps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4,0xa
 [ 	]*[a-f0-9]+:	c4 e2 7d 19 21       	vbroadcastsd ymm4,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 7d 19 21       	vbroadcastsd ymm4,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 f9 2f f4          	vcomisd xmm6,xmm4
@@ -2958,12 +2676,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e1 da 2a f1       	vcvtsi2ss xmm6,xmm4,rcx
 [ 	]*[a-f0-9]+:	c4 e1 da 2a 31       	vcvtsi2ss xmm6,xmm4,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e1 da 2a 31       	vcvtsi2ss xmm6,xmm4,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 d9 22 f1 64    	vpinsrq xmm6,xmm4,rcx,0x64
-[ 	]*[a-f0-9]+:	c4 e3 d9 22 31 64    	vpinsrq xmm6,xmm4,QWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 d9 22 31 64    	vpinsrq xmm6,xmm4,QWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 f9 16 e1 64    	vpextrq rcx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 f9 16 21 64    	vpextrq QWORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 f9 16 21 64    	vpextrq QWORD PTR \[rcx\],xmm4,0x64
+[ 	]*[a-f0-9]+:	c4 e3 d9 22 f1 07    	vpinsrq xmm6,xmm4,rcx,0x7
+[ 	]*[a-f0-9]+:	c4 e3 d9 22 31 07    	vpinsrq xmm6,xmm4,QWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 d9 22 31 07    	vpinsrq xmm6,xmm4,QWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 f9 16 e1 07    	vpextrq rcx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 f9 16 21 07    	vpextrq QWORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 f9 16 21 07    	vpextrq QWORD PTR \[rcx\],xmm4,0x7
 [ 	]*[a-f0-9]+:	c5 d9 12 31          	vmovlpd xmm6,xmm4,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 d9 12 31          	vmovlpd xmm6,xmm4,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 d8 12 31          	vmovlps xmm6,xmm4,QWORD PTR \[rcx\]
@@ -2972,32 +2690,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 d9 16 31          	vmovhpd xmm6,xmm4,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 d8 16 31          	vmovhps xmm6,xmm4,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 d8 16 31          	vmovhps xmm6,xmm4,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 cb c2 d4 64       	vcmpsd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 cb c2 11 64       	vcmpsd xmm2,xmm6,QWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 cb c2 11 64       	vcmpsd xmm2,xmm6,QWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 64    	vroundsd xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 64    	vroundsd xmm2,xmm6,QWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 64    	vroundsd xmm2,xmm6,QWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b fc 20    	vfmaddsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f fc 20    	vfmsubsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b fc 20    	vfnmaddsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f fc 20    	vfnmsubsd xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 cb c2 d4 07       	vcmpordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cb c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cb c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 07    	vroundsd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 07    	vroundsd xmm2,xmm6,QWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 07    	vroundsd xmm2,xmm6,QWORD PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c5 cb 58 d4          	vaddsd xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 cb 58 11          	vaddsd xmm2,xmm6,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 cb 58 11          	vaddsd xmm2,xmm6,QWORD PTR \[rcx\]
@@ -3118,6 +2816,10 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 cb c2 d4 1f       	vcmptrue_ussd xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1f       	vcmptrue_ussd xmm2,xmm6,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1f       	vcmptrue_ussd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr DWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 ca 58 d4          	vaddss xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 ca 58 11          	vaddss xmm2,xmm6,DWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 ca 58 11          	vaddss xmm2,xmm6,DWORD PTR \[rcx\]
@@ -3291,79 +2993,59 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 f9 50 cc          	vmovmskpd ecx,xmm4
 [ 	]*[a-f0-9]+:	c5 f8 50 cc          	vmovmskps ecx,xmm4
 [ 	]*[a-f0-9]+:	c5 f9 d7 cc          	vpmovmskb ecx,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 64    	vextractps ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps DWORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps DWORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 64    	vpextrd ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 16 21 64    	vpextrd DWORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 16 21 64    	vpextrd DWORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 64    	vextractps ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps DWORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps DWORD PTR \[rcx\],xmm4,0x64
+[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 07    	vextractps ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps DWORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps DWORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 07    	vpextrd ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 16 21 07    	vpextrd DWORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 16 21 07    	vpextrd DWORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 07    	vextractps ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps DWORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps DWORD PTR \[rcx\],xmm4,0x7
 [ 	]*[a-f0-9]+:	c5 db 2a f1          	vcvtsi2sd xmm6,xmm4,ecx
 [ 	]*[a-f0-9]+:	c5 db 2a 31          	vcvtsi2sd xmm6,xmm4,DWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c5 da 2a f1          	vcvtsi2ss xmm6,xmm4,ecx
 [ 	]*[a-f0-9]+:	c5 da 2a 31          	vcvtsi2ss xmm6,xmm4,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 ca c2 d4 64       	vcmpss xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 ca c2 11 64       	vcmpss xmm2,xmm6,DWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 ca c2 11 64       	vcmpss xmm2,xmm6,DWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 64    	vinsertps xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 21 11 64    	vinsertps xmm2,xmm6,DWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 21 11 64    	vinsertps xmm2,xmm6,DWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 64    	vroundss xmm2,xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 64    	vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 64    	vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a fc 20    	vfmaddss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e fc 20    	vfmsubss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a fc 20    	vfnmaddss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e fc 20    	vfnmsubss xmm7,xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 ca c2 d4 07       	vcmpordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ca c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ca c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 07    	vinsertps xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 21 11 07    	vinsertps xmm2,xmm6,DWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 21 11 07    	vinsertps xmm2,xmm6,DWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 07    	vroundss xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 07    	vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 07    	vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c4 e2 79 22 f4       	vpmovsxbq xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 22 21       	vpmovsxbq xmm4,WORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 79 22 21       	vpmovsxbq xmm4,WORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 79 32 f4       	vpmovzxbq xmm6,xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 32 21       	vpmovzxbq xmm4,WORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 e2 79 32 21       	vpmovzxbq xmm4,WORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw WORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw WORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw WORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw WORD PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 f1 64       	vpinsrw xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw xmm6,xmm4,WORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw xmm6,xmm4,WORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 f1 64       	vpinsrw xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw xmm6,xmm4,WORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw xmm6,xmm4,WORD PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 64    	vpextrb ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb BYTE PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb BYTE PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 64    	vpextrb ecx,xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb BYTE PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb BYTE PTR \[rcx\],xmm4,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb xmm6,xmm4,ecx,0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x64
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x64
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw WORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw WORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw WORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw WORD PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 f1 07       	vpinsrw xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw xmm6,xmm4,WORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw xmm6,xmm4,WORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 f1 07       	vpinsrw xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw xmm6,xmm4,WORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw xmm6,xmm4,WORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 07    	vpextrb ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb BYTE PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb BYTE PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 07    	vpextrb ecx,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb BYTE PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb BYTE PTR \[rcx\],xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb xmm6,xmm4,ecx,0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb xmm6,xmm4,BYTE PTR \[rcx\],0x7
 [ 	]*[a-f0-9]+:	c5 f9 f7 f4          	vmaskmovdqu xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 fa 7e f4          	vmovq  xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 f9 50 cc          	vmovmskpd ecx,xmm4
@@ -3373,17 +3055,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 c8 16 d4          	vmovlhps xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 cb 10 d4          	vmovsd xmm2,xmm6,xmm4
 [ 	]*[a-f0-9]+:	c5 ca 10 d4          	vmovss xmm2,xmm6,xmm4
-[ 	]*[a-f0-9]+:	c5 c9 72 f4 64       	vpslld xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 fc 64       	vpslldq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 f4 64       	vpsllq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 71 f4 64       	vpsllw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 72 e4 64       	vpsrad xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 71 e4 64       	vpsraw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 72 d4 64       	vpsrld xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 dc 64       	vpsrldq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 73 d4 64       	vpsrlq xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 c9 71 d4 64       	vpsrlw xmm6,xmm4,0x64
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw ecx,xmm4,0x64
+[ 	]*[a-f0-9]+:	c5 c9 72 f4 07       	vpslld xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 fc 07       	vpslldq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 f4 07       	vpsllq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 71 f4 07       	vpsllw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 72 e4 07       	vpsrad xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 71 e4 07       	vpsraw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 72 d4 07       	vpsrld xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 dc 07       	vpsrldq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 73 d4 07       	vpsrlq xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 c9 71 d4 07       	vpsrlw xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw ecx,xmm4,0x7
 [ 	]*[a-f0-9]+:	c5 fd 50 cc          	vmovmskpd ecx,ymm4
 [ 	]*[a-f0-9]+:	c5 fc 50 cc          	vmovmskps ecx,ymm4
 [ 	]*[a-f0-9]+:	c5 fd 50 cc          	vmovmskpd ecx,ymm4
@@ -3402,17 +3084,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 25 78 56 34 12 	vcvtdq2pd ymm8,XMMWORD PTR ds:0x12345678
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 25 78 56 34 12 	vcvtpd2ps xmm8,YMMWORD PTR ds:0x12345678
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 25 78 56 34 12 	vpavgb xmm15,xmm8,XMMWORD PTR ds:0x12345678
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 78 56 34 12 64 	vaeskeygenassist xmm8,XMMWORD PTR ds:0x12345678,0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 78 56 34 12 64 	vpextrb BYTE PTR ds:0x12345678,xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 78 56 34 12 07 	vaeskeygenassist xmm8,XMMWORD PTR ds:0x12345678,0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 78 56 34 12 07 	vpextrb BYTE PTR ds:0x12345678,xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 25 78 56 34 12 	vcvtsi2sd xmm15,xmm8,DWORD PTR ds:0x12345678
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 25 78 56 34 12 80 	vblendvps xmm14,xmm12,XMMWORD PTR ds:0x12345678,xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 78 56 34 12 64 	vpinsrb xmm15,xmm8,BYTE PTR ds:0x12345678,0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 78 56 34 12 07 	vpinsrb xmm15,xmm8,BYTE PTR ds:0x12345678,0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 25 78 56 34 12 	vmovdqa ymm8,YMMWORD PTR ds:0x12345678
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 25 78 56 34 12 	vmovdqa YMMWORD PTR ds:0x12345678,ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 25 78 56 34 12 	vpermilpd ymm15,ymm8,YMMWORD PTR ds:0x12345678
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 78 56 34 12 64 	vroundpd ymm8,YMMWORD PTR ds:0x12345678,0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 78 56 34 12 64 	vextractf128 XMMWORD PTR ds:0x12345678,ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 78 56 34 12 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR ds:0x12345678,0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 78 56 34 12 07 	vroundpd ymm8,YMMWORD PTR ds:0x12345678,0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 78 56 34 12 07 	vextractf128 XMMWORD PTR ds:0x12345678,ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 78 56 34 12 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR ds:0x12345678,0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 25 78 56 34 12 80 	vblendvpd ymm14,ymm12,YMMWORD PTR ds:0x12345678,ymm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 55 00       	vldmxcsr DWORD PTR \[rbp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 79 6f 45 00       	vmovdqa xmm8,XMMWORD PTR \[rbp\+0x0\]
@@ -3422,17 +3104,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 45 00       	vcvtdq2pd ymm8,XMMWORD PTR \[rbp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 7d 5a 45 00       	vcvtpd2ps xmm8,YMMWORD PTR \[rbp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 39 e0 7d 00       	vpavgb xmm15,xmm8,XMMWORD PTR \[rbp\+0x0\]
-[ 	]*[a-f0-9]+:	c4 63 79 df 45 00 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rbp\+0x0\],0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 45 00 64 	vpextrb BYTE PTR \[rbp\+0x0\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 45 00 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rbp\+0x0\],0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 45 00 07 	vpextrb BYTE PTR \[rbp\+0x0\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a 7d 00       	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbp\+0x0\]
 [ 	]*[a-f0-9]+:	c4 63 19 4a 75 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rbp\+0x0\],xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 7d 00 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rbp\+0x0\],0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 7d 00 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rbp\+0x0\],0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 45 00       	vmovdqa ymm8,YMMWORD PTR \[rbp\+0x0\]
 [ 	]*[a-f0-9]+:	c5 7d 7f 45 00       	vmovdqa YMMWORD PTR \[rbp\+0x0\],ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 7d 00    	vpermilpd ymm15,ymm8,YMMWORD PTR \[rbp\+0x0\]
-[ 	]*[a-f0-9]+:	c4 63 7d 09 45 00 64 	vroundpd ymm8,YMMWORD PTR \[rbp\+0x0\],0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 45 00 64 	vextractf128 XMMWORD PTR \[rbp\+0x0\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 7d 00 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbp\+0x0\],0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 45 00 07 	vroundpd ymm8,YMMWORD PTR \[rbp\+0x0\],0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 45 00 07 	vextractf128 XMMWORD PTR \[rbp\+0x0\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 7d 00 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbp\+0x0\],0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 75 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rbp\+0x0\],ymm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 95 99 00 00 00 	vldmxcsr DWORD PTR \[rbp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 79 6f 85 99 00 00 00 	vmovdqa xmm8,XMMWORD PTR \[rbp\+0x99\]
@@ -3442,17 +3124,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 85 99 00 00 00 	vcvtdq2pd ymm8,XMMWORD PTR \[rbp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 5a 85 99 00 00 00 	vcvtpd2ps xmm8,YMMWORD PTR \[rbp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 39 e0 bd 99 00 00 00 	vpavgb xmm15,xmm8,XMMWORD PTR \[rbp\+0x99\]
-[ 	]*[a-f0-9]+:	c4 63 79 df 85 99 00 00 00 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rbp\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 85 99 00 00 00 64 	vpextrb BYTE PTR \[rbp\+0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 85 99 00 00 00 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rbp\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 85 99 00 00 00 07 	vpextrb BYTE PTR \[rbp\+0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a bd 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbp\+0x99\]
 [ 	]*[a-f0-9]+:	c4 63 19 4a b5 99 00 00 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rbp\+0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 bd 99 00 00 00 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rbp\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 bd 99 00 00 00 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rbp\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 85 99 00 00 00 	vmovdqa ymm8,YMMWORD PTR \[rbp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 7f 85 99 00 00 00 	vmovdqa YMMWORD PTR \[rbp\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bd 99 00 00 00 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rbp\+0x99\]
-[ 	]*[a-f0-9]+:	c4 63 7d 09 85 99 00 00 00 64 	vroundpd ymm8,YMMWORD PTR \[rbp\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 85 99 00 00 00 64 	vextractf128 XMMWORD PTR \[rbp\+0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bd 99 00 00 00 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbp\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 85 99 00 00 00 07 	vroundpd ymm8,YMMWORD PTR \[rbp\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 85 99 00 00 00 07 	vextractf128 XMMWORD PTR \[rbp\+0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bd 99 00 00 00 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbp\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b5 99 00 00 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rbp\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 c1 78 ae 97 99 00 00 00 	vldmxcsr DWORD PTR \[r15\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 79 6f 87 99 00 00 00 	vmovdqa xmm8,XMMWORD PTR \[r15\+0x99\]
@@ -3462,38 +3144,38 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 41 7e e6 87 99 00 00 00 	vcvtdq2pd ymm8,XMMWORD PTR \[r15\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 7d 5a 87 99 00 00 00 	vcvtpd2ps xmm8,YMMWORD PTR \[r15\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 39 e0 bf 99 00 00 00 	vpavgb xmm15,xmm8,XMMWORD PTR \[r15\+0x99\]
-[ 	]*[a-f0-9]+:	c4 43 79 df 87 99 00 00 00 64 	vaeskeygenassist xmm8,XMMWORD PTR \[r15\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 43 79 14 87 99 00 00 00 64 	vpextrb BYTE PTR \[r15\+0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 43 79 df 87 99 00 00 00 07 	vaeskeygenassist xmm8,XMMWORD PTR \[r15\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 43 79 14 87 99 00 00 00 07 	vpextrb BYTE PTR \[r15\+0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 41 3b 2a bf 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r15\+0x99\]
 [ 	]*[a-f0-9]+:	c4 43 19 4a b7 99 00 00 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[r15\+0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 43 39 20 bf 99 00 00 00 64 	vpinsrb xmm15,xmm8,BYTE PTR \[r15\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 43 39 20 bf 99 00 00 00 07 	vpinsrb xmm15,xmm8,BYTE PTR \[r15\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 41 7d 6f 87 99 00 00 00 	vmovdqa ymm8,YMMWORD PTR \[r15\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 7d 7f 87 99 00 00 00 	vmovdqa YMMWORD PTR \[r15\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 42 3d 0d bf 99 00 00 00 	vpermilpd ymm15,ymm8,YMMWORD PTR \[r15\+0x99\]
-[ 	]*[a-f0-9]+:	c4 43 7d 09 87 99 00 00 00 64 	vroundpd ymm8,YMMWORD PTR \[r15\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 43 7d 19 87 99 00 00 00 64 	vextractf128 XMMWORD PTR \[r15\+0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 43 3d 06 bf 99 00 00 00 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r15\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 43 7d 09 87 99 00 00 00 07 	vroundpd ymm8,YMMWORD PTR \[r15\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 43 7d 19 87 99 00 00 00 07 	vextractf128 XMMWORD PTR \[r15\+0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 43 3d 06 bf 99 00 00 00 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r15\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 43 1d 4b b7 99 00 00 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[r15\+0x99\],ymm8
-[ 	]*[a-f0-9]+:	c5 f8 ae 15 99 00 00 00 	vldmxcsr DWORD PTR \[rip\+0x99\]        # 48da <_start\+0x48da>
-[ 	]*[a-f0-9]+:	c5 79 6f 05 99 00 00 00 	vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\]        # 48e2 <_start\+0x48e2>
-[ 	]*[a-f0-9]+:	c5 79 7f 05 99 00 00 00 	vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8        # 48ea <_start\+0x48ea>
-[ 	]*[a-f0-9]+:	c5 79 7e 05 99 00 00 00 	vmovd  DWORD PTR \[rip\+0x99\],xmm8        # 48f2 <_start\+0x48f2>
-[ 	]*[a-f0-9]+:	c5 7b 2d 05 99 00 00 00 	vcvtsd2si r8d,QWORD PTR \[rip\+0x99\]        # 48fa <_start\+0x48fa>
-[ 	]*[a-f0-9]+:	c5 7e e6 05 99 00 00 00 	vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\]        # 4902 <_start\+0x4902>
-[ 	]*[a-f0-9]+:	c5 7d 5a 05 99 00 00 00 	vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\]        # 490a <_start\+0x490a>
-[ 	]*[a-f0-9]+:	c5 39 e0 3d 99 00 00 00 	vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\]        # 4912 <_start\+0x4912>
-[ 	]*[a-f0-9]+:	c4 63 79 df 05 99 00 00 00 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x64        # 491c <_start\+0x491c>
-[ 	]*[a-f0-9]+:	c4 63 79 14 05 99 00 00 00 64 	vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x64        # 4926 <_start\+0x4926>
-[ 	]*[a-f0-9]+:	c5 3b 2a 3d 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\]        # 492e <_start\+0x492e>
-[ 	]*[a-f0-9]+:	c4 63 19 4a 35 99 00 00 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8        # 4938 <_start\+0x4938>
-[ 	]*[a-f0-9]+:	c4 63 39 20 3d 99 00 00 00 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x64        # 4942 <_start\+0x4942>
-[ 	]*[a-f0-9]+:	c5 7d 6f 05 99 00 00 00 	vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\]        # 494a <_start\+0x494a>
-[ 	]*[a-f0-9]+:	c5 7d 7f 05 99 00 00 00 	vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8        # 4952 <_start\+0x4952>
-[ 	]*[a-f0-9]+:	c4 62 3d 0d 3d 99 00 00 00 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\]        # 495b <_start\+0x495b>
-[ 	]*[a-f0-9]+:	c4 63 7d 09 05 99 00 00 00 64 	vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x64        # 4965 <_start\+0x4965>
-[ 	]*[a-f0-9]+:	c4 63 7d 19 05 99 00 00 00 64 	vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x64        # 496f <_start\+0x496f>
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3d 99 00 00 00 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x64        # 4979 <_start\+0x4979>
-[ 	]*[a-f0-9]+:	c4 63 1d 4b 35 99 00 00 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8        # 4983 <_start\+0x4983>
+[ 	]*[a-f0-9]+:	c5 f8 ae 15 99 00 00 00 	vldmxcsr DWORD PTR \[rip\+0x99\]        # 415a <_start\+0x415a>
+[ 	]*[a-f0-9]+:	c5 79 6f 05 99 00 00 00 	vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\]        # 4162 <_start\+0x4162>
+[ 	]*[a-f0-9]+:	c5 79 7f 05 99 00 00 00 	vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8        # 416a <_start\+0x416a>
+[ 	]*[a-f0-9]+:	c5 79 7e 05 99 00 00 00 	vmovd  DWORD PTR \[rip\+0x99\],xmm8        # 4172 <_start\+0x4172>
+[ 	]*[a-f0-9]+:	c5 7b 2d 05 99 00 00 00 	vcvtsd2si r8d,QWORD PTR \[rip\+0x99\]        # 417a <_start\+0x417a>
+[ 	]*[a-f0-9]+:	c5 7e e6 05 99 00 00 00 	vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\]        # 4182 <_start\+0x4182>
+[ 	]*[a-f0-9]+:	c5 7d 5a 05 99 00 00 00 	vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\]        # 418a <_start\+0x418a>
+[ 	]*[a-f0-9]+:	c5 39 e0 3d 99 00 00 00 	vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\]        # 4192 <_start\+0x4192>
+[ 	]*[a-f0-9]+:	c4 63 79 df 05 99 00 00 00 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7        # 419c <_start\+0x419c>
+[ 	]*[a-f0-9]+:	c4 63 79 14 05 99 00 00 00 07 	vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7        # 41a6 <_start\+0x41a6>
+[ 	]*[a-f0-9]+:	c5 3b 2a 3d 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\]        # 41ae <_start\+0x41ae>
+[ 	]*[a-f0-9]+:	c4 63 19 4a 35 99 00 00 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8        # 41b8 <_start\+0x41b8>
+[ 	]*[a-f0-9]+:	c4 63 39 20 3d 99 00 00 00 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7        # 41c2 <_start\+0x41c2>
+[ 	]*[a-f0-9]+:	c5 7d 6f 05 99 00 00 00 	vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\]        # 41ca <_start\+0x41ca>
+[ 	]*[a-f0-9]+:	c5 7d 7f 05 99 00 00 00 	vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8        # 41d2 <_start\+0x41d2>
+[ 	]*[a-f0-9]+:	c4 62 3d 0d 3d 99 00 00 00 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\]        # 41db <_start\+0x41db>
+[ 	]*[a-f0-9]+:	c4 63 7d 09 05 99 00 00 00 07 	vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7        # 41e5 <_start\+0x41e5>
+[ 	]*[a-f0-9]+:	c4 63 7d 19 05 99 00 00 00 07 	vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7        # 41ef <_start\+0x41ef>
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3d 99 00 00 00 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7        # 41f9 <_start\+0x41f9>
+[ 	]*[a-f0-9]+:	c4 63 1d 4b 35 99 00 00 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8        # 4203 <_start\+0x4203>
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 24 99 00 00 00 	vldmxcsr DWORD PTR \[rsp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 79 6f 84 24 99 00 00 00 	vmovdqa xmm8,XMMWORD PTR \[rsp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 79 7f 84 24 99 00 00 00 	vmovdqa XMMWORD PTR \[rsp\+0x99\],xmm8
@@ -3502,17 +3184,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 84 24 99 00 00 00 	vcvtdq2pd ymm8,XMMWORD PTR \[rsp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 5a 84 24 99 00 00 00 	vcvtpd2ps xmm8,YMMWORD PTR \[rsp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 39 e0 bc 24 99 00 00 00 	vpavgb xmm15,xmm8,XMMWORD PTR \[rsp\+0x99\]
-[ 	]*[a-f0-9]+:	c4 63 79 df 84 24 99 00 00 00 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rsp\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 84 24 99 00 00 00 64 	vpextrb BYTE PTR \[rsp\+0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 84 24 99 00 00 00 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rsp\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 84 24 99 00 00 00 07 	vpextrb BYTE PTR \[rsp\+0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a bc 24 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rsp\+0x99\]
 [ 	]*[a-f0-9]+:	c4 63 19 4a b4 24 99 00 00 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rsp\+0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 bc 24 99 00 00 00 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rsp\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 bc 24 99 00 00 00 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rsp\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 84 24 99 00 00 00 	vmovdqa ymm8,YMMWORD PTR \[rsp\+0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 7f 84 24 99 00 00 00 	vmovdqa YMMWORD PTR \[rsp\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bc 24 99 00 00 00 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rsp\+0x99\]
-[ 	]*[a-f0-9]+:	c4 63 7d 09 84 24 99 00 00 00 64 	vroundpd ymm8,YMMWORD PTR \[rsp\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 84 24 99 00 00 00 64 	vextractf128 XMMWORD PTR \[rsp\+0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 24 99 00 00 00 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rsp\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 84 24 99 00 00 00 07 	vroundpd ymm8,YMMWORD PTR \[rsp\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 84 24 99 00 00 00 07 	vextractf128 XMMWORD PTR \[rsp\+0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 24 99 00 00 00 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rsp\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b4 24 99 00 00 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rsp\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 c1 78 ae 94 24 99 00 00 00 	vldmxcsr DWORD PTR \[r12\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 79 6f 84 24 99 00 00 00 	vmovdqa xmm8,XMMWORD PTR \[r12\+0x99\]
@@ -3522,17 +3204,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 41 7e e6 84 24 99 00 00 00 	vcvtdq2pd ymm8,XMMWORD PTR \[r12\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 7d 5a 84 24 99 00 00 00 	vcvtpd2ps xmm8,YMMWORD PTR \[r12\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 39 e0 bc 24 99 00 00 00 	vpavgb xmm15,xmm8,XMMWORD PTR \[r12\+0x99\]
-[ 	]*[a-f0-9]+:	c4 43 79 df 84 24 99 00 00 00 64 	vaeskeygenassist xmm8,XMMWORD PTR \[r12\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 43 79 14 84 24 99 00 00 00 64 	vpextrb BYTE PTR \[r12\+0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 43 79 df 84 24 99 00 00 00 07 	vaeskeygenassist xmm8,XMMWORD PTR \[r12\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 43 79 14 84 24 99 00 00 00 07 	vpextrb BYTE PTR \[r12\+0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 41 3b 2a bc 24 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r12\+0x99\]
 [ 	]*[a-f0-9]+:	c4 43 19 4a b4 24 99 00 00 00 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[r12\+0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 43 39 20 bc 24 99 00 00 00 64 	vpinsrb xmm15,xmm8,BYTE PTR \[r12\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 43 39 20 bc 24 99 00 00 00 07 	vpinsrb xmm15,xmm8,BYTE PTR \[r12\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 41 7d 6f 84 24 99 00 00 00 	vmovdqa ymm8,YMMWORD PTR \[r12\+0x99\]
 [ 	]*[a-f0-9]+:	c4 41 7d 7f 84 24 99 00 00 00 	vmovdqa YMMWORD PTR \[r12\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 42 3d 0d bc 24 99 00 00 00 	vpermilpd ymm15,ymm8,YMMWORD PTR \[r12\+0x99\]
-[ 	]*[a-f0-9]+:	c4 43 7d 09 84 24 99 00 00 00 64 	vroundpd ymm8,YMMWORD PTR \[r12\+0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 43 7d 19 84 24 99 00 00 00 64 	vextractf128 XMMWORD PTR \[r12\+0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 43 3d 06 bc 24 99 00 00 00 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r12\+0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 43 7d 09 84 24 99 00 00 00 07 	vroundpd ymm8,YMMWORD PTR \[r12\+0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 43 7d 19 84 24 99 00 00 00 07 	vextractf128 XMMWORD PTR \[r12\+0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 43 3d 06 bc 24 99 00 00 00 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r12\+0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 43 1d 4b b4 24 99 00 00 00 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[r12\+0x99\],ymm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 25 67 ff ff ff 	vldmxcsr DWORD PTR ds:0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c5 79 6f 04 25 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR ds:0xffffffffffffff67
@@ -3542,17 +3224,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 25 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR ds:0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 25 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR ds:0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 25 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR ds:0xffffffffffffff67
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR ds:0xffffffffffffff67,0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 67 ff ff ff 64 	vpextrb BYTE PTR ds:0xffffffffffffff67,xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR ds:0xffffffffffffff67,0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 67 ff ff ff 07 	vpextrb BYTE PTR ds:0xffffffffffffff67,xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 25 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR ds:0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 25 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR ds:0xffffffffffffff67,xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR ds:0xffffffffffffff67,0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR ds:0xffffffffffffff67,0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 25 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR ds:0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 25 67 ff ff ff 	vmovdqa YMMWORD PTR ds:0xffffffffffffff67,ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 25 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR ds:0xffffffffffffff67
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR ds:0xffffffffffffff67,0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 67 ff ff ff 64 	vextractf128 XMMWORD PTR ds:0xffffffffffffff67,ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR ds:0xffffffffffffff67,0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR ds:0xffffffffffffff67,0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 67 ff ff ff 07 	vextractf128 XMMWORD PTR ds:0xffffffffffffff67,ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR ds:0xffffffffffffff67,0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 25 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR ds:0xffffffffffffff67,ymm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 65 67 ff ff ff 	vldmxcsr DWORD PTR \[riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 79 6f 04 65 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[riz\*2-0x99\]
@@ -3562,17 +3244,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 65 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 65 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 65 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[riz\*2-0x99\]
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 65 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[riz\*2-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 65 67 ff ff ff 64 	vpextrb BYTE PTR \[riz\*2-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 65 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[riz\*2-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 65 67 ff ff ff 07 	vpextrb BYTE PTR \[riz\*2-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 65 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 65 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[riz\*2-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 65 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[riz\*2-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 65 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[riz\*2-0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 65 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 65 67 ff ff ff 	vmovdqa YMMWORD PTR \[riz\*2-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 65 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[riz\*2-0x99\]
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 65 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[riz\*2-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 65 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[riz\*2-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 65 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[riz\*2-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 65 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[riz\*2-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 65 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[riz\*2-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 65 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[riz\*2-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 65 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[riz\*2-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 23 67 ff ff ff 	vldmxcsr DWORD PTR \[rbx\+riz\*1-0x99\]
 [ 	]*[a-f0-9]+:	c5 79 6f 84 23 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[rbx\+riz\*1-0x99\]
@@ -3582,17 +3264,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 84 23 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[rbx\+riz\*1-0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 5a 84 23 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[rbx\+riz\*1-0x99\]
 [ 	]*[a-f0-9]+:	c5 39 e0 bc 23 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[rbx\+riz\*1-0x99\]
-[ 	]*[a-f0-9]+:	c4 63 79 df 84 23 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rbx\+riz\*1-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 84 23 67 ff ff ff 64 	vpextrb BYTE PTR \[rbx\+riz\*1-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 84 23 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rbx\+riz\*1-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 84 23 67 ff ff ff 07 	vpextrb BYTE PTR \[rbx\+riz\*1-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a bc 23 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbx\+riz\*1-0x99\]
 [ 	]*[a-f0-9]+:	c4 63 19 4a b4 23 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rbx\+riz\*1-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 bc 23 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rbx\+riz\*1-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 bc 23 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rbx\+riz\*1-0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 84 23 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[rbx\+riz\*1-0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 7f 84 23 67 ff ff ff 	vmovdqa YMMWORD PTR \[rbx\+riz\*1-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bc 23 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rbx\+riz\*1-0x99\]
-[ 	]*[a-f0-9]+:	c4 63 7d 09 84 23 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[rbx\+riz\*1-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 84 23 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[rbx\+riz\*1-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 23 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbx\+riz\*1-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 84 23 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[rbx\+riz\*1-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 84 23 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[rbx\+riz\*1-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 23 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbx\+riz\*1-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b4 23 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rbx\+riz\*1-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 63 67 ff ff ff 	vldmxcsr DWORD PTR \[rbx\+riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 79 6f 84 63 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[rbx\+riz\*2-0x99\]
@@ -3602,17 +3284,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 84 63 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[rbx\+riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 5a 84 63 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[rbx\+riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 39 e0 bc 63 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[rbx\+riz\*2-0x99\]
-[ 	]*[a-f0-9]+:	c4 63 79 df 84 63 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rbx\+riz\*2-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 79 14 84 63 67 ff ff ff 64 	vpextrb BYTE PTR \[rbx\+riz\*2-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 63 79 df 84 63 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rbx\+riz\*2-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 79 14 84 63 67 ff ff ff 07 	vpextrb BYTE PTR \[rbx\+riz\*2-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c5 3b 2a bc 63 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbx\+riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c4 63 19 4a b4 63 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rbx\+riz\*2-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 63 39 20 bc 63 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rbx\+riz\*2-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 39 20 bc 63 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rbx\+riz\*2-0x99\],0x7
 [ 	]*[a-f0-9]+:	c5 7d 6f 84 63 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[rbx\+riz\*2-0x99\]
 [ 	]*[a-f0-9]+:	c5 7d 7f 84 63 67 ff ff ff 	vmovdqa YMMWORD PTR \[rbx\+riz\*2-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bc 63 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rbx\+riz\*2-0x99\]
-[ 	]*[a-f0-9]+:	c4 63 7d 09 84 63 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[rbx\+riz\*2-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 63 7d 19 84 63 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[rbx\+riz\*2-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 63 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbx\+riz\*2-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 63 7d 09 84 63 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[rbx\+riz\*2-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 63 7d 19 84 63 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[rbx\+riz\*2-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 63 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbx\+riz\*2-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b4 63 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rbx\+riz\*2-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 81 78 ae 94 bc 67 ff ff ff 	vldmxcsr DWORD PTR \[r12\+r15\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 79 6f 84 bc 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[r12\+r15\*4-0x99\]
@@ -3622,17 +3304,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 01 7e e6 84 bc 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[r12\+r15\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 7d 5a 84 bc 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[r12\+r15\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 39 e0 bc bc 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[r12\+r15\*4-0x99\]
-[ 	]*[a-f0-9]+:	c4 03 79 df 84 bc 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[r12\+r15\*4-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 03 79 14 84 bc 67 ff ff ff 64 	vpextrb BYTE PTR \[r12\+r15\*4-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 03 79 df 84 bc 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[r12\+r15\*4-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 03 79 14 84 bc 67 ff ff ff 07 	vpextrb BYTE PTR \[r12\+r15\*4-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 01 3b 2a bc bc 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r12\+r15\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 03 19 4a b4 bc 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[r12\+r15\*4-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 03 39 20 bc bc 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[r12\+r15\*4-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 03 39 20 bc bc 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[r12\+r15\*4-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 01 7d 6f 84 bc 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[r12\+r15\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 7d 7f 84 bc 67 ff ff ff 	vmovdqa YMMWORD PTR \[r12\+r15\*4-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 02 3d 0d bc bc 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[r12\+r15\*4-0x99\]
-[ 	]*[a-f0-9]+:	c4 03 7d 09 84 bc 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[r12\+r15\*4-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 03 7d 19 84 bc 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[r12\+r15\*4-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 03 3d 06 bc bc 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r12\+r15\*4-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 03 7d 09 84 bc 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[r12\+r15\*4-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 03 7d 19 84 bc 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[r12\+r15\*4-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 03 3d 06 bc bc 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r12\+r15\*4-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 03 1d 4b b4 bc 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[r12\+r15\*4-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 81 78 ae 94 f8 67 ff ff ff 	vldmxcsr DWORD PTR \[r8\+r15\*8-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 79 6f 84 f8 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[r8\+r15\*8-0x99\]
@@ -3642,17 +3324,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 01 7e e6 84 f8 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[r8\+r15\*8-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 7d 5a 84 f8 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[r8\+r15\*8-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 39 e0 bc f8 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[r8\+r15\*8-0x99\]
-[ 	]*[a-f0-9]+:	c4 03 79 df 84 f8 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[r8\+r15\*8-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 03 79 14 84 f8 67 ff ff ff 64 	vpextrb BYTE PTR \[r8\+r15\*8-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 03 79 df 84 f8 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[r8\+r15\*8-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 03 79 14 84 f8 67 ff ff ff 07 	vpextrb BYTE PTR \[r8\+r15\*8-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 01 3b 2a bc f8 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r8\+r15\*8-0x99\]
 [ 	]*[a-f0-9]+:	c4 03 19 4a b4 f8 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[r8\+r15\*8-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 03 39 20 bc f8 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[r8\+r15\*8-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 03 39 20 bc f8 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[r8\+r15\*8-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 01 7d 6f 84 f8 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[r8\+r15\*8-0x99\]
 [ 	]*[a-f0-9]+:	c4 01 7d 7f 84 f8 67 ff ff ff 	vmovdqa YMMWORD PTR \[r8\+r15\*8-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 02 3d 0d bc f8 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[r8\+r15\*8-0x99\]
-[ 	]*[a-f0-9]+:	c4 03 7d 09 84 f8 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[r8\+r15\*8-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 03 7d 19 84 f8 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[r8\+r15\*8-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 03 3d 06 bc f8 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r8\+r15\*8-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 03 7d 09 84 f8 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[r8\+r15\*8-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 03 7d 19 84 f8 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[r8\+r15\*8-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 03 3d 06 bc f8 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[r8\+r15\*8-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 03 1d 4b b4 f8 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[r8\+r15\*8-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 a1 78 ae 94 a5 67 ff ff ff 	vldmxcsr DWORD PTR \[rbp\+r12\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 79 6f 84 a5 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[rbp\+r12\*4-0x99\]
@@ -3662,17 +3344,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 21 7e e6 84 a5 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[rbp\+r12\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 7d 5a 84 a5 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[rbp\+r12\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 39 e0 bc a5 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[rbp\+r12\*4-0x99\]
-[ 	]*[a-f0-9]+:	c4 23 79 df 84 a5 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rbp\+r12\*4-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 23 79 14 84 a5 67 ff ff ff 64 	vpextrb BYTE PTR \[rbp\+r12\*4-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 23 79 df 84 a5 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rbp\+r12\*4-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 23 79 14 84 a5 67 ff ff ff 07 	vpextrb BYTE PTR \[rbp\+r12\*4-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 21 3b 2a bc a5 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbp\+r12\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 23 19 4a b4 a5 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rbp\+r12\*4-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 23 39 20 bc a5 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rbp\+r12\*4-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 23 39 20 bc a5 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rbp\+r12\*4-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 21 7d 6f 84 a5 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[rbp\+r12\*4-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 7d 7f 84 a5 67 ff ff ff 	vmovdqa YMMWORD PTR \[rbp\+r12\*4-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 22 3d 0d bc a5 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rbp\+r12\*4-0x99\]
-[ 	]*[a-f0-9]+:	c4 23 7d 09 84 a5 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[rbp\+r12\*4-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 23 7d 19 84 a5 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[rbp\+r12\*4-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 23 3d 06 bc a5 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbp\+r12\*4-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 23 7d 09 84 a5 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[rbp\+r12\*4-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 23 7d 19 84 a5 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[rbp\+r12\*4-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 23 3d 06 bc a5 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rbp\+r12\*4-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 23 1d 4b b4 a5 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rbp\+r12\*4-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 a1 78 ae 94 2c 67 ff ff ff 	vldmxcsr DWORD PTR \[rsp\+r13\*1-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 79 6f 84 2c 67 ff ff ff 	vmovdqa xmm8,XMMWORD PTR \[rsp\+r13\*1-0x99\]
@@ -3682,40 +3364,40 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 21 7e e6 84 2c 67 ff ff ff 	vcvtdq2pd ymm8,XMMWORD PTR \[rsp\+r13\*1-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 7d 5a 84 2c 67 ff ff ff 	vcvtpd2ps xmm8,YMMWORD PTR \[rsp\+r13\*1-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 39 e0 bc 2c 67 ff ff ff 	vpavgb xmm15,xmm8,XMMWORD PTR \[rsp\+r13\*1-0x99\]
-[ 	]*[a-f0-9]+:	c4 23 79 df 84 2c 67 ff ff ff 64 	vaeskeygenassist xmm8,XMMWORD PTR \[rsp\+r13\*1-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 23 79 14 84 2c 67 ff ff ff 64 	vpextrb BYTE PTR \[rsp\+r13\*1-0x99\],xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 23 79 df 84 2c 67 ff ff ff 07 	vaeskeygenassist xmm8,XMMWORD PTR \[rsp\+r13\*1-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 23 79 14 84 2c 67 ff ff ff 07 	vpextrb BYTE PTR \[rsp\+r13\*1-0x99\],xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 21 3b 2a bc 2c 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rsp\+r13\*1-0x99\]
 [ 	]*[a-f0-9]+:	c4 23 19 4a b4 2c 67 ff ff ff 80 	vblendvps xmm14,xmm12,XMMWORD PTR \[rsp\+r13\*1-0x99\],xmm8
-[ 	]*[a-f0-9]+:	c4 23 39 20 bc 2c 67 ff ff ff 64 	vpinsrb xmm15,xmm8,BYTE PTR \[rsp\+r13\*1-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 23 39 20 bc 2c 67 ff ff ff 07 	vpinsrb xmm15,xmm8,BYTE PTR \[rsp\+r13\*1-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 21 7d 6f 84 2c 67 ff ff ff 	vmovdqa ymm8,YMMWORD PTR \[rsp\+r13\*1-0x99\]
 [ 	]*[a-f0-9]+:	c4 21 7d 7f 84 2c 67 ff ff ff 	vmovdqa YMMWORD PTR \[rsp\+r13\*1-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 22 3d 0d bc 2c 67 ff ff ff 	vpermilpd ymm15,ymm8,YMMWORD PTR \[rsp\+r13\*1-0x99\]
-[ 	]*[a-f0-9]+:	c4 23 7d 09 84 2c 67 ff ff ff 64 	vroundpd ymm8,YMMWORD PTR \[rsp\+r13\*1-0x99\],0x64
-[ 	]*[a-f0-9]+:	c4 23 7d 19 84 2c 67 ff ff ff 64 	vextractf128 XMMWORD PTR \[rsp\+r13\*1-0x99\],ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 23 3d 06 bc 2c 67 ff ff ff 64 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rsp\+r13\*1-0x99\],0x64
+[ 	]*[a-f0-9]+:	c4 23 7d 09 84 2c 67 ff ff ff 07 	vroundpd ymm8,YMMWORD PTR \[rsp\+r13\*1-0x99\],0x7
+[ 	]*[a-f0-9]+:	c4 23 7d 19 84 2c 67 ff ff ff 07 	vextractf128 XMMWORD PTR \[rsp\+r13\*1-0x99\],ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 23 3d 06 bc 2c 67 ff ff ff 07 	vperm2f128 ymm15,ymm8,YMMWORD PTR \[rsp\+r13\*1-0x99\],0x7
 [ 	]*[a-f0-9]+:	c4 23 1d 4b b4 2c 67 ff ff ff 80 	vblendvpd ymm14,ymm12,YMMWORD PTR \[rsp\+r13\*1-0x99\],ymm8
 [ 	]*[a-f0-9]+:	c4 41 79 50 c0       	vmovmskpd r8d,xmm8
-[ 	]*[a-f0-9]+:	c4 c1 01 72 f0 64    	vpslld xmm15,xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 c1 01 72 f0 07    	vpslld xmm15,xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 41 7c 50 c0       	vmovmskps r8d,ymm8
 [ 	]*[a-f0-9]+:	c4 41 79 6f f8       	vmovdqa xmm15,xmm8
 [ 	]*[a-f0-9]+:	c4 41 79 7e c0       	vmovd  r8d,xmm8
 [ 	]*[a-f0-9]+:	c4 41 7b 2d c0       	vcvtsd2si r8d,xmm8
 [ 	]*[a-f0-9]+:	c4 41 7e e6 c0       	vcvtdq2pd ymm8,xmm8
 [ 	]*[a-f0-9]+:	c4 41 7d 5a c0       	vcvtpd2ps xmm8,ymm8
-[ 	]*[a-f0-9]+:	c4 43 79 df f8 64    	vaeskeygenassist xmm15,xmm8,0x64
-[ 	]*[a-f0-9]+:	c4 43 79 14 c0 64    	vpextrb r8d,xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 43 79 df f8 07    	vaeskeygenassist xmm15,xmm8,0x7
+[ 	]*[a-f0-9]+:	c4 43 79 14 c0 07    	vpextrb r8d,xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 41 3b 2a f8       	vcvtsi2sd xmm15,xmm8,r8d
 [ 	]*[a-f0-9]+:	c4 43 19 4a f0 80    	vblendvps xmm14,xmm12,xmm8,xmm8
-[ 	]*[a-f0-9]+:	c4 43 39 20 f8 64    	vpinsrb xmm15,xmm8,r8d,0x64
+[ 	]*[a-f0-9]+:	c4 43 39 20 f8 07    	vpinsrb xmm15,xmm8,r8d,0x7
 [ 	]*[a-f0-9]+:	c4 41 7d 6f f8       	vmovdqa ymm15,ymm8
 [ 	]*[a-f0-9]+:	c4 42 05 0d e0       	vpermilpd ymm12,ymm15,ymm8
-[ 	]*[a-f0-9]+:	c4 43 7d 09 f8 64    	vroundpd ymm15,ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 43 7d 19 c0 64    	vextractf128 xmm8,ymm8,0x64
-[ 	]*[a-f0-9]+:	c4 43 05 06 e0 64    	vperm2f128 ymm12,ymm15,ymm8,0x64
+[ 	]*[a-f0-9]+:	c4 43 7d 09 f8 07    	vroundpd ymm15,ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 43 7d 19 c0 07    	vextractf128 xmm8,ymm8,0x7
+[ 	]*[a-f0-9]+:	c4 43 05 06 e0 07    	vperm2f128 ymm12,ymm15,ymm8,0x7
 [ 	]*[a-f0-9]+:	c4 43 1d 4b f7 80    	vblendvpd ymm14,ymm12,ymm15,ymm8
-[ 	]*[a-f0-9]+:	c4 43 3d 18 f8 64    	vinsertf128 ymm15,ymm8,xmm8,0x64
+[ 	]*[a-f0-9]+:	c4 43 3d 18 f8 07    	vinsertf128 ymm15,ymm8,xmm8,0x7
 [ 	]*[a-f0-9]+:	c4 61 fb 2d 01       	vcvtsd2si r8,QWORD PTR \[rcx\]
 [ 	]*[a-f0-9]+:	c4 43 79 17 c0 0a    	vextractps r8d,xmm8,0xa
 [ 	]*[a-f0-9]+:	c4 61 fa 2d 01       	vcvtss2si r8,DWORD PTR \[rcx\]
-[ 	]*[a-f0-9]+:	c4 41 01 c4 c0 64    	vpinsrw xmm8,xmm15,r8d,0x64
+[ 	]*[a-f0-9]+:	c4 41 01 c4 c0 07    	vpinsrw xmm8,xmm15,r8d,0x7
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx.d b/gas/testsuite/gas/i386/x86-64-avx.d
index 4ec6e06..7475114 100644
--- a/gas/testsuite/gas/i386/x86-64-avx.d
+++ b/gas/testsuite/gas/i386/x86-64-avx.d
@@ -14,14 +14,14 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e2 4d 2f 21       	vmaskmovpd %ymm4,%ymm6,\(%rcx\)
 [ 	]*[a-f0-9]+:	c4 e2 5d 2c 31       	vmaskmovps \(%rcx\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 4d 2e 21       	vmaskmovps %ymm4,%ymm6,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 64    	vpermilpd \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 64    	vpermilpd \$0x64,\(%rcx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 64    	vpermilps \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 64    	vpermilps \$0x64,\(%rcx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 64    	vroundpd \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 64    	vroundpd \$0x64,\(%rcx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 64    	vroundps \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 64    	vroundps \$0x64,\(%rcx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 07    	vpermilpd \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 07    	vpermilpd \$0x7,\(%rcx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 07    	vpermilps \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 07    	vpermilps \$0x7,\(%rcx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 07    	vroundpd \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 07    	vroundpd \$0x7,\(%rcx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 07    	vroundps \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 07    	vroundps \$0x7,\(%rcx\),%ymm6
 [ 	]*[a-f0-9]+:	c5 cd 58 d4          	vaddpd %ymm4,%ymm6,%ymm2
 [ 	]*[a-f0-9]+:	c5 cd 58 11          	vaddpd \(%rcx\),%ymm6,%ymm2
 [ 	]*[a-f0-9]+:	c5 cc 58 d4          	vaddps %ymm4,%ymm6,%ymm2
@@ -220,109 +220,69 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fd 5a 21          	vcvtpd2psy \(%rcx\),%xmm4
 [ 	]*[a-f0-9]+:	c5 fd e6 e4          	vcvttpd2dq %ymm4,%xmm4
 [ 	]*[a-f0-9]+:	c5 fd e6 21          	vcvttpd2dqy \(%rcx\),%xmm4
-[ 	]*[a-f0-9]+:	c5 fc 5b e4          	vcvtdq2ps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 5b f4          	vcvtdq2ps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 5b 21          	vcvtdq2ps \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 5b e4          	vcvtps2dq %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 5b f4          	vcvtps2dq %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 5b 21          	vcvtps2dq \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 5b e4          	vcvttps2dq %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 5b f4          	vcvttps2dq %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 5b 21          	vcvttps2dq \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 28 e4          	vmovapd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 28 f4          	vmovapd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 28 21          	vmovapd \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 28 e4          	vmovaps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 28 f4          	vmovaps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 28 21          	vmovaps \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 6f e4          	vmovdqa %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 6f f4          	vmovdqa %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 6f 21          	vmovdqa \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 6f e4          	vmovdqu %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 6f f4          	vmovdqu %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 6f 21          	vmovdqu \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 ff 12 e4          	vmovddup %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 ff 12 f4          	vmovddup %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 ff 12 21          	vmovddup \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 16 e4          	vmovshdup %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 16 f4          	vmovshdup %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 16 21          	vmovshdup \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 12 e4          	vmovsldup %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 12 f4          	vmovsldup %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 12 21          	vmovsldup \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 10 e4          	vmovupd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 10 f4          	vmovupd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 10 21          	vmovupd \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 10 e4          	vmovups %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 10 f4          	vmovups %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 10 21          	vmovups \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e2 7d 17 e4       	vptest %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 17 f4       	vptest %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 7d 17 21       	vptest \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 53 e4          	vrcpps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 53 f4          	vrcpps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 53 21          	vrcpps \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 52 e4          	vrsqrtps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 52 f4          	vrsqrtps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 52 21          	vrsqrtps \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 51 e4          	vsqrtpd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 51 f4          	vsqrtpd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 51 21          	vsqrtpd \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 51 e4          	vsqrtps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 51 f4          	vsqrtps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 51 21          	vsqrtps \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e2 7d 0f e4       	vtestpd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0f f4       	vtestpd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 7d 0f 21       	vtestpd \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e2 7d 0e e4       	vtestps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0e f4       	vtestps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 7d 0e 21       	vtestps \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 ff f0 21          	vlddqu \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 64    	vblendpd \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 64    	vblendpd \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 64    	vblendps \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 64    	vblendps \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c2 d4 64       	vcmppd \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c2 11 64       	vcmppd \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c2 d4 64       	vcmpps \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c2 11 64       	vcmpps \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 64    	vdpps  \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 64    	vdpps  \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 64    	vperm2f128 \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 64    	vperm2f128 \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c6 d4 64       	vshufpd \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c6 11 64       	vshufpd \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c6 d4 64       	vshufps \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c6 11 64       	vshufps \$0x64,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 07    	vblendpd \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 07    	vblendpd \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 07    	vblendps \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 07    	vblendps \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c2 d4 07       	vcmpordpd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c2 11 07       	vcmpordpd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c2 d4 07       	vcmpordps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c2 11 07       	vcmpordps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 07    	vdpps  \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 07    	vdpps  \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 07    	vperm2f128 \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 07    	vperm2f128 \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c6 d4 07       	vshufpd \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c6 11 07       	vshufpd \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c6 d4 07       	vshufps \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c6 11 07       	vshufps \$0x7,\(%rcx\),%ymm6,%ymm2
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b fe 40    	vblendvpd %ymm4,%ymm6,%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b 39 40    	vblendvpd %ymm4,\(%rcx\),%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a fe 40    	vblendvps %ymm4,%ymm6,%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a 39 40    	vblendvps %ymm4,\(%rcx\),%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 fc 20    	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d fc 20    	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c fc 20    	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f fc 20    	vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e fc 20    	vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d fc 20    	vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c fc 20    	vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 fc 20    	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 fc 20    	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d fc 20    	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c fc 20    	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 62    	vpermilmo2pd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 62    	vpermilmo2pd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 63    	vpermilmz2pd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 63    	vpermilmz2pd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 60    	vpermiltd2pd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 60    	vpermiltd2pd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 62    	vpermilmo2ps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 62    	vpermilmo2ps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 63    	vpermilmz2ps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 63    	vpermilmz2ps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 60    	vpermiltd2ps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 60    	vpermiltd2ps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 6a    	vpermil2pd \$0xa,%ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 6a    	vpermil2pd \$0xa,\(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 6a    	vpermil2ps \$0xa,%ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 6a    	vpermil2ps \$0xa,\(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 64    	vinsertf128 \$0x64,%xmm4,%ymm4,%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 64    	vinsertf128 \$0x64,\(%rcx\),%ymm4,%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 64    	vextractf128 \$0x64,%ymm4,%xmm4
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 64    	vextractf128 \$0x64,%ymm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 07    	vinsertf128 \$0x7,%xmm4,%ymm4,%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 07    	vinsertf128 \$0x7,\(%rcx\),%ymm4,%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 07    	vextractf128 \$0x7,%ymm4,%xmm4
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 07    	vextractf128 \$0x7,%ymm4,\(%rcx\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 1a 21       	vbroadcastf128 \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 f8 5b f4          	vcvtdq2ps %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 f8 5b 21          	vcvtdq2ps \(%rcx\),%xmm4
@@ -763,120 +723,60 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 c8 c2 39 1f       	vcmptrue_usps \(%rcx\),%xmm6,%xmm7
 [ 	]*[a-f0-9]+:	c4 e2 59 2c 31       	vmaskmovps \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 59 2d 31       	vmaskmovpd \(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 df f4 64    	vaeskeygenassist \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 df 31 64    	vaeskeygenassist \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 64    	vpcmpestri \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 61 31 64    	vpcmpestri \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 64    	vpcmpestrm \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 60 31 64    	vpcmpestrm \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 64    	vpcmpistri \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 63 31 64    	vpcmpistri \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 64    	vpcmpistrm \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 62 31 64    	vpcmpistrm \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 64    	vpermilpd \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 05 31 64    	vpermilpd \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 64    	vpermilps \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 04 31 64    	vpermilps \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 70 f4 64       	vpshufd \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 70 31 64       	vpshufd \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 fa 70 f4 64       	vpshufhw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 fa 70 31 64       	vpshufhw \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 fb 70 f4 64       	vpshuflw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 fb 70 31 64       	vpshuflw \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 64    	vroundpd \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 09 31 64    	vroundpd \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 64    	vroundps \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 08 31 64    	vroundps \$0x64,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 df f4 07    	vaeskeygenassist \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 df 31 07    	vaeskeygenassist \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 07    	vpcmpestri \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 61 31 07    	vpcmpestri \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 07    	vpcmpestrm \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 60 31 07    	vpcmpestrm \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 07    	vpcmpistri \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 63 31 07    	vpcmpistri \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 07    	vpcmpistrm \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 62 31 07    	vpcmpistrm \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 07    	vpermilpd \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 05 31 07    	vpermilpd \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 07    	vpermilps \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 04 31 07    	vpermilps \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 70 f4 07       	vpshufd \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 70 31 07       	vpshufd \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 fa 70 f4 07       	vpshufhw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fa 70 31 07       	vpshufhw \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 fb 70 f4 07       	vpshuflw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fb 70 31 07       	vpshuflw \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 07    	vroundpd \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 09 31 07    	vroundpd \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 07    	vroundps \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 08 31 07    	vroundps \$0x7,\(%rcx\),%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 49 2e 21       	vmaskmovps %xmm4,%xmm6,\(%rcx\)
 [ 	]*[a-f0-9]+:	c4 e2 49 2f 21       	vmaskmovpd %xmm4,%xmm6,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 64    	vblendpd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 64    	vblendpd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 64    	vblendps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 64    	vblendps \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c2 d4 64       	vcmppd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c2 11 64       	vcmppd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c2 d4 64       	vcmpps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c2 11 64       	vcmpps \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 64    	vdppd  \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 41 11 64    	vdppd  \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 64    	vdpps  \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 40 11 64    	vdpps  \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 64    	vmpsadbw \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 42 11 64    	vmpsadbw \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 64    	vpalignr \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 64    	vpalignr \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 64    	vpblendw \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 64    	vpblendw \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c6 d4 64       	vshufpd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c6 11 64       	vshufpd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c6 d4 64       	vshufps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c6 11 64       	vshufps \$0x64,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 07    	vblendpd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 07    	vblendpd \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 07    	vblendps \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 07    	vblendps \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c2 d4 07       	vcmpordpd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c2 11 07       	vcmpordpd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c2 d4 07       	vcmpordps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c2 11 07       	vcmpordps \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 07    	vdppd  \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 41 11 07    	vdppd  \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 07    	vdpps  \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 40 11 07    	vdpps  \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 07    	vmpsadbw \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 42 11 07    	vmpsadbw \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 07    	vpalignr \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 07    	vpalignr \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 07    	vpblendw \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 07    	vpblendw \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c6 d4 07       	vshufpd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c6 11 07       	vshufpd \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c6 d4 07       	vshufps \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c6 11 07       	vshufps \$0x7,\(%rcx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c4 e3 69 4b fe 40    	vblendvpd %xmm4,%xmm6,%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4b 39 40    	vblendvpd %xmm4,\(%rcx\),%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4a fe 40    	vblendvps %xmm4,%xmm6,%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4a 39 40    	vblendvps %xmm4,\(%rcx\),%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4c fe 40    	vpblendvb %xmm4,%xmm6,%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4c 39 40    	vpblendvb %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 fc 20    	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 fc 20    	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d fc 20    	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c fc 20    	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f fc 20    	vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e fc 20    	vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d fc 20    	vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c fc 20    	vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 fc 20    	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 fc 20    	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d fc 20    	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c fc 20    	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 62    	vpermilmo2pd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 62    	vpermilmo2pd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 42    	vpermilmo2pd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 63    	vpermilmz2pd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 63    	vpermilmz2pd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 43    	vpermilmz2pd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 60    	vpermiltd2pd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 60    	vpermiltd2pd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 40    	vpermiltd2pd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 62    	vpermilmo2ps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 62    	vpermilmo2ps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 42    	vpermilmo2ps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 63    	vpermilmz2ps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 63    	vpermilmz2ps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 43    	vpermilmz2ps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 60    	vpermiltd2ps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 60    	vpermiltd2ps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 40    	vpermiltd2ps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 6a    	vpermil2pd \$0xa,%xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 6a    	vpermil2pd \$0xa,\(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 4a    	vpermil2pd \$0xa,%xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 6a    	vpermil2ps \$0xa,%xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 6a    	vpermil2ps \$0xa,\(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 4a    	vpermil2ps \$0xa,%xmm4,\(%rcx\),%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e2 7d 19 21       	vbroadcastsd \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 f9 2f f4          	vcomisd %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 f9 2f 21          	vcomisd \(%rcx\),%xmm4
@@ -924,30 +824,18 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e1 db 2a 31       	vcvtsi2sdq \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e1 da 2a f1       	vcvtsi2ss %rcx,%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e1 da 2a 31       	vcvtsi2ssq \(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 d9 22 f1 64    	vpinsrq \$0x64,%rcx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 d9 22 31 64    	vpinsrq \$0x64,\(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 f9 16 e1 64    	vpextrq \$0x64,%xmm4,%rcx
-[ 	]*[a-f0-9]+:	c4 e3 f9 16 21 64    	vpextrq \$0x64,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 d9 22 f1 07    	vpinsrq \$0x7,%rcx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 d9 22 31 07    	vpinsrq \$0x7,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 f9 16 e1 07    	vpextrq \$0x7,%xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e3 f9 16 21 07    	vpextrq \$0x7,%xmm4,\(%rcx\)
 [ 	]*[a-f0-9]+:	c5 d9 12 31          	vmovlpd \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 d8 12 31          	vmovlps \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 d9 16 31          	vmovhpd \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 d8 16 31          	vmovhps \(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 cb c2 d4 64       	vcmpsd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 cb c2 11 64       	vcmpsd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 64    	vroundsd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 64    	vroundsd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b fc 20    	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f fc 20    	vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b fc 20    	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f fc 20    	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c5 cb c2 d4 07       	vcmpordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cb c2 11 07       	vcmpordsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 07    	vroundsd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 07    	vroundsd \$0x7,\(%rcx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 58 d4          	vaddsd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 58 11          	vaddsd \(%rcx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 5a d4          	vcvtsd2ss %xmm4,%xmm6,%xmm2
@@ -1028,6 +916,8 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1e       	vcmpgt_oqsd \(%rcx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb c2 d4 1f       	vcmptrue_ussd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1f       	vcmptrue_ussd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr \(%rcx\)
+[ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr \(%rcx\)
 [ 	]*[a-f0-9]+:	c5 ca 58 d4          	vaddss %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 ca 58 11          	vaddss \(%rcx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 ca 5a d4          	vcvtss2sd %xmm4,%xmm6,%xmm2
@@ -1143,55 +1033,43 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 f9 50 cc          	vmovmskpd %xmm4,%ecx
 [ 	]*[a-f0-9]+:	c5 f8 50 cc          	vmovmskps %xmm4,%ecx
 [ 	]*[a-f0-9]+:	c5 f9 d7 cc          	vpmovmskb %xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 64    	vextractps \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 64    	vpextrd \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 16 21 64    	vpextrd \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 64    	vextractps \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps \$0x64,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 07    	vextractps \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 07    	vpextrd \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 16 21 07    	vpextrd \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 07    	vextractps \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps \$0x7,%xmm4,\(%rcx\)
 [ 	]*[a-f0-9]+:	c5 db 2a f1          	vcvtsi2sd %ecx,%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 db 2a 31          	vcvtsi2sdl \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 da 2a f1          	vcvtsi2ss %ecx,%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 da 2a 31          	vcvtsi2ssl \(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 ca c2 d4 64       	vcmpss \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 ca c2 11 64       	vcmpss \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 64    	vinsertps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 21 11 64    	vinsertps \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 64    	vroundss \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 64    	vroundss \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a fc 20    	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e fc 20    	vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a fc 20    	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e fc 20    	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c5 ca c2 d4 07       	vcmpordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ca c2 11 07       	vcmpordss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 07    	vinsertps \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 21 11 07    	vinsertps \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 07    	vroundss \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 07    	vroundss \$0x7,\(%rcx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c4 e2 79 22 f4       	vpmovsxbq %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 79 22 21       	vpmovsxbq \(%rcx\),%xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 32 f4       	vpmovzxbq %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 79 32 21       	vpmovzxbq \(%rcx\),%xmm4
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c5 d9 c4 f1 64       	vpinsrw \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw \$0x64,\(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 d9 c4 f1 64       	vpinsrw \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw \$0x64,\(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 64    	vpextrb \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb \$0x64,\(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 64    	vpextrb \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb \$0x64,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 d9 c4 f1 07       	vpinsrw \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw \$0x7,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 d9 c4 f1 07       	vpinsrw \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw \$0x7,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 07    	vpextrb \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 07    	vpextrb \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 f9 f7 f4          	vmaskmovdqu %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 fa 7e f4          	vmovq  %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 f9 50 cc          	vmovmskpd %xmm4,%ecx
@@ -1201,17 +1079,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 c8 16 d4          	vmovlhps %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 10 d4          	vmovsd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 ca 10 d4          	vmovss %xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 72 f4 64       	vpslld \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 fc 64       	vpslldq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 f4 64       	vpsllq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 71 f4 64       	vpsllw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 72 e4 64       	vpsrad \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 71 e4 64       	vpsraw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 72 d4 64       	vpsrld \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 dc 64       	vpsrldq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 d4 64       	vpsrlq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 71 d4 64       	vpsrlw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw \$0x64,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 c9 72 f4 07       	vpslld \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 fc 07       	vpslldq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 f4 07       	vpsllq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 71 f4 07       	vpsllw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 72 e4 07       	vpsrad \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 71 e4 07       	vpsraw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 72 d4 07       	vpsrld \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 dc 07       	vpsrldq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 d4 07       	vpsrlq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 71 d4 07       	vpsrlw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw \$0x7,%xmm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fd 50 cc          	vmovmskpd %ymm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fc 50 cc          	vmovmskps %ymm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fd 50 cc          	vmovmskpd %ymm4,%ecx
@@ -1230,17 +1108,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 25 78 56 34 12 	vcvtdq2pd 0x12345678,%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 25 78 56 34 12 	vcvtpd2psy 0x12345678,%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 25 78 56 34 12 	vpavgb 0x12345678,%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 78 56 34 12 64 	vaeskeygenassist \$0x64,0x12345678,%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 78 56 34 12 64 	vpextrb \$0x64,%xmm8,0x12345678
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 78 56 34 12 07 	vaeskeygenassist \$0x7,0x12345678,%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 78 56 34 12 07 	vpextrb \$0x7,%xmm8,0x12345678
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 25 78 56 34 12 	vcvtsi2sdl 0x12345678,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 25 78 56 34 12 80 	vblendvps %xmm8,0x12345678,%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 78 56 34 12 64 	vpinsrb \$0x64,0x12345678,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 78 56 34 12 07 	vpinsrb \$0x7,0x12345678,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 25 78 56 34 12 	vmovdqa 0x12345678,%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 25 78 56 34 12 	vmovdqa %ymm8,0x12345678
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 25 78 56 34 12 	vpermilpd 0x12345678,%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 78 56 34 12 64 	vroundpd \$0x64,0x12345678,%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 78 56 34 12 64 	vextractf128 \$0x64,%ymm8,0x12345678
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 78 56 34 12 64 	vperm2f128 \$0x64,0x12345678,%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 78 56 34 12 07 	vroundpd \$0x7,0x12345678,%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 78 56 34 12 07 	vextractf128 \$0x7,%ymm8,0x12345678
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 78 56 34 12 07 	vperm2f128 \$0x7,0x12345678,%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 25 78 56 34 12 80 	vblendvpd %ymm8,0x12345678,%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c5 f8 ae 55 00       	vldmxcsr 0x0\(%rbp\)
 [ 	]*[a-f0-9]+:	c5 79 6f 45 00       	vmovdqa 0x0\(%rbp\),%xmm8
@@ -1250,17 +1128,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 45 00       	vcvtdq2pd 0x0\(%rbp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 45 00       	vcvtpd2psy 0x0\(%rbp\),%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 7d 00       	vpavgb 0x0\(%rbp\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 45 00 64 	vaeskeygenassist \$0x64,0x0\(%rbp\),%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 45 00 64 	vpextrb \$0x64,%xmm8,0x0\(%rbp\)
+[ 	]*[a-f0-9]+:	c4 63 79 df 45 00 07 	vaeskeygenassist \$0x7,0x0\(%rbp\),%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 45 00 07 	vpextrb \$0x7,%xmm8,0x0\(%rbp\)
 [ 	]*[a-f0-9]+:	c5 3b 2a 7d 00       	vcvtsi2sdl 0x0\(%rbp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a 75 00 80 	vblendvps %xmm8,0x0\(%rbp\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 7d 00 64 	vpinsrb \$0x64,0x0\(%rbp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 7d 00 07 	vpinsrb \$0x7,0x0\(%rbp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 45 00       	vmovdqa 0x0\(%rbp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 45 00       	vmovdqa %ymm8,0x0\(%rbp\)
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 7d 00    	vpermilpd 0x0\(%rbp\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 45 00 64 	vroundpd \$0x64,0x0\(%rbp\),%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 45 00 64 	vextractf128 \$0x64,%ymm8,0x0\(%rbp\)
-[ 	]*[a-f0-9]+:	c4 63 3d 06 7d 00 64 	vperm2f128 \$0x64,0x0\(%rbp\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 45 00 07 	vroundpd \$0x7,0x0\(%rbp\),%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 45 00 07 	vextractf128 \$0x7,%ymm8,0x0\(%rbp\)
+[ 	]*[a-f0-9]+:	c4 63 3d 06 7d 00 07 	vperm2f128 \$0x7,0x0\(%rbp\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 75 00 80 	vblendvpd %ymm8,0x0\(%rbp\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 24       	vldmxcsr \(%rsp\)
 [ 	]*[a-f0-9]+:	c5 79 6f 04 24       	vmovdqa \(%rsp\),%xmm8
@@ -1270,17 +1148,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 24       	vcvtdq2pd \(%rsp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 24       	vcvtpd2psy \(%rsp\),%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 24       	vpavgb \(%rsp\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 24 64 	vaeskeygenassist \$0x64,\(%rsp\),%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 24 64 	vpextrb \$0x64,%xmm8,\(%rsp\)
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 24 07 	vaeskeygenassist \$0x7,\(%rsp\),%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 24 07 	vpextrb \$0x7,%xmm8,\(%rsp\)
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 24       	vcvtsi2sdl \(%rsp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 24 80 	vblendvps %xmm8,\(%rsp\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 24 64 	vpinsrb \$0x64,\(%rsp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 24 07 	vpinsrb \$0x7,\(%rsp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 24       	vmovdqa \(%rsp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 24       	vmovdqa %ymm8,\(%rsp\)
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 24    	vpermilpd \(%rsp\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 24 64 	vroundpd \$0x64,\(%rsp\),%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 24 64 	vextractf128 \$0x64,%ymm8,\(%rsp\)
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 24 64 	vperm2f128 \$0x64,\(%rsp\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 24 07 	vroundpd \$0x7,\(%rsp\),%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 24 07 	vextractf128 \$0x7,%ymm8,\(%rsp\)
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 24 07 	vperm2f128 \$0x7,\(%rsp\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 24 80 	vblendvpd %ymm8,\(%rsp\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c5 f8 ae 95 99 00 00 00 	vldmxcsr 0x99\(%rbp\)
 [ 	]*[a-f0-9]+:	c5 79 6f 85 99 00 00 00 	vmovdqa 0x99\(%rbp\),%xmm8
@@ -1290,17 +1168,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 85 99 00 00 00 	vcvtdq2pd 0x99\(%rbp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 85 99 00 00 00 	vcvtpd2psy 0x99\(%rbp\),%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 bd 99 00 00 00 	vpavgb 0x99\(%rbp\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 85 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%rbp\),%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 85 99 00 00 00 64 	vpextrb \$0x64,%xmm8,0x99\(%rbp\)
+[ 	]*[a-f0-9]+:	c4 63 79 df 85 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%rbp\),%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 85 99 00 00 00 07 	vpextrb \$0x7,%xmm8,0x99\(%rbp\)
 [ 	]*[a-f0-9]+:	c5 3b 2a bd 99 00 00 00 	vcvtsi2sdl 0x99\(%rbp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a b5 99 00 00 00 80 	vblendvps %xmm8,0x99\(%rbp\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 bd 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%rbp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 bd 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%rbp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 85 99 00 00 00 	vmovdqa 0x99\(%rbp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 85 99 00 00 00 	vmovdqa %ymm8,0x99\(%rbp\)
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bd 99 00 00 00 	vpermilpd 0x99\(%rbp\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 85 99 00 00 00 64 	vroundpd \$0x64,0x99\(%rbp\),%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 85 99 00 00 00 64 	vextractf128 \$0x64,%ymm8,0x99\(%rbp\)
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bd 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%rbp\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 85 99 00 00 00 07 	vroundpd \$0x7,0x99\(%rbp\),%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 85 99 00 00 00 07 	vextractf128 \$0x7,%ymm8,0x99\(%rbp\)
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bd 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%rbp\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b5 99 00 00 00 80 	vblendvpd %ymm8,0x99\(%rbp\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 c1 78 ae 97 99 00 00 00 	vldmxcsr 0x99\(%r15\)
 [ 	]*[a-f0-9]+:	c4 41 79 6f 87 99 00 00 00 	vmovdqa 0x99\(%r15\),%xmm8
@@ -1310,38 +1188,38 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 41 7e e6 87 99 00 00 00 	vcvtdq2pd 0x99\(%r15\),%ymm8
 [ 	]*[a-f0-9]+:	c4 41 7d 5a 87 99 00 00 00 	vcvtpd2psy 0x99\(%r15\),%xmm8
 [ 	]*[a-f0-9]+:	c4 41 39 e0 bf 99 00 00 00 	vpavgb 0x99\(%r15\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 43 79 df 87 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%r15\),%xmm8
-[ 	]*[a-f0-9]+:	c4 43 79 14 87 99 00 00 00 64 	vpextrb \$0x64,%xmm8,0x99\(%r15\)
+[ 	]*[a-f0-9]+:	c4 43 79 df 87 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%r15\),%xmm8
+[ 	]*[a-f0-9]+:	c4 43 79 14 87 99 00 00 00 07 	vpextrb \$0x7,%xmm8,0x99\(%r15\)
 [ 	]*[a-f0-9]+:	c4 41 3b 2a bf 99 00 00 00 	vcvtsi2sdl 0x99\(%r15\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 43 19 4a b7 99 00 00 00 80 	vblendvps %xmm8,0x99\(%r15\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 43 39 20 bf 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%r15\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 43 39 20 bf 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%r15\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 41 7d 6f 87 99 00 00 00 	vmovdqa 0x99\(%r15\),%ymm8
 [ 	]*[a-f0-9]+:	c4 41 7d 7f 87 99 00 00 00 	vmovdqa %ymm8,0x99\(%r15\)
 [ 	]*[a-f0-9]+:	c4 42 3d 0d bf 99 00 00 00 	vpermilpd 0x99\(%r15\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 43 7d 09 87 99 00 00 00 64 	vroundpd \$0x64,0x99\(%r15\),%ymm8
-[ 	]*[a-f0-9]+:	c4 43 7d 19 87 99 00 00 00 64 	vextractf128 \$0x64,%ymm8,0x99\(%r15\)
-[ 	]*[a-f0-9]+:	c4 43 3d 06 bf 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%r15\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 43 7d 09 87 99 00 00 00 07 	vroundpd \$0x7,0x99\(%r15\),%ymm8
+[ 	]*[a-f0-9]+:	c4 43 7d 19 87 99 00 00 00 07 	vextractf128 \$0x7,%ymm8,0x99\(%r15\)
+[ 	]*[a-f0-9]+:	c4 43 3d 06 bf 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%r15\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 43 1d 4b b7 99 00 00 00 80 	vblendvpd %ymm8,0x99\(%r15\),%ymm12,%ymm14
-[ 	]*[a-f0-9]+:	c5 f8 ae 15 99 00 00 00 	vldmxcsr 0x99\(%rip\)        # 1a9c <_start\+0x1a9c>
-[ 	]*[a-f0-9]+:	c5 79 6f 05 99 00 00 00 	vmovdqa 0x99\(%rip\),%xmm8        # 1aa4 <_start\+0x1aa4>
-[ 	]*[a-f0-9]+:	c5 79 7f 05 99 00 00 00 	vmovdqa %xmm8,0x99\(%rip\)        # 1aac <_start\+0x1aac>
-[ 	]*[a-f0-9]+:	c5 79 7e 05 99 00 00 00 	vmovd  %xmm8,0x99\(%rip\)        # 1ab4 <_start\+0x1ab4>
-[ 	]*[a-f0-9]+:	c5 7b 2d 05 99 00 00 00 	vcvtsd2si 0x99\(%rip\),%r8d        # 1abc <_start\+0x1abc>
-[ 	]*[a-f0-9]+:	c5 7e e6 05 99 00 00 00 	vcvtdq2pd 0x99\(%rip\),%ymm8        # 1ac4 <_start\+0x1ac4>
-[ 	]*[a-f0-9]+:	c5 7d 5a 05 99 00 00 00 	vcvtpd2psy 0x99\(%rip\),%xmm8        # 1acc <_start\+0x1acc>
-[ 	]*[a-f0-9]+:	c5 39 e0 3d 99 00 00 00 	vpavgb 0x99\(%rip\),%xmm8,%xmm15        # 1ad4 <_start\+0x1ad4>
-[ 	]*[a-f0-9]+:	c4 63 79 df 05 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%rip\),%xmm8        # 1ade <_start\+0x1ade>
-[ 	]*[a-f0-9]+:	c4 63 79 14 05 99 00 00 00 64 	vpextrb \$0x64,%xmm8,0x99\(%rip\)        # 1ae8 <_start\+0x1ae8>
-[ 	]*[a-f0-9]+:	c5 3b 2a 3d 99 00 00 00 	vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15        # 1af0 <_start\+0x1af0>
-[ 	]*[a-f0-9]+:	c4 63 19 4a 35 99 00 00 00 80 	vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14        # 1afa <_start\+0x1afa>
-[ 	]*[a-f0-9]+:	c4 63 39 20 3d 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%rip\),%xmm8,%xmm15        # 1b04 <_start\+0x1b04>
-[ 	]*[a-f0-9]+:	c5 7d 6f 05 99 00 00 00 	vmovdqa 0x99\(%rip\),%ymm8        # 1b0c <_start\+0x1b0c>
-[ 	]*[a-f0-9]+:	c5 7d 7f 05 99 00 00 00 	vmovdqa %ymm8,0x99\(%rip\)        # 1b14 <_start\+0x1b14>
-[ 	]*[a-f0-9]+:	c4 62 3d 0d 3d 99 00 00 00 	vpermilpd 0x99\(%rip\),%ymm8,%ymm15        # 1b1d <_start\+0x1b1d>
-[ 	]*[a-f0-9]+:	c4 63 7d 09 05 99 00 00 00 64 	vroundpd \$0x64,0x99\(%rip\),%ymm8        # 1b27 <_start\+0x1b27>
-[ 	]*[a-f0-9]+:	c4 63 7d 19 05 99 00 00 00 64 	vextractf128 \$0x64,%ymm8,0x99\(%rip\)        # 1b31 <_start\+0x1b31>
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3d 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%rip\),%ymm8,%ymm15        # 1b3b <_start\+0x1b3b>
-[ 	]*[a-f0-9]+:	c4 63 1d 4b 35 99 00 00 00 80 	vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14        # 1b45 <_start\+0x1b45>
+[ 	]*[a-f0-9]+:	c5 f8 ae 15 99 00 00 00 	vldmxcsr 0x99\(%rip\)        # 17bc <_start\+0x17bc>
+[ 	]*[a-f0-9]+:	c5 79 6f 05 99 00 00 00 	vmovdqa 0x99\(%rip\),%xmm8        # 17c4 <_start\+0x17c4>
+[ 	]*[a-f0-9]+:	c5 79 7f 05 99 00 00 00 	vmovdqa %xmm8,0x99\(%rip\)        # 17cc <_start\+0x17cc>
+[ 	]*[a-f0-9]+:	c5 79 7e 05 99 00 00 00 	vmovd  %xmm8,0x99\(%rip\)        # 17d4 <_start\+0x17d4>
+[ 	]*[a-f0-9]+:	c5 7b 2d 05 99 00 00 00 	vcvtsd2si 0x99\(%rip\),%r8d        # 17dc <_start\+0x17dc>
+[ 	]*[a-f0-9]+:	c5 7e e6 05 99 00 00 00 	vcvtdq2pd 0x99\(%rip\),%ymm8        # 17e4 <_start\+0x17e4>
+[ 	]*[a-f0-9]+:	c5 7d 5a 05 99 00 00 00 	vcvtpd2psy 0x99\(%rip\),%xmm8        # 17ec <_start\+0x17ec>
+[ 	]*[a-f0-9]+:	c5 39 e0 3d 99 00 00 00 	vpavgb 0x99\(%rip\),%xmm8,%xmm15        # 17f4 <_start\+0x17f4>
+[ 	]*[a-f0-9]+:	c4 63 79 df 05 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8        # 17fe <_start\+0x17fe>
+[ 	]*[a-f0-9]+:	c4 63 79 14 05 99 00 00 00 07 	vpextrb \$0x7,%xmm8,0x99\(%rip\)        # 1808 <_start\+0x1808>
+[ 	]*[a-f0-9]+:	c5 3b 2a 3d 99 00 00 00 	vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15        # 1810 <_start\+0x1810>
+[ 	]*[a-f0-9]+:	c4 63 19 4a 35 99 00 00 00 80 	vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14        # 181a <_start\+0x181a>
+[ 	]*[a-f0-9]+:	c4 63 39 20 3d 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15        # 1824 <_start\+0x1824>
+[ 	]*[a-f0-9]+:	c5 7d 6f 05 99 00 00 00 	vmovdqa 0x99\(%rip\),%ymm8        # 182c <_start\+0x182c>
+[ 	]*[a-f0-9]+:	c5 7d 7f 05 99 00 00 00 	vmovdqa %ymm8,0x99\(%rip\)        # 1834 <_start\+0x1834>
+[ 	]*[a-f0-9]+:	c4 62 3d 0d 3d 99 00 00 00 	vpermilpd 0x99\(%rip\),%ymm8,%ymm15        # 183d <_start\+0x183d>
+[ 	]*[a-f0-9]+:	c4 63 7d 09 05 99 00 00 00 07 	vroundpd \$0x7,0x99\(%rip\),%ymm8        # 1847 <_start\+0x1847>
+[ 	]*[a-f0-9]+:	c4 63 7d 19 05 99 00 00 00 07 	vextractf128 \$0x7,%ymm8,0x99\(%rip\)        # 1851 <_start\+0x1851>
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3d 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15        # 185b <_start\+0x185b>
+[ 	]*[a-f0-9]+:	c4 63 1d 4b 35 99 00 00 00 80 	vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14        # 1865 <_start\+0x1865>
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 24 99 00 00 00 	vldmxcsr 0x99\(%rsp\)
 [ 	]*[a-f0-9]+:	c5 79 6f 84 24 99 00 00 00 	vmovdqa 0x99\(%rsp\),%xmm8
 [ 	]*[a-f0-9]+:	c5 79 7f 84 24 99 00 00 00 	vmovdqa %xmm8,0x99\(%rsp\)
@@ -1350,17 +1228,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 84 24 99 00 00 00 	vcvtdq2pd 0x99\(%rsp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 84 24 99 00 00 00 	vcvtpd2psy 0x99\(%rsp\),%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 bc 24 99 00 00 00 	vpavgb 0x99\(%rsp\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 84 24 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%rsp\),%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 84 24 99 00 00 00 64 	vpextrb \$0x64,%xmm8,0x99\(%rsp\)
+[ 	]*[a-f0-9]+:	c4 63 79 df 84 24 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%rsp\),%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 84 24 99 00 00 00 07 	vpextrb \$0x7,%xmm8,0x99\(%rsp\)
 [ 	]*[a-f0-9]+:	c5 3b 2a bc 24 99 00 00 00 	vcvtsi2sdl 0x99\(%rsp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a b4 24 99 00 00 00 80 	vblendvps %xmm8,0x99\(%rsp\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 bc 24 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%rsp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 bc 24 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%rsp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 84 24 99 00 00 00 	vmovdqa 0x99\(%rsp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 84 24 99 00 00 00 	vmovdqa %ymm8,0x99\(%rsp\)
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bc 24 99 00 00 00 	vpermilpd 0x99\(%rsp\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 84 24 99 00 00 00 64 	vroundpd \$0x64,0x99\(%rsp\),%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 84 24 99 00 00 00 64 	vextractf128 \$0x64,%ymm8,0x99\(%rsp\)
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 24 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%rsp\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 84 24 99 00 00 00 07 	vroundpd \$0x7,0x99\(%rsp\),%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 84 24 99 00 00 00 07 	vextractf128 \$0x7,%ymm8,0x99\(%rsp\)
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 24 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%rsp\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b4 24 99 00 00 00 80 	vblendvpd %ymm8,0x99\(%rsp\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 c1 78 ae 94 24 99 00 00 00 	vldmxcsr 0x99\(%r12\)
 [ 	]*[a-f0-9]+:	c4 41 79 6f 84 24 99 00 00 00 	vmovdqa 0x99\(%r12\),%xmm8
@@ -1370,17 +1248,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 41 7e e6 84 24 99 00 00 00 	vcvtdq2pd 0x99\(%r12\),%ymm8
 [ 	]*[a-f0-9]+:	c4 41 7d 5a 84 24 99 00 00 00 	vcvtpd2psy 0x99\(%r12\),%xmm8
 [ 	]*[a-f0-9]+:	c4 41 39 e0 bc 24 99 00 00 00 	vpavgb 0x99\(%r12\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 43 79 df 84 24 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%r12\),%xmm8
-[ 	]*[a-f0-9]+:	c4 43 79 14 84 24 99 00 00 00 64 	vpextrb \$0x64,%xmm8,0x99\(%r12\)
+[ 	]*[a-f0-9]+:	c4 43 79 df 84 24 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%r12\),%xmm8
+[ 	]*[a-f0-9]+:	c4 43 79 14 84 24 99 00 00 00 07 	vpextrb \$0x7,%xmm8,0x99\(%r12\)
 [ 	]*[a-f0-9]+:	c4 41 3b 2a bc 24 99 00 00 00 	vcvtsi2sdl 0x99\(%r12\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 43 19 4a b4 24 99 00 00 00 80 	vblendvps %xmm8,0x99\(%r12\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 43 39 20 bc 24 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%r12\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 43 39 20 bc 24 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%r12\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 41 7d 6f 84 24 99 00 00 00 	vmovdqa 0x99\(%r12\),%ymm8
 [ 	]*[a-f0-9]+:	c4 41 7d 7f 84 24 99 00 00 00 	vmovdqa %ymm8,0x99\(%r12\)
 [ 	]*[a-f0-9]+:	c4 42 3d 0d bc 24 99 00 00 00 	vpermilpd 0x99\(%r12\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 43 7d 09 84 24 99 00 00 00 64 	vroundpd \$0x64,0x99\(%r12\),%ymm8
-[ 	]*[a-f0-9]+:	c4 43 7d 19 84 24 99 00 00 00 64 	vextractf128 \$0x64,%ymm8,0x99\(%r12\)
-[ 	]*[a-f0-9]+:	c4 43 3d 06 bc 24 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%r12\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 43 7d 09 84 24 99 00 00 00 07 	vroundpd \$0x7,0x99\(%r12\),%ymm8
+[ 	]*[a-f0-9]+:	c4 43 7d 19 84 24 99 00 00 00 07 	vextractf128 \$0x7,%ymm8,0x99\(%r12\)
+[ 	]*[a-f0-9]+:	c4 43 3d 06 bc 24 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%r12\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 43 1d 4b b4 24 99 00 00 00 80 	vblendvpd %ymm8,0x99\(%r12\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 25 67 ff ff ff 	vldmxcsr 0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c5 79 6f 04 25 67 ff ff ff 	vmovdqa 0xffffffffffffff67,%xmm8
@@ -1390,17 +1268,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 25 67 ff ff ff 	vcvtdq2pd 0xffffffffffffff67,%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 25 67 ff ff ff 	vcvtpd2psy 0xffffffffffffff67,%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 25 67 ff ff ff 	vpavgb 0xffffffffffffff67,%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 67 ff ff ff 64 	vaeskeygenassist \$0x64,0xffffffffffffff67,%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,0xffffffffffffff67
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 67 ff ff ff 07 	vaeskeygenassist \$0x7,0xffffffffffffff67,%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 25 67 ff ff ff 	vcvtsi2sdl 0xffffffffffffff67,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 25 67 ff ff ff 80 	vblendvps %xmm8,0xffffffffffffff67,%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 67 ff ff ff 64 	vpinsrb \$0x64,0xffffffffffffff67,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 67 ff ff ff 07 	vpinsrb \$0x7,0xffffffffffffff67,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 25 67 ff ff ff 	vmovdqa 0xffffffffffffff67,%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 25 67 ff ff ff 	vmovdqa %ymm8,0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 25 67 ff ff ff 	vpermilpd 0xffffffffffffff67,%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 67 ff ff ff 64 	vroundpd \$0x64,0xffffffffffffff67,%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,0xffffffffffffff67
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 67 ff ff ff 64 	vperm2f128 \$0x64,0xffffffffffffff67,%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 67 ff ff ff 07 	vroundpd \$0x7,0xffffffffffffff67,%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,0xffffffffffffff67
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 67 ff ff ff 07 	vperm2f128 \$0x7,0xffffffffffffff67,%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 25 67 ff ff ff 80 	vblendvpd %ymm8,0xffffffffffffff67,%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 65 67 ff ff ff 	vldmxcsr -0x99\(,%riz,2\)
 [ 	]*[a-f0-9]+:	c5 79 6f 04 65 67 ff ff ff 	vmovdqa -0x99\(,%riz,2\),%xmm8
@@ -1410,17 +1288,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 65 67 ff ff ff 	vcvtdq2pd -0x99\(,%riz,2\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 65 67 ff ff ff 	vcvtpd2psy -0x99\(,%riz,2\),%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 65 67 ff ff ff 	vpavgb -0x99\(,%riz,2\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 65 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(,%riz,2\),%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 65 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(,%riz,2\)
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 65 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(,%riz,2\),%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 65 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(,%riz,2\)
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 65 67 ff ff ff 	vcvtsi2sdl -0x99\(,%riz,2\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 65 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(,%riz,2\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 65 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(,%riz,2\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 65 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(,%riz,2\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 65 67 ff ff ff 	vmovdqa -0x99\(,%riz,2\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 65 67 ff ff ff 	vmovdqa %ymm8,-0x99\(,%riz,2\)
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 65 67 ff ff ff 	vpermilpd -0x99\(,%riz,2\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 65 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(,%riz,2\),%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 65 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(,%riz,2\)
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 65 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(,%riz,2\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 65 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(,%riz,2\),%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 65 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(,%riz,2\)
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 65 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(,%riz,2\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 65 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(,%riz,2\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 23 67 ff ff ff 	vldmxcsr -0x99\(%rbx,%riz,1\)
 [ 	]*[a-f0-9]+:	c5 79 6f 84 23 67 ff ff ff 	vmovdqa -0x99\(%rbx,%riz,1\),%xmm8
@@ -1430,17 +1308,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 84 23 67 ff ff ff 	vcvtdq2pd -0x99\(%rbx,%riz,1\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 84 23 67 ff ff ff 	vcvtpd2psy -0x99\(%rbx,%riz,1\),%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 bc 23 67 ff ff ff 	vpavgb -0x99\(%rbx,%riz,1\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 84 23 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(%rbx,%riz,1\),%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 84 23 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(%rbx,%riz,1\)
+[ 	]*[a-f0-9]+:	c4 63 79 df 84 23 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(%rbx,%riz,1\),%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 84 23 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(%rbx,%riz,1\)
 [ 	]*[a-f0-9]+:	c5 3b 2a bc 23 67 ff ff ff 	vcvtsi2sdl -0x99\(%rbx,%riz,1\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a b4 23 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(%rbx,%riz,1\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 bc 23 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(%rbx,%riz,1\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 bc 23 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(%rbx,%riz,1\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 84 23 67 ff ff ff 	vmovdqa -0x99\(%rbx,%riz,1\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 84 23 67 ff ff ff 	vmovdqa %ymm8,-0x99\(%rbx,%riz,1\)
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bc 23 67 ff ff ff 	vpermilpd -0x99\(%rbx,%riz,1\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 84 23 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(%rbx,%riz,1\),%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 84 23 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(%rbx,%riz,1\)
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 23 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(%rbx,%riz,1\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 84 23 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(%rbx,%riz,1\),%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 84 23 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(%rbx,%riz,1\)
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 23 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(%rbx,%riz,1\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b4 23 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(%rbx,%riz,1\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 63 67 ff ff ff 	vldmxcsr -0x99\(%rbx,%riz,2\)
 [ 	]*[a-f0-9]+:	c5 79 6f 84 63 67 ff ff ff 	vmovdqa -0x99\(%rbx,%riz,2\),%xmm8
@@ -1450,17 +1328,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 84 63 67 ff ff ff 	vcvtdq2pd -0x99\(%rbx,%riz,2\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 84 63 67 ff ff ff 	vcvtpd2psy -0x99\(%rbx,%riz,2\),%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 bc 63 67 ff ff ff 	vpavgb -0x99\(%rbx,%riz,2\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 84 63 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(%rbx,%riz,2\),%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 84 63 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(%rbx,%riz,2\)
+[ 	]*[a-f0-9]+:	c4 63 79 df 84 63 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(%rbx,%riz,2\),%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 84 63 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(%rbx,%riz,2\)
 [ 	]*[a-f0-9]+:	c5 3b 2a bc 63 67 ff ff ff 	vcvtsi2sdl -0x99\(%rbx,%riz,2\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a b4 63 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(%rbx,%riz,2\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 bc 63 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(%rbx,%riz,2\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 bc 63 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(%rbx,%riz,2\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 84 63 67 ff ff ff 	vmovdqa -0x99\(%rbx,%riz,2\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 84 63 67 ff ff ff 	vmovdqa %ymm8,-0x99\(%rbx,%riz,2\)
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bc 63 67 ff ff ff 	vpermilpd -0x99\(%rbx,%riz,2\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 84 63 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(%rbx,%riz,2\),%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 84 63 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(%rbx,%riz,2\)
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 63 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(%rbx,%riz,2\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 84 63 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(%rbx,%riz,2\),%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 84 63 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(%rbx,%riz,2\)
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 63 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(%rbx,%riz,2\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b4 63 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(%rbx,%riz,2\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 81 78 ae 94 bc 67 ff ff ff 	vldmxcsr -0x99\(%r12,%r15,4\)
 [ 	]*[a-f0-9]+:	c4 01 79 6f 84 bc 67 ff ff ff 	vmovdqa -0x99\(%r12,%r15,4\),%xmm8
@@ -1470,17 +1348,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 01 7e e6 84 bc 67 ff ff ff 	vcvtdq2pd -0x99\(%r12,%r15,4\),%ymm8
 [ 	]*[a-f0-9]+:	c4 01 7d 5a 84 bc 67 ff ff ff 	vcvtpd2psy -0x99\(%r12,%r15,4\),%xmm8
 [ 	]*[a-f0-9]+:	c4 01 39 e0 bc bc 67 ff ff ff 	vpavgb -0x99\(%r12,%r15,4\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 03 79 df 84 bc 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(%r12,%r15,4\),%xmm8
-[ 	]*[a-f0-9]+:	c4 03 79 14 84 bc 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(%r12,%r15,4\)
+[ 	]*[a-f0-9]+:	c4 03 79 df 84 bc 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(%r12,%r15,4\),%xmm8
+[ 	]*[a-f0-9]+:	c4 03 79 14 84 bc 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(%r12,%r15,4\)
 [ 	]*[a-f0-9]+:	c4 01 3b 2a bc bc 67 ff ff ff 	vcvtsi2sdl -0x99\(%r12,%r15,4\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 03 19 4a b4 bc 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(%r12,%r15,4\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 03 39 20 bc bc 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(%r12,%r15,4\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 03 39 20 bc bc 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(%r12,%r15,4\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 01 7d 6f 84 bc 67 ff ff ff 	vmovdqa -0x99\(%r12,%r15,4\),%ymm8
 [ 	]*[a-f0-9]+:	c4 01 7d 7f 84 bc 67 ff ff ff 	vmovdqa %ymm8,-0x99\(%r12,%r15,4\)
 [ 	]*[a-f0-9]+:	c4 02 3d 0d bc bc 67 ff ff ff 	vpermilpd -0x99\(%r12,%r15,4\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 03 7d 09 84 bc 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(%r12,%r15,4\),%ymm8
-[ 	]*[a-f0-9]+:	c4 03 7d 19 84 bc 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(%r12,%r15,4\)
-[ 	]*[a-f0-9]+:	c4 03 3d 06 bc bc 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(%r12,%r15,4\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 03 7d 09 84 bc 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(%r12,%r15,4\),%ymm8
+[ 	]*[a-f0-9]+:	c4 03 7d 19 84 bc 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(%r12,%r15,4\)
+[ 	]*[a-f0-9]+:	c4 03 3d 06 bc bc 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(%r12,%r15,4\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 03 1d 4b b4 bc 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(%r12,%r15,4\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 81 78 ae 94 f8 67 ff ff ff 	vldmxcsr -0x99\(%r8,%r15,8\)
 [ 	]*[a-f0-9]+:	c4 01 79 6f 84 f8 67 ff ff ff 	vmovdqa -0x99\(%r8,%r15,8\),%xmm8
@@ -1490,17 +1368,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 01 7e e6 84 f8 67 ff ff ff 	vcvtdq2pd -0x99\(%r8,%r15,8\),%ymm8
 [ 	]*[a-f0-9]+:	c4 01 7d 5a 84 f8 67 ff ff ff 	vcvtpd2psy -0x99\(%r8,%r15,8\),%xmm8
 [ 	]*[a-f0-9]+:	c4 01 39 e0 bc f8 67 ff ff ff 	vpavgb -0x99\(%r8,%r15,8\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 03 79 df 84 f8 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(%r8,%r15,8\),%xmm8
-[ 	]*[a-f0-9]+:	c4 03 79 14 84 f8 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(%r8,%r15,8\)
+[ 	]*[a-f0-9]+:	c4 03 79 df 84 f8 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(%r8,%r15,8\),%xmm8
+[ 	]*[a-f0-9]+:	c4 03 79 14 84 f8 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(%r8,%r15,8\)
 [ 	]*[a-f0-9]+:	c4 01 3b 2a bc f8 67 ff ff ff 	vcvtsi2sdl -0x99\(%r8,%r15,8\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 03 19 4a b4 f8 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(%r8,%r15,8\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 03 39 20 bc f8 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(%r8,%r15,8\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 03 39 20 bc f8 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(%r8,%r15,8\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 01 7d 6f 84 f8 67 ff ff ff 	vmovdqa -0x99\(%r8,%r15,8\),%ymm8
 [ 	]*[a-f0-9]+:	c4 01 7d 7f 84 f8 67 ff ff ff 	vmovdqa %ymm8,-0x99\(%r8,%r15,8\)
 [ 	]*[a-f0-9]+:	c4 02 3d 0d bc f8 67 ff ff ff 	vpermilpd -0x99\(%r8,%r15,8\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 03 7d 09 84 f8 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(%r8,%r15,8\),%ymm8
-[ 	]*[a-f0-9]+:	c4 03 7d 19 84 f8 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(%r8,%r15,8\)
-[ 	]*[a-f0-9]+:	c4 03 3d 06 bc f8 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(%r8,%r15,8\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 03 7d 09 84 f8 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(%r8,%r15,8\),%ymm8
+[ 	]*[a-f0-9]+:	c4 03 7d 19 84 f8 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(%r8,%r15,8\)
+[ 	]*[a-f0-9]+:	c4 03 3d 06 bc f8 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(%r8,%r15,8\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 03 1d 4b b4 f8 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(%r8,%r15,8\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 a1 78 ae 94 ad 67 ff ff ff 	vldmxcsr -0x99\(%rbp,%r13,4\)
 [ 	]*[a-f0-9]+:	c4 21 79 6f 84 ad 67 ff ff ff 	vmovdqa -0x99\(%rbp,%r13,4\),%xmm8
@@ -1510,17 +1388,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 21 7e e6 84 ad 67 ff ff ff 	vcvtdq2pd -0x99\(%rbp,%r13,4\),%ymm8
 [ 	]*[a-f0-9]+:	c4 21 7d 5a 84 ad 67 ff ff ff 	vcvtpd2psy -0x99\(%rbp,%r13,4\),%xmm8
 [ 	]*[a-f0-9]+:	c4 21 39 e0 bc ad 67 ff ff ff 	vpavgb -0x99\(%rbp,%r13,4\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 23 79 df 84 ad 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(%rbp,%r13,4\),%xmm8
-[ 	]*[a-f0-9]+:	c4 23 79 14 84 ad 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(%rbp,%r13,4\)
+[ 	]*[a-f0-9]+:	c4 23 79 df 84 ad 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(%rbp,%r13,4\),%xmm8
+[ 	]*[a-f0-9]+:	c4 23 79 14 84 ad 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(%rbp,%r13,4\)
 [ 	]*[a-f0-9]+:	c4 21 3b 2a bc ad 67 ff ff ff 	vcvtsi2sdl -0x99\(%rbp,%r13,4\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 23 19 4a b4 ad 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(%rbp,%r13,4\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 23 39 20 bc ad 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(%rbp,%r13,4\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 23 39 20 bc ad 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(%rbp,%r13,4\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 21 7d 6f 84 ad 67 ff ff ff 	vmovdqa -0x99\(%rbp,%r13,4\),%ymm8
 [ 	]*[a-f0-9]+:	c4 21 7d 7f 84 ad 67 ff ff ff 	vmovdqa %ymm8,-0x99\(%rbp,%r13,4\)
 [ 	]*[a-f0-9]+:	c4 22 3d 0d bc ad 67 ff ff ff 	vpermilpd -0x99\(%rbp,%r13,4\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 23 7d 09 84 ad 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(%rbp,%r13,4\),%ymm8
-[ 	]*[a-f0-9]+:	c4 23 7d 19 84 ad 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(%rbp,%r13,4\)
-[ 	]*[a-f0-9]+:	c4 23 3d 06 bc ad 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(%rbp,%r13,4\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 23 7d 09 84 ad 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(%rbp,%r13,4\),%ymm8
+[ 	]*[a-f0-9]+:	c4 23 7d 19 84 ad 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(%rbp,%r13,4\)
+[ 	]*[a-f0-9]+:	c4 23 3d 06 bc ad 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(%rbp,%r13,4\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 23 1d 4b b4 ad 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(%rbp,%r13,4\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 a1 78 ae 94 24 67 ff ff ff 	vldmxcsr -0x99\(%rsp,%r12,1\)
 [ 	]*[a-f0-9]+:	c4 21 79 6f 84 24 67 ff ff ff 	vmovdqa -0x99\(%rsp,%r12,1\),%xmm8
@@ -1530,42 +1408,42 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 21 7e e6 84 24 67 ff ff ff 	vcvtdq2pd -0x99\(%rsp,%r12,1\),%ymm8
 [ 	]*[a-f0-9]+:	c4 21 7d 5a 84 24 67 ff ff ff 	vcvtpd2psy -0x99\(%rsp,%r12,1\),%xmm8
 [ 	]*[a-f0-9]+:	c4 21 39 e0 bc 24 67 ff ff ff 	vpavgb -0x99\(%rsp,%r12,1\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 23 79 df 84 24 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(%rsp,%r12,1\),%xmm8
-[ 	]*[a-f0-9]+:	c4 23 79 14 84 24 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(%rsp,%r12,1\)
+[ 	]*[a-f0-9]+:	c4 23 79 df 84 24 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(%rsp,%r12,1\),%xmm8
+[ 	]*[a-f0-9]+:	c4 23 79 14 84 24 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(%rsp,%r12,1\)
 [ 	]*[a-f0-9]+:	c4 21 3b 2a bc 24 67 ff ff ff 	vcvtsi2sdl -0x99\(%rsp,%r12,1\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 23 19 4a b4 24 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(%rsp,%r12,1\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 23 39 20 bc 24 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(%rsp,%r12,1\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 23 39 20 bc 24 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(%rsp,%r12,1\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 21 7d 6f 84 24 67 ff ff ff 	vmovdqa -0x99\(%rsp,%r12,1\),%ymm8
 [ 	]*[a-f0-9]+:	c4 21 7d 7f 84 24 67 ff ff ff 	vmovdqa %ymm8,-0x99\(%rsp,%r12,1\)
 [ 	]*[a-f0-9]+:	c4 22 3d 0d bc 24 67 ff ff ff 	vpermilpd -0x99\(%rsp,%r12,1\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 23 7d 09 84 24 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(%rsp,%r12,1\),%ymm8
-[ 	]*[a-f0-9]+:	c4 23 7d 19 84 24 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(%rsp,%r12,1\)
-[ 	]*[a-f0-9]+:	c4 23 3d 06 bc 24 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(%rsp,%r12,1\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 23 7d 09 84 24 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(%rsp,%r12,1\),%ymm8
+[ 	]*[a-f0-9]+:	c4 23 7d 19 84 24 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(%rsp,%r12,1\)
+[ 	]*[a-f0-9]+:	c4 23 3d 06 bc 24 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(%rsp,%r12,1\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 23 1d 4b b4 24 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(%rsp,%r12,1\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 41 79 50 c0       	vmovmskpd %xmm8,%r8d
-[ 	]*[a-f0-9]+:	c4 c1 01 72 f0 64    	vpslld \$0x64,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 c1 01 72 f0 07    	vpslld \$0x7,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 41 7c 50 c0       	vmovmskps %ymm8,%r8d
 [ 	]*[a-f0-9]+:	c4 41 79 6f f8       	vmovdqa %xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 41 79 7e c0       	vmovd  %xmm8,%r8d
 [ 	]*[a-f0-9]+:	c4 41 7b 2d c0       	vcvtsd2si %xmm8,%r8d
 [ 	]*[a-f0-9]+:	c4 41 7e e6 c0       	vcvtdq2pd %xmm8,%ymm8
 [ 	]*[a-f0-9]+:	c4 41 7d 5a c0       	vcvtpd2ps %ymm8,%xmm8
-[ 	]*[a-f0-9]+:	c4 43 79 df f8 64    	vaeskeygenassist \$0x64,%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 43 79 14 c0 64    	vpextrb \$0x64,%xmm8,%r8d
+[ 	]*[a-f0-9]+:	c4 43 79 df f8 07    	vaeskeygenassist \$0x7,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 43 79 14 c0 07    	vpextrb \$0x7,%xmm8,%r8d
 [ 	]*[a-f0-9]+:	c4 41 3b 2a f8       	vcvtsi2sd %r8d,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 43 19 4a f0 80    	vblendvps %xmm8,%xmm8,%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 43 39 20 f8 64    	vpinsrb \$0x64,%r8d,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 43 39 20 f8 07    	vpinsrb \$0x7,%r8d,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 41 7d 6f f8       	vmovdqa %ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 42 05 0d e0       	vpermilpd %ymm8,%ymm15,%ymm12
-[ 	]*[a-f0-9]+:	c4 43 7d 09 f8 64    	vroundpd \$0x64,%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 43 7d 19 c0 64    	vextractf128 \$0x64,%ymm8,%xmm8
-[ 	]*[a-f0-9]+:	c4 43 05 06 e0 64    	vperm2f128 \$0x64,%ymm8,%ymm15,%ymm12
+[ 	]*[a-f0-9]+:	c4 43 7d 09 f8 07    	vroundpd \$0x7,%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 43 7d 19 c0 07    	vextractf128 \$0x7,%ymm8,%xmm8
+[ 	]*[a-f0-9]+:	c4 43 05 06 e0 07    	vperm2f128 \$0x7,%ymm8,%ymm15,%ymm12
 [ 	]*[a-f0-9]+:	c4 43 1d 4b f7 80    	vblendvpd %ymm8,%ymm15,%ymm12,%ymm14
-[ 	]*[a-f0-9]+:	c4 43 3d 18 f8 64    	vinsertf128 \$0x64,%xmm8,%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 43 3d 18 f8 07    	vinsertf128 \$0x7,%xmm8,%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 61 fb 2d 01       	vcvtsd2si \(%rcx\),%r8
 [ 	]*[a-f0-9]+:	c4 43 79 17 c0 0a    	vextractps \$0xa,%xmm8,%r8d
 [ 	]*[a-f0-9]+:	c4 61 fa 2d 01       	vcvtss2si \(%rcx\),%r8
-[ 	]*[a-f0-9]+:	c4 41 01 c4 c0 64    	vpinsrw \$0x64,%r8d,%xmm15,%xmm8
+[ 	]*[a-f0-9]+:	c4 41 01 c4 c0 07    	vpinsrw \$0x7,%r8d,%xmm15,%xmm8
 [ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr \(%rcx\)
 [ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr \(%rcx\)
 [ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr \(%rcx\)
@@ -1578,18 +1456,18 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e2 4d 2e 21       	vmaskmovps %ymm4,%ymm6,\(%rcx\)
 [ 	]*[a-f0-9]+:	c4 e2 5d 2c 31       	vmaskmovps \(%rcx\),%ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 4d 2e 21       	vmaskmovps %ymm4,%ymm6,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 64    	vpermilpd \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 64    	vpermilpd \$0x64,\(%rcx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 64    	vpermilpd \$0x64,\(%rcx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 64    	vpermilps \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 64    	vpermilps \$0x64,\(%rcx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 64    	vpermilps \$0x64,\(%rcx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 64    	vroundpd \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 64    	vroundpd \$0x64,\(%rcx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 64    	vroundpd \$0x64,\(%rcx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 64    	vroundps \$0x64,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 64    	vroundps \$0x64,\(%rcx\),%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 64    	vroundps \$0x64,\(%rcx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 d6 07    	vpermilpd \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 07    	vpermilpd \$0x7,\(%rcx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 05 31 07    	vpermilpd \$0x7,\(%rcx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 d6 07    	vpermilps \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 07    	vpermilps \$0x7,\(%rcx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 04 31 07    	vpermilps \$0x7,\(%rcx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 d6 07    	vroundpd \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 07    	vroundpd \$0x7,\(%rcx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 09 31 07    	vroundpd \$0x7,\(%rcx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 d6 07    	vroundps \$0x7,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 07    	vroundps \$0x7,\(%rcx\),%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 08 31 07    	vroundps \$0x7,\(%rcx\),%ymm6
 [ 	]*[a-f0-9]+:	c5 cd 58 d4          	vaddpd %ymm4,%ymm6,%ymm2
 [ 	]*[a-f0-9]+:	c5 cd 58 11          	vaddpd \(%rcx\),%ymm6,%ymm2
 [ 	]*[a-f0-9]+:	c5 cd 58 11          	vaddpd \(%rcx\),%ymm6,%ymm2
@@ -1884,161 +1762,101 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 fd 5a 21          	vcvtpd2psy \(%rcx\),%xmm4
 [ 	]*[a-f0-9]+:	c5 fd e6 e4          	vcvttpd2dq %ymm4,%xmm4
 [ 	]*[a-f0-9]+:	c5 fd e6 21          	vcvttpd2dqy \(%rcx\),%xmm4
-[ 	]*[a-f0-9]+:	c5 fc 5b e4          	vcvtdq2ps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 5b f4          	vcvtdq2ps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 5b 21          	vcvtdq2ps \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fc 5b 21          	vcvtdq2ps \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 5b e4          	vcvtps2dq %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 5b f4          	vcvtps2dq %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 5b 21          	vcvtps2dq \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fd 5b 21          	vcvtps2dq \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 5b e4          	vcvttps2dq %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 5b f4          	vcvttps2dq %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 5b 21          	vcvttps2dq \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fe 5b 21          	vcvttps2dq \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 28 e4          	vmovapd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 28 f4          	vmovapd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 28 21          	vmovapd \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fd 28 21          	vmovapd \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 28 e4          	vmovaps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 28 f4          	vmovaps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 28 21          	vmovaps \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fc 28 21          	vmovaps \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 6f e4          	vmovdqa %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 6f f4          	vmovdqa %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 6f 21          	vmovdqa \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fd 6f 21          	vmovdqa \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 6f e4          	vmovdqu %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 6f f4          	vmovdqu %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 6f 21          	vmovdqu \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fe 6f 21          	vmovdqu \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 ff 12 e4          	vmovddup %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 ff 12 f4          	vmovddup %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 ff 12 21          	vmovddup \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 ff 12 21          	vmovddup \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 16 e4          	vmovshdup %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 16 f4          	vmovshdup %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 16 21          	vmovshdup \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fe 16 21          	vmovshdup \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fe 12 e4          	vmovsldup %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fe 12 f4          	vmovsldup %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fe 12 21          	vmovsldup \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fe 12 21          	vmovsldup \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 10 e4          	vmovupd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 10 f4          	vmovupd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 10 21          	vmovupd \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fd 10 21          	vmovupd \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 10 e4          	vmovups %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 10 f4          	vmovups %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 10 21          	vmovups \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fc 10 21          	vmovups \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e2 7d 17 e4       	vptest %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 17 f4       	vptest %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 7d 17 21       	vptest \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 17 21       	vptest \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 53 e4          	vrcpps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 53 f4          	vrcpps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 53 21          	vrcpps \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fc 53 21          	vrcpps \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 52 e4          	vrsqrtps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 52 f4          	vrsqrtps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 52 21          	vrsqrtps \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fc 52 21          	vrsqrtps \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fd 51 e4          	vsqrtpd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fd 51 f4          	vsqrtpd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fd 51 21          	vsqrtpd \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fd 51 21          	vsqrtpd \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c5 fc 51 e4          	vsqrtps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c5 fc 51 f4          	vsqrtps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c5 fc 51 21          	vsqrtps \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 fc 51 21          	vsqrtps \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e2 7d 0f e4       	vtestpd %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0f f4       	vtestpd %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 7d 0f 21       	vtestpd \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 0f 21       	vtestpd \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e2 7d 0e e4       	vtestps %ymm4,%ymm4
+[ 	]*[a-f0-9]+:	c4 e2 7d 0e f4       	vtestps %ymm4,%ymm6
 [ 	]*[a-f0-9]+:	c4 e2 7d 0e 21       	vtestps \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 0e 21       	vtestps \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 ff f0 21          	vlddqu \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 ff f0 21          	vlddqu \(%rcx\),%ymm4
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 64    	vblendpd \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 64    	vblendpd \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 64    	vblendpd \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 64    	vblendps \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 64    	vblendps \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 64    	vblendps \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c2 d4 64       	vcmppd \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c2 11 64       	vcmppd \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c2 11 64       	vcmppd \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c2 d4 64       	vcmpps \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c2 11 64       	vcmpps \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c2 11 64       	vcmpps \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 64    	vdpps  \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 64    	vdpps  \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 64    	vdpps  \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 64    	vperm2f128 \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 64    	vperm2f128 \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 64    	vperm2f128 \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c6 d4 64       	vshufpd \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c6 11 64       	vshufpd \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cd c6 11 64       	vshufpd \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c6 d4 64       	vshufps \$0x64,%ymm4,%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c6 11 64       	vshufps \$0x64,\(%rcx\),%ymm6,%ymm2
-[ 	]*[a-f0-9]+:	c5 cc c6 11 64       	vshufps \$0x64,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d d4 07    	vblendpd \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 07    	vblendpd \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0d 11 07    	vblendpd \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c d4 07    	vblendps \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 07    	vblendps \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0c 11 07    	vblendps \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c2 d4 07       	vcmpordpd %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c2 11 07       	vcmpordpd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c2 11 07       	vcmpordpd \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c2 d4 07       	vcmpordps %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c2 11 07       	vcmpordps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c2 11 07       	vcmpordps \(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 d4 07    	vdpps  \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 07    	vdpps  \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 40 11 07    	vdpps  \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 d4 07    	vperm2f128 \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 07    	vperm2f128 \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 06 11 07    	vperm2f128 \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c6 d4 07       	vshufpd \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c6 11 07       	vshufpd \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cd c6 11 07       	vshufpd \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c6 d4 07       	vshufps \$0x7,%ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c6 11 07       	vshufps \$0x7,\(%rcx\),%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c5 cc c6 11 07       	vshufps \$0x7,\(%rcx\),%ymm6,%ymm2
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b fe 40    	vblendvpd %ymm4,%ymm6,%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b 39 40    	vblendvpd %ymm4,\(%rcx\),%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4b 39 40    	vblendvpd %ymm4,\(%rcx\),%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a fe 40    	vblendvps %ymm4,%ymm6,%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a 39 40    	vblendvps %ymm4,\(%rcx\),%ymm2,%ymm7
 [ 	]*[a-f0-9]+:	c4 e3 6d 4a 39 40    	vblendvps %ymm4,\(%rcx\),%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 fc 20    	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d fc 20    	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c fc 20    	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f fc 20    	vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e fc 20    	vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d fc 20    	vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c fc 20    	vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 fc 20    	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 fc 20    	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d fc 20    	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c fc 20    	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 62    	vpermilmo2pd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 62    	vpermilmo2pd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 62    	vpermilmo2pd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 63    	vpermilmz2pd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 63    	vpermilmz2pd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 63    	vpermilmz2pd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 60    	vpermiltd2pd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 60    	vpermiltd2pd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 60    	vpermiltd2pd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 62    	vpermilmo2ps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 62    	vpermilmo2ps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 62    	vpermilmo2ps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 63    	vpermilmz2ps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 63    	vpermilmz2ps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 63    	vpermilmz2ps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 60    	vpermiltd2ps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 60    	vpermiltd2ps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 60    	vpermiltd2ps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 fc 6a    	vpermil2pd \$0xa,%ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 6a    	vpermil2pd \$0xa,\(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 49 39 6a    	vpermil2pd \$0xa,\(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 fc 6a    	vpermil2ps \$0xa,%ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 6a    	vpermil2ps \$0xa,\(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 ed 48 39 6a    	vpermil2ps \$0xa,\(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 64    	vinsertf128 \$0x64,%xmm4,%ymm4,%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 64    	vinsertf128 \$0x64,\(%rcx\),%ymm4,%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 64    	vinsertf128 \$0x64,\(%rcx\),%ymm4,%ymm6
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 64    	vextractf128 \$0x64,%ymm4,%xmm4
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 64    	vextractf128 \$0x64,%ymm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 64    	vextractf128 \$0x64,%ymm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 f4 07    	vinsertf128 \$0x7,%xmm4,%ymm4,%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 07    	vinsertf128 \$0x7,\(%rcx\),%ymm4,%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 5d 18 31 07    	vinsertf128 \$0x7,\(%rcx\),%ymm4,%ymm6
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 e4 07    	vextractf128 \$0x7,%ymm4,%xmm4
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 07    	vextractf128 \$0x7,%ymm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 7d 19 21 07    	vextractf128 \$0x7,%ymm4,\(%rcx\)
 [ 	]*[a-f0-9]+:	c4 e2 7d 1a 21       	vbroadcastf128 \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 1a 21       	vbroadcastf128 \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 f8 5b f4          	vcvtdq2ps %xmm4,%xmm6
@@ -2700,79 +2518,79 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e2 59 2c 31       	vmaskmovps \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 59 2d 31       	vmaskmovpd \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 59 2d 31       	vmaskmovpd \(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 df f4 64    	vaeskeygenassist \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 df 31 64    	vaeskeygenassist \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 df 31 64    	vaeskeygenassist \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 64    	vpcmpestri \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 61 31 64    	vpcmpestri \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 61 31 64    	vpcmpestri \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 64    	vpcmpestrm \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 60 31 64    	vpcmpestrm \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 60 31 64    	vpcmpestrm \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 64    	vpcmpistri \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 63 31 64    	vpcmpistri \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 63 31 64    	vpcmpistri \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 64    	vpcmpistrm \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 62 31 64    	vpcmpistrm \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 62 31 64    	vpcmpistrm \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 64    	vpermilpd \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 05 31 64    	vpermilpd \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 05 31 64    	vpermilpd \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 64    	vpermilps \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 04 31 64    	vpermilps \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 04 31 64    	vpermilps \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 70 f4 64       	vpshufd \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 70 31 64       	vpshufd \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 70 31 64       	vpshufd \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 fa 70 f4 64       	vpshufhw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 fa 70 31 64       	vpshufhw \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 fa 70 31 64       	vpshufhw \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 fb 70 f4 64       	vpshuflw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 fb 70 31 64       	vpshuflw \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c5 fb 70 31 64       	vpshuflw \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 64    	vroundpd \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 09 31 64    	vroundpd \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 09 31 64    	vroundpd \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 64    	vroundps \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 08 31 64    	vroundps \$0x64,\(%rcx\),%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 08 31 64    	vroundps \$0x64,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 df f4 07    	vaeskeygenassist \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 df 31 07    	vaeskeygenassist \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 df 31 07    	vaeskeygenassist \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 61 f4 07    	vpcmpestri \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 61 31 07    	vpcmpestri \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 61 31 07    	vpcmpestri \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 60 f4 07    	vpcmpestrm \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 60 31 07    	vpcmpestrm \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 60 31 07    	vpcmpestrm \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 63 f4 07    	vpcmpistri \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 63 31 07    	vpcmpistri \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 63 31 07    	vpcmpistri \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 62 f4 07    	vpcmpistrm \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 62 31 07    	vpcmpistrm \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 62 31 07    	vpcmpistrm \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 05 f4 07    	vpermilpd \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 05 31 07    	vpermilpd \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 05 31 07    	vpermilpd \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 04 f4 07    	vpermilps \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 04 31 07    	vpermilps \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 04 31 07    	vpermilps \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 70 f4 07       	vpshufd \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 70 31 07       	vpshufd \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 70 31 07       	vpshufd \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 fa 70 f4 07       	vpshufhw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fa 70 31 07       	vpshufhw \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 fa 70 31 07       	vpshufhw \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 fb 70 f4 07       	vpshuflw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fb 70 31 07       	vpshuflw \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c5 fb 70 31 07       	vpshuflw \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 09 f4 07    	vroundpd \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 09 31 07    	vroundpd \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 09 31 07    	vroundpd \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 08 f4 07    	vroundps \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 08 31 07    	vroundps \$0x7,\(%rcx\),%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 08 31 07    	vroundps \$0x7,\(%rcx\),%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 49 2e 21       	vmaskmovps %xmm4,%xmm6,\(%rcx\)
 [ 	]*[a-f0-9]+:	c4 e2 49 2e 21       	vmaskmovps %xmm4,%xmm6,\(%rcx\)
 [ 	]*[a-f0-9]+:	c4 e2 49 2f 21       	vmaskmovpd %xmm4,%xmm6,\(%rcx\)
 [ 	]*[a-f0-9]+:	c4 e2 49 2f 21       	vmaskmovpd %xmm4,%xmm6,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 64    	vblendpd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 64    	vblendpd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 64    	vblendpd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 64    	vblendps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 64    	vblendps \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 64    	vblendps \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c2 d4 64       	vcmppd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c2 11 64       	vcmppd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c2 11 64       	vcmppd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c2 d4 64       	vcmpps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c2 11 64       	vcmpps \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c2 11 64       	vcmpps \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 64    	vdppd  \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 41 11 64    	vdppd  \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 41 11 64    	vdppd  \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 64    	vdpps  \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 40 11 64    	vdpps  \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 40 11 64    	vdpps  \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 64    	vmpsadbw \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 42 11 64    	vmpsadbw \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 42 11 64    	vmpsadbw \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 64    	vpalignr \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 64    	vpalignr \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 64    	vpalignr \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 64    	vpblendw \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 64    	vpblendw \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 64    	vpblendw \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c6 d4 64       	vshufpd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c6 11 64       	vshufpd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 c6 11 64       	vshufpd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c6 d4 64       	vshufps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c6 11 64       	vshufps \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c8 c6 11 64       	vshufps \$0x64,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0d d4 07    	vblendpd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 07    	vblendpd \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0d 11 07    	vblendpd \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0c d4 07    	vblendps \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 07    	vblendps \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0c 11 07    	vblendps \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c2 d4 07       	vcmpordpd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c2 11 07       	vcmpordpd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c2 11 07       	vcmpordpd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c2 d4 07       	vcmpordps %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c2 11 07       	vcmpordps \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c2 11 07       	vcmpordps \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 41 d4 07    	vdppd  \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 41 11 07    	vdppd  \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 41 11 07    	vdppd  \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 40 d4 07    	vdpps  \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 40 11 07    	vdpps  \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 40 11 07    	vdpps  \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 42 d4 07    	vmpsadbw \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 42 11 07    	vmpsadbw \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 42 11 07    	vmpsadbw \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0f d4 07    	vpalignr \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 07    	vpalignr \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0f 11 07    	vpalignr \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0e d4 07    	vpblendw \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 07    	vpblendw \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0e 11 07    	vpblendw \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c6 d4 07       	vshufpd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c6 11 07       	vshufpd \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c9 c6 11 07       	vshufpd \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c6 d4 07       	vshufps \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c6 11 07       	vshufps \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 c8 c6 11 07       	vshufps \$0x7,\(%rcx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c4 e3 69 4b fe 40    	vblendvpd %xmm4,%xmm6,%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4b 39 40    	vblendvpd %xmm4,\(%rcx\),%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4b 39 40    	vblendvpd %xmm4,\(%rcx\),%xmm2,%xmm7
@@ -2782,106 +2600,6 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e3 69 4c fe 40    	vpblendvb %xmm4,%xmm6,%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4c 39 40    	vpblendvb %xmm4,\(%rcx\),%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e3 69 4c 39 40    	vpblendvb %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 fc 20    	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 fc 20    	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d fc 20    	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c fc 20    	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f fc 20    	vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e fc 20    	vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d fc 20    	vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c fc 20    	vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 fc 20    	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 fc 20    	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d fc 20    	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c fc 20    	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 62    	vpermilmo2pd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 62    	vpermilmo2pd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 42    	vpermilmo2pd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 62    	vpermilmo2pd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 42    	vpermilmo2pd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 63    	vpermilmz2pd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 63    	vpermilmz2pd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 43    	vpermilmz2pd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 63    	vpermilmz2pd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 43    	vpermilmz2pd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 60    	vpermiltd2pd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 60    	vpermiltd2pd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 40    	vpermiltd2pd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 60    	vpermiltd2pd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 40    	vpermiltd2pd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 62    	vpermilmo2ps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 62    	vpermilmo2ps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 42    	vpermilmo2ps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 62    	vpermilmo2ps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 42    	vpermilmo2ps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 63    	vpermilmz2ps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 63    	vpermilmz2ps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 43    	vpermilmz2ps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 63    	vpermilmz2ps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 43    	vpermilmz2ps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 60    	vpermiltd2ps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 60    	vpermiltd2ps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 40    	vpermiltd2ps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 60    	vpermiltd2ps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 40    	vpermiltd2ps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 fc 6a    	vpermil2pd \$0xa,%xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 6a    	vpermil2pd \$0xa,\(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 4a    	vpermil2pd \$0xa,%xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 49 39 6a    	vpermil2pd \$0xa,\(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 49 39 4a    	vpermil2pd \$0xa,%xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 fc 6a    	vpermil2ps \$0xa,%xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 6a    	vpermil2ps \$0xa,\(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 4a    	vpermil2ps \$0xa,%xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 e9 48 39 6a    	vpermil2ps \$0xa,\(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 69 48 39 4a    	vpermil2ps \$0xa,%xmm4,\(%rcx\),%xmm2,%xmm7
 [ 	]*[a-f0-9]+:	c4 e2 7d 19 21       	vbroadcastsd \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c4 e2 7d 19 21       	vbroadcastsd \(%rcx\),%ymm4
 [ 	]*[a-f0-9]+:	c5 f9 2f f4          	vcomisd %xmm4,%xmm6
@@ -2957,12 +2675,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 e1 da 2a f1       	vcvtsi2ss %rcx,%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e1 da 2a 31       	vcvtsi2ssq \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e1 da 2a 31       	vcvtsi2ssq \(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 d9 22 f1 64    	vpinsrq \$0x64,%rcx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 d9 22 31 64    	vpinsrq \$0x64,\(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 d9 22 31 64    	vpinsrq \$0x64,\(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 f9 16 e1 64    	vpextrq \$0x64,%xmm4,%rcx
-[ 	]*[a-f0-9]+:	c4 e3 f9 16 21 64    	vpextrq \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 f9 16 21 64    	vpextrq \$0x64,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 d9 22 f1 07    	vpinsrq \$0x7,%rcx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 d9 22 31 07    	vpinsrq \$0x7,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 d9 22 31 07    	vpinsrq \$0x7,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 f9 16 e1 07    	vpextrq \$0x7,%xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e3 f9 16 21 07    	vpextrq \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 f9 16 21 07    	vpextrq \$0x7,%xmm4,\(%rcx\)
 [ 	]*[a-f0-9]+:	c5 d9 12 31          	vmovlpd \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 d9 12 31          	vmovlpd \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 d8 12 31          	vmovlps \(%rcx\),%xmm4,%xmm6
@@ -2971,32 +2689,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 d9 16 31          	vmovhpd \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 d8 16 31          	vmovhps \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 d8 16 31          	vmovhps \(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 cb c2 d4 64       	vcmpsd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 cb c2 11 64       	vcmpsd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 cb c2 11 64       	vcmpsd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 64    	vroundsd \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 64    	vroundsd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 64    	vroundsd \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b fc 20    	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f fc 20    	vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b fc 20    	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f fc 20    	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c5 cb c2 d4 07       	vcmpordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cb c2 11 07       	vcmpordsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cb c2 11 07       	vcmpordsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0b d4 07    	vroundsd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 07    	vroundsd \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0b 11 07    	vroundsd \$0x7,\(%rcx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 58 d4          	vaddsd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 58 11          	vaddsd \(%rcx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 58 11          	vaddsd \(%rcx\),%xmm6,%xmm2
@@ -3117,6 +2815,10 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 cb c2 d4 1f       	vcmptrue_ussd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1f       	vcmptrue_ussd \(%rcx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb c2 11 1f       	vcmptrue_ussd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr \(%rcx\)
+[ 	]*[a-f0-9]+:	c5 f8 ae 11          	vldmxcsr \(%rcx\)
+[ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr \(%rcx\)
+[ 	]*[a-f0-9]+:	c5 f8 ae 19          	vstmxcsr \(%rcx\)
 [ 	]*[a-f0-9]+:	c5 ca 58 d4          	vaddss %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 ca 58 11          	vaddss \(%rcx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 ca 58 11          	vaddss \(%rcx\),%xmm6,%xmm2
@@ -3290,79 +2992,59 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 f9 50 cc          	vmovmskpd %xmm4,%ecx
 [ 	]*[a-f0-9]+:	c5 f8 50 cc          	vmovmskps %xmm4,%ecx
 [ 	]*[a-f0-9]+:	c5 f9 d7 cc          	vpmovmskb %xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 64    	vextractps \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 64    	vpextrd \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 16 21 64    	vpextrd \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 16 21 64    	vpextrd \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 64    	vextractps \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 17 21 64    	vextractps \$0x64,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 07    	vextractps \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 16 e1 07    	vpextrd \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 16 21 07    	vpextrd \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 16 21 07    	vpextrd \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 17 e1 07    	vextractps \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 17 21 07    	vextractps \$0x7,%xmm4,\(%rcx\)
 [ 	]*[a-f0-9]+:	c5 db 2a f1          	vcvtsi2sd %ecx,%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 db 2a 31          	vcvtsi2sdl \(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 da 2a f1          	vcvtsi2ss %ecx,%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 da 2a 31          	vcvtsi2ssl \(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 ca c2 d4 64       	vcmpss \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 ca c2 11 64       	vcmpss \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 ca c2 11 64       	vcmpss \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 64    	vinsertps \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 21 11 64    	vinsertps \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 21 11 64    	vinsertps \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 64    	vroundss \$0x64,%xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 64    	vroundss \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 64    	vroundss \$0x64,\(%rcx\),%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a fc 20    	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e fc 20    	vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a fc 20    	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e fc 20    	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c5 ca c2 d4 07       	vcmpordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ca c2 11 07       	vcmpordss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ca c2 11 07       	vcmpordss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 21 d4 07    	vinsertps \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 21 11 07    	vinsertps \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 21 11 07    	vinsertps \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0a d4 07    	vroundss \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 07    	vroundss \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 49 0a 11 07    	vroundss \$0x7,\(%rcx\),%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c4 e2 79 22 f4       	vpmovsxbq %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 79 22 21       	vpmovsxbq \(%rcx\),%xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 22 21       	vpmovsxbq \(%rcx\),%xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 32 f4       	vpmovzxbq %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c4 e2 79 32 21       	vpmovzxbq \(%rcx\),%xmm4
 [ 	]*[a-f0-9]+:	c4 e2 79 32 21       	vpmovzxbq \(%rcx\),%xmm4
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 15 21 64    	vpextrw \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c5 d9 c4 f1 64       	vpinsrw \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw \$0x64,\(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw \$0x64,\(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 d9 c4 f1 64       	vpinsrw \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw \$0x64,\(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 d9 c4 31 64       	vpinsrw \$0x64,\(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 64    	vpextrb \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb \$0x64,\(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb \$0x64,\(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 64    	vpextrb \$0x64,%xmm4,%ecx
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 79 14 21 64    	vpextrb \$0x64,%xmm4,\(%rcx\)
-[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 64    	vpinsrb \$0x64,%ecx,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb \$0x64,\(%rcx\),%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c4 e3 59 20 31 64    	vpinsrb \$0x64,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 15 21 07    	vpextrw \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 d9 c4 f1 07       	vpinsrw \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw \$0x7,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw \$0x7,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 d9 c4 f1 07       	vpinsrw \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw \$0x7,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 d9 c4 31 07       	vpinsrw \$0x7,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 07    	vpextrb \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 14 e1 07    	vpextrb \$0x7,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 79 14 21 07    	vpextrb \$0x7,%xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e3 59 20 f1 07    	vpinsrb \$0x7,%ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e3 59 20 31 07    	vpinsrb \$0x7,\(%rcx\),%xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 f9 f7 f4          	vmaskmovdqu %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 fa 7e f4          	vmovq  %xmm4,%xmm6
 [ 	]*[a-f0-9]+:	c5 f9 50 cc          	vmovmskpd %xmm4,%ecx
@@ -3372,17 +3054,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 c8 16 d4          	vmovlhps %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 cb 10 d4          	vmovsd %xmm4,%xmm6,%xmm2
 [ 	]*[a-f0-9]+:	c5 ca 10 d4          	vmovss %xmm4,%xmm6,%xmm2
-[ 	]*[a-f0-9]+:	c5 c9 72 f4 64       	vpslld \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 fc 64       	vpslldq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 f4 64       	vpsllq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 71 f4 64       	vpsllw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 72 e4 64       	vpsrad \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 71 e4 64       	vpsraw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 72 d4 64       	vpsrld \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 dc 64       	vpsrldq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 73 d4 64       	vpsrlq \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 c9 71 d4 64       	vpsrlw \$0x64,%xmm4,%xmm6
-[ 	]*[a-f0-9]+:	c5 f9 c5 cc 64       	vpextrw \$0x64,%xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 c9 72 f4 07       	vpslld \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 fc 07       	vpslldq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 f4 07       	vpsllq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 71 f4 07       	vpsllw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 72 e4 07       	vpsrad \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 71 e4 07       	vpsraw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 72 d4 07       	vpsrld \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 dc 07       	vpsrldq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 73 d4 07       	vpsrlq \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 c9 71 d4 07       	vpsrlw \$0x7,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 f9 c5 cc 07       	vpextrw \$0x7,%xmm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fd 50 cc          	vmovmskpd %ymm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fc 50 cc          	vmovmskps %ymm4,%ecx
 [ 	]*[a-f0-9]+:	c5 fd 50 cc          	vmovmskpd %ymm4,%ecx
@@ -3401,17 +3083,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 25 78 56 34 12 	vcvtdq2pd 0x12345678,%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 25 78 56 34 12 	vcvtpd2psy 0x12345678,%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 25 78 56 34 12 	vpavgb 0x12345678,%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 78 56 34 12 64 	vaeskeygenassist \$0x64,0x12345678,%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 78 56 34 12 64 	vpextrb \$0x64,%xmm8,0x12345678
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 78 56 34 12 07 	vaeskeygenassist \$0x7,0x12345678,%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 78 56 34 12 07 	vpextrb \$0x7,%xmm8,0x12345678
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 25 78 56 34 12 	vcvtsi2sdl 0x12345678,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 25 78 56 34 12 80 	vblendvps %xmm8,0x12345678,%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 78 56 34 12 64 	vpinsrb \$0x64,0x12345678,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 78 56 34 12 07 	vpinsrb \$0x7,0x12345678,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 25 78 56 34 12 	vmovdqa 0x12345678,%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 25 78 56 34 12 	vmovdqa %ymm8,0x12345678
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 25 78 56 34 12 	vpermilpd 0x12345678,%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 78 56 34 12 64 	vroundpd \$0x64,0x12345678,%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 78 56 34 12 64 	vextractf128 \$0x64,%ymm8,0x12345678
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 78 56 34 12 64 	vperm2f128 \$0x64,0x12345678,%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 78 56 34 12 07 	vroundpd \$0x7,0x12345678,%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 78 56 34 12 07 	vextractf128 \$0x7,%ymm8,0x12345678
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 78 56 34 12 07 	vperm2f128 \$0x7,0x12345678,%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 25 78 56 34 12 80 	vblendvpd %ymm8,0x12345678,%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c5 f8 ae 55 00       	vldmxcsr 0x0\(%rbp\)
 [ 	]*[a-f0-9]+:	c5 79 6f 45 00       	vmovdqa 0x0\(%rbp\),%xmm8
@@ -3421,17 +3103,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 45 00       	vcvtdq2pd 0x0\(%rbp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 45 00       	vcvtpd2psy 0x0\(%rbp\),%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 7d 00       	vpavgb 0x0\(%rbp\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 45 00 64 	vaeskeygenassist \$0x64,0x0\(%rbp\),%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 45 00 64 	vpextrb \$0x64,%xmm8,0x0\(%rbp\)
+[ 	]*[a-f0-9]+:	c4 63 79 df 45 00 07 	vaeskeygenassist \$0x7,0x0\(%rbp\),%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 45 00 07 	vpextrb \$0x7,%xmm8,0x0\(%rbp\)
 [ 	]*[a-f0-9]+:	c5 3b 2a 7d 00       	vcvtsi2sdl 0x0\(%rbp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a 75 00 80 	vblendvps %xmm8,0x0\(%rbp\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 7d 00 64 	vpinsrb \$0x64,0x0\(%rbp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 7d 00 07 	vpinsrb \$0x7,0x0\(%rbp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 45 00       	vmovdqa 0x0\(%rbp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 45 00       	vmovdqa %ymm8,0x0\(%rbp\)
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 7d 00    	vpermilpd 0x0\(%rbp\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 45 00 64 	vroundpd \$0x64,0x0\(%rbp\),%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 45 00 64 	vextractf128 \$0x64,%ymm8,0x0\(%rbp\)
-[ 	]*[a-f0-9]+:	c4 63 3d 06 7d 00 64 	vperm2f128 \$0x64,0x0\(%rbp\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 45 00 07 	vroundpd \$0x7,0x0\(%rbp\),%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 45 00 07 	vextractf128 \$0x7,%ymm8,0x0\(%rbp\)
+[ 	]*[a-f0-9]+:	c4 63 3d 06 7d 00 07 	vperm2f128 \$0x7,0x0\(%rbp\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 75 00 80 	vblendvpd %ymm8,0x0\(%rbp\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c5 f8 ae 95 99 00 00 00 	vldmxcsr 0x99\(%rbp\)
 [ 	]*[a-f0-9]+:	c5 79 6f 85 99 00 00 00 	vmovdqa 0x99\(%rbp\),%xmm8
@@ -3441,17 +3123,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 85 99 00 00 00 	vcvtdq2pd 0x99\(%rbp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 85 99 00 00 00 	vcvtpd2psy 0x99\(%rbp\),%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 bd 99 00 00 00 	vpavgb 0x99\(%rbp\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 85 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%rbp\),%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 85 99 00 00 00 64 	vpextrb \$0x64,%xmm8,0x99\(%rbp\)
+[ 	]*[a-f0-9]+:	c4 63 79 df 85 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%rbp\),%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 85 99 00 00 00 07 	vpextrb \$0x7,%xmm8,0x99\(%rbp\)
 [ 	]*[a-f0-9]+:	c5 3b 2a bd 99 00 00 00 	vcvtsi2sdl 0x99\(%rbp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a b5 99 00 00 00 80 	vblendvps %xmm8,0x99\(%rbp\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 bd 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%rbp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 bd 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%rbp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 85 99 00 00 00 	vmovdqa 0x99\(%rbp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 85 99 00 00 00 	vmovdqa %ymm8,0x99\(%rbp\)
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bd 99 00 00 00 	vpermilpd 0x99\(%rbp\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 85 99 00 00 00 64 	vroundpd \$0x64,0x99\(%rbp\),%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 85 99 00 00 00 64 	vextractf128 \$0x64,%ymm8,0x99\(%rbp\)
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bd 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%rbp\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 85 99 00 00 00 07 	vroundpd \$0x7,0x99\(%rbp\),%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 85 99 00 00 00 07 	vextractf128 \$0x7,%ymm8,0x99\(%rbp\)
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bd 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%rbp\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b5 99 00 00 00 80 	vblendvpd %ymm8,0x99\(%rbp\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 c1 78 ae 97 99 00 00 00 	vldmxcsr 0x99\(%r15\)
 [ 	]*[a-f0-9]+:	c4 41 79 6f 87 99 00 00 00 	vmovdqa 0x99\(%r15\),%xmm8
@@ -3461,38 +3143,38 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 41 7e e6 87 99 00 00 00 	vcvtdq2pd 0x99\(%r15\),%ymm8
 [ 	]*[a-f0-9]+:	c4 41 7d 5a 87 99 00 00 00 	vcvtpd2psy 0x99\(%r15\),%xmm8
 [ 	]*[a-f0-9]+:	c4 41 39 e0 bf 99 00 00 00 	vpavgb 0x99\(%r15\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 43 79 df 87 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%r15\),%xmm8
-[ 	]*[a-f0-9]+:	c4 43 79 14 87 99 00 00 00 64 	vpextrb \$0x64,%xmm8,0x99\(%r15\)
+[ 	]*[a-f0-9]+:	c4 43 79 df 87 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%r15\),%xmm8
+[ 	]*[a-f0-9]+:	c4 43 79 14 87 99 00 00 00 07 	vpextrb \$0x7,%xmm8,0x99\(%r15\)
 [ 	]*[a-f0-9]+:	c4 41 3b 2a bf 99 00 00 00 	vcvtsi2sdl 0x99\(%r15\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 43 19 4a b7 99 00 00 00 80 	vblendvps %xmm8,0x99\(%r15\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 43 39 20 bf 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%r15\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 43 39 20 bf 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%r15\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 41 7d 6f 87 99 00 00 00 	vmovdqa 0x99\(%r15\),%ymm8
 [ 	]*[a-f0-9]+:	c4 41 7d 7f 87 99 00 00 00 	vmovdqa %ymm8,0x99\(%r15\)
 [ 	]*[a-f0-9]+:	c4 42 3d 0d bf 99 00 00 00 	vpermilpd 0x99\(%r15\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 43 7d 09 87 99 00 00 00 64 	vroundpd \$0x64,0x99\(%r15\),%ymm8
-[ 	]*[a-f0-9]+:	c4 43 7d 19 87 99 00 00 00 64 	vextractf128 \$0x64,%ymm8,0x99\(%r15\)
-[ 	]*[a-f0-9]+:	c4 43 3d 06 bf 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%r15\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 43 7d 09 87 99 00 00 00 07 	vroundpd \$0x7,0x99\(%r15\),%ymm8
+[ 	]*[a-f0-9]+:	c4 43 7d 19 87 99 00 00 00 07 	vextractf128 \$0x7,%ymm8,0x99\(%r15\)
+[ 	]*[a-f0-9]+:	c4 43 3d 06 bf 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%r15\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 43 1d 4b b7 99 00 00 00 80 	vblendvpd %ymm8,0x99\(%r15\),%ymm12,%ymm14
-[ 	]*[a-f0-9]+:	c5 f8 ae 15 99 00 00 00 	vldmxcsr 0x99\(%rip\)        # 48da <_start\+0x48da>
-[ 	]*[a-f0-9]+:	c5 79 6f 05 99 00 00 00 	vmovdqa 0x99\(%rip\),%xmm8        # 48e2 <_start\+0x48e2>
-[ 	]*[a-f0-9]+:	c5 79 7f 05 99 00 00 00 	vmovdqa %xmm8,0x99\(%rip\)        # 48ea <_start\+0x48ea>
-[ 	]*[a-f0-9]+:	c5 79 7e 05 99 00 00 00 	vmovd  %xmm8,0x99\(%rip\)        # 48f2 <_start\+0x48f2>
-[ 	]*[a-f0-9]+:	c5 7b 2d 05 99 00 00 00 	vcvtsd2si 0x99\(%rip\),%r8d        # 48fa <_start\+0x48fa>
-[ 	]*[a-f0-9]+:	c5 7e e6 05 99 00 00 00 	vcvtdq2pd 0x99\(%rip\),%ymm8        # 4902 <_start\+0x4902>
-[ 	]*[a-f0-9]+:	c5 7d 5a 05 99 00 00 00 	vcvtpd2psy 0x99\(%rip\),%xmm8        # 490a <_start\+0x490a>
-[ 	]*[a-f0-9]+:	c5 39 e0 3d 99 00 00 00 	vpavgb 0x99\(%rip\),%xmm8,%xmm15        # 4912 <_start\+0x4912>
-[ 	]*[a-f0-9]+:	c4 63 79 df 05 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%rip\),%xmm8        # 491c <_start\+0x491c>
-[ 	]*[a-f0-9]+:	c4 63 79 14 05 99 00 00 00 64 	vpextrb \$0x64,%xmm8,0x99\(%rip\)        # 4926 <_start\+0x4926>
-[ 	]*[a-f0-9]+:	c5 3b 2a 3d 99 00 00 00 	vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15        # 492e <_start\+0x492e>
-[ 	]*[a-f0-9]+:	c4 63 19 4a 35 99 00 00 00 80 	vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14        # 4938 <_start\+0x4938>
-[ 	]*[a-f0-9]+:	c4 63 39 20 3d 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%rip\),%xmm8,%xmm15        # 4942 <_start\+0x4942>
-[ 	]*[a-f0-9]+:	c5 7d 6f 05 99 00 00 00 	vmovdqa 0x99\(%rip\),%ymm8        # 494a <_start\+0x494a>
-[ 	]*[a-f0-9]+:	c5 7d 7f 05 99 00 00 00 	vmovdqa %ymm8,0x99\(%rip\)        # 4952 <_start\+0x4952>
-[ 	]*[a-f0-9]+:	c4 62 3d 0d 3d 99 00 00 00 	vpermilpd 0x99\(%rip\),%ymm8,%ymm15        # 495b <_start\+0x495b>
-[ 	]*[a-f0-9]+:	c4 63 7d 09 05 99 00 00 00 64 	vroundpd \$0x64,0x99\(%rip\),%ymm8        # 4965 <_start\+0x4965>
-[ 	]*[a-f0-9]+:	c4 63 7d 19 05 99 00 00 00 64 	vextractf128 \$0x64,%ymm8,0x99\(%rip\)        # 496f <_start\+0x496f>
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3d 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%rip\),%ymm8,%ymm15        # 4979 <_start\+0x4979>
-[ 	]*[a-f0-9]+:	c4 63 1d 4b 35 99 00 00 00 80 	vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14        # 4983 <_start\+0x4983>
+[ 	]*[a-f0-9]+:	c5 f8 ae 15 99 00 00 00 	vldmxcsr 0x99\(%rip\)        # 415a <_start\+0x415a>
+[ 	]*[a-f0-9]+:	c5 79 6f 05 99 00 00 00 	vmovdqa 0x99\(%rip\),%xmm8        # 4162 <_start\+0x4162>
+[ 	]*[a-f0-9]+:	c5 79 7f 05 99 00 00 00 	vmovdqa %xmm8,0x99\(%rip\)        # 416a <_start\+0x416a>
+[ 	]*[a-f0-9]+:	c5 79 7e 05 99 00 00 00 	vmovd  %xmm8,0x99\(%rip\)        # 4172 <_start\+0x4172>
+[ 	]*[a-f0-9]+:	c5 7b 2d 05 99 00 00 00 	vcvtsd2si 0x99\(%rip\),%r8d        # 417a <_start\+0x417a>
+[ 	]*[a-f0-9]+:	c5 7e e6 05 99 00 00 00 	vcvtdq2pd 0x99\(%rip\),%ymm8        # 4182 <_start\+0x4182>
+[ 	]*[a-f0-9]+:	c5 7d 5a 05 99 00 00 00 	vcvtpd2psy 0x99\(%rip\),%xmm8        # 418a <_start\+0x418a>
+[ 	]*[a-f0-9]+:	c5 39 e0 3d 99 00 00 00 	vpavgb 0x99\(%rip\),%xmm8,%xmm15        # 4192 <_start\+0x4192>
+[ 	]*[a-f0-9]+:	c4 63 79 df 05 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8        # 419c <_start\+0x419c>
+[ 	]*[a-f0-9]+:	c4 63 79 14 05 99 00 00 00 07 	vpextrb \$0x7,%xmm8,0x99\(%rip\)        # 41a6 <_start\+0x41a6>
+[ 	]*[a-f0-9]+:	c5 3b 2a 3d 99 00 00 00 	vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15        # 41ae <_start\+0x41ae>
+[ 	]*[a-f0-9]+:	c4 63 19 4a 35 99 00 00 00 80 	vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14        # 41b8 <_start\+0x41b8>
+[ 	]*[a-f0-9]+:	c4 63 39 20 3d 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15        # 41c2 <_start\+0x41c2>
+[ 	]*[a-f0-9]+:	c5 7d 6f 05 99 00 00 00 	vmovdqa 0x99\(%rip\),%ymm8        # 41ca <_start\+0x41ca>
+[ 	]*[a-f0-9]+:	c5 7d 7f 05 99 00 00 00 	vmovdqa %ymm8,0x99\(%rip\)        # 41d2 <_start\+0x41d2>
+[ 	]*[a-f0-9]+:	c4 62 3d 0d 3d 99 00 00 00 	vpermilpd 0x99\(%rip\),%ymm8,%ymm15        # 41db <_start\+0x41db>
+[ 	]*[a-f0-9]+:	c4 63 7d 09 05 99 00 00 00 07 	vroundpd \$0x7,0x99\(%rip\),%ymm8        # 41e5 <_start\+0x41e5>
+[ 	]*[a-f0-9]+:	c4 63 7d 19 05 99 00 00 00 07 	vextractf128 \$0x7,%ymm8,0x99\(%rip\)        # 41ef <_start\+0x41ef>
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3d 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15        # 41f9 <_start\+0x41f9>
+[ 	]*[a-f0-9]+:	c4 63 1d 4b 35 99 00 00 00 80 	vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14        # 4203 <_start\+0x4203>
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 24 99 00 00 00 	vldmxcsr 0x99\(%rsp\)
 [ 	]*[a-f0-9]+:	c5 79 6f 84 24 99 00 00 00 	vmovdqa 0x99\(%rsp\),%xmm8
 [ 	]*[a-f0-9]+:	c5 79 7f 84 24 99 00 00 00 	vmovdqa %xmm8,0x99\(%rsp\)
@@ -3501,17 +3183,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 84 24 99 00 00 00 	vcvtdq2pd 0x99\(%rsp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 84 24 99 00 00 00 	vcvtpd2psy 0x99\(%rsp\),%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 bc 24 99 00 00 00 	vpavgb 0x99\(%rsp\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 84 24 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%rsp\),%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 84 24 99 00 00 00 64 	vpextrb \$0x64,%xmm8,0x99\(%rsp\)
+[ 	]*[a-f0-9]+:	c4 63 79 df 84 24 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%rsp\),%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 84 24 99 00 00 00 07 	vpextrb \$0x7,%xmm8,0x99\(%rsp\)
 [ 	]*[a-f0-9]+:	c5 3b 2a bc 24 99 00 00 00 	vcvtsi2sdl 0x99\(%rsp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a b4 24 99 00 00 00 80 	vblendvps %xmm8,0x99\(%rsp\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 bc 24 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%rsp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 bc 24 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%rsp\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 84 24 99 00 00 00 	vmovdqa 0x99\(%rsp\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 84 24 99 00 00 00 	vmovdqa %ymm8,0x99\(%rsp\)
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bc 24 99 00 00 00 	vpermilpd 0x99\(%rsp\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 84 24 99 00 00 00 64 	vroundpd \$0x64,0x99\(%rsp\),%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 84 24 99 00 00 00 64 	vextractf128 \$0x64,%ymm8,0x99\(%rsp\)
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 24 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%rsp\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 84 24 99 00 00 00 07 	vroundpd \$0x7,0x99\(%rsp\),%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 84 24 99 00 00 00 07 	vextractf128 \$0x7,%ymm8,0x99\(%rsp\)
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 24 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%rsp\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b4 24 99 00 00 00 80 	vblendvpd %ymm8,0x99\(%rsp\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 c1 78 ae 94 24 99 00 00 00 	vldmxcsr 0x99\(%r12\)
 [ 	]*[a-f0-9]+:	c4 41 79 6f 84 24 99 00 00 00 	vmovdqa 0x99\(%r12\),%xmm8
@@ -3521,17 +3203,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 41 7e e6 84 24 99 00 00 00 	vcvtdq2pd 0x99\(%r12\),%ymm8
 [ 	]*[a-f0-9]+:	c4 41 7d 5a 84 24 99 00 00 00 	vcvtpd2psy 0x99\(%r12\),%xmm8
 [ 	]*[a-f0-9]+:	c4 41 39 e0 bc 24 99 00 00 00 	vpavgb 0x99\(%r12\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 43 79 df 84 24 99 00 00 00 64 	vaeskeygenassist \$0x64,0x99\(%r12\),%xmm8
-[ 	]*[a-f0-9]+:	c4 43 79 14 84 24 99 00 00 00 64 	vpextrb \$0x64,%xmm8,0x99\(%r12\)
+[ 	]*[a-f0-9]+:	c4 43 79 df 84 24 99 00 00 00 07 	vaeskeygenassist \$0x7,0x99\(%r12\),%xmm8
+[ 	]*[a-f0-9]+:	c4 43 79 14 84 24 99 00 00 00 07 	vpextrb \$0x7,%xmm8,0x99\(%r12\)
 [ 	]*[a-f0-9]+:	c4 41 3b 2a bc 24 99 00 00 00 	vcvtsi2sdl 0x99\(%r12\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 43 19 4a b4 24 99 00 00 00 80 	vblendvps %xmm8,0x99\(%r12\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 43 39 20 bc 24 99 00 00 00 64 	vpinsrb \$0x64,0x99\(%r12\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 43 39 20 bc 24 99 00 00 00 07 	vpinsrb \$0x7,0x99\(%r12\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 41 7d 6f 84 24 99 00 00 00 	vmovdqa 0x99\(%r12\),%ymm8
 [ 	]*[a-f0-9]+:	c4 41 7d 7f 84 24 99 00 00 00 	vmovdqa %ymm8,0x99\(%r12\)
 [ 	]*[a-f0-9]+:	c4 42 3d 0d bc 24 99 00 00 00 	vpermilpd 0x99\(%r12\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 43 7d 09 84 24 99 00 00 00 64 	vroundpd \$0x64,0x99\(%r12\),%ymm8
-[ 	]*[a-f0-9]+:	c4 43 7d 19 84 24 99 00 00 00 64 	vextractf128 \$0x64,%ymm8,0x99\(%r12\)
-[ 	]*[a-f0-9]+:	c4 43 3d 06 bc 24 99 00 00 00 64 	vperm2f128 \$0x64,0x99\(%r12\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 43 7d 09 84 24 99 00 00 00 07 	vroundpd \$0x7,0x99\(%r12\),%ymm8
+[ 	]*[a-f0-9]+:	c4 43 7d 19 84 24 99 00 00 00 07 	vextractf128 \$0x7,%ymm8,0x99\(%r12\)
+[ 	]*[a-f0-9]+:	c4 43 3d 06 bc 24 99 00 00 00 07 	vperm2f128 \$0x7,0x99\(%r12\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 43 1d 4b b4 24 99 00 00 00 80 	vblendvpd %ymm8,0x99\(%r12\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 25 67 ff ff ff 	vldmxcsr 0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c5 79 6f 04 25 67 ff ff ff 	vmovdqa 0xffffffffffffff67,%xmm8
@@ -3541,17 +3223,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 25 67 ff ff ff 	vcvtdq2pd 0xffffffffffffff67,%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 25 67 ff ff ff 	vcvtpd2psy 0xffffffffffffff67,%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 25 67 ff ff ff 	vpavgb 0xffffffffffffff67,%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 67 ff ff ff 64 	vaeskeygenassist \$0x64,0xffffffffffffff67,%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,0xffffffffffffff67
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 25 67 ff ff ff 07 	vaeskeygenassist \$0x7,0xffffffffffffff67,%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 25 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 25 67 ff ff ff 	vcvtsi2sdl 0xffffffffffffff67,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 25 67 ff ff ff 80 	vblendvps %xmm8,0xffffffffffffff67,%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 67 ff ff ff 64 	vpinsrb \$0x64,0xffffffffffffff67,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 25 67 ff ff ff 07 	vpinsrb \$0x7,0xffffffffffffff67,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 25 67 ff ff ff 	vmovdqa 0xffffffffffffff67,%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 25 67 ff ff ff 	vmovdqa %ymm8,0xffffffffffffff67
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 25 67 ff ff ff 	vpermilpd 0xffffffffffffff67,%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 67 ff ff ff 64 	vroundpd \$0x64,0xffffffffffffff67,%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,0xffffffffffffff67
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 67 ff ff ff 64 	vperm2f128 \$0x64,0xffffffffffffff67,%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 25 67 ff ff ff 07 	vroundpd \$0x7,0xffffffffffffff67,%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 25 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,0xffffffffffffff67
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 25 67 ff ff ff 07 	vperm2f128 \$0x7,0xffffffffffffff67,%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 25 67 ff ff ff 80 	vblendvpd %ymm8,0xffffffffffffff67,%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c5 f8 ae 14 65 67 ff ff ff 	vldmxcsr -0x99\(,%riz,2\)
 [ 	]*[a-f0-9]+:	c5 79 6f 04 65 67 ff ff ff 	vmovdqa -0x99\(,%riz,2\),%xmm8
@@ -3561,17 +3243,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 04 65 67 ff ff ff 	vcvtdq2pd -0x99\(,%riz,2\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 04 65 67 ff ff ff 	vcvtpd2psy -0x99\(,%riz,2\),%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 3c 65 67 ff ff ff 	vpavgb -0x99\(,%riz,2\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 04 65 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(,%riz,2\),%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 04 65 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(,%riz,2\)
+[ 	]*[a-f0-9]+:	c4 63 79 df 04 65 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(,%riz,2\),%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 04 65 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(,%riz,2\)
 [ 	]*[a-f0-9]+:	c5 3b 2a 3c 65 67 ff ff ff 	vcvtsi2sdl -0x99\(,%riz,2\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a 34 65 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(,%riz,2\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 3c 65 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(,%riz,2\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 3c 65 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(,%riz,2\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 04 65 67 ff ff ff 	vmovdqa -0x99\(,%riz,2\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 04 65 67 ff ff ff 	vmovdqa %ymm8,-0x99\(,%riz,2\)
 [ 	]*[a-f0-9]+:	c4 62 3d 0d 3c 65 67 ff ff ff 	vpermilpd -0x99\(,%riz,2\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 04 65 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(,%riz,2\),%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 04 65 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(,%riz,2\)
-[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 65 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(,%riz,2\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 04 65 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(,%riz,2\),%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 04 65 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(,%riz,2\)
+[ 	]*[a-f0-9]+:	c4 63 3d 06 3c 65 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(,%riz,2\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b 34 65 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(,%riz,2\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 23 67 ff ff ff 	vldmxcsr -0x99\(%rbx,%riz,1\)
 [ 	]*[a-f0-9]+:	c5 79 6f 84 23 67 ff ff ff 	vmovdqa -0x99\(%rbx,%riz,1\),%xmm8
@@ -3581,17 +3263,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 84 23 67 ff ff ff 	vcvtdq2pd -0x99\(%rbx,%riz,1\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 84 23 67 ff ff ff 	vcvtpd2psy -0x99\(%rbx,%riz,1\),%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 bc 23 67 ff ff ff 	vpavgb -0x99\(%rbx,%riz,1\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 84 23 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(%rbx,%riz,1\),%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 84 23 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(%rbx,%riz,1\)
+[ 	]*[a-f0-9]+:	c4 63 79 df 84 23 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(%rbx,%riz,1\),%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 84 23 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(%rbx,%riz,1\)
 [ 	]*[a-f0-9]+:	c5 3b 2a bc 23 67 ff ff ff 	vcvtsi2sdl -0x99\(%rbx,%riz,1\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a b4 23 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(%rbx,%riz,1\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 bc 23 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(%rbx,%riz,1\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 bc 23 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(%rbx,%riz,1\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 84 23 67 ff ff ff 	vmovdqa -0x99\(%rbx,%riz,1\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 84 23 67 ff ff ff 	vmovdqa %ymm8,-0x99\(%rbx,%riz,1\)
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bc 23 67 ff ff ff 	vpermilpd -0x99\(%rbx,%riz,1\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 84 23 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(%rbx,%riz,1\),%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 84 23 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(%rbx,%riz,1\)
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 23 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(%rbx,%riz,1\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 84 23 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(%rbx,%riz,1\),%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 84 23 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(%rbx,%riz,1\)
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 23 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(%rbx,%riz,1\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b4 23 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(%rbx,%riz,1\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c5 f8 ae 94 63 67 ff ff ff 	vldmxcsr -0x99\(%rbx,%riz,2\)
 [ 	]*[a-f0-9]+:	c5 79 6f 84 63 67 ff ff ff 	vmovdqa -0x99\(%rbx,%riz,2\),%xmm8
@@ -3601,17 +3283,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c5 7e e6 84 63 67 ff ff ff 	vcvtdq2pd -0x99\(%rbx,%riz,2\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 5a 84 63 67 ff ff ff 	vcvtpd2psy -0x99\(%rbx,%riz,2\),%xmm8
 [ 	]*[a-f0-9]+:	c5 39 e0 bc 63 67 ff ff ff 	vpavgb -0x99\(%rbx,%riz,2\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 63 79 df 84 63 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(%rbx,%riz,2\),%xmm8
-[ 	]*[a-f0-9]+:	c4 63 79 14 84 63 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(%rbx,%riz,2\)
+[ 	]*[a-f0-9]+:	c4 63 79 df 84 63 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(%rbx,%riz,2\),%xmm8
+[ 	]*[a-f0-9]+:	c4 63 79 14 84 63 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(%rbx,%riz,2\)
 [ 	]*[a-f0-9]+:	c5 3b 2a bc 63 67 ff ff ff 	vcvtsi2sdl -0x99\(%rbx,%riz,2\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 63 19 4a b4 63 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(%rbx,%riz,2\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 63 39 20 bc 63 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(%rbx,%riz,2\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 63 39 20 bc 63 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(%rbx,%riz,2\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c5 7d 6f 84 63 67 ff ff ff 	vmovdqa -0x99\(%rbx,%riz,2\),%ymm8
 [ 	]*[a-f0-9]+:	c5 7d 7f 84 63 67 ff ff ff 	vmovdqa %ymm8,-0x99\(%rbx,%riz,2\)
 [ 	]*[a-f0-9]+:	c4 62 3d 0d bc 63 67 ff ff ff 	vpermilpd -0x99\(%rbx,%riz,2\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 63 7d 09 84 63 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(%rbx,%riz,2\),%ymm8
-[ 	]*[a-f0-9]+:	c4 63 7d 19 84 63 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(%rbx,%riz,2\)
-[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 63 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(%rbx,%riz,2\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 63 7d 09 84 63 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(%rbx,%riz,2\),%ymm8
+[ 	]*[a-f0-9]+:	c4 63 7d 19 84 63 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(%rbx,%riz,2\)
+[ 	]*[a-f0-9]+:	c4 63 3d 06 bc 63 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(%rbx,%riz,2\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 63 1d 4b b4 63 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(%rbx,%riz,2\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 81 78 ae 94 bc 67 ff ff ff 	vldmxcsr -0x99\(%r12,%r15,4\)
 [ 	]*[a-f0-9]+:	c4 01 79 6f 84 bc 67 ff ff ff 	vmovdqa -0x99\(%r12,%r15,4\),%xmm8
@@ -3621,17 +3303,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 01 7e e6 84 bc 67 ff ff ff 	vcvtdq2pd -0x99\(%r12,%r15,4\),%ymm8
 [ 	]*[a-f0-9]+:	c4 01 7d 5a 84 bc 67 ff ff ff 	vcvtpd2psy -0x99\(%r12,%r15,4\),%xmm8
 [ 	]*[a-f0-9]+:	c4 01 39 e0 bc bc 67 ff ff ff 	vpavgb -0x99\(%r12,%r15,4\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 03 79 df 84 bc 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(%r12,%r15,4\),%xmm8
-[ 	]*[a-f0-9]+:	c4 03 79 14 84 bc 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(%r12,%r15,4\)
+[ 	]*[a-f0-9]+:	c4 03 79 df 84 bc 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(%r12,%r15,4\),%xmm8
+[ 	]*[a-f0-9]+:	c4 03 79 14 84 bc 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(%r12,%r15,4\)
 [ 	]*[a-f0-9]+:	c4 01 3b 2a bc bc 67 ff ff ff 	vcvtsi2sdl -0x99\(%r12,%r15,4\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 03 19 4a b4 bc 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(%r12,%r15,4\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 03 39 20 bc bc 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(%r12,%r15,4\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 03 39 20 bc bc 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(%r12,%r15,4\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 01 7d 6f 84 bc 67 ff ff ff 	vmovdqa -0x99\(%r12,%r15,4\),%ymm8
 [ 	]*[a-f0-9]+:	c4 01 7d 7f 84 bc 67 ff ff ff 	vmovdqa %ymm8,-0x99\(%r12,%r15,4\)
 [ 	]*[a-f0-9]+:	c4 02 3d 0d bc bc 67 ff ff ff 	vpermilpd -0x99\(%r12,%r15,4\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 03 7d 09 84 bc 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(%r12,%r15,4\),%ymm8
-[ 	]*[a-f0-9]+:	c4 03 7d 19 84 bc 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(%r12,%r15,4\)
-[ 	]*[a-f0-9]+:	c4 03 3d 06 bc bc 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(%r12,%r15,4\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 03 7d 09 84 bc 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(%r12,%r15,4\),%ymm8
+[ 	]*[a-f0-9]+:	c4 03 7d 19 84 bc 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(%r12,%r15,4\)
+[ 	]*[a-f0-9]+:	c4 03 3d 06 bc bc 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(%r12,%r15,4\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 03 1d 4b b4 bc 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(%r12,%r15,4\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 81 78 ae 94 f8 67 ff ff ff 	vldmxcsr -0x99\(%r8,%r15,8\)
 [ 	]*[a-f0-9]+:	c4 01 79 6f 84 f8 67 ff ff ff 	vmovdqa -0x99\(%r8,%r15,8\),%xmm8
@@ -3641,17 +3323,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 01 7e e6 84 f8 67 ff ff ff 	vcvtdq2pd -0x99\(%r8,%r15,8\),%ymm8
 [ 	]*[a-f0-9]+:	c4 01 7d 5a 84 f8 67 ff ff ff 	vcvtpd2psy -0x99\(%r8,%r15,8\),%xmm8
 [ 	]*[a-f0-9]+:	c4 01 39 e0 bc f8 67 ff ff ff 	vpavgb -0x99\(%r8,%r15,8\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 03 79 df 84 f8 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(%r8,%r15,8\),%xmm8
-[ 	]*[a-f0-9]+:	c4 03 79 14 84 f8 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(%r8,%r15,8\)
+[ 	]*[a-f0-9]+:	c4 03 79 df 84 f8 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(%r8,%r15,8\),%xmm8
+[ 	]*[a-f0-9]+:	c4 03 79 14 84 f8 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(%r8,%r15,8\)
 [ 	]*[a-f0-9]+:	c4 01 3b 2a bc f8 67 ff ff ff 	vcvtsi2sdl -0x99\(%r8,%r15,8\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 03 19 4a b4 f8 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(%r8,%r15,8\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 03 39 20 bc f8 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(%r8,%r15,8\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 03 39 20 bc f8 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(%r8,%r15,8\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 01 7d 6f 84 f8 67 ff ff ff 	vmovdqa -0x99\(%r8,%r15,8\),%ymm8
 [ 	]*[a-f0-9]+:	c4 01 7d 7f 84 f8 67 ff ff ff 	vmovdqa %ymm8,-0x99\(%r8,%r15,8\)
 [ 	]*[a-f0-9]+:	c4 02 3d 0d bc f8 67 ff ff ff 	vpermilpd -0x99\(%r8,%r15,8\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 03 7d 09 84 f8 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(%r8,%r15,8\),%ymm8
-[ 	]*[a-f0-9]+:	c4 03 7d 19 84 f8 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(%r8,%r15,8\)
-[ 	]*[a-f0-9]+:	c4 03 3d 06 bc f8 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(%r8,%r15,8\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 03 7d 09 84 f8 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(%r8,%r15,8\),%ymm8
+[ 	]*[a-f0-9]+:	c4 03 7d 19 84 f8 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(%r8,%r15,8\)
+[ 	]*[a-f0-9]+:	c4 03 3d 06 bc f8 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(%r8,%r15,8\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 03 1d 4b b4 f8 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(%r8,%r15,8\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 a1 78 ae 94 a5 67 ff ff ff 	vldmxcsr -0x99\(%rbp,%r12,4\)
 [ 	]*[a-f0-9]+:	c4 21 79 6f 84 a5 67 ff ff ff 	vmovdqa -0x99\(%rbp,%r12,4\),%xmm8
@@ -3661,17 +3343,17 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 21 7e e6 84 a5 67 ff ff ff 	vcvtdq2pd -0x99\(%rbp,%r12,4\),%ymm8
 [ 	]*[a-f0-9]+:	c4 21 7d 5a 84 a5 67 ff ff ff 	vcvtpd2psy -0x99\(%rbp,%r12,4\),%xmm8
 [ 	]*[a-f0-9]+:	c4 21 39 e0 bc a5 67 ff ff ff 	vpavgb -0x99\(%rbp,%r12,4\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 23 79 df 84 a5 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(%rbp,%r12,4\),%xmm8
-[ 	]*[a-f0-9]+:	c4 23 79 14 84 a5 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(%rbp,%r12,4\)
+[ 	]*[a-f0-9]+:	c4 23 79 df 84 a5 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(%rbp,%r12,4\),%xmm8
+[ 	]*[a-f0-9]+:	c4 23 79 14 84 a5 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(%rbp,%r12,4\)
 [ 	]*[a-f0-9]+:	c4 21 3b 2a bc a5 67 ff ff ff 	vcvtsi2sdl -0x99\(%rbp,%r12,4\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 23 19 4a b4 a5 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(%rbp,%r12,4\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 23 39 20 bc a5 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(%rbp,%r12,4\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 23 39 20 bc a5 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(%rbp,%r12,4\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 21 7d 6f 84 a5 67 ff ff ff 	vmovdqa -0x99\(%rbp,%r12,4\),%ymm8
 [ 	]*[a-f0-9]+:	c4 21 7d 7f 84 a5 67 ff ff ff 	vmovdqa %ymm8,-0x99\(%rbp,%r12,4\)
 [ 	]*[a-f0-9]+:	c4 22 3d 0d bc a5 67 ff ff ff 	vpermilpd -0x99\(%rbp,%r12,4\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 23 7d 09 84 a5 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(%rbp,%r12,4\),%ymm8
-[ 	]*[a-f0-9]+:	c4 23 7d 19 84 a5 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(%rbp,%r12,4\)
-[ 	]*[a-f0-9]+:	c4 23 3d 06 bc a5 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(%rbp,%r12,4\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 23 7d 09 84 a5 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(%rbp,%r12,4\),%ymm8
+[ 	]*[a-f0-9]+:	c4 23 7d 19 84 a5 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(%rbp,%r12,4\)
+[ 	]*[a-f0-9]+:	c4 23 3d 06 bc a5 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(%rbp,%r12,4\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 23 1d 4b b4 a5 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(%rbp,%r12,4\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 a1 78 ae 94 2c 67 ff ff ff 	vldmxcsr -0x99\(%rsp,%r13,1\)
 [ 	]*[a-f0-9]+:	c4 21 79 6f 84 2c 67 ff ff ff 	vmovdqa -0x99\(%rsp,%r13,1\),%xmm8
@@ -3681,40 +3363,40 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	c4 21 7e e6 84 2c 67 ff ff ff 	vcvtdq2pd -0x99\(%rsp,%r13,1\),%ymm8
 [ 	]*[a-f0-9]+:	c4 21 7d 5a 84 2c 67 ff ff ff 	vcvtpd2psy -0x99\(%rsp,%r13,1\),%xmm8
 [ 	]*[a-f0-9]+:	c4 21 39 e0 bc 2c 67 ff ff ff 	vpavgb -0x99\(%rsp,%r13,1\),%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 23 79 df 84 2c 67 ff ff ff 64 	vaeskeygenassist \$0x64,-0x99\(%rsp,%r13,1\),%xmm8
-[ 	]*[a-f0-9]+:	c4 23 79 14 84 2c 67 ff ff ff 64 	vpextrb \$0x64,%xmm8,-0x99\(%rsp,%r13,1\)
+[ 	]*[a-f0-9]+:	c4 23 79 df 84 2c 67 ff ff ff 07 	vaeskeygenassist \$0x7,-0x99\(%rsp,%r13,1\),%xmm8
+[ 	]*[a-f0-9]+:	c4 23 79 14 84 2c 67 ff ff ff 07 	vpextrb \$0x7,%xmm8,-0x99\(%rsp,%r13,1\)
 [ 	]*[a-f0-9]+:	c4 21 3b 2a bc 2c 67 ff ff ff 	vcvtsi2sdl -0x99\(%rsp,%r13,1\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 23 19 4a b4 2c 67 ff ff ff 80 	vblendvps %xmm8,-0x99\(%rsp,%r13,1\),%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 23 39 20 bc 2c 67 ff ff ff 64 	vpinsrb \$0x64,-0x99\(%rsp,%r13,1\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 23 39 20 bc 2c 67 ff ff ff 07 	vpinsrb \$0x7,-0x99\(%rsp,%r13,1\),%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 21 7d 6f 84 2c 67 ff ff ff 	vmovdqa -0x99\(%rsp,%r13,1\),%ymm8
 [ 	]*[a-f0-9]+:	c4 21 7d 7f 84 2c 67 ff ff ff 	vmovdqa %ymm8,-0x99\(%rsp,%r13,1\)
 [ 	]*[a-f0-9]+:	c4 22 3d 0d bc 2c 67 ff ff ff 	vpermilpd -0x99\(%rsp,%r13,1\),%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 23 7d 09 84 2c 67 ff ff ff 64 	vroundpd \$0x64,-0x99\(%rsp,%r13,1\),%ymm8
-[ 	]*[a-f0-9]+:	c4 23 7d 19 84 2c 67 ff ff ff 64 	vextractf128 \$0x64,%ymm8,-0x99\(%rsp,%r13,1\)
-[ 	]*[a-f0-9]+:	c4 23 3d 06 bc 2c 67 ff ff ff 64 	vperm2f128 \$0x64,-0x99\(%rsp,%r13,1\),%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 23 7d 09 84 2c 67 ff ff ff 07 	vroundpd \$0x7,-0x99\(%rsp,%r13,1\),%ymm8
+[ 	]*[a-f0-9]+:	c4 23 7d 19 84 2c 67 ff ff ff 07 	vextractf128 \$0x7,%ymm8,-0x99\(%rsp,%r13,1\)
+[ 	]*[a-f0-9]+:	c4 23 3d 06 bc 2c 67 ff ff ff 07 	vperm2f128 \$0x7,-0x99\(%rsp,%r13,1\),%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 23 1d 4b b4 2c 67 ff ff ff 80 	vblendvpd %ymm8,-0x99\(%rsp,%r13,1\),%ymm12,%ymm14
 [ 	]*[a-f0-9]+:	c4 41 79 50 c0       	vmovmskpd %xmm8,%r8d
-[ 	]*[a-f0-9]+:	c4 c1 01 72 f0 64    	vpslld \$0x64,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 c1 01 72 f0 07    	vpslld \$0x7,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 41 7c 50 c0       	vmovmskps %ymm8,%r8d
 [ 	]*[a-f0-9]+:	c4 41 79 6f f8       	vmovdqa %xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 41 79 7e c0       	vmovd  %xmm8,%r8d
 [ 	]*[a-f0-9]+:	c4 41 7b 2d c0       	vcvtsd2si %xmm8,%r8d
 [ 	]*[a-f0-9]+:	c4 41 7e e6 c0       	vcvtdq2pd %xmm8,%ymm8
 [ 	]*[a-f0-9]+:	c4 41 7d 5a c0       	vcvtpd2ps %ymm8,%xmm8
-[ 	]*[a-f0-9]+:	c4 43 79 df f8 64    	vaeskeygenassist \$0x64,%xmm8,%xmm15
-[ 	]*[a-f0-9]+:	c4 43 79 14 c0 64    	vpextrb \$0x64,%xmm8,%r8d
+[ 	]*[a-f0-9]+:	c4 43 79 df f8 07    	vaeskeygenassist \$0x7,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 43 79 14 c0 07    	vpextrb \$0x7,%xmm8,%r8d
 [ 	]*[a-f0-9]+:	c4 41 3b 2a f8       	vcvtsi2sd %r8d,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 43 19 4a f0 80    	vblendvps %xmm8,%xmm8,%xmm12,%xmm14
-[ 	]*[a-f0-9]+:	c4 43 39 20 f8 64    	vpinsrb \$0x64,%r8d,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 43 39 20 f8 07    	vpinsrb \$0x7,%r8d,%xmm8,%xmm15
 [ 	]*[a-f0-9]+:	c4 41 7d 6f f8       	vmovdqa %ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 42 05 0d e0       	vpermilpd %ymm8,%ymm15,%ymm12
-[ 	]*[a-f0-9]+:	c4 43 7d 09 f8 64    	vroundpd \$0x64,%ymm8,%ymm15
-[ 	]*[a-f0-9]+:	c4 43 7d 19 c0 64    	vextractf128 \$0x64,%ymm8,%xmm8
-[ 	]*[a-f0-9]+:	c4 43 05 06 e0 64    	vperm2f128 \$0x64,%ymm8,%ymm15,%ymm12
+[ 	]*[a-f0-9]+:	c4 43 7d 09 f8 07    	vroundpd \$0x7,%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 43 7d 19 c0 07    	vextractf128 \$0x7,%ymm8,%xmm8
+[ 	]*[a-f0-9]+:	c4 43 05 06 e0 07    	vperm2f128 \$0x7,%ymm8,%ymm15,%ymm12
 [ 	]*[a-f0-9]+:	c4 43 1d 4b f7 80    	vblendvpd %ymm8,%ymm15,%ymm12,%ymm14
-[ 	]*[a-f0-9]+:	c4 43 3d 18 f8 64    	vinsertf128 \$0x64,%xmm8,%ymm8,%ymm15
+[ 	]*[a-f0-9]+:	c4 43 3d 18 f8 07    	vinsertf128 \$0x7,%xmm8,%ymm8,%ymm15
 [ 	]*[a-f0-9]+:	c4 61 fb 2d 01       	vcvtsd2si \(%rcx\),%r8
 [ 	]*[a-f0-9]+:	c4 43 79 17 c0 0a    	vextractps \$0xa,%xmm8,%r8d
 [ 	]*[a-f0-9]+:	c4 61 fa 2d 01       	vcvtss2si \(%rcx\),%r8
-[ 	]*[a-f0-9]+:	c4 41 01 c4 c0 64    	vpinsrw \$0x64,%r8d,%xmm15,%xmm8
+[ 	]*[a-f0-9]+:	c4 41 01 c4 c0 07    	vpinsrw \$0x7,%r8d,%xmm15,%xmm8
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx.s b/gas/testsuite/gas/i386/x86-64-avx.s
index 5f9d521..88903d0 100644
--- a/gas/testsuite/gas/i386/x86-64-avx.s
+++ b/gas/testsuite/gas/i386/x86-64-avx.s
@@ -19,14 +19,14 @@ _start:
 	vmaskmovps %ymm4,%ymm6,(%rcx)
 
 # Tests for op imm8, ymm/mem256, ymm
-	vpermilpd $100,%ymm6,%ymm2
-	vpermilpd $100,(%rcx),%ymm6
-	vpermilps $100,%ymm6,%ymm2
-	vpermilps $100,(%rcx),%ymm6
-	vroundpd $100,%ymm6,%ymm2
-	vroundpd $100,(%rcx),%ymm6
-	vroundps $100,%ymm6,%ymm2
-	vroundps $100,(%rcx),%ymm6
+	vpermilpd $7,%ymm6,%ymm2
+	vpermilpd $7,(%rcx),%ymm6
+	vpermilps $7,%ymm6,%ymm2
+	vpermilps $7,(%rcx),%ymm6
+	vroundpd $7,%ymm6,%ymm2
+	vroundpd $7,(%rcx),%ymm6
+	vroundps $7,%ymm6,%ymm2
+	vroundps $7,(%rcx),%ymm6
 
 # Tests for op ymm/mem256, ymm, ymm
 	vaddpd %ymm4,%ymm6,%ymm2
@@ -231,65 +231,65 @@ _start:
 	vcvttpd2dqy (%rcx),%xmm4
 
 # Tests for op ymm/mem256, ymm
-	vcvtdq2ps %ymm4,%ymm4
+	vcvtdq2ps %ymm4,%ymm6
 	vcvtdq2ps (%rcx),%ymm4
-	vcvtps2dq %ymm4,%ymm4
+	vcvtps2dq %ymm4,%ymm6
 	vcvtps2dq (%rcx),%ymm4
-	vcvttps2dq %ymm4,%ymm4
+	vcvttps2dq %ymm4,%ymm6
 	vcvttps2dq (%rcx),%ymm4
-	vmovapd %ymm4,%ymm4
+	vmovapd %ymm4,%ymm6
 	vmovapd (%rcx),%ymm4
-	vmovaps %ymm4,%ymm4
+	vmovaps %ymm4,%ymm6
 	vmovaps (%rcx),%ymm4
-	vmovdqa %ymm4,%ymm4
+	vmovdqa %ymm4,%ymm6
 	vmovdqa (%rcx),%ymm4
-	vmovdqu %ymm4,%ymm4
+	vmovdqu %ymm4,%ymm6
 	vmovdqu (%rcx),%ymm4
-	vmovddup %ymm4,%ymm4
+	vmovddup %ymm4,%ymm6
 	vmovddup (%rcx),%ymm4
-	vmovshdup %ymm4,%ymm4
+	vmovshdup %ymm4,%ymm6
 	vmovshdup (%rcx),%ymm4
-	vmovsldup %ymm4,%ymm4
+	vmovsldup %ymm4,%ymm6
 	vmovsldup (%rcx),%ymm4
-	vmovupd %ymm4,%ymm4
+	vmovupd %ymm4,%ymm6
 	vmovupd (%rcx),%ymm4
-	vmovups %ymm4,%ymm4
+	vmovups %ymm4,%ymm6
 	vmovups (%rcx),%ymm4
-	vptest %ymm4,%ymm4
+	vptest %ymm4,%ymm6
 	vptest (%rcx),%ymm4
-	vrcpps %ymm4,%ymm4
+	vrcpps %ymm4,%ymm6
 	vrcpps (%rcx),%ymm4
-	vrsqrtps %ymm4,%ymm4
+	vrsqrtps %ymm4,%ymm6
 	vrsqrtps (%rcx),%ymm4
-	vsqrtpd %ymm4,%ymm4
+	vsqrtpd %ymm4,%ymm6
 	vsqrtpd (%rcx),%ymm4
-	vsqrtps %ymm4,%ymm4
+	vsqrtps %ymm4,%ymm6
 	vsqrtps (%rcx),%ymm4
-	vtestpd %ymm4,%ymm4
+	vtestpd %ymm4,%ymm6
 	vtestpd (%rcx),%ymm4
-	vtestps %ymm4,%ymm4
+	vtestps %ymm4,%ymm6
 	vtestps (%rcx),%ymm4
 
 # Tests for op mem256, ymm
 	vlddqu (%rcx),%ymm4
 
 # Tests for op imm8, ymm/mem256, ymm, ymm
-	vblendpd $100,%ymm4,%ymm6,%ymm2
-	vblendpd $100,(%rcx),%ymm6,%ymm2
-	vblendps $100,%ymm4,%ymm6,%ymm2
-	vblendps $100,(%rcx),%ymm6,%ymm2
-	vcmppd $100,%ymm4,%ymm6,%ymm2
-	vcmppd $100,(%rcx),%ymm6,%ymm2
-	vcmpps $100,%ymm4,%ymm6,%ymm2
-	vcmpps $100,(%rcx),%ymm6,%ymm2
-	vdpps $100,%ymm4,%ymm6,%ymm2
-	vdpps $100,(%rcx),%ymm6,%ymm2
-	vperm2f128 $100,%ymm4,%ymm6,%ymm2
-	vperm2f128 $100,(%rcx),%ymm6,%ymm2
-	vshufpd $100,%ymm4,%ymm6,%ymm2
-	vshufpd $100,(%rcx),%ymm6,%ymm2
-	vshufps $100,%ymm4,%ymm6,%ymm2
-	vshufps $100,(%rcx),%ymm6,%ymm2
+	vblendpd $7,%ymm4,%ymm6,%ymm2
+	vblendpd $7,(%rcx),%ymm6,%ymm2
+	vblendps $7,%ymm4,%ymm6,%ymm2
+	vblendps $7,(%rcx),%ymm6,%ymm2
+	vcmppd $7,%ymm4,%ymm6,%ymm2
+	vcmppd $7,(%rcx),%ymm6,%ymm2
+	vcmpps $7,%ymm4,%ymm6,%ymm2
+	vcmpps $7,(%rcx),%ymm6,%ymm2
+	vdpps $7,%ymm4,%ymm6,%ymm2
+	vdpps $7,(%rcx),%ymm6,%ymm2
+	vperm2f128 $7,%ymm4,%ymm6,%ymm2
+	vperm2f128 $7,(%rcx),%ymm6,%ymm2
+	vshufpd $7,%ymm4,%ymm6,%ymm2
+	vshufpd $7,(%rcx),%ymm6,%ymm2
+	vshufps $7,%ymm4,%ymm6,%ymm2
+	vshufps $7,(%rcx),%ymm6,%ymm2
 
 # Tests for op ymm, ymm/mem256, ymm, ymm
 	vblendvpd %ymm4,%ymm6,%ymm2,%ymm7
@@ -297,59 +297,13 @@ _start:
 	vblendvps %ymm4,%ymm6,%ymm2,%ymm7
 	vblendvps %ymm4,(%rcx),%ymm2,%ymm7
 
-# Tests for op ymm/mem256, ymm, ymm, ymm
-# Tests for op ymm, ymm/mem256, ymm, ymm
-	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-	vfmaddpd (%rcx),%ymm6,%ymm2,%ymm7
-	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
-	vfmaddps (%rcx),%ymm6,%ymm2,%ymm7
-	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
-	vfmaddsubpd (%rcx),%ymm6,%ymm2,%ymm7
-	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
-	vfmaddsubps (%rcx),%ymm6,%ymm2,%ymm7
-	vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
-	vfmsubaddpd (%rcx),%ymm6,%ymm2,%ymm7
-	vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
-	vfmsubaddps (%rcx),%ymm6,%ymm2,%ymm7
-	vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-	vfmsubpd (%rcx),%ymm6,%ymm2,%ymm7
-	vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
-	vfmsubps (%rcx),%ymm6,%ymm2,%ymm7
-	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-	vfnmaddpd (%rcx),%ymm6,%ymm2,%ymm7
-	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
-	vfnmaddps (%rcx),%ymm6,%ymm2,%ymm7
-	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-	vfnmsubpd (%rcx),%ymm6,%ymm2,%ymm7
-	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
-	vfnmsubps (%rcx),%ymm6,%ymm2,%ymm7
-	vpermilmo2pd %ymm4,%ymm6,%ymm2,%ymm7
-	vpermilmo2pd (%rcx),%ymm6,%ymm2,%ymm7
-	vpermilmz2pd %ymm4,%ymm6,%ymm2,%ymm7
-	vpermilmz2pd (%rcx),%ymm6,%ymm2,%ymm7
-	vpermiltd2pd %ymm4,%ymm6,%ymm2,%ymm7
-	vpermiltd2pd (%rcx),%ymm6,%ymm2,%ymm7
-	vpermilmo2ps %ymm4,%ymm6,%ymm2,%ymm7
-	vpermilmo2ps (%rcx),%ymm6,%ymm2,%ymm7
-	vpermilmz2ps %ymm4,%ymm6,%ymm2,%ymm7
-	vpermilmz2ps (%rcx),%ymm6,%ymm2,%ymm7
-	vpermiltd2ps %ymm4,%ymm6,%ymm2,%ymm7
-	vpermiltd2ps (%rcx),%ymm6,%ymm2,%ymm7
-
-# Tests for op imm4, ymm/mem256, ymm, ymm, ymm
-# Tests for op imm4, ymm, ymm/mem256, ymm, ymm
-	vpermil2pd $10,%ymm4,%ymm6,%ymm2,%ymm7
-	vpermil2pd $10,(%rcx),%ymm6,%ymm2,%ymm7
-	vpermil2ps $10,%ymm4,%ymm6,%ymm2,%ymm7
-	vpermil2ps $10,(%rcx),%ymm6,%ymm2,%ymm7
-
 # Tests for op imm8, xmm/mem128, ymm, ymm
-	vinsertf128 $100,%xmm4,%ymm4,%ymm6
-	vinsertf128 $100,(%rcx),%ymm4,%ymm6
+	vinsertf128 $7,%xmm4,%ymm4,%ymm6
+	vinsertf128 $7,(%rcx),%ymm4,%ymm6
 
 # Tests for op imm8, ymm, xmm/mem128
-	vextractf128 $100,%ymm4,%xmm4
-	vextractf128 $100,%ymm4,(%rcx)
+	vextractf128 $7,%ymm4,%xmm4
+	vextractf128 $7,%ymm4,(%rcx)
 
 # Tests for op mem128, ymm
 	vbroadcastf128 (%rcx),%ymm4
@@ -808,58 +762,58 @@ _start:
 	vmaskmovpd (%rcx),%xmm4,%xmm6
 
 # Tests for op imm8, xmm/mem128, xmm
-	vaeskeygenassist $100,%xmm4,%xmm6
-	vaeskeygenassist $100,(%rcx),%xmm6
-	vpcmpestri $100,%xmm4,%xmm6
-	vpcmpestri $100,(%rcx),%xmm6
-	vpcmpestrm $100,%xmm4,%xmm6
-	vpcmpestrm $100,(%rcx),%xmm6
-	vpcmpistri $100,%xmm4,%xmm6
-	vpcmpistri $100,(%rcx),%xmm6
-	vpcmpistrm $100,%xmm4,%xmm6
-	vpcmpistrm $100,(%rcx),%xmm6
-	vpermilpd $100,%xmm4,%xmm6
-	vpermilpd $100,(%rcx),%xmm6
-	vpermilps $100,%xmm4,%xmm6
-	vpermilps $100,(%rcx),%xmm6
-	vpshufd $100,%xmm4,%xmm6
-	vpshufd $100,(%rcx),%xmm6
-	vpshufhw $100,%xmm4,%xmm6
-	vpshufhw $100,(%rcx),%xmm6
-	vpshuflw $100,%xmm4,%xmm6
-	vpshuflw $100,(%rcx),%xmm6
-	vroundpd $100,%xmm4,%xmm6
-	vroundpd $100,(%rcx),%xmm6
-	vroundps $100,%xmm4,%xmm6
-	vroundps $100,(%rcx),%xmm6
+	vaeskeygenassist $7,%xmm4,%xmm6
+	vaeskeygenassist $7,(%rcx),%xmm6
+	vpcmpestri $7,%xmm4,%xmm6
+	vpcmpestri $7,(%rcx),%xmm6
+	vpcmpestrm $7,%xmm4,%xmm6
+	vpcmpestrm $7,(%rcx),%xmm6
+	vpcmpistri $7,%xmm4,%xmm6
+	vpcmpistri $7,(%rcx),%xmm6
+	vpcmpistrm $7,%xmm4,%xmm6
+	vpcmpistrm $7,(%rcx),%xmm6
+	vpermilpd $7,%xmm4,%xmm6
+	vpermilpd $7,(%rcx),%xmm6
+	vpermilps $7,%xmm4,%xmm6
+	vpermilps $7,(%rcx),%xmm6
+	vpshufd $7,%xmm4,%xmm6
+	vpshufd $7,(%rcx),%xmm6
+	vpshufhw $7,%xmm4,%xmm6
+	vpshufhw $7,(%rcx),%xmm6
+	vpshuflw $7,%xmm4,%xmm6
+	vpshuflw $7,(%rcx),%xmm6
+	vroundpd $7,%xmm4,%xmm6
+	vroundpd $7,(%rcx),%xmm6
+	vroundps $7,%xmm4,%xmm6
+	vroundps $7,(%rcx),%xmm6
 
 # Tests for op xmm, xmm, mem128
 	vmaskmovps %xmm4,%xmm6,(%rcx)
 	vmaskmovpd %xmm4,%xmm6,(%rcx)
 
 # Tests for op imm8, xmm/mem128, xmm, xmm
-	vblendpd $100,%xmm4,%xmm6,%xmm2
-	vblendpd $100,(%rcx),%xmm6,%xmm2
-	vblendps $100,%xmm4,%xmm6,%xmm2
-	vblendps $100,(%rcx),%xmm6,%xmm2
-	vcmppd $100,%xmm4,%xmm6,%xmm2
-	vcmppd $100,(%rcx),%xmm6,%xmm2
-	vcmpps $100,%xmm4,%xmm6,%xmm2
-	vcmpps $100,(%rcx),%xmm6,%xmm2
-	vdppd $100,%xmm4,%xmm6,%xmm2
-	vdppd $100,(%rcx),%xmm6,%xmm2
-	vdpps $100,%xmm4,%xmm6,%xmm2
-	vdpps $100,(%rcx),%xmm6,%xmm2
-	vmpsadbw $100,%xmm4,%xmm6,%xmm2
-	vmpsadbw $100,(%rcx),%xmm6,%xmm2
-	vpalignr $100,%xmm4,%xmm6,%xmm2
-	vpalignr $100,(%rcx),%xmm6,%xmm2
-	vpblendw $100,%xmm4,%xmm6,%xmm2
-	vpblendw $100,(%rcx),%xmm6,%xmm2
-	vshufpd $100,%xmm4,%xmm6,%xmm2
-	vshufpd $100,(%rcx),%xmm6,%xmm2
-	vshufps $100,%xmm4,%xmm6,%xmm2
-	vshufps $100,(%rcx),%xmm6,%xmm2
+	vblendpd $7,%xmm4,%xmm6,%xmm2
+	vblendpd $7,(%rcx),%xmm6,%xmm2
+	vblendps $7,%xmm4,%xmm6,%xmm2
+	vblendps $7,(%rcx),%xmm6,%xmm2
+	vcmppd $7,%xmm4,%xmm6,%xmm2
+	vcmppd $7,(%rcx),%xmm6,%xmm2
+	vcmpps $7,%xmm4,%xmm6,%xmm2
+	vcmpps $7,(%rcx),%xmm6,%xmm2
+	vdppd $7,%xmm4,%xmm6,%xmm2
+	vdppd $7,(%rcx),%xmm6,%xmm2
+	vdpps $7,%xmm4,%xmm6,%xmm2
+	vdpps $7,(%rcx),%xmm6,%xmm2
+	vmpsadbw $7,%xmm4,%xmm6,%xmm2
+	vmpsadbw $7,(%rcx),%xmm6,%xmm2
+	vpalignr $7,%xmm4,%xmm6,%xmm2
+	vpalignr $7,(%rcx),%xmm6,%xmm2
+	vpblendw $7,%xmm4,%xmm6,%xmm2
+	vpblendw $7,(%rcx),%xmm6,%xmm2
+	vshufpd $7,%xmm4,%xmm6,%xmm2
+	vshufpd $7,(%rcx),%xmm6,%xmm2
+	vshufps $7,%xmm4,%xmm6,%xmm2
+	vshufps $7,(%rcx),%xmm6,%xmm2
 
 # Tests for op xmm, xmm/mem128, xmm, xmm
 	vblendvpd %xmm4,%xmm6,%xmm2,%xmm7
@@ -869,72 +823,6 @@ _start:
 	vpblendvb %xmm4,%xmm6,%xmm2,%xmm7
 	vpblendvb %xmm4,(%rcx),%xmm2,%xmm7
 
-# Tests for op xmm/mem128, xmm, xmm, xmm
-# Tests for op xmm, xmm/mem128, xmm, xmm
-	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-	vfmaddpd (%rcx),%xmm6,%xmm2,%xmm7
-	vfmaddpd %xmm4,(%rcx),%xmm2,%xmm7
-	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
-	vfmaddps (%rcx),%xmm6,%xmm2,%xmm7
-	vfmaddps %xmm4,(%rcx),%xmm2,%xmm7
-	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
-	vfmaddsubpd (%rcx),%xmm6,%xmm2,%xmm7
-	vfmaddsubpd %xmm4,(%rcx),%xmm2,%xmm7
-	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
-	vfmaddsubps (%rcx),%xmm6,%xmm2,%xmm7
-	vfmaddsubps %xmm4,(%rcx),%xmm2,%xmm7
-	vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
-	vfmsubaddpd (%rcx),%xmm6,%xmm2,%xmm7
-	vfmsubaddpd %xmm4,(%rcx),%xmm2,%xmm7
-	vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
-	vfmsubaddps (%rcx),%xmm6,%xmm2,%xmm7
-	vfmsubaddps %xmm4,(%rcx),%xmm2,%xmm7
-	vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-	vfmsubpd (%rcx),%xmm6,%xmm2,%xmm7
-	vfmsubpd %xmm4,(%rcx),%xmm2,%xmm7
-	vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
-	vfmsubps (%rcx),%xmm6,%xmm2,%xmm7
-	vfmsubps %xmm4,(%rcx),%xmm2,%xmm7
-	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmaddpd (%rcx),%xmm6,%xmm2,%xmm7
-	vfnmaddpd %xmm4,(%rcx),%xmm2,%xmm7
-	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmaddps (%rcx),%xmm6,%xmm2,%xmm7
-	vfnmaddps %xmm4,(%rcx),%xmm2,%xmm7
-	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmsubpd (%rcx),%xmm6,%xmm2,%xmm7
-	vfnmsubpd %xmm4,(%rcx),%xmm2,%xmm7
-	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmsubps (%rcx),%xmm6,%xmm2,%xmm7
-	vfnmsubps %xmm4,(%rcx),%xmm2,%xmm7
-	vpermilmo2pd %xmm4,%xmm6,%xmm2,%xmm7
-	vpermilmo2pd (%rcx),%xmm6,%xmm2,%xmm7
-	vpermilmo2pd %xmm4,(%rcx),%xmm2,%xmm7
-	vpermilmz2pd %xmm4,%xmm6,%xmm2,%xmm7
-	vpermilmz2pd (%rcx),%xmm6,%xmm2,%xmm7
-	vpermilmz2pd %xmm4,(%rcx),%xmm2,%xmm7
-	vpermiltd2pd %xmm4,%xmm6,%xmm2,%xmm7
-	vpermiltd2pd (%rcx),%xmm6,%xmm2,%xmm7
-	vpermiltd2pd %xmm4,(%rcx),%xmm2,%xmm7
-	vpermilmo2ps %xmm4,%xmm6,%xmm2,%xmm7
-	vpermilmo2ps (%rcx),%xmm6,%xmm2,%xmm7
-	vpermilmo2ps %xmm4,(%rcx),%xmm2,%xmm7
-	vpermilmz2ps %xmm4,%xmm6,%xmm2,%xmm7
-	vpermilmz2ps (%rcx),%xmm6,%xmm2,%xmm7
-	vpermilmz2ps %xmm4,(%rcx),%xmm2,%xmm7
-	vpermiltd2ps %xmm4,%xmm6,%xmm2,%xmm7
-	vpermiltd2ps (%rcx),%xmm6,%xmm2,%xmm7
-	vpermiltd2ps %xmm4,(%rcx),%xmm2,%xmm7
-
-# Tests for op imm4, xmm/mem128, xmm, xmm, xmm
-# Tests for op imm4, xmm, xmm/mem128, xmm, xmm
-	vpermil2pd $10,%xmm4,%xmm6,%xmm2,%xmm7
-	vpermil2pd $10,(%rcx),%xmm6,%xmm2,%xmm7
-	vpermil2pd $10,%xmm4,(%rcx),%xmm2,%xmm7
-	vpermil2ps $10,%xmm4,%xmm6,%xmm2,%xmm7
-	vpermil2ps $10,(%rcx),%xmm6,%xmm2,%xmm7
-	vpermil2ps $10,%xmm4,(%rcx),%xmm2,%xmm7
-
 # Tests for op mem64, ymm
 	vbroadcastsd (%rcx),%ymm4
 
@@ -1000,12 +888,12 @@ _start:
 	vcvtsi2ssq (%rcx),%xmm4,%xmm6
 
 # Tests for op imm8, regq/mem64, xmm, xmm
-	vpinsrq $100,%rcx,%xmm4,%xmm6
-	vpinsrq $100,(%rcx),%xmm4,%xmm6
+	vpinsrq $7,%rcx,%xmm4,%xmm6
+	vpinsrq $7,(%rcx),%xmm4,%xmm6
 
 # Testsf for op imm8, xmm, regq/mem64
-	vpextrq $100,%xmm4,%rcx
-	vpextrq $100,%xmm4,(%rcx)
+	vpextrq $7,%xmm4,%rcx
+	vpextrq $7,%xmm4,(%rcx)
 
 # Tests for op mem64, xmm, xmm
 	vmovlpd (%rcx),%xmm4,%xmm6
@@ -1014,25 +902,10 @@ _start:
 	vmovhps (%rcx),%xmm4,%xmm6
 
 # Tests for op imm8, xmm/mem64, xmm, xmm
-	vcmpsd $100,%xmm4,%xmm6,%xmm2
-	vcmpsd $100,(%rcx),%xmm6,%xmm2
-	vroundsd $100,%xmm4,%xmm6,%xmm2
-	vroundsd $100,(%rcx),%xmm6,%xmm2
-
-# Tests for op xmm/mem64, xmm, xmm, xmm
-# Tests for op xmm, xmm/mem64, xmm, xmm
-	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-	vfmaddsd (%rcx),%xmm6,%xmm2,%xmm7
-	vfmaddsd %xmm4,(%rcx),%xmm2,%xmm7
-	vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-	vfmsubsd (%rcx),%xmm6,%xmm2,%xmm7
-	vfmsubsd %xmm4,(%rcx),%xmm2,%xmm7
-	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmaddsd (%rcx),%xmm6,%xmm2,%xmm7
-	vfnmaddsd %xmm4,(%rcx),%xmm2,%xmm7
-	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmsubsd (%rcx),%xmm6,%xmm2,%xmm7
-	vfnmsubsd %xmm4,(%rcx),%xmm2,%xmm7
+	vcmpsd $7,%xmm4,%xmm6,%xmm2
+	vcmpsd $7,(%rcx),%xmm6,%xmm2
+	vroundsd $7,%xmm4,%xmm6,%xmm2
+	vroundsd $7,(%rcx),%xmm6,%xmm2
 
 # Tests for op xmm/mem64, xmm, xmm
 	vaddsd %xmm4,%xmm6,%xmm2
@@ -1116,6 +989,10 @@ _start:
 	vcmptrue_ussd %xmm4,%xmm6,%xmm2
 	vcmptrue_ussd (%rcx),%xmm6,%xmm2
 
+# Tests for op mem64
+	vldmxcsr (%rcx)
+	vstmxcsr (%rcx)
+
 # Tests for op xmm/mem32, xmm, xmm
 	vaddss %xmm4,%xmm6,%xmm2
 	vaddss (%rcx),%xmm6,%xmm2
@@ -1251,13 +1128,14 @@ _start:
 	vpmovmskb %xmm4,%rcx
 
 # Tests for op imm8, xmm, regq/mem32
-	vextractps $100,%xmm4,%rcx
-	vextractps $100,%xmm4,(%rcx)
+	vextractps $7,%xmm4,%rcx
+	vextractps $7,%xmm4,(%rcx)
+
 # Tests for op imm8, xmm, regl/mem32
-	vpextrd $100,%xmm4,%ecx
-	vpextrd $100,%xmm4,(%rcx)
-	vextractps $100,%xmm4,%ecx
-	vextractps $100,%xmm4,(%rcx)
+	vpextrd $7,%xmm4,%ecx
+	vpextrd $7,%xmm4,(%rcx)
+	vextractps $7,%xmm4,%ecx
+	vextractps $7,%xmm4,(%rcx)
 
 # Tests for op regl/mem32, xmm, xmm
 	vcvtsi2sd %ecx,%xmm4,%xmm6
@@ -1266,27 +1144,12 @@ _start:
 	vcvtsi2ss (%rcx),%xmm4,%xmm6
 
 # Tests for op imm8, xmm/mem32, xmm, xmm
-	vcmpss $100,%xmm4,%xmm6,%xmm2
-	vcmpss $100,(%rcx),%xmm6,%xmm2
-	vinsertps $100,%xmm4,%xmm6,%xmm2
-	vinsertps $100,(%rcx),%xmm6,%xmm2
-	vroundss $100,%xmm4,%xmm6,%xmm2
-	vroundss $100,(%rcx),%xmm6,%xmm2
-
-# Tests for op xmm/mem32, xmm, xmm, xmm
-# Tests for op xmm, xmm/mem32, xmm, xmm
-	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
-	vfmaddss (%rcx),%xmm6,%xmm2,%xmm7
-	vfmaddss %xmm4,(%rcx),%xmm2,%xmm7
-	vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
-	vfmsubss (%rcx),%xmm6,%xmm2,%xmm7
-	vfmsubss %xmm4,(%rcx),%xmm2,%xmm7
-	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmaddss (%rcx),%xmm6,%xmm2,%xmm7
-	vfnmaddss %xmm4,(%rcx),%xmm2,%xmm7
-	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
-	vfnmsubss (%rcx),%xmm6,%xmm2,%xmm7
-	vfnmsubss %xmm4,(%rcx),%xmm2,%xmm7
+	vcmpss $7,%xmm4,%xmm6,%xmm2
+	vcmpss $7,(%rcx),%xmm6,%xmm2
+	vinsertps $7,%xmm4,%xmm6,%xmm2
+	vinsertps $7,(%rcx),%xmm6,%xmm2
+	vroundss $7,%xmm4,%xmm6,%xmm2
+	vroundss $7,(%rcx),%xmm6,%xmm2
 
 # Tests for op xmm/m16, xmm
 	vpmovsxbq %xmm4,%xmm6
@@ -1295,38 +1158,39 @@ _start:
 	vpmovzxbq (%rcx),%xmm4
 
 # Tests for op imm8, xmm, regl/mem16
-	vpextrw $100,%xmm4,%ecx
-	vpextrw $100,%xmm4,(%rcx)
+	vpextrw $7,%xmm4,%ecx
+	vpextrw $7,%xmm4,(%rcx)
 
 # Tests for op imm8, xmm, regq/mem16
-	vpextrw $100,%xmm4,%rcx
-	vpextrw $100,%xmm4,(%rcx)
+	vpextrw $7,%xmm4,%rcx
+	vpextrw $7,%xmm4,(%rcx)
 
 # Tests for op imm8, regl/mem16, xmm, xmm
-	vpinsrw $100,%ecx,%xmm4,%xmm6
-	vpinsrw $100,(%rcx),%xmm4,%xmm6
+	vpinsrw $7,%ecx,%xmm4,%xmm6
+	vpinsrw $7,(%rcx),%xmm4,%xmm6
 
 
-	vpinsrw $100,%rcx,%xmm4,%xmm6
-	vpinsrw $100,(%rcx),%xmm4,%xmm6
+	vpinsrw $7,%rcx,%xmm4,%xmm6
+	vpinsrw $7,(%rcx),%xmm4,%xmm6
 
 # Tests for op imm8, xmm, regl/mem8
-	vpextrb $100,%xmm4,%ecx
-	vpextrb $100,%xmm4,(%rcx)
+	vpextrb $7,%xmm4,%ecx
+	vpextrb $7,%xmm4,(%rcx)
 
 # Tests for op imm8, regl/mem8, xmm, xmm
-	vpinsrb $100,%ecx,%xmm4,%xmm6
-	vpinsrb $100,(%rcx),%xmm4,%xmm6
+	vpinsrb $7,%ecx,%xmm4,%xmm6
+	vpinsrb $7,(%rcx),%xmm4,%xmm6
 
 # Tests for op imm8, xmm, regq
-	vpextrw $100,%xmm4,%rcx
+	vpextrw $7,%xmm4,%rcx
+
 # Tests for op imm8, xmm, regq/mem8
-	vpextrb $100,%xmm4,%rcx
-	vpextrb $100,%xmm4,(%rcx)
+	vpextrb $7,%xmm4,%rcx
+	vpextrb $7,%xmm4,(%rcx)
 
 # Tests for op imm8, regl/mem8, xmm, xmm
-	vpinsrb $100,%ecx,%xmm4,%xmm6
-	vpinsrb $100,(%rcx),%xmm4,%xmm6
+	vpinsrb $7,%ecx,%xmm4,%xmm6
+	vpinsrb $7,(%rcx),%xmm4,%xmm6
 
 # Tests for op xmm, xmm
 	vmaskmovdqu %xmm4,%xmm6
@@ -1336,6 +1200,7 @@ _start:
 	vmovmskpd %xmm4,%ecx
 	vmovmskps %xmm4,%ecx
 	vpmovmskb %xmm4,%ecx
+
 # Tests for op xmm, xmm, xmm
 	vmovhlps %xmm4,%xmm6,%xmm2
 	vmovlhps %xmm4,%xmm6,%xmm2
@@ -1343,19 +1208,19 @@ _start:
 	vmovss %xmm4,%xmm6,%xmm2
 
 # Tests for op imm8, xmm, xmm
-	vpslld $100,%xmm4,%xmm6
-	vpslldq $100,%xmm4,%xmm6
-	vpsllq $100,%xmm4,%xmm6
-	vpsllw $100,%xmm4,%xmm6
-	vpsrad $100,%xmm4,%xmm6
-	vpsraw $100,%xmm4,%xmm6
-	vpsrld $100,%xmm4,%xmm6
-	vpsrldq $100,%xmm4,%xmm6
-	vpsrlq $100,%xmm4,%xmm6
-	vpsrlw $100,%xmm4,%xmm6
+	vpslld $7,%xmm4,%xmm6
+	vpslldq $7,%xmm4,%xmm6
+	vpsllq $7,%xmm4,%xmm6
+	vpsllw $7,%xmm4,%xmm6
+	vpsrad $7,%xmm4,%xmm6
+	vpsraw $7,%xmm4,%xmm6
+	vpsrld $7,%xmm4,%xmm6
+	vpsrldq $7,%xmm4,%xmm6
+	vpsrlq $7,%xmm4,%xmm6
+	vpsrlw $7,%xmm4,%xmm6
 
 # Tests for op imm8, xmm, regl
-	vpextrw $100,%xmm4,%ecx
+	vpextrw $7,%xmm4,%ecx
 
 # Tests for op ymm, regl
 	vmovmskpd %ymm4,%ecx
@@ -1365,7 +1230,6 @@ _start:
 	vmovmskpd %ymm4,%rcx
 	vmovmskps %ymm4,%rcx
 
-
 # Default instructions without suffixes.
 	vcvtpd2dq %xmm4,%xmm6
 	vcvtpd2dq %ymm4,%xmm6
@@ -1383,17 +1247,17 @@ _start:
 	vcvtdq2pd 0x12345678,%ymm8
 	vcvtpd2psy 0x12345678,%xmm8
 	vpavgb 0x12345678,%xmm8,%xmm15
-	vaeskeygenassist $100,0x12345678,%xmm8
-	vpextrb $100,%xmm8,0x12345678
+	vaeskeygenassist $7,0x12345678,%xmm8
+	vpextrb $7,%xmm8,0x12345678
 	vcvtsi2sdl 0x12345678,%xmm8,%xmm15
 	vblendvps %xmm8,0x12345678,%xmm12,%xmm14
-	vpinsrb $100,0x12345678,%xmm8,%xmm15
+	vpinsrb $7,0x12345678,%xmm8,%xmm15
 	vmovdqa 0x12345678,%ymm8
 	vmovdqa %ymm8,0x12345678
 	vpermilpd 0x12345678,%ymm8,%ymm15
-	vroundpd $100,0x12345678,%ymm8
-	vextractf128 $100,%ymm8,0x12345678
-	vperm2f128 $100,0x12345678,%ymm8,%ymm15
+	vroundpd $7,0x12345678,%ymm8
+	vextractf128 $7,%ymm8,0x12345678
+	vperm2f128 $7,0x12345678,%ymm8,%ymm15
 	vblendvpd %ymm8,0x12345678,%ymm12,%ymm14
 	vldmxcsr (%rbp)
 	vmovdqa (%rbp),%xmm8
@@ -1403,17 +1267,17 @@ _start:
 	vcvtdq2pd (%rbp),%ymm8
 	vcvtpd2psy (%rbp),%xmm8
 	vpavgb (%rbp),%xmm8,%xmm15
-	vaeskeygenassist $100,(%rbp),%xmm8
-	vpextrb $100,%xmm8,(%rbp)
+	vaeskeygenassist $7,(%rbp),%xmm8
+	vpextrb $7,%xmm8,(%rbp)
 	vcvtsi2sdl (%rbp),%xmm8,%xmm15
 	vblendvps %xmm8,(%rbp),%xmm12,%xmm14
-	vpinsrb $100,(%rbp),%xmm8,%xmm15
+	vpinsrb $7,(%rbp),%xmm8,%xmm15
 	vmovdqa (%rbp),%ymm8
 	vmovdqa %ymm8,(%rbp)
 	vpermilpd (%rbp),%ymm8,%ymm15
-	vroundpd $100,(%rbp),%ymm8
-	vextractf128 $100,%ymm8,(%rbp)
-	vperm2f128 $100,(%rbp),%ymm8,%ymm15
+	vroundpd $7,(%rbp),%ymm8
+	vextractf128 $7,%ymm8,(%rbp)
+	vperm2f128 $7,(%rbp),%ymm8,%ymm15
 	vblendvpd %ymm8,(%rbp),%ymm12,%ymm14
 	vldmxcsr (%rsp)
 	vmovdqa (%rsp),%xmm8
@@ -1423,17 +1287,17 @@ _start:
 	vcvtdq2pd (%rsp),%ymm8
 	vcvtpd2psy (%rsp),%xmm8
 	vpavgb (%rsp),%xmm8,%xmm15
-	vaeskeygenassist $100,(%rsp),%xmm8
-	vpextrb $100,%xmm8,(%rsp)
+	vaeskeygenassist $7,(%rsp),%xmm8
+	vpextrb $7,%xmm8,(%rsp)
 	vcvtsi2sdl (%rsp),%xmm8,%xmm15
 	vblendvps %xmm8,(%rsp),%xmm12,%xmm14
-	vpinsrb $100,(%rsp),%xmm8,%xmm15
+	vpinsrb $7,(%rsp),%xmm8,%xmm15
 	vmovdqa (%rsp),%ymm8
 	vmovdqa %ymm8,(%rsp)
 	vpermilpd (%rsp),%ymm8,%ymm15
-	vroundpd $100,(%rsp),%ymm8
-	vextractf128 $100,%ymm8,(%rsp)
-	vperm2f128 $100,(%rsp),%ymm8,%ymm15
+	vroundpd $7,(%rsp),%ymm8
+	vextractf128 $7,%ymm8,(%rsp)
+	vperm2f128 $7,(%rsp),%ymm8,%ymm15
 	vblendvpd %ymm8,(%rsp),%ymm12,%ymm14
 	vldmxcsr 0x99(%rbp)
 	vmovdqa 0x99(%rbp),%xmm8
@@ -1443,17 +1307,17 @@ _start:
 	vcvtdq2pd 0x99(%rbp),%ymm8
 	vcvtpd2psy 0x99(%rbp),%xmm8
 	vpavgb 0x99(%rbp),%xmm8,%xmm15
-	vaeskeygenassist $100,0x99(%rbp),%xmm8
-	vpextrb $100,%xmm8,0x99(%rbp)
+	vaeskeygenassist $7,0x99(%rbp),%xmm8
+	vpextrb $7,%xmm8,0x99(%rbp)
 	vcvtsi2sdl 0x99(%rbp),%xmm8,%xmm15
 	vblendvps %xmm8,0x99(%rbp),%xmm12,%xmm14
-	vpinsrb $100,0x99(%rbp),%xmm8,%xmm15
+	vpinsrb $7,0x99(%rbp),%xmm8,%xmm15
 	vmovdqa 0x99(%rbp),%ymm8
 	vmovdqa %ymm8,0x99(%rbp)
 	vpermilpd 0x99(%rbp),%ymm8,%ymm15
-	vroundpd $100,0x99(%rbp),%ymm8
-	vextractf128 $100,%ymm8,0x99(%rbp)
-	vperm2f128 $100,0x99(%rbp),%ymm8,%ymm15
+	vroundpd $7,0x99(%rbp),%ymm8
+	vextractf128 $7,%ymm8,0x99(%rbp)
+	vperm2f128 $7,0x99(%rbp),%ymm8,%ymm15
 	vblendvpd %ymm8,0x99(%rbp),%ymm12,%ymm14
 	vldmxcsr 0x99(%r15)
 	vmovdqa 0x99(%r15),%xmm8
@@ -1463,17 +1327,17 @@ _start:
 	vcvtdq2pd 0x99(%r15),%ymm8
 	vcvtpd2psy 0x99(%r15),%xmm8
 	vpavgb 0x99(%r15),%xmm8,%xmm15
-	vaeskeygenassist $100,0x99(%r15),%xmm8
-	vpextrb $100,%xmm8,0x99(%r15)
+	vaeskeygenassist $7,0x99(%r15),%xmm8
+	vpextrb $7,%xmm8,0x99(%r15)
 	vcvtsi2sdl 0x99(%r15),%xmm8,%xmm15
 	vblendvps %xmm8,0x99(%r15),%xmm12,%xmm14
-	vpinsrb $100,0x99(%r15),%xmm8,%xmm15
+	vpinsrb $7,0x99(%r15),%xmm8,%xmm15
 	vmovdqa 0x99(%r15),%ymm8
 	vmovdqa %ymm8,0x99(%r15)
 	vpermilpd 0x99(%r15),%ymm8,%ymm15
-	vroundpd $100,0x99(%r15),%ymm8
-	vextractf128 $100,%ymm8,0x99(%r15)
-	vperm2f128 $100,0x99(%r15),%ymm8,%ymm15
+	vroundpd $7,0x99(%r15),%ymm8
+	vextractf128 $7,%ymm8,0x99(%r15)
+	vperm2f128 $7,0x99(%r15),%ymm8,%ymm15
 	vblendvpd %ymm8,0x99(%r15),%ymm12,%ymm14
 	vldmxcsr 0x99(%rip)
 	vmovdqa 0x99(%rip),%xmm8
@@ -1483,17 +1347,17 @@ _start:
 	vcvtdq2pd 0x99(%rip),%ymm8
 	vcvtpd2psy 0x99(%rip),%xmm8
 	vpavgb 0x99(%rip),%xmm8,%xmm15
-	vaeskeygenassist $100,0x99(%rip),%xmm8
-	vpextrb $100,%xmm8,0x99(%rip)
+	vaeskeygenassist $7,0x99(%rip),%xmm8
+	vpextrb $7,%xmm8,0x99(%rip)
 	vcvtsi2sdl 0x99(%rip),%xmm8,%xmm15
 	vblendvps %xmm8,0x99(%rip),%xmm12,%xmm14
-	vpinsrb $100,0x99(%rip),%xmm8,%xmm15
+	vpinsrb $7,0x99(%rip),%xmm8,%xmm15
 	vmovdqa 0x99(%rip),%ymm8
 	vmovdqa %ymm8,0x99(%rip)
 	vpermilpd 0x99(%rip),%ymm8,%ymm15
-	vroundpd $100,0x99(%rip),%ymm8
-	vextractf128 $100,%ymm8,0x99(%rip)
-	vperm2f128 $100,0x99(%rip),%ymm8,%ymm15
+	vroundpd $7,0x99(%rip),%ymm8
+	vextractf128 $7,%ymm8,0x99(%rip)
+	vperm2f128 $7,0x99(%rip),%ymm8,%ymm15
 	vblendvpd %ymm8,0x99(%rip),%ymm12,%ymm14
 	vldmxcsr 0x99(%rsp)
 	vmovdqa 0x99(%rsp),%xmm8
@@ -1503,17 +1367,17 @@ _start:
 	vcvtdq2pd 0x99(%rsp),%ymm8
 	vcvtpd2psy 0x99(%rsp),%xmm8
 	vpavgb 0x99(%rsp),%xmm8,%xmm15
-	vaeskeygenassist $100,0x99(%rsp),%xmm8
-	vpextrb $100,%xmm8,0x99(%rsp)
+	vaeskeygenassist $7,0x99(%rsp),%xmm8
+	vpextrb $7,%xmm8,0x99(%rsp)
 	vcvtsi2sdl 0x99(%rsp),%xmm8,%xmm15
 	vblendvps %xmm8,0x99(%rsp),%xmm12,%xmm14
-	vpinsrb $100,0x99(%rsp),%xmm8,%xmm15
+	vpinsrb $7,0x99(%rsp),%xmm8,%xmm15
 	vmovdqa 0x99(%rsp),%ymm8
 	vmovdqa %ymm8,0x99(%rsp)
 	vpermilpd 0x99(%rsp),%ymm8,%ymm15
-	vroundpd $100,0x99(%rsp),%ymm8
-	vextractf128 $100,%ymm8,0x99(%rsp)
-	vperm2f128 $100,0x99(%rsp),%ymm8,%ymm15
+	vroundpd $7,0x99(%rsp),%ymm8
+	vextractf128 $7,%ymm8,0x99(%rsp)
+	vperm2f128 $7,0x99(%rsp),%ymm8,%ymm15
 	vblendvpd %ymm8,0x99(%rsp),%ymm12,%ymm14
 	vldmxcsr 0x99(%r12)
 	vmovdqa 0x99(%r12),%xmm8
@@ -1523,17 +1387,17 @@ _start:
 	vcvtdq2pd 0x99(%r12),%ymm8
 	vcvtpd2psy 0x99(%r12),%xmm8
 	vpavgb 0x99(%r12),%xmm8,%xmm15
-	vaeskeygenassist $100,0x99(%r12),%xmm8
-	vpextrb $100,%xmm8,0x99(%r12)
+	vaeskeygenassist $7,0x99(%r12),%xmm8
+	vpextrb $7,%xmm8,0x99(%r12)
 	vcvtsi2sdl 0x99(%r12),%xmm8,%xmm15
 	vblendvps %xmm8,0x99(%r12),%xmm12,%xmm14
-	vpinsrb $100,0x99(%r12),%xmm8,%xmm15
+	vpinsrb $7,0x99(%r12),%xmm8,%xmm15
 	vmovdqa 0x99(%r12),%ymm8
 	vmovdqa %ymm8,0x99(%r12)
 	vpermilpd 0x99(%r12),%ymm8,%ymm15
-	vroundpd $100,0x99(%r12),%ymm8
-	vextractf128 $100,%ymm8,0x99(%r12)
-	vperm2f128 $100,0x99(%r12),%ymm8,%ymm15
+	vroundpd $7,0x99(%r12),%ymm8
+	vextractf128 $7,%ymm8,0x99(%r12)
+	vperm2f128 $7,0x99(%r12),%ymm8,%ymm15
 	vblendvpd %ymm8,0x99(%r12),%ymm12,%ymm14
 	vldmxcsr -0x99(,%riz)
 	vmovdqa -0x99(,%riz),%xmm8
@@ -1543,17 +1407,17 @@ _start:
 	vcvtdq2pd -0x99(,%riz),%ymm8
 	vcvtpd2psy -0x99(,%riz),%xmm8
 	vpavgb -0x99(,%riz),%xmm8,%xmm15
-	vaeskeygenassist $100,-0x99(,%riz),%xmm8
-	vpextrb $100,%xmm8,-0x99(,%riz)
+	vaeskeygenassist $7,-0x99(,%riz),%xmm8
+	vpextrb $7,%xmm8,-0x99(,%riz)
 	vcvtsi2sdl -0x99(,%riz),%xmm8,%xmm15
 	vblendvps %xmm8,-0x99(,%riz),%xmm12,%xmm14
-	vpinsrb $100,-0x99(,%riz),%xmm8,%xmm15
+	vpinsrb $7,-0x99(,%riz),%xmm8,%xmm15
 	vmovdqa -0x99(,%riz),%ymm8
 	vmovdqa %ymm8,-0x99(,%riz)
 	vpermilpd -0x99(,%riz),%ymm8,%ymm15
-	vroundpd $100,-0x99(,%riz),%ymm8
-	vextractf128 $100,%ymm8,-0x99(,%riz)
-	vperm2f128 $100,-0x99(,%riz),%ymm8,%ymm15
+	vroundpd $7,-0x99(,%riz),%ymm8
+	vextractf128 $7,%ymm8,-0x99(,%riz)
+	vperm2f128 $7,-0x99(,%riz),%ymm8,%ymm15
 	vblendvpd %ymm8,-0x99(,%riz),%ymm12,%ymm14
 	vldmxcsr -0x99(,%riz,2)
 	vmovdqa -0x99(,%riz,2),%xmm8
@@ -1563,17 +1427,17 @@ _start:
 	vcvtdq2pd -0x99(,%riz,2),%ymm8
 	vcvtpd2psy -0x99(,%riz,2),%xmm8
 	vpavgb -0x99(,%riz,2),%xmm8,%xmm15
-	vaeskeygenassist $100,-0x99(,%riz,2),%xmm8
-	vpextrb $100,%xmm8,-0x99(,%riz,2)
+	vaeskeygenassist $7,-0x99(,%riz,2),%xmm8
+	vpextrb $7,%xmm8,-0x99(,%riz,2)
 	vcvtsi2sdl -0x99(,%riz,2),%xmm8,%xmm15
 	vblendvps %xmm8,-0x99(,%riz,2),%xmm12,%xmm14
-	vpinsrb $100,-0x99(,%riz,2),%xmm8,%xmm15
+	vpinsrb $7,-0x99(,%riz,2),%xmm8,%xmm15
 	vmovdqa -0x99(,%riz,2),%ymm8
 	vmovdqa %ymm8,-0x99(,%riz,2)
 	vpermilpd -0x99(,%riz,2),%ymm8,%ymm15
-	vroundpd $100,-0x99(,%riz,2),%ymm8
-	vextractf128 $100,%ymm8,-0x99(,%riz,2)
-	vperm2f128 $100,-0x99(,%riz,2),%ymm8,%ymm15
+	vroundpd $7,-0x99(,%riz,2),%ymm8
+	vextractf128 $7,%ymm8,-0x99(,%riz,2)
+	vperm2f128 $7,-0x99(,%riz,2),%ymm8,%ymm15
 	vblendvpd %ymm8,-0x99(,%riz,2),%ymm12,%ymm14
 	vldmxcsr -0x99(%rbx,%riz)
 	vmovdqa -0x99(%rbx,%riz),%xmm8
@@ -1583,17 +1447,17 @@ _start:
 	vcvtdq2pd -0x99(%rbx,%riz),%ymm8
 	vcvtpd2psy -0x99(%rbx,%riz),%xmm8
 	vpavgb -0x99(%rbx,%riz),%xmm8,%xmm15
-	vaeskeygenassist $100,-0x99(%rbx,%riz),%xmm8
-	vpextrb $100,%xmm8,-0x99(%rbx,%riz)
+	vaeskeygenassist $7,-0x99(%rbx,%riz),%xmm8
+	vpextrb $7,%xmm8,-0x99(%rbx,%riz)
 	vcvtsi2sdl -0x99(%rbx,%riz),%xmm8,%xmm15
 	vblendvps %xmm8,-0x99(%rbx,%riz),%xmm12,%xmm14
-	vpinsrb $100,-0x99(%rbx,%riz),%xmm8,%xmm15
+	vpinsrb $7,-0x99(%rbx,%riz),%xmm8,%xmm15
 	vmovdqa -0x99(%rbx,%riz),%ymm8
 	vmovdqa %ymm8,-0x99(%rbx,%riz)
 	vpermilpd -0x99(%rbx,%riz),%ymm8,%ymm15
-	vroundpd $100,-0x99(%rbx,%riz),%ymm8
-	vextractf128 $100,%ymm8,-0x99(%rbx,%riz)
-	vperm2f128 $100,-0x99(%rbx,%riz),%ymm8,%ymm15
+	vroundpd $7,-0x99(%rbx,%riz),%ymm8
+	vextractf128 $7,%ymm8,-0x99(%rbx,%riz)
+	vperm2f128 $7,-0x99(%rbx,%riz),%ymm8,%ymm15
 	vblendvpd %ymm8,-0x99(%rbx,%riz),%ymm12,%ymm14
 	vldmxcsr -0x99(%rbx,%riz,2)
 	vmovdqa -0x99(%rbx,%riz,2),%xmm8
@@ -1603,17 +1467,17 @@ _start:
 	vcvtdq2pd -0x99(%rbx,%riz,2),%ymm8
 	vcvtpd2psy -0x99(%rbx,%riz,2),%xmm8
 	vpavgb -0x99(%rbx,%riz,2),%xmm8,%xmm15
-	vaeskeygenassist $100,-0x99(%rbx,%riz,2),%xmm8
-	vpextrb $100,%xmm8,-0x99(%rbx,%riz,2)
+	vaeskeygenassist $7,-0x99(%rbx,%riz,2),%xmm8
+	vpextrb $7,%xmm8,-0x99(%rbx,%riz,2)
 	vcvtsi2sdl -0x99(%rbx,%riz,2),%xmm8,%xmm15
 	vblendvps %xmm8,-0x99(%rbx,%riz,2),%xmm12,%xmm14
-	vpinsrb $100,-0x99(%rbx,%riz,2),%xmm8,%xmm15
+	vpinsrb $7,-0x99(%rbx,%riz,2),%xmm8,%xmm15
 	vmovdqa -0x99(%rbx,%riz,2),%ymm8
 	vmovdqa %ymm8,-0x99(%rbx,%riz,2)
 	vpermilpd -0x99(%rbx,%riz,2),%ymm8,%ymm15
-	vroundpd $100,-0x99(%rbx,%riz,2),%ymm8
-	vextractf128 $100,%ymm8,-0x99(%rbx,%riz,2)
-	vperm2f128 $100,-0x99(%rbx,%riz,2),%ymm8,%ymm15
+	vroundpd $7,-0x99(%rbx,%riz,2),%ymm8
+	vextractf128 $7,%ymm8,-0x99(%rbx,%riz,2)
+	vperm2f128 $7,-0x99(%rbx,%riz,2),%ymm8,%ymm15
 	vblendvpd %ymm8,-0x99(%rbx,%riz,2),%ymm12,%ymm14
 	vldmxcsr -0x99(%r12,%r15,4)
 	vmovdqa -0x99(%r12,%r15,4),%xmm8
@@ -1623,17 +1487,17 @@ _start:
 	vcvtdq2pd -0x99(%r12,%r15,4),%ymm8
 	vcvtpd2psy -0x99(%r12,%r15,4),%xmm8
 	vpavgb -0x99(%r12,%r15,4),%xmm8,%xmm15
-	vaeskeygenassist $100,-0x99(%r12,%r15,4),%xmm8
-	vpextrb $100,%xmm8,-0x99(%r12,%r15,4)
+	vaeskeygenassist $7,-0x99(%r12,%r15,4),%xmm8
+	vpextrb $7,%xmm8,-0x99(%r12,%r15,4)
 	vcvtsi2sdl -0x99(%r12,%r15,4),%xmm8,%xmm15
 	vblendvps %xmm8,-0x99(%r12,%r15,4),%xmm12,%xmm14
-	vpinsrb $100,-0x99(%r12,%r15,4),%xmm8,%xmm15
+	vpinsrb $7,-0x99(%r12,%r15,4),%xmm8,%xmm15
 	vmovdqa -0x99(%r12,%r15,4),%ymm8
 	vmovdqa %ymm8,-0x99(%r12,%r15,4)
 	vpermilpd -0x99(%r12,%r15,4),%ymm8,%ymm15
-	vroundpd $100,-0x99(%r12,%r15,4),%ymm8
-	vextractf128 $100,%ymm8,-0x99(%r12,%r15,4)
-	vperm2f128 $100,-0x99(%r12,%r15,4),%ymm8,%ymm15
+	vroundpd $7,-0x99(%r12,%r15,4),%ymm8
+	vextractf128 $7,%ymm8,-0x99(%r12,%r15,4)
+	vperm2f128 $7,-0x99(%r12,%r15,4),%ymm8,%ymm15
 	vblendvpd %ymm8,-0x99(%r12,%r15,4),%ymm12,%ymm14
 	vldmxcsr -0x99(%r8,%r15,8)
 	vmovdqa -0x99(%r8,%r15,8),%xmm8
@@ -1643,17 +1507,17 @@ _start:
 	vcvtdq2pd -0x99(%r8,%r15,8),%ymm8
 	vcvtpd2psy -0x99(%r8,%r15,8),%xmm8
 	vpavgb -0x99(%r8,%r15,8),%xmm8,%xmm15
-	vaeskeygenassist $100,-0x99(%r8,%r15,8),%xmm8
-	vpextrb $100,%xmm8,-0x99(%r8,%r15,8)
+	vaeskeygenassist $7,-0x99(%r8,%r15,8),%xmm8
+	vpextrb $7,%xmm8,-0x99(%r8,%r15,8)
 	vcvtsi2sdl -0x99(%r8,%r15,8),%xmm8,%xmm15
 	vblendvps %xmm8,-0x99(%r8,%r15,8),%xmm12,%xmm14
-	vpinsrb $100,-0x99(%r8,%r15,8),%xmm8,%xmm15
+	vpinsrb $7,-0x99(%r8,%r15,8),%xmm8,%xmm15
 	vmovdqa -0x99(%r8,%r15,8),%ymm8
 	vmovdqa %ymm8,-0x99(%r8,%r15,8)
 	vpermilpd -0x99(%r8,%r15,8),%ymm8,%ymm15
-	vroundpd $100,-0x99(%r8,%r15,8),%ymm8
-	vextractf128 $100,%ymm8,-0x99(%r8,%r15,8)
-	vperm2f128 $100,-0x99(%r8,%r15,8),%ymm8,%ymm15
+	vroundpd $7,-0x99(%r8,%r15,8),%ymm8
+	vextractf128 $7,%ymm8,-0x99(%r8,%r15,8)
+	vperm2f128 $7,-0x99(%r8,%r15,8),%ymm8,%ymm15
 	vblendvpd %ymm8,-0x99(%r8,%r15,8),%ymm12,%ymm14
 	vldmxcsr -0x99(%rbp,%r13,4)
 	vmovdqa -0x99(%rbp,%r13,4),%xmm8
@@ -1663,17 +1527,17 @@ _start:
 	vcvtdq2pd -0x99(%rbp,%r13,4),%ymm8
 	vcvtpd2psy -0x99(%rbp,%r13,4),%xmm8
 	vpavgb -0x99(%rbp,%r13,4),%xmm8,%xmm15
-	vaeskeygenassist $100,-0x99(%rbp,%r13,4),%xmm8
-	vpextrb $100,%xmm8,-0x99(%rbp,%r13,4)
+	vaeskeygenassist $7,-0x99(%rbp,%r13,4),%xmm8
+	vpextrb $7,%xmm8,-0x99(%rbp,%r13,4)
 	vcvtsi2sdl -0x99(%rbp,%r13,4),%xmm8,%xmm15
 	vblendvps %xmm8,-0x99(%rbp,%r13,4),%xmm12,%xmm14
-	vpinsrb $100,-0x99(%rbp,%r13,4),%xmm8,%xmm15
+	vpinsrb $7,-0x99(%rbp,%r13,4),%xmm8,%xmm15
 	vmovdqa -0x99(%rbp,%r13,4),%ymm8
 	vmovdqa %ymm8,-0x99(%rbp,%r13,4)
 	vpermilpd -0x99(%rbp,%r13,4),%ymm8,%ymm15
-	vroundpd $100,-0x99(%rbp,%r13,4),%ymm8
-	vextractf128 $100,%ymm8,-0x99(%rbp,%r13,4)
-	vperm2f128 $100,-0x99(%rbp,%r13,4),%ymm8,%ymm15
+	vroundpd $7,-0x99(%rbp,%r13,4),%ymm8
+	vextractf128 $7,%ymm8,-0x99(%rbp,%r13,4)
+	vperm2f128 $7,-0x99(%rbp,%r13,4),%ymm8,%ymm15
 	vblendvpd %ymm8,-0x99(%rbp,%r13,4),%ymm12,%ymm14
 	vldmxcsr -0x99(%rsp,%r12,1)
 	vmovdqa -0x99(%rsp,%r12,1),%xmm8
@@ -1683,46 +1547,47 @@ _start:
 	vcvtdq2pd -0x99(%rsp,%r12,1),%ymm8
 	vcvtpd2psy -0x99(%rsp,%r12,1),%xmm8
 	vpavgb -0x99(%rsp,%r12,1),%xmm8,%xmm15
-	vaeskeygenassist $100,-0x99(%rsp,%r12,1),%xmm8
-	vpextrb $100,%xmm8,-0x99(%rsp,%r12,1)
+	vaeskeygenassist $7,-0x99(%rsp,%r12,1),%xmm8
+	vpextrb $7,%xmm8,-0x99(%rsp,%r12,1)
 	vcvtsi2sdl -0x99(%rsp,%r12,1),%xmm8,%xmm15
 	vblendvps %xmm8,-0x99(%rsp,%r12,1),%xmm12,%xmm14
-	vpinsrb $100,-0x99(%rsp,%r12,1),%xmm8,%xmm15
+	vpinsrb $7,-0x99(%rsp,%r12,1),%xmm8,%xmm15
 	vmovdqa -0x99(%rsp,%r12,1),%ymm8
 	vmovdqa %ymm8,-0x99(%rsp,%r12,1)
 	vpermilpd -0x99(%rsp,%r12,1),%ymm8,%ymm15
-	vroundpd $100,-0x99(%rsp,%r12,1),%ymm8
-	vextractf128 $100,%ymm8,-0x99(%rsp,%r12,1)
-	vperm2f128 $100,-0x99(%rsp,%r12,1),%ymm8,%ymm15
+	vroundpd $7,-0x99(%rsp,%r12,1),%ymm8
+	vextractf128 $7,%ymm8,-0x99(%rsp,%r12,1)
+	vperm2f128 $7,-0x99(%rsp,%r12,1),%ymm8,%ymm15
 	vblendvpd %ymm8,-0x99(%rsp,%r12,1),%ymm12,%ymm14
 # Tests for all register operands.
 	vmovmskpd %xmm8,%r8d
-	vpslld $100,%xmm8,%xmm15
+	vpslld $7,%xmm8,%xmm15
 	vmovmskps %ymm8,%r8d
 	vmovdqa %xmm8,%xmm15
 	vmovd %xmm8,%r8d
 	vcvtsd2si %xmm8,%r8d
 	vcvtdq2pd %xmm8,%ymm8
 	vcvtpd2psy %ymm8,%xmm8
-	vaeskeygenassist $100,%xmm8,%xmm15
-	vpextrb $100,%xmm8,%r8d
+	vaeskeygenassist $7,%xmm8,%xmm15
+	vpextrb $7,%xmm8,%r8d
 	vcvtsi2sdl %r8d,%xmm8,%xmm15
 	vblendvps %xmm8,%xmm8,%xmm12,%xmm14
-	vpinsrb $100,%r8d,%xmm8,%xmm15
+	vpinsrb $7,%r8d,%xmm8,%xmm15
 	vmovdqa %ymm8,%ymm15
 	vpermilpd %ymm8,%ymm15,%ymm12
-	vroundpd $100,%ymm8,%ymm15
-	vextractf128 $100,%ymm8,%xmm8
-	vperm2f128 $100,%ymm8,%ymm15,%ymm12
+	vroundpd $7,%ymm8,%ymm15
+	vextractf128 $7,%ymm8,%xmm8
+	vperm2f128 $7,%ymm8,%ymm15,%ymm12
 	vblendvpd %ymm8,%ymm15,%ymm12,%ymm14
-	vinsertf128 $100,%xmm8,%ymm8,%ymm15
+	vinsertf128 $7,%xmm8,%ymm8,%ymm15
 # Tests for different memory/register operand
 	vcvtsd2si (%rcx),%r8
 	vextractps $10,%xmm8,%r8
 	vcvtss2si (%rcx),%r8
-	vpinsrw $100,%r8,%xmm15,%xmm8
+	vpinsrw $7,%r8,%xmm15,%xmm8
 
 	.intel_syntax noprefix
+
 # Tests for op mem64
 	vldmxcsr DWORD PTR [rcx]
 	vldmxcsr [rcx]
@@ -1741,18 +1606,18 @@ _start:
 	vmaskmovps [rcx],ymm6,ymm4
 
 # Tests for op imm8, ymm/mem256, ymm
-	vpermilpd ymm2,ymm6,100
-	vpermilpd ymm6,YMMWORD PTR [rcx],100
-	vpermilpd ymm6,[rcx],100
-	vpermilps ymm2,ymm6,100
-	vpermilps ymm6,YMMWORD PTR [rcx],100
-	vpermilps ymm6,[rcx],100
-	vroundpd ymm2,ymm6,100
-	vroundpd ymm6,YMMWORD PTR [rcx],100
-	vroundpd ymm6,[rcx],100
-	vroundps ymm2,ymm6,100
-	vroundps ymm6,YMMWORD PTR [rcx],100
-	vroundps ymm6,[rcx],100
+	vpermilpd ymm2,ymm6,7
+	vpermilpd ymm6,YMMWORD PTR [rcx],7
+	vpermilpd ymm6,[rcx],7
+	vpermilps ymm2,ymm6,7
+	vpermilps ymm6,YMMWORD PTR [rcx],7
+	vpermilps ymm6,[rcx],7
+	vroundpd ymm2,ymm6,7
+	vroundpd ymm6,YMMWORD PTR [rcx],7
+	vroundpd ymm6,[rcx],7
+	vroundps ymm2,ymm6,7
+	vroundps ymm6,YMMWORD PTR [rcx],7
+	vroundps ymm6,[rcx],7
 
 # Tests for op ymm/mem256, ymm, ymm
 	vaddpd ymm2,ymm6,ymm4
@@ -2053,61 +1918,61 @@ _start:
 	vcvttpd2dq xmm4,YMMWORD PTR [rcx]
 
 # Tests for op ymm/mem256, ymm
-	vcvtdq2ps ymm4,ymm4
+	vcvtdq2ps ymm6,ymm4
 	vcvtdq2ps ymm4,YMMWORD PTR [rcx]
 	vcvtdq2ps ymm4,[rcx]
-	vcvtps2dq ymm4,ymm4
+	vcvtps2dq ymm6,ymm4
 	vcvtps2dq ymm4,YMMWORD PTR [rcx]
 	vcvtps2dq ymm4,[rcx]
-	vcvttps2dq ymm4,ymm4
+	vcvttps2dq ymm6,ymm4
 	vcvttps2dq ymm4,YMMWORD PTR [rcx]
 	vcvttps2dq ymm4,[rcx]
-	vmovapd ymm4,ymm4
+	vmovapd ymm6,ymm4
 	vmovapd ymm4,YMMWORD PTR [rcx]
 	vmovapd ymm4,[rcx]
-	vmovaps ymm4,ymm4
+	vmovaps ymm6,ymm4
 	vmovaps ymm4,YMMWORD PTR [rcx]
 	vmovaps ymm4,[rcx]
-	vmovdqa ymm4,ymm4
+	vmovdqa ymm6,ymm4
 	vmovdqa ymm4,YMMWORD PTR [rcx]
 	vmovdqa ymm4,[rcx]
-	vmovdqu ymm4,ymm4
+	vmovdqu ymm6,ymm4
 	vmovdqu ymm4,YMMWORD PTR [rcx]
 	vmovdqu ymm4,[rcx]
-	vmovddup ymm4,ymm4
+	vmovddup ymm6,ymm4
 	vmovddup ymm4,YMMWORD PTR [rcx]
 	vmovddup ymm4,[rcx]
-	vmovshdup ymm4,ymm4
+	vmovshdup ymm6,ymm4
 	vmovshdup ymm4,YMMWORD PTR [rcx]
 	vmovshdup ymm4,[rcx]
-	vmovsldup ymm4,ymm4
+	vmovsldup ymm6,ymm4
 	vmovsldup ymm4,YMMWORD PTR [rcx]
 	vmovsldup ymm4,[rcx]
-	vmovupd ymm4,ymm4
+	vmovupd ymm6,ymm4
 	vmovupd ymm4,YMMWORD PTR [rcx]
 	vmovupd ymm4,[rcx]
-	vmovups ymm4,ymm4
+	vmovups ymm6,ymm4
 	vmovups ymm4,YMMWORD PTR [rcx]
 	vmovups ymm4,[rcx]
-	vptest ymm4,ymm4
+	vptest ymm6,ymm4
 	vptest ymm4,YMMWORD PTR [rcx]
 	vptest ymm4,[rcx]
-	vrcpps ymm4,ymm4
+	vrcpps ymm6,ymm4
 	vrcpps ymm4,YMMWORD PTR [rcx]
 	vrcpps ymm4,[rcx]
-	vrsqrtps ymm4,ymm4
+	vrsqrtps ymm6,ymm4
 	vrsqrtps ymm4,YMMWORD PTR [rcx]
 	vrsqrtps ymm4,[rcx]
-	vsqrtpd ymm4,ymm4
+	vsqrtpd ymm6,ymm4
 	vsqrtpd ymm4,YMMWORD PTR [rcx]
 	vsqrtpd ymm4,[rcx]
-	vsqrtps ymm4,ymm4
+	vsqrtps ymm6,ymm4
 	vsqrtps ymm4,YMMWORD PTR [rcx]
 	vsqrtps ymm4,[rcx]
-	vtestpd ymm4,ymm4
+	vtestpd ymm6,ymm4
 	vtestpd ymm4,YMMWORD PTR [rcx]
 	vtestpd ymm4,[rcx]
-	vtestps ymm4,ymm4
+	vtestps ymm6,ymm4
 	vtestps ymm4,YMMWORD PTR [rcx]
 	vtestps ymm4,[rcx]
 
@@ -2116,30 +1981,30 @@ _start:
 	vlddqu ymm4,[rcx]
 
 # Tests for op imm8, ymm/mem256, ymm, ymm
-	vblendpd ymm2,ymm6,ymm4,100
-	vblendpd ymm2,ymm6,YMMWORD PTR [rcx],100
-	vblendpd ymm2,ymm6,[rcx],100
-	vblendps ymm2,ymm6,ymm4,100
-	vblendps ymm2,ymm6,YMMWORD PTR [rcx],100
-	vblendps ymm2,ymm6,[rcx],100
-	vcmppd ymm2,ymm6,ymm4,100
-	vcmppd ymm2,ymm6,YMMWORD PTR [rcx],100
-	vcmppd ymm2,ymm6,[rcx],100
-	vcmpps ymm2,ymm6,ymm4,100
-	vcmpps ymm2,ymm6,YMMWORD PTR [rcx],100
-	vcmpps ymm2,ymm6,[rcx],100
-	vdpps ymm2,ymm6,ymm4,100
-	vdpps ymm2,ymm6,YMMWORD PTR [rcx],100
-	vdpps ymm2,ymm6,[rcx],100
-	vperm2f128 ymm2,ymm6,ymm4,100
-	vperm2f128 ymm2,ymm6,YMMWORD PTR [rcx],100
-	vperm2f128 ymm2,ymm6,[rcx],100
-	vshufpd ymm2,ymm6,ymm4,100
-	vshufpd ymm2,ymm6,YMMWORD PTR [rcx],100
-	vshufpd ymm2,ymm6,[rcx],100
-	vshufps ymm2,ymm6,ymm4,100
-	vshufps ymm2,ymm6,YMMWORD PTR [rcx],100
-	vshufps ymm2,ymm6,[rcx],100
+	vblendpd ymm2,ymm6,ymm4,7
+	vblendpd ymm2,ymm6,YMMWORD PTR [rcx],7
+	vblendpd ymm2,ymm6,[rcx],7
+	vblendps ymm2,ymm6,ymm4,7
+	vblendps ymm2,ymm6,YMMWORD PTR [rcx],7
+	vblendps ymm2,ymm6,[rcx],7
+	vcmppd ymm2,ymm6,ymm4,7
+	vcmppd ymm2,ymm6,YMMWORD PTR [rcx],7
+	vcmppd ymm2,ymm6,[rcx],7
+	vcmpps ymm2,ymm6,ymm4,7
+	vcmpps ymm2,ymm6,YMMWORD PTR [rcx],7
+	vcmpps ymm2,ymm6,[rcx],7
+	vdpps ymm2,ymm6,ymm4,7
+	vdpps ymm2,ymm6,YMMWORD PTR [rcx],7
+	vdpps ymm2,ymm6,[rcx],7
+	vperm2f128 ymm2,ymm6,ymm4,7
+	vperm2f128 ymm2,ymm6,YMMWORD PTR [rcx],7
+	vperm2f128 ymm2,ymm6,[rcx],7
+	vshufpd ymm2,ymm6,ymm4,7
+	vshufpd ymm2,ymm6,YMMWORD PTR [rcx],7
+	vshufpd ymm2,ymm6,[rcx],7
+	vshufps ymm2,ymm6,ymm4,7
+	vshufps ymm2,ymm6,YMMWORD PTR [rcx],7
+	vshufps ymm2,ymm6,[rcx],7
 
 # Tests for op ymm, ymm/mem256, ymm, ymm
 	vblendvpd ymm7,ymm2,ymm6,ymm4
@@ -2149,81 +2014,15 @@ _start:
 	vblendvps ymm7,ymm2,YMMWORD PTR [rcx],ymm4
 	vblendvps ymm7,ymm2,[rcx],ymm4
 
-# Tests for op ymm/mem256, ymm, ymm, ymm
-# Tests for op ymm, ymm/mem256, ymm, ymm
-	vfmaddpd ymm7,ymm2,ymm6,ymm4
-	vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vfmaddpd ymm7,ymm2,ymm6,[rcx]
-	vfmaddps ymm7,ymm2,ymm6,ymm4
-	vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vfmaddps ymm7,ymm2,ymm6,[rcx]
-	vfmaddsubpd ymm7,ymm2,ymm6,ymm4
-	vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vfmaddsubpd ymm7,ymm2,ymm6,[rcx]
-	vfmaddsubps ymm7,ymm2,ymm6,ymm4
-	vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vfmaddsubps ymm7,ymm2,ymm6,[rcx]
-	vfmsubaddpd ymm7,ymm2,ymm6,ymm4
-	vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vfmsubaddpd ymm7,ymm2,ymm6,[rcx]
-	vfmsubaddps ymm7,ymm2,ymm6,ymm4
-	vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vfmsubaddps ymm7,ymm2,ymm6,[rcx]
-	vfmsubpd ymm7,ymm2,ymm6,ymm4
-	vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vfmsubpd ymm7,ymm2,ymm6,[rcx]
-	vfmsubps ymm7,ymm2,ymm6,ymm4
-	vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vfmsubps ymm7,ymm2,ymm6,[rcx]
-	vfnmaddpd ymm7,ymm2,ymm6,ymm4
-	vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vfnmaddpd ymm7,ymm2,ymm6,[rcx]
-	vfnmaddps ymm7,ymm2,ymm6,ymm4
-	vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vfnmaddps ymm7,ymm2,ymm6,[rcx]
-	vfnmsubpd ymm7,ymm2,ymm6,ymm4
-	vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vfnmsubpd ymm7,ymm2,ymm6,[rcx]
-	vfnmsubps ymm7,ymm2,ymm6,ymm4
-	vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vfnmsubps ymm7,ymm2,ymm6,[rcx]
-	vpermilmo2pd ymm7,ymm2,ymm6,ymm4
-	vpermilmo2pd ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vpermilmo2pd ymm7,ymm2,ymm6,[rcx]
-	vpermilmz2pd ymm7,ymm2,ymm6,ymm4
-	vpermilmz2pd ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vpermilmz2pd ymm7,ymm2,ymm6,[rcx]
-	vpermiltd2pd ymm7,ymm2,ymm6,ymm4
-	vpermiltd2pd ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vpermiltd2pd ymm7,ymm2,ymm6,[rcx]
-	vpermilmo2ps ymm7,ymm2,ymm6,ymm4
-	vpermilmo2ps ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vpermilmo2ps ymm7,ymm2,ymm6,[rcx]
-	vpermilmz2ps ymm7,ymm2,ymm6,ymm4
-	vpermilmz2ps ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vpermilmz2ps ymm7,ymm2,ymm6,[rcx]
-	vpermiltd2ps ymm7,ymm2,ymm6,ymm4
-	vpermiltd2ps ymm7,ymm2,ymm6,YMMWORD PTR [rcx]
-	vpermiltd2ps ymm7,ymm2,ymm6,[rcx]
-
-# Tests for op imm4, ymm/mem256, ymm, ymm, ymm
-# Tests for op imm4, ymm, ymm/mem256, ymm, ymm
-	vpermil2pd ymm7,ymm2,ymm6,ymm4,10
-	vpermil2pd ymm7,ymm2,ymm6,YMMWORD PTR [rcx],10
-	vpermil2pd ymm7,ymm2,ymm6,[rcx],10
-	vpermil2ps ymm7,ymm2,ymm6,ymm4,10
-	vpermil2ps ymm7,ymm2,ymm6,YMMWORD PTR [rcx],10
-	vpermil2ps ymm7,ymm2,ymm6,[rcx],10
-
 # Tests for op imm8, xmm/mem128, ymm, ymm
-	vinsertf128 ymm6,ymm4,xmm4,100
-	vinsertf128 ymm6,ymm4,XMMWORD PTR [rcx],100
-	vinsertf128 ymm6,ymm4,[rcx],100
+	vinsertf128 ymm6,ymm4,xmm4,7
+	vinsertf128 ymm6,ymm4,XMMWORD PTR [rcx],7
+	vinsertf128 ymm6,ymm4,[rcx],7
 
 # Tests for op imm8, ymm, xmm/mem128
-	vextractf128 xmm4,ymm4,100
-	vextractf128 XMMWORD PTR [rcx],ymm4,100
-	vextractf128 [rcx],ymm4,100
+	vextractf128 xmm4,ymm4,7
+	vextractf128 XMMWORD PTR [rcx],ymm4,7
+	vextractf128 [rcx],ymm4,7
 
 # Tests for op mem128, ymm
 	vbroadcastf128 ymm4,XMMWORD PTR [rcx]
@@ -2903,42 +2702,42 @@ _start:
 	vmaskmovpd xmm6,xmm4,[rcx]
 
 # Tests for op imm8, xmm/mem128, xmm
-	vaeskeygenassist xmm6,xmm4,100
-	vaeskeygenassist xmm6,XMMWORD PTR [rcx],100
-	vaeskeygenassist xmm6,[rcx],100
-	vpcmpestri xmm6,xmm4,100
-	vpcmpestri xmm6,XMMWORD PTR [rcx],100
-	vpcmpestri xmm6,[rcx],100
-	vpcmpestrm xmm6,xmm4,100
-	vpcmpestrm xmm6,XMMWORD PTR [rcx],100
-	vpcmpestrm xmm6,[rcx],100
-	vpcmpistri xmm6,xmm4,100
-	vpcmpistri xmm6,XMMWORD PTR [rcx],100
-	vpcmpistri xmm6,[rcx],100
-	vpcmpistrm xmm6,xmm4,100
-	vpcmpistrm xmm6,XMMWORD PTR [rcx],100
-	vpcmpistrm xmm6,[rcx],100
-	vpermilpd xmm6,xmm4,100
-	vpermilpd xmm6,XMMWORD PTR [rcx],100
-	vpermilpd xmm6,[rcx],100
-	vpermilps xmm6,xmm4,100
-	vpermilps xmm6,XMMWORD PTR [rcx],100
-	vpermilps xmm6,[rcx],100
-	vpshufd xmm6,xmm4,100
-	vpshufd xmm6,XMMWORD PTR [rcx],100
-	vpshufd xmm6,[rcx],100
-	vpshufhw xmm6,xmm4,100
-	vpshufhw xmm6,XMMWORD PTR [rcx],100
-	vpshufhw xmm6,[rcx],100
-	vpshuflw xmm6,xmm4,100
-	vpshuflw xmm6,XMMWORD PTR [rcx],100
-	vpshuflw xmm6,[rcx],100
-	vroundpd xmm6,xmm4,100
-	vroundpd xmm6,XMMWORD PTR [rcx],100
-	vroundpd xmm6,[rcx],100
-	vroundps xmm6,xmm4,100
-	vroundps xmm6,XMMWORD PTR [rcx],100
-	vroundps xmm6,[rcx],100
+	vaeskeygenassist xmm6,xmm4,7
+	vaeskeygenassist xmm6,XMMWORD PTR [rcx],7
+	vaeskeygenassist xmm6,[rcx],7
+	vpcmpestri xmm6,xmm4,7
+	vpcmpestri xmm6,XMMWORD PTR [rcx],7
+	vpcmpestri xmm6,[rcx],7
+	vpcmpestrm xmm6,xmm4,7
+	vpcmpestrm xmm6,XMMWORD PTR [rcx],7
+	vpcmpestrm xmm6,[rcx],7
+	vpcmpistri xmm6,xmm4,7
+	vpcmpistri xmm6,XMMWORD PTR [rcx],7
+	vpcmpistri xmm6,[rcx],7
+	vpcmpistrm xmm6,xmm4,7
+	vpcmpistrm xmm6,XMMWORD PTR [rcx],7
+	vpcmpistrm xmm6,[rcx],7
+	vpermilpd xmm6,xmm4,7
+	vpermilpd xmm6,XMMWORD PTR [rcx],7
+	vpermilpd xmm6,[rcx],7
+	vpermilps xmm6,xmm4,7
+	vpermilps xmm6,XMMWORD PTR [rcx],7
+	vpermilps xmm6,[rcx],7
+	vpshufd xmm6,xmm4,7
+	vpshufd xmm6,XMMWORD PTR [rcx],7
+	vpshufd xmm6,[rcx],7
+	vpshufhw xmm6,xmm4,7
+	vpshufhw xmm6,XMMWORD PTR [rcx],7
+	vpshufhw xmm6,[rcx],7
+	vpshuflw xmm6,xmm4,7
+	vpshuflw xmm6,XMMWORD PTR [rcx],7
+	vpshuflw xmm6,[rcx],7
+	vroundpd xmm6,xmm4,7
+	vroundpd xmm6,XMMWORD PTR [rcx],7
+	vroundpd xmm6,[rcx],7
+	vroundps xmm6,xmm4,7
+	vroundps xmm6,XMMWORD PTR [rcx],7
+	vroundps xmm6,[rcx],7
 
 # Tests for op xmm, xmm, mem128
 	vmaskmovps XMMWORD PTR [rcx],xmm6,xmm4
@@ -2947,39 +2746,39 @@ _start:
 	vmaskmovpd [rcx],xmm6,xmm4
 
 # Tests for op imm8, xmm/mem128, xmm, xmm
-	vblendpd xmm2,xmm6,xmm4,100
-	vblendpd xmm2,xmm6,XMMWORD PTR [rcx],100
-	vblendpd xmm2,xmm6,[rcx],100
-	vblendps xmm2,xmm6,xmm4,100
-	vblendps xmm2,xmm6,XMMWORD PTR [rcx],100
-	vblendps xmm2,xmm6,[rcx],100
-	vcmppd xmm2,xmm6,xmm4,100
-	vcmppd xmm2,xmm6,XMMWORD PTR [rcx],100
-	vcmppd xmm2,xmm6,[rcx],100
-	vcmpps xmm2,xmm6,xmm4,100
-	vcmpps xmm2,xmm6,XMMWORD PTR [rcx],100
-	vcmpps xmm2,xmm6,[rcx],100
-	vdppd xmm2,xmm6,xmm4,100
-	vdppd xmm2,xmm6,XMMWORD PTR [rcx],100
-	vdppd xmm2,xmm6,[rcx],100
-	vdpps xmm2,xmm6,xmm4,100
-	vdpps xmm2,xmm6,XMMWORD PTR [rcx],100
-	vdpps xmm2,xmm6,[rcx],100
-	vmpsadbw xmm2,xmm6,xmm4,100
-	vmpsadbw xmm2,xmm6,XMMWORD PTR [rcx],100
-	vmpsadbw xmm2,xmm6,[rcx],100
-	vpalignr xmm2,xmm6,xmm4,100
-	vpalignr xmm2,xmm6,XMMWORD PTR [rcx],100
-	vpalignr xmm2,xmm6,[rcx],100
-	vpblendw xmm2,xmm6,xmm4,100
-	vpblendw xmm2,xmm6,XMMWORD PTR [rcx],100
-	vpblendw xmm2,xmm6,[rcx],100
-	vshufpd xmm2,xmm6,xmm4,100
-	vshufpd xmm2,xmm6,XMMWORD PTR [rcx],100
-	vshufpd xmm2,xmm6,[rcx],100
-	vshufps xmm2,xmm6,xmm4,100
-	vshufps xmm2,xmm6,XMMWORD PTR [rcx],100
-	vshufps xmm2,xmm6,[rcx],100
+	vblendpd xmm2,xmm6,xmm4,7
+	vblendpd xmm2,xmm6,XMMWORD PTR [rcx],7
+	vblendpd xmm2,xmm6,[rcx],7
+	vblendps xmm2,xmm6,xmm4,7
+	vblendps xmm2,xmm6,XMMWORD PTR [rcx],7
+	vblendps xmm2,xmm6,[rcx],7
+	vcmppd xmm2,xmm6,xmm4,7
+	vcmppd xmm2,xmm6,XMMWORD PTR [rcx],7
+	vcmppd xmm2,xmm6,[rcx],7
+	vcmpps xmm2,xmm6,xmm4,7
+	vcmpps xmm2,xmm6,XMMWORD PTR [rcx],7
+	vcmpps xmm2,xmm6,[rcx],7
+	vdppd xmm2,xmm6,xmm4,7
+	vdppd xmm2,xmm6,XMMWORD PTR [rcx],7
+	vdppd xmm2,xmm6,[rcx],7
+	vdpps xmm2,xmm6,xmm4,7
+	vdpps xmm2,xmm6,XMMWORD PTR [rcx],7
+	vdpps xmm2,xmm6,[rcx],7
+	vmpsadbw xmm2,xmm6,xmm4,7
+	vmpsadbw xmm2,xmm6,XMMWORD PTR [rcx],7
+	vmpsadbw xmm2,xmm6,[rcx],7
+	vpalignr xmm2,xmm6,xmm4,7
+	vpalignr xmm2,xmm6,XMMWORD PTR [rcx],7
+	vpalignr xmm2,xmm6,[rcx],7
+	vpblendw xmm2,xmm6,xmm4,7
+	vpblendw xmm2,xmm6,XMMWORD PTR [rcx],7
+	vpblendw xmm2,xmm6,[rcx],7
+	vshufpd xmm2,xmm6,xmm4,7
+	vshufpd xmm2,xmm6,XMMWORD PTR [rcx],7
+	vshufpd xmm2,xmm6,[rcx],7
+	vshufps xmm2,xmm6,xmm4,7
+	vshufps xmm2,xmm6,XMMWORD PTR [rcx],7
+	vshufps xmm2,xmm6,[rcx],7
 
 # Tests for op xmm, xmm/mem128, xmm, xmm
 	vblendvpd xmm7,xmm2,xmm6,xmm4
@@ -2992,112 +2791,6 @@ _start:
 	vpblendvb xmm7,xmm2,XMMWORD PTR [rcx],xmm4
 	vpblendvb xmm7,xmm2,[rcx],xmm4
 
-# Tests for op xmm/mem128, xmm, xmm, xmm
-# Tests for op xmm, xmm/mem128, xmm, xmm
-	vfmaddpd xmm7,xmm2,xmm6,xmm4
-	vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vfmaddpd xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vfmaddpd xmm7,xmm2,xmm6,[rcx]
-	vfmaddpd xmm7,xmm2,[rcx],xmm4
-	vfmaddps xmm7,xmm2,xmm6,xmm4
-	vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vfmaddps xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vfmaddps xmm7,xmm2,xmm6,[rcx]
-	vfmaddps xmm7,xmm2,[rcx],xmm4
-	vfmaddsubpd xmm7,xmm2,xmm6,xmm4
-	vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vfmaddsubpd xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vfmaddsubpd xmm7,xmm2,xmm6,[rcx]
-	vfmaddsubpd xmm7,xmm2,[rcx],xmm4
-	vfmaddsubps xmm7,xmm2,xmm6,xmm4
-	vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vfmaddsubps xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vfmaddsubps xmm7,xmm2,xmm6,[rcx]
-	vfmaddsubps xmm7,xmm2,[rcx],xmm4
-	vfmsubaddpd xmm7,xmm2,xmm6,xmm4
-	vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vfmsubaddpd xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vfmsubaddpd xmm7,xmm2,xmm6,[rcx]
-	vfmsubaddpd xmm7,xmm2,[rcx],xmm4
-	vfmsubaddps xmm7,xmm2,xmm6,xmm4
-	vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vfmsubaddps xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vfmsubaddps xmm7,xmm2,xmm6,[rcx]
-	vfmsubaddps xmm7,xmm2,[rcx],xmm4
-	vfmsubpd xmm7,xmm2,xmm6,xmm4
-	vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vfmsubpd xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vfmsubpd xmm7,xmm2,xmm6,[rcx]
-	vfmsubpd xmm7,xmm2,[rcx],xmm4
-	vfmsubps xmm7,xmm2,xmm6,xmm4
-	vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vfmsubps xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vfmsubps xmm7,xmm2,xmm6,[rcx]
-	vfmsubps xmm7,xmm2,[rcx],xmm4
-	vfnmaddpd xmm7,xmm2,xmm6,xmm4
-	vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vfnmaddpd xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vfnmaddpd xmm7,xmm2,xmm6,[rcx]
-	vfnmaddpd xmm7,xmm2,[rcx],xmm4
-	vfnmaddps xmm7,xmm2,xmm6,xmm4
-	vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vfnmaddps xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vfnmaddps xmm7,xmm2,xmm6,[rcx]
-	vfnmaddps xmm7,xmm2,[rcx],xmm4
-	vfnmsubpd xmm7,xmm2,xmm6,xmm4
-	vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vfnmsubpd xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vfnmsubpd xmm7,xmm2,xmm6,[rcx]
-	vfnmsubpd xmm7,xmm2,[rcx],xmm4
-	vfnmsubps xmm7,xmm2,xmm6,xmm4
-	vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vfnmsubps xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vfnmsubps xmm7,xmm2,xmm6,[rcx]
-	vfnmsubps xmm7,xmm2,[rcx],xmm4
-	vpermilmo2pd xmm7,xmm2,xmm6,xmm4
-	vpermilmo2pd xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vpermilmo2pd xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vpermilmo2pd xmm7,xmm2,xmm6,[rcx]
-	vpermilmo2pd xmm7,xmm2,[rcx],xmm4
-	vpermilmz2pd xmm7,xmm2,xmm6,xmm4
-	vpermilmz2pd xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vpermilmz2pd xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vpermilmz2pd xmm7,xmm2,xmm6,[rcx]
-	vpermilmz2pd xmm7,xmm2,[rcx],xmm4
-	vpermiltd2pd xmm7,xmm2,xmm6,xmm4
-	vpermiltd2pd xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vpermiltd2pd xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vpermiltd2pd xmm7,xmm2,xmm6,[rcx]
-	vpermiltd2pd xmm7,xmm2,[rcx],xmm4
-	vpermilmo2ps xmm7,xmm2,xmm6,xmm4
-	vpermilmo2ps xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vpermilmo2ps xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vpermilmo2ps xmm7,xmm2,xmm6,[rcx]
-	vpermilmo2ps xmm7,xmm2,[rcx],xmm4
-	vpermilmz2ps xmm7,xmm2,xmm6,xmm4
-	vpermilmz2ps xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vpermilmz2ps xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vpermilmz2ps xmm7,xmm2,xmm6,[rcx]
-	vpermilmz2ps xmm7,xmm2,[rcx],xmm4
-	vpermiltd2ps xmm7,xmm2,xmm6,xmm4
-	vpermiltd2ps xmm7,xmm2,xmm6,XMMWORD PTR [rcx]
-	vpermiltd2ps xmm7,xmm2,XMMWORD PTR [rcx],xmm4
-	vpermiltd2ps xmm7,xmm2,xmm6,[rcx]
-	vpermiltd2ps xmm7,xmm2,[rcx],xmm4
-
-# Tests for op imm4, xmm/mem128, xmm, xmm, xmm
-# Tests for op imm4, xmm, xmm/mem128, xmm, xmm
-	vpermil2pd xmm7,xmm2,xmm6,xmm4,10
-	vpermil2pd xmm7,xmm2,xmm6,XMMWORD PTR [rcx],10
-	vpermil2pd xmm7,xmm2,XMMWORD PTR [rcx],xmm4,10
-	vpermil2pd xmm7,xmm2,xmm6,[rcx],10
-	vpermil2pd xmm7,xmm2,[rcx],xmm4,10
-	vpermil2ps xmm7,xmm2,xmm6,xmm4,10
-	vpermil2ps xmm7,xmm2,xmm6,XMMWORD PTR [rcx],10
-	vpermil2ps xmm7,xmm2,XMMWORD PTR [rcx],xmm4,10
-	vpermil2ps xmm7,xmm2,xmm6,[rcx],10
-	vpermil2ps xmm7,xmm2,[rcx],xmm4,10
-
 # Tests for op mem64, ymm
 	vbroadcastsd ymm4,QWORD PTR [rcx]
 	vbroadcastsd ymm4,[rcx]
@@ -3157,8 +2850,8 @@ _start:
 # Tests for op regq/mem64, xmm
 	vmovd rcx,xmm4
 	vmovd xmm4,rcx
-	vmovd QWORD PTR [rcx],xmm4
-	vmovd xmm4,QWORD PTR [rcx]
+	vmovd [rcx],xmm4
+	vmovd xmm4,[rcx]
 	vmovq rcx,xmm4
 	vmovq xmm4,rcx
 	vmovq QWORD PTR [rcx],xmm4
@@ -3191,14 +2884,14 @@ _start:
 	vcvtsi2ssq xmm6,xmm4,[rcx]
 
 # Tests for op imm8, regq/mem64, xmm, xmm
-	vpinsrq xmm6,xmm4,rcx,100
-	vpinsrq xmm6,xmm4,QWORD PTR [rcx],100
-	vpinsrq xmm6,xmm4,[rcx],100
+	vpinsrq xmm6,xmm4,rcx,7
+	vpinsrq xmm6,xmm4,QWORD PTR [rcx],7
+	vpinsrq xmm6,xmm4,[rcx],7
 
 # Testsf for op imm8, xmm, regq/mem64
-	vpextrq rcx,xmm4,100
-	vpextrq QWORD PTR [rcx],xmm4,100
-	vpextrq [rcx],xmm4,100
+	vpextrq rcx,xmm4,7
+	vpextrq QWORD PTR [rcx],xmm4,7
+	vpextrq [rcx],xmm4,7
 
 # Tests for op mem64, xmm, xmm
 	vmovlpd xmm6,xmm4,QWORD PTR [rcx]
@@ -3211,35 +2904,12 @@ _start:
 	vmovhps xmm6,xmm4,[rcx]
 
 # Tests for op imm8, xmm/mem64, xmm, xmm
-	vcmpsd xmm2,xmm6,xmm4,100
-	vcmpsd xmm2,xmm6,QWORD PTR [rcx],100
-	vcmpsd xmm2,xmm6,[rcx],100
-	vroundsd xmm2,xmm6,xmm4,100
-	vroundsd xmm2,xmm6,QWORD PTR [rcx],100
-	vroundsd xmm2,xmm6,[rcx],100
-
-# Tests for op xmm/mem64, xmm, xmm, xmm
-# Tests for op xmm, xmm/mem64, xmm, xmm
-	vfmaddsd xmm7,xmm2,xmm6,xmm4
-	vfmaddsd xmm7,xmm2,xmm6,QWORD PTR [rcx]
-	vfmaddsd xmm7,xmm2,QWORD PTR [rcx],xmm4
-	vfmaddsd xmm7,xmm2,xmm6,[rcx]
-	vfmaddsd xmm7,xmm2,[rcx],xmm4
-	vfmsubsd xmm7,xmm2,xmm6,xmm4
-	vfmsubsd xmm7,xmm2,xmm6,QWORD PTR [rcx]
-	vfmsubsd xmm7,xmm2,QWORD PTR [rcx],xmm4
-	vfmsubsd xmm7,xmm2,xmm6,[rcx]
-	vfmsubsd xmm7,xmm2,[rcx],xmm4
-	vfnmaddsd xmm7,xmm2,xmm6,xmm4
-	vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR [rcx]
-	vfnmaddsd xmm7,xmm2,QWORD PTR [rcx],xmm4
-	vfnmaddsd xmm7,xmm2,xmm6,[rcx]
-	vfnmaddsd xmm7,xmm2,[rcx],xmm4
-	vfnmsubsd xmm7,xmm2,xmm6,xmm4
-	vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR [rcx]
-	vfnmsubsd xmm7,xmm2,QWORD PTR [rcx],xmm4
-	vfnmsubsd xmm7,xmm2,xmm6,[rcx]
-	vfnmsubsd xmm7,xmm2,[rcx],xmm4
+	vcmpsd xmm2,xmm6,xmm4,7
+	vcmpsd xmm2,xmm6,QWORD PTR [rcx],7
+	vcmpsd xmm2,xmm6,[rcx],7
+	vroundsd xmm2,xmm6,xmm4,7
+	vroundsd xmm2,xmm6,QWORD PTR [rcx],7
+	vroundsd xmm2,xmm6,[rcx],7
 
 # Tests for op xmm/mem64, xmm, xmm
 	vaddsd xmm2,xmm6,xmm4
@@ -3363,6 +3033,12 @@ _start:
 	vcmptrue_ussd xmm2,xmm6,QWORD PTR [rcx]
 	vcmptrue_ussd xmm2,xmm6,[rcx]
 
+# Tests for op mem64
+	vldmxcsr DWORD PTR [rcx]
+	vldmxcsr [rcx]
+	vstmxcsr DWORD PTR [rcx]
+	vstmxcsr [rcx]
+
 # Tests for op xmm/mem32, xmm, xmm
 	vaddss xmm2,xmm6,xmm4
 	vaddss xmm2,xmm6,DWORD PTR [rcx]
@@ -3556,16 +3232,17 @@ _start:
 	vpmovmskb rcx,xmm4
 
 # Tests for op imm8, xmm, regq/mem32
-	vextractps rcx,xmm4,100
-	vextractps DWORD PTR [rcx],xmm4,100
-	vextractps [rcx],xmm4,100
+	vextractps rcx,xmm4,7
+	vextractps DWORD PTR [rcx],xmm4,7
+	vextractps [rcx],xmm4,7
+
 # Tests for op imm8, xmm, regl/mem32
-	vpextrd ecx,xmm4,100
-	vpextrd DWORD PTR [rcx],xmm4,100
-	vpextrd [rcx],xmm4,100
-	vextractps ecx,xmm4,100
-	vextractps DWORD PTR [rcx],xmm4,100
-	vextractps [rcx],xmm4,100
+	vpextrd ecx,xmm4,7
+	vpextrd DWORD PTR [rcx],xmm4,7
+	vpextrd [rcx],xmm4,7
+	vextractps ecx,xmm4,7
+	vextractps DWORD PTR [rcx],xmm4,7
+	vextractps [rcx],xmm4,7
 
 # Tests for op regl/mem32, xmm, xmm
 	vcvtsi2sd xmm6,xmm4,ecx
@@ -3574,38 +3251,15 @@ _start:
 	vcvtsi2ss xmm6,xmm4,DWORD PTR [rcx]
 
 # Tests for op imm8, xmm/mem32, xmm, xmm
-	vcmpss xmm2,xmm6,xmm4,100
-	vcmpss xmm2,xmm6,DWORD PTR [rcx],100
-	vcmpss xmm2,xmm6,[rcx],100
-	vinsertps xmm2,xmm6,xmm4,100
-	vinsertps xmm2,xmm6,DWORD PTR [rcx],100
-	vinsertps xmm2,xmm6,[rcx],100
-	vroundss xmm2,xmm6,xmm4,100
-	vroundss xmm2,xmm6,DWORD PTR [rcx],100
-	vroundss xmm2,xmm6,[rcx],100
-
-# Tests for op xmm/mem32, xmm, xmm, xmm
-# Tests for op xmm, xmm/mem32, xmm, xmm
-	vfmaddss xmm7,xmm2,xmm6,xmm4
-	vfmaddss xmm7,xmm2,xmm6,DWORD PTR [rcx]
-	vfmaddss xmm7,xmm2,DWORD PTR [rcx],xmm4
-	vfmaddss xmm7,xmm2,xmm6,[rcx]
-	vfmaddss xmm7,xmm2,[rcx],xmm4
-	vfmsubss xmm7,xmm2,xmm6,xmm4
-	vfmsubss xmm7,xmm2,xmm6,DWORD PTR [rcx]
-	vfmsubss xmm7,xmm2,DWORD PTR [rcx],xmm4
-	vfmsubss xmm7,xmm2,xmm6,[rcx]
-	vfmsubss xmm7,xmm2,[rcx],xmm4
-	vfnmaddss xmm7,xmm2,xmm6,xmm4
-	vfnmaddss xmm7,xmm2,xmm6,DWORD PTR [rcx]
-	vfnmaddss xmm7,xmm2,DWORD PTR [rcx],xmm4
-	vfnmaddss xmm7,xmm2,xmm6,[rcx]
-	vfnmaddss xmm7,xmm2,[rcx],xmm4
-	vfnmsubss xmm7,xmm2,xmm6,xmm4
-	vfnmsubss xmm7,xmm2,xmm6,DWORD PTR [rcx]
-	vfnmsubss xmm7,xmm2,DWORD PTR [rcx],xmm4
-	vfnmsubss xmm7,xmm2,xmm6,[rcx]
-	vfnmsubss xmm7,xmm2,[rcx],xmm4
+	vcmpss xmm2,xmm6,xmm4,7
+	vcmpss xmm2,xmm6,DWORD PTR [rcx],7
+	vcmpss xmm2,xmm6,[rcx],7
+	vinsertps xmm2,xmm6,xmm4,7
+	vinsertps xmm2,xmm6,DWORD PTR [rcx],7
+	vinsertps xmm2,xmm6,[rcx],7
+	vroundss xmm2,xmm6,xmm4,7
+	vroundss xmm2,xmm6,DWORD PTR [rcx],7
+	vroundss xmm2,xmm6,[rcx],7
 
 # Tests for op xmm/m16, xmm
 	vpmovsxbq xmm6,xmm4
@@ -3616,46 +3270,47 @@ _start:
 	vpmovzxbq xmm4,[rcx]
 
 # Tests for op imm8, xmm, regl/mem16
-	vpextrw ecx,xmm4,100
-	vpextrw WORD PTR [rcx],xmm4,100
-	vpextrw [rcx],xmm4,100
+	vpextrw ecx,xmm4,7
+	vpextrw WORD PTR [rcx],xmm4,7
+	vpextrw [rcx],xmm4,7
 
 # Tests for op imm8, xmm, regq/mem16
-	vpextrw rcx,xmm4,100
-	vpextrw WORD PTR [rcx],xmm4,100
-	vpextrw [rcx],xmm4,100
+	vpextrw rcx,xmm4,7
+	vpextrw WORD PTR [rcx],xmm4,7
+	vpextrw [rcx],xmm4,7
 
 # Tests for op imm8, regl/mem16, xmm, xmm
-	vpinsrw xmm6,xmm4,ecx,100
-	vpinsrw xmm6,xmm4,WORD PTR [rcx],100
-	vpinsrw xmm6,xmm4,[rcx],100
+	vpinsrw xmm6,xmm4,ecx,7
+	vpinsrw xmm6,xmm4,WORD PTR [rcx],7
+	vpinsrw xmm6,xmm4,[rcx],7
 
 
-	vpinsrw xmm6,xmm4,rcx,100
-	vpinsrw xmm6,xmm4,WORD PTR [rcx],100
-	vpinsrw xmm6,xmm4,[rcx],100
+	vpinsrw xmm6,xmm4,rcx,7
+	vpinsrw xmm6,xmm4,WORD PTR [rcx],7
+	vpinsrw xmm6,xmm4,[rcx],7
 
 # Tests for op imm8, xmm, regl/mem8
-	vpextrb ecx,xmm4,100
-	vpextrb BYTE PTR [rcx],xmm4,100
-	vpextrb [rcx],xmm4,100
+	vpextrb ecx,xmm4,7
+	vpextrb BYTE PTR [rcx],xmm4,7
+	vpextrb [rcx],xmm4,7
 
 # Tests for op imm8, regl/mem8, xmm, xmm
-	vpinsrb xmm6,xmm4,ecx,100
-	vpinsrb xmm6,xmm4,BYTE PTR [rcx],100
-	vpinsrb xmm6,xmm4,[rcx],100
+	vpinsrb xmm6,xmm4,ecx,7
+	vpinsrb xmm6,xmm4,BYTE PTR [rcx],7
+	vpinsrb xmm6,xmm4,[rcx],7
 
 # Tests for op imm8, xmm, regq
-	vpextrw rcx,xmm4,100
+	vpextrw rcx,xmm4,7
+
 # Tests for op imm8, xmm, regq/mem8
-	vpextrb rcx,xmm4,100
-	vpextrb BYTE PTR [rcx],xmm4,100
-	vpextrb [rcx],xmm4,100
+	vpextrb rcx,xmm4,7
+	vpextrb BYTE PTR [rcx],xmm4,7
+	vpextrb [rcx],xmm4,7
 
 # Tests for op imm8, regl/mem8, xmm, xmm
-	vpinsrb xmm6,xmm4,ecx,100
-	vpinsrb xmm6,xmm4,BYTE PTR [rcx],100
-	vpinsrb xmm6,xmm4,[rcx],100
+	vpinsrb xmm6,xmm4,ecx,7
+	vpinsrb xmm6,xmm4,BYTE PTR [rcx],7
+	vpinsrb xmm6,xmm4,[rcx],7
 
 # Tests for op xmm, xmm
 	vmaskmovdqu xmm6,xmm4
@@ -3665,6 +3320,7 @@ _start:
 	vmovmskpd ecx,xmm4
 	vmovmskps ecx,xmm4
 	vpmovmskb ecx,xmm4
+
 # Tests for op xmm, xmm, xmm
 	vmovhlps xmm2,xmm6,xmm4
 	vmovlhps xmm2,xmm6,xmm4
@@ -3672,19 +3328,19 @@ _start:
 	vmovss xmm2,xmm6,xmm4
 
 # Tests for op imm8, xmm, xmm
-	vpslld xmm6,xmm4,100
-	vpslldq xmm6,xmm4,100
-	vpsllq xmm6,xmm4,100
-	vpsllw xmm6,xmm4,100
-	vpsrad xmm6,xmm4,100
-	vpsraw xmm6,xmm4,100
-	vpsrld xmm6,xmm4,100
-	vpsrldq xmm6,xmm4,100
-	vpsrlq xmm6,xmm4,100
-	vpsrlw xmm6,xmm4,100
+	vpslld xmm6,xmm4,7
+	vpslldq xmm6,xmm4,7
+	vpsllq xmm6,xmm4,7
+	vpsllw xmm6,xmm4,7
+	vpsrad xmm6,xmm4,7
+	vpsraw xmm6,xmm4,7
+	vpsrld xmm6,xmm4,7
+	vpsrldq xmm6,xmm4,7
+	vpsrlq xmm6,xmm4,7
+	vpsrlw xmm6,xmm4,7
 
 # Tests for op imm8, xmm, regl
-	vpextrw ecx,xmm4,100
+	vpextrw ecx,xmm4,7
 
 # Tests for op ymm, regl
 	vmovmskpd ecx,ymm4
@@ -3694,7 +3350,6 @@ _start:
 	vmovmskpd rcx,ymm4
 	vmovmskps rcx,ymm4
 
-
 # Default instructions without suffixes.
 	vcvtpd2dq xmm6,xmm4
 	vcvtpd2dq xmm6,ymm4
@@ -3712,17 +3367,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR ds:0x12345678
 	vcvtpd2ps xmm8,YMMWORD PTR ds:0x12345678
 	vpavgb xmm15,xmm8,XMMWORD PTR ds:0x12345678
-	vaeskeygenassist xmm8,XMMWORD PTR ds:0x12345678,100
-	vpextrb ds:0x12345678,xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR ds:0x12345678,7
+	vpextrb ds:0x12345678,xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR ds:0x12345678
 	vblendvps xmm14,xmm12,XMMWORD PTR ds:0x12345678,xmm8
-	vpinsrb xmm15,xmm8,ds:0x12345678,100
+	vpinsrb xmm15,xmm8,ds:0x12345678,7
 	vmovdqa ymm8,YMMWORD PTR ds:0x12345678
 	vmovdqa YMMWORD PTR ds:0x12345678,ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR ds:0x12345678
-	vroundpd ymm8,YMMWORD PTR ds:0x12345678,100
-	vextractf128 XMMWORD PTR ds:0x12345678,ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR ds:0x12345678,100
+	vroundpd ymm8,YMMWORD PTR ds:0x12345678,7
+	vextractf128 XMMWORD PTR ds:0x12345678,ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR ds:0x12345678,7
 	vblendvpd ymm14,ymm12,YMMWORD PTR ds:0x12345678,ymm8
 	vldmxcsr DWORD PTR [rbp]
 	vmovdqa xmm8,XMMWORD PTR [rbp]
@@ -3732,17 +3387,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [rbp]
 	vcvtpd2ps xmm8,YMMWORD PTR [rbp]
 	vpavgb xmm15,xmm8,XMMWORD PTR [rbp]
-	vaeskeygenassist xmm8,XMMWORD PTR [rbp],100
-	vpextrb [rbp],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [rbp],7
+	vpextrb [rbp],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [rbp]
 	vblendvps xmm14,xmm12,XMMWORD PTR [rbp],xmm8
-	vpinsrb xmm15,xmm8,[rbp],100
+	vpinsrb xmm15,xmm8,[rbp],7
 	vmovdqa ymm8,YMMWORD PTR [rbp]
 	vmovdqa YMMWORD PTR [rbp],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [rbp]
-	vroundpd ymm8,YMMWORD PTR [rbp],100
-	vextractf128 XMMWORD PTR [rbp],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [rbp],100
+	vroundpd ymm8,YMMWORD PTR [rbp],7
+	vextractf128 XMMWORD PTR [rbp],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [rbp],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [rbp],ymm8
 	vldmxcsr DWORD PTR [rbp+0x99]
 	vmovdqa xmm8,XMMWORD PTR [rbp+0x99]
@@ -3752,17 +3407,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [rbp+0x99]
 	vcvtpd2ps xmm8,YMMWORD PTR [rbp+0x99]
 	vpavgb xmm15,xmm8,XMMWORD PTR [rbp+0x99]
-	vaeskeygenassist xmm8,XMMWORD PTR [rbp+0x99],100
-	vpextrb [rbp+0x99],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [rbp+0x99],7
+	vpextrb [rbp+0x99],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [rbp+0x99]
 	vblendvps xmm14,xmm12,XMMWORD PTR [rbp+0x99],xmm8
-	vpinsrb xmm15,xmm8,[rbp+0x99],100
+	vpinsrb xmm15,xmm8,[rbp+0x99],7
 	vmovdqa ymm8,YMMWORD PTR [rbp+0x99]
 	vmovdqa YMMWORD PTR [rbp+0x99],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [rbp+0x99]
-	vroundpd ymm8,YMMWORD PTR [rbp+0x99],100
-	vextractf128 XMMWORD PTR [rbp+0x99],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [rbp+0x99],100
+	vroundpd ymm8,YMMWORD PTR [rbp+0x99],7
+	vextractf128 XMMWORD PTR [rbp+0x99],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [rbp+0x99],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [rbp+0x99],ymm8
 	vldmxcsr DWORD PTR [r15+0x99]
 	vmovdqa xmm8,XMMWORD PTR [r15+0x99]
@@ -3772,17 +3427,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [r15+0x99]
 	vcvtpd2ps xmm8,YMMWORD PTR [r15+0x99]
 	vpavgb xmm15,xmm8,XMMWORD PTR [r15+0x99]
-	vaeskeygenassist xmm8,XMMWORD PTR [r15+0x99],100
-	vpextrb [r15+0x99],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [r15+0x99],7
+	vpextrb [r15+0x99],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [r15+0x99]
 	vblendvps xmm14,xmm12,XMMWORD PTR [r15+0x99],xmm8
-	vpinsrb xmm15,xmm8,[r15+0x99],100
+	vpinsrb xmm15,xmm8,[r15+0x99],7
 	vmovdqa ymm8,YMMWORD PTR [r15+0x99]
 	vmovdqa YMMWORD PTR [r15+0x99],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [r15+0x99]
-	vroundpd ymm8,YMMWORD PTR [r15+0x99],100
-	vextractf128 XMMWORD PTR [r15+0x99],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [r15+0x99],100
+	vroundpd ymm8,YMMWORD PTR [r15+0x99],7
+	vextractf128 XMMWORD PTR [r15+0x99],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [r15+0x99],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [r15+0x99],ymm8
 	vldmxcsr DWORD PTR [rip+0x99]
 	vmovdqa xmm8,XMMWORD PTR [rip+0x99]
@@ -3792,17 +3447,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [rip+0x99]
 	vcvtpd2ps xmm8,YMMWORD PTR [rip+0x99]
 	vpavgb xmm15,xmm8,XMMWORD PTR [rip+0x99]
-	vaeskeygenassist xmm8,XMMWORD PTR [rip+0x99],100
-	vpextrb [rip+0x99],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [rip+0x99],7
+	vpextrb [rip+0x99],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [rip+0x99]
 	vblendvps xmm14,xmm12,XMMWORD PTR [rip+0x99],xmm8
-	vpinsrb xmm15,xmm8,[rip+0x99],100
+	vpinsrb xmm15,xmm8,[rip+0x99],7
 	vmovdqa ymm8,YMMWORD PTR [rip+0x99]
 	vmovdqa YMMWORD PTR [rip+0x99],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [rip+0x99]
-	vroundpd ymm8,YMMWORD PTR [rip+0x99],100
-	vextractf128 XMMWORD PTR [rip+0x99],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [rip+0x99],100
+	vroundpd ymm8,YMMWORD PTR [rip+0x99],7
+	vextractf128 XMMWORD PTR [rip+0x99],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [rip+0x99],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [rip+0x99],ymm8
 	vldmxcsr DWORD PTR [rsp+0x99]
 	vmovdqa xmm8,XMMWORD PTR [rsp+0x99]
@@ -3812,17 +3467,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [rsp+0x99]
 	vcvtpd2ps xmm8,YMMWORD PTR [rsp+0x99]
 	vpavgb xmm15,xmm8,XMMWORD PTR [rsp+0x99]
-	vaeskeygenassist xmm8,XMMWORD PTR [rsp+0x99],100
-	vpextrb [rsp+0x99],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [rsp+0x99],7
+	vpextrb [rsp+0x99],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [rsp+0x99]
 	vblendvps xmm14,xmm12,XMMWORD PTR [rsp+0x99],xmm8
-	vpinsrb xmm15,xmm8,[rsp+0x99],100
+	vpinsrb xmm15,xmm8,[rsp+0x99],7
 	vmovdqa ymm8,YMMWORD PTR [rsp+0x99]
 	vmovdqa YMMWORD PTR [rsp+0x99],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [rsp+0x99]
-	vroundpd ymm8,YMMWORD PTR [rsp+0x99],100
-	vextractf128 XMMWORD PTR [rsp+0x99],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [rsp+0x99],100
+	vroundpd ymm8,YMMWORD PTR [rsp+0x99],7
+	vextractf128 XMMWORD PTR [rsp+0x99],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [rsp+0x99],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [rsp+0x99],ymm8
 	vldmxcsr DWORD PTR [r12+0x99]
 	vmovdqa xmm8,XMMWORD PTR [r12+0x99]
@@ -3832,17 +3487,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [r12+0x99]
 	vcvtpd2ps xmm8,YMMWORD PTR [r12+0x99]
 	vpavgb xmm15,xmm8,XMMWORD PTR [r12+0x99]
-	vaeskeygenassist xmm8,XMMWORD PTR [r12+0x99],100
-	vpextrb [r12+0x99],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [r12+0x99],7
+	vpextrb [r12+0x99],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [r12+0x99]
 	vblendvps xmm14,xmm12,XMMWORD PTR [r12+0x99],xmm8
-	vpinsrb xmm15,xmm8,[r12+0x99],100
+	vpinsrb xmm15,xmm8,[r12+0x99],7
 	vmovdqa ymm8,YMMWORD PTR [r12+0x99]
 	vmovdqa YMMWORD PTR [r12+0x99],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [r12+0x99]
-	vroundpd ymm8,YMMWORD PTR [r12+0x99],100
-	vextractf128 XMMWORD PTR [r12+0x99],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [r12+0x99],100
+	vroundpd ymm8,YMMWORD PTR [r12+0x99],7
+	vextractf128 XMMWORD PTR [r12+0x99],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [r12+0x99],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [r12+0x99],ymm8
 	vldmxcsr DWORD PTR [riz*1-0x99]
 	vmovdqa xmm8,XMMWORD PTR [riz*1-0x99]
@@ -3852,17 +3507,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [riz*1-0x99]
 	vcvtpd2ps xmm8,YMMWORD PTR [riz*1-0x99]
 	vpavgb xmm15,xmm8,XMMWORD PTR [riz*1-0x99]
-	vaeskeygenassist xmm8,XMMWORD PTR [riz*1-0x99],100
-	vpextrb [riz*1-0x99],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [riz*1-0x99],7
+	vpextrb [riz*1-0x99],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [riz*1-0x99]
 	vblendvps xmm14,xmm12,XMMWORD PTR [riz*1-0x99],xmm8
-	vpinsrb xmm15,xmm8,[riz*1-0x99],100
+	vpinsrb xmm15,xmm8,[riz*1-0x99],7
 	vmovdqa ymm8,YMMWORD PTR [riz*1-0x99]
 	vmovdqa YMMWORD PTR [riz*1-0x99],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [riz*1-0x99]
-	vroundpd ymm8,YMMWORD PTR [riz*1-0x99],100
-	vextractf128 XMMWORD PTR [riz*1-0x99],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [riz*1-0x99],100
+	vroundpd ymm8,YMMWORD PTR [riz*1-0x99],7
+	vextractf128 XMMWORD PTR [riz*1-0x99],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [riz*1-0x99],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [riz*1-0x99],ymm8
 	vldmxcsr DWORD PTR [riz*2-0x99]
 	vmovdqa xmm8,XMMWORD PTR [riz*2-0x99]
@@ -3872,17 +3527,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [riz*2-0x99]
 	vcvtpd2ps xmm8,YMMWORD PTR [riz*2-0x99]
 	vpavgb xmm15,xmm8,XMMWORD PTR [riz*2-0x99]
-	vaeskeygenassist xmm8,XMMWORD PTR [riz*2-0x99],100
-	vpextrb [riz*2-0x99],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [riz*2-0x99],7
+	vpextrb [riz*2-0x99],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [riz*2-0x99]
 	vblendvps xmm14,xmm12,XMMWORD PTR [riz*2-0x99],xmm8
-	vpinsrb xmm15,xmm8,[riz*2-0x99],100
+	vpinsrb xmm15,xmm8,[riz*2-0x99],7
 	vmovdqa ymm8,YMMWORD PTR [riz*2-0x99]
 	vmovdqa YMMWORD PTR [riz*2-0x99],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [riz*2-0x99]
-	vroundpd ymm8,YMMWORD PTR [riz*2-0x99],100
-	vextractf128 XMMWORD PTR [riz*2-0x99],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [riz*2-0x99],100
+	vroundpd ymm8,YMMWORD PTR [riz*2-0x99],7
+	vextractf128 XMMWORD PTR [riz*2-0x99],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [riz*2-0x99],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [riz*2-0x99],ymm8
 	vldmxcsr DWORD PTR [rbx+riz*1-0x99]
 	vmovdqa xmm8,XMMWORD PTR [rbx+riz*1-0x99]
@@ -3892,17 +3547,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [rbx+riz*1-0x99]
 	vcvtpd2ps xmm8,YMMWORD PTR [rbx+riz*1-0x99]
 	vpavgb xmm15,xmm8,XMMWORD PTR [rbx+riz*1-0x99]
-	vaeskeygenassist xmm8,XMMWORD PTR [rbx+riz*1-0x99],100
-	vpextrb [rbx+riz*1-0x99],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [rbx+riz*1-0x99],7
+	vpextrb [rbx+riz*1-0x99],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [rbx+riz*1-0x99]
 	vblendvps xmm14,xmm12,XMMWORD PTR [rbx+riz*1-0x99],xmm8
-	vpinsrb xmm15,xmm8,[rbx+riz*1-0x99],100
+	vpinsrb xmm15,xmm8,[rbx+riz*1-0x99],7
 	vmovdqa ymm8,YMMWORD PTR [rbx+riz*1-0x99]
 	vmovdqa YMMWORD PTR [rbx+riz*1-0x99],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [rbx+riz*1-0x99]
-	vroundpd ymm8,YMMWORD PTR [rbx+riz*1-0x99],100
-	vextractf128 XMMWORD PTR [rbx+riz*1-0x99],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [rbx+riz*1-0x99],100
+	vroundpd ymm8,YMMWORD PTR [rbx+riz*1-0x99],7
+	vextractf128 XMMWORD PTR [rbx+riz*1-0x99],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [rbx+riz*1-0x99],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [rbx+riz*1-0x99],ymm8
 	vldmxcsr DWORD PTR [rbx+riz*2-0x99]
 	vmovdqa xmm8,XMMWORD PTR [rbx+riz*2-0x99]
@@ -3912,17 +3567,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [rbx+riz*2-0x99]
 	vcvtpd2ps xmm8,YMMWORD PTR [rbx+riz*2-0x99]
 	vpavgb xmm15,xmm8,XMMWORD PTR [rbx+riz*2-0x99]
-	vaeskeygenassist xmm8,XMMWORD PTR [rbx+riz*2-0x99],100
-	vpextrb [rbx+riz*2-0x99],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [rbx+riz*2-0x99],7
+	vpextrb [rbx+riz*2-0x99],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [rbx+riz*2-0x99]
 	vblendvps xmm14,xmm12,XMMWORD PTR [rbx+riz*2-0x99],xmm8
-	vpinsrb xmm15,xmm8,[rbx+riz*2-0x99],100
+	vpinsrb xmm15,xmm8,[rbx+riz*2-0x99],7
 	vmovdqa ymm8,YMMWORD PTR [rbx+riz*2-0x99]
 	vmovdqa YMMWORD PTR [rbx+riz*2-0x99],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [rbx+riz*2-0x99]
-	vroundpd ymm8,YMMWORD PTR [rbx+riz*2-0x99],100
-	vextractf128 XMMWORD PTR [rbx+riz*2-0x99],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [rbx+riz*2-0x99],100
+	vroundpd ymm8,YMMWORD PTR [rbx+riz*2-0x99],7
+	vextractf128 XMMWORD PTR [rbx+riz*2-0x99],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [rbx+riz*2-0x99],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [rbx+riz*2-0x99],ymm8
 	vldmxcsr DWORD PTR [r12+r15*4-0x99]
 	vmovdqa xmm8,XMMWORD PTR [r12+r15*4-0x99]
@@ -3932,17 +3587,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [r12+r15*4-0x99]
 	vcvtpd2ps xmm8,YMMWORD PTR [r12+r15*4-0x99]
 	vpavgb xmm15,xmm8,XMMWORD PTR [r12+r15*4-0x99]
-	vaeskeygenassist xmm8,XMMWORD PTR [r12+r15*4-0x99],100
-	vpextrb [r12+r15*4-0x99],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [r12+r15*4-0x99],7
+	vpextrb [r12+r15*4-0x99],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [r12+r15*4-0x99]
 	vblendvps xmm14,xmm12,XMMWORD PTR [r12+r15*4-0x99],xmm8
-	vpinsrb xmm15,xmm8,[r12+r15*4-0x99],100
+	vpinsrb xmm15,xmm8,[r12+r15*4-0x99],7
 	vmovdqa ymm8,YMMWORD PTR [r12+r15*4-0x99]
 	vmovdqa YMMWORD PTR [r12+r15*4-0x99],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [r12+r15*4-0x99]
-	vroundpd ymm8,YMMWORD PTR [r12+r15*4-0x99],100
-	vextractf128 XMMWORD PTR [r12+r15*4-0x99],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [r12+r15*4-0x99],100
+	vroundpd ymm8,YMMWORD PTR [r12+r15*4-0x99],7
+	vextractf128 XMMWORD PTR [r12+r15*4-0x99],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [r12+r15*4-0x99],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [r12+r15*4-0x99],ymm8
 	vldmxcsr DWORD PTR [r8+r15*8-0x99]
 	vmovdqa xmm8,XMMWORD PTR [r8+r15*8-0x99]
@@ -3952,17 +3607,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [r8+r15*8-0x99]
 	vcvtpd2ps xmm8,YMMWORD PTR [r8+r15*8-0x99]
 	vpavgb xmm15,xmm8,XMMWORD PTR [r8+r15*8-0x99]
-	vaeskeygenassist xmm8,XMMWORD PTR [r8+r15*8-0x99],100
-	vpextrb [r8+r15*8-0x99],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [r8+r15*8-0x99],7
+	vpextrb [r8+r15*8-0x99],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [r8+r15*8-0x99]
 	vblendvps xmm14,xmm12,XMMWORD PTR [r8+r15*8-0x99],xmm8
-	vpinsrb xmm15,xmm8,[r8+r15*8-0x99],100
+	vpinsrb xmm15,xmm8,[r8+r15*8-0x99],7
 	vmovdqa ymm8,YMMWORD PTR [r8+r15*8-0x99]
 	vmovdqa YMMWORD PTR [r8+r15*8-0x99],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [r8+r15*8-0x99]
-	vroundpd ymm8,YMMWORD PTR [r8+r15*8-0x99],100
-	vextractf128 XMMWORD PTR [r8+r15*8-0x99],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [r8+r15*8-0x99],100
+	vroundpd ymm8,YMMWORD PTR [r8+r15*8-0x99],7
+	vextractf128 XMMWORD PTR [r8+r15*8-0x99],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [r8+r15*8-0x99],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [r8+r15*8-0x99],ymm8
 	vldmxcsr DWORD PTR [rbp+r12*4-0x99]
 	vmovdqa xmm8,XMMWORD PTR [rbp+r12*4-0x99]
@@ -3972,17 +3627,17 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [rbp+r12*4-0x99]
 	vcvtpd2ps xmm8,YMMWORD PTR [rbp+r12*4-0x99]
 	vpavgb xmm15,xmm8,XMMWORD PTR [rbp+r12*4-0x99]
-	vaeskeygenassist xmm8,XMMWORD PTR [rbp+r12*4-0x99],100
-	vpextrb [rbp+r12*4-0x99],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [rbp+r12*4-0x99],7
+	vpextrb [rbp+r12*4-0x99],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [rbp+r12*4-0x99]
 	vblendvps xmm14,xmm12,XMMWORD PTR [rbp+r12*4-0x99],xmm8
-	vpinsrb xmm15,xmm8,[rbp+r12*4-0x99],100
+	vpinsrb xmm15,xmm8,[rbp+r12*4-0x99],7
 	vmovdqa ymm8,YMMWORD PTR [rbp+r12*4-0x99]
 	vmovdqa YMMWORD PTR [rbp+r12*4-0x99],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [rbp+r12*4-0x99]
-	vroundpd ymm8,YMMWORD PTR [rbp+r12*4-0x99],100
-	vextractf128 XMMWORD PTR [rbp+r12*4-0x99],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [rbp+r12*4-0x99],100
+	vroundpd ymm8,YMMWORD PTR [rbp+r12*4-0x99],7
+	vextractf128 XMMWORD PTR [rbp+r12*4-0x99],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [rbp+r12*4-0x99],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [rbp+r12*4-0x99],ymm8
 	vldmxcsr DWORD PTR [rsp+r13*1-0x99]
 	vmovdqa xmm8,XMMWORD PTR [rsp+r13*1-0x99]
@@ -3992,41 +3647,41 @@ _start:
 	vcvtdq2pd ymm8,XMMWORD PTR [rsp+r13*1-0x99]
 	vcvtpd2ps xmm8,YMMWORD PTR [rsp+r13*1-0x99]
 	vpavgb xmm15,xmm8,XMMWORD PTR [rsp+r13*1-0x99]
-	vaeskeygenassist xmm8,XMMWORD PTR [rsp+r13*1-0x99],100
-	vpextrb [rsp+r13*1-0x99],xmm8,100
+	vaeskeygenassist xmm8,XMMWORD PTR [rsp+r13*1-0x99],7
+	vpextrb [rsp+r13*1-0x99],xmm8,7
 	vcvtsi2sd xmm15,xmm8,DWORD PTR [rsp+r13*1-0x99]
 	vblendvps xmm14,xmm12,XMMWORD PTR [rsp+r13*1-0x99],xmm8
-	vpinsrb xmm15,xmm8,[rsp+r13*1-0x99],100
+	vpinsrb xmm15,xmm8,[rsp+r13*1-0x99],7
 	vmovdqa ymm8,YMMWORD PTR [rsp+r13*1-0x99]
 	vmovdqa YMMWORD PTR [rsp+r13*1-0x99],ymm8
 	vpermilpd ymm15,ymm8,YMMWORD PTR [rsp+r13*1-0x99]
-	vroundpd ymm8,YMMWORD PTR [rsp+r13*1-0x99],100
-	vextractf128 XMMWORD PTR [rsp+r13*1-0x99],ymm8,100
-	vperm2f128 ymm15,ymm8,YMMWORD PTR [rsp+r13*1-0x99],100
+	vroundpd ymm8,YMMWORD PTR [rsp+r13*1-0x99],7
+	vextractf128 XMMWORD PTR [rsp+r13*1-0x99],ymm8,7
+	vperm2f128 ymm15,ymm8,YMMWORD PTR [rsp+r13*1-0x99],7
 	vblendvpd ymm14,ymm12,YMMWORD PTR [rsp+r13*1-0x99],ymm8
 # Tests for all register operands.
 	vmovmskpd r8d,xmm8
-	vpslld xmm15,xmm8,100
+	vpslld xmm15,xmm8,7
 	vmovmskps r8d,ymm8
 	vmovdqa xmm15,xmm8
 	vmovd r8d,xmm8
 	vcvtsd2si r8d,xmm8
 	vcvtdq2pd ymm8,xmm8
 	vcvtpd2ps xmm8,ymm8
-	vaeskeygenassist xmm15,xmm8,100
-	vpextrb r8d,xmm8,100
+	vaeskeygenassist xmm15,xmm8,7
+	vpextrb r8d,xmm8,7
 	vcvtsi2sd xmm15,xmm8,r8d
 	vblendvps xmm14,xmm12,xmm8,xmm8
-	vpinsrb xmm15,xmm8,r8d,100
+	vpinsrb xmm15,xmm8,r8d,7
 	vmovdqa ymm15,ymm8
 	vpermilpd ymm12,ymm15,ymm8
-	vroundpd ymm15,ymm8,100
-	vextractf128 xmm8,ymm8,100
-	vperm2f128 ymm12,ymm15,ymm8,100
+	vroundpd ymm15,ymm8,7
+	vextractf128 xmm8,ymm8,7
+	vperm2f128 ymm12,ymm15,ymm8,7
 	vblendvpd ymm14,ymm12,ymm15,ymm8
-	vinsertf128 ymm15,ymm8,xmm8,100
+	vinsertf128 ymm15,ymm8,xmm8,7
 # Tests for different memory/register operand
 	vcvtsd2si r8,QWORD PTR  [rcx]
 	vextractps r8,xmm8,10
 	vcvtss2si r8,DWORD PTR  [rcx]
-	vpinsrw xmm8,xmm15,r8,100
+	vpinsrw xmm8,xmm15,r8,7
diff --git a/gas/testsuite/gas/i386/x86-64-inval-avx.l b/gas/testsuite/gas/i386/x86-64-inval-avx.l
index 58820ba..b821448 100644
--- a/gas/testsuite/gas/i386/x86-64-inval-avx.l
+++ b/gas/testsuite/gas/i386/x86-64-inval-avx.l
@@ -2,53 +2,9 @@
 .*:4: Error: .*
 .*:5: Error: .*
 .*:6: Error: .*
-.*:7: Error: .*
-.*:8: Error: .*
 .*:9: Error: .*
 .*:10: Error: .*
 .*:11: Error: .*
-.*:12: Error: .*
-.*:13: Error: .*
-.*:14: Error: .*
-.*:15: Error: .*
-.*:16: Error: .*
-.*:17: Error: .*
-.*:18: Error: .*
-.*:19: Error: .*
-.*:20: Error: .*
-.*:21: Error: .*
-.*:22: Error: .*
-.*:23: Error: .*
-.*:24: Error: .*
-.*:25: Error: .*
-.*:26: Error: .*
-.*:27: Error: .*
-.*:28: Error: .*
-.*:31: Error: .*
-.*:32: Error: .*
-.*:33: Error: .*
-.*:34: Error: .*
-.*:35: Error: .*
-.*:36: Error: .*
-.*:37: Error: .*
-.*:38: Error: .*
-.*:39: Error: .*
-.*:40: Error: .*
-.*:41: Error: .*
-.*:42: Error: .*
-.*:43: Error: .*
-.*:44: Error: .*
-.*:45: Error: .*
-.*:46: Error: .*
-.*:47: Error: .*
-.*:48: Error: .*
-.*:49: Error: .*
-.*:50: Error: .*
-.*:51: Error: .*
-.*:52: Error: .*
-.*:53: Error: .*
-.*:54: Error: .*
-.*:55: Error: .*
 GAS LISTING .*
 
 
@@ -58,52 +14,8 @@ GAS LISTING .*
 [ 	]*4[ 	]+vcvtpd2dq \(%rcx\),%xmm2
 [ 	]*5[ 	]+vcvtpd2ps \(%rcx\),%xmm2
 [ 	]*6[ 	]+vcvttpd2dq \(%rcx\),%xmm2
-[ 	]*7[ 	]+vfmaddpd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*8[ 	]+vfmaddps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*9[ 	]+vfmaddsd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*10[ 	]+vfmaddss \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*11[ 	]+vfmaddsubpd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*12[ 	]+vfmaddsubps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*13[ 	]+vfmsubaddpd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*14[ 	]+vfmsubaddps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*15[ 	]+vfmsubpd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*16[ 	]+vfmsubps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*17[ 	]+vfmsubsd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*18[ 	]+vfmsubss \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*19[ 	]+vfnmaddpd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*20[ 	]+vfnmaddps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*21[ 	]+vfnmaddsd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*22[ 	]+vfnmaddss \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*23[ 	]+vfnmsubpd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*24[ 	]+vfnmsubps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*25[ 	]+vfnmsubsd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*26[ 	]+vfnmsubss \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*27[ 	]+vpermil2pd \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*28[ 	]+vpermil2ps \$17,%xmm4,%xmm2,%xmm1,%xmm3
-[ 	]*29[ 	]+
-[ 	]*30[ 	]+\.intel_syntax noprefix
-[ 	]*31[ 	]+vcvtpd2dq xmm2,\[rcx\]
-[ 	]*32[ 	]+vcvtpd2ps xmm2,\[rcx\]
-[ 	]*33[ 	]+vcvttpd2dq xmm2,\[rcx\]
-[ 	]*34[ 	]+vfmaddpd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*35[ 	]+vfmaddps xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*36[ 	]+vfmaddsd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*37[ 	]+vfmaddss xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*38[ 	]+vfmaddsubpd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*39[ 	]+vfmaddsubps xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*40[ 	]+vfmsubaddpd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*41[ 	]+vfmsubaddps xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*42[ 	]+vfmsubpd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*43[ 	]+vfmsubps xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*44[ 	]+vfmsubsd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*45[ 	]+vfmsubss xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*46[ 	]+vfnmaddpd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*47[ 	]+vfnmaddps xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*48[ 	]+vfnmaddsd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*49[ 	]+vfnmaddss xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*50[ 	]+vfnmsubpd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*51[ 	]+vfnmsubps xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*52[ 	]+vfnmsubsd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*53[ 	]+vfnmsubss xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*54[ 	]+vpermil2pd xmm3,xmm1,xmm2,xmm4,0x10
-[ 	]*55[ 	]+vpermil2ps xmm3,xmm1,xmm2,xmm4,0x10
+[ 	]*7[ 	]+
+[ 	]*8[ 	]+\.intel_syntax noprefix
+[ 	]*9[ 	]+vcvtpd2dq xmm2,\[rcx\]
+[ 	]*10[ 	]+vcvtpd2ps xmm2,\[rcx\]
+[ 	]*11[ 	]+vcvttpd2dq xmm2,\[rcx\]
diff --git a/gas/testsuite/gas/i386/x86-64-inval-avx.s b/gas/testsuite/gas/i386/x86-64-inval-avx.s
index 3836ce4..d641d51 100644
--- a/gas/testsuite/gas/i386/x86-64-inval-avx.s
+++ b/gas/testsuite/gas/i386/x86-64-inval-avx.s
@@ -4,52 +4,8 @@ _start:
 	vcvtpd2dq (%rcx),%xmm2
 	vcvtpd2ps (%rcx),%xmm2
 	vcvttpd2dq (%rcx),%xmm2
-	vfmaddpd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmaddps $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmaddsd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmaddss $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmaddsubpd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmaddsubps $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmsubaddpd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmsubaddps $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmsubpd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmsubps $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmsubsd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfmsubss $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmaddpd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmaddps $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmaddsd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmaddss $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmsubpd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmsubps $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmsubsd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vfnmsubss $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vpermil2pd $17,%xmm4,%xmm2,%xmm1,%xmm3
-	vpermil2ps $17,%xmm4,%xmm2,%xmm1,%xmm3
 
 	.intel_syntax noprefix
 	vcvtpd2dq xmm2,[rcx]
 	vcvtpd2ps xmm2,[rcx]
 	vcvttpd2dq xmm2,[rcx]
-	vfmaddpd xmm3,xmm1,xmm2,xmm4,0x10
-	vfmaddps xmm3,xmm1,xmm2,xmm4,0x10
-	vfmaddsd xmm3,xmm1,xmm2,xmm4,0x10
-	vfmaddss xmm3,xmm1,xmm2,xmm4,0x10
-	vfmaddsubpd xmm3,xmm1,xmm2,xmm4,0x10
-	vfmaddsubps xmm3,xmm1,xmm2,xmm4,0x10
-	vfmsubaddpd xmm3,xmm1,xmm2,xmm4,0x10
-	vfmsubaddps xmm3,xmm1,xmm2,xmm4,0x10
-	vfmsubpd xmm3,xmm1,xmm2,xmm4,0x10
-	vfmsubps xmm3,xmm1,xmm2,xmm4,0x10
-	vfmsubsd xmm3,xmm1,xmm2,xmm4,0x10
-	vfmsubss xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmaddpd xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmaddps xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmaddsd xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmaddss xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmsubpd xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmsubps xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmsubsd xmm3,xmm1,xmm2,xmm4,0x10
-	vfnmsubss xmm3,xmm1,xmm2,xmm4,0x10
-	vpermil2pd xmm3,xmm1,xmm2,xmm4,0x10
-	vpermil2ps xmm3,xmm1,xmm2,xmm4,0x10