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authorClaudiu Zissulescu <claziss@synopsys.com>2016-04-05 17:37:29 +0200
committerClaudiu Zissulescu <claziss@synopsys.com>2016-04-05 17:37:45 +0200
commit8ddf6b2a1384ca73a16827022da5f4423703154a (patch)
treea55da1754e6f171faa26bf3d89df048b9d4d3c9c /gas/testsuite
parent1e5885b72e20ef874f526e77a4946b2655e6d3c3 (diff)
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[ARC] Fix support for double assist instructions.
opcodes/ 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com> * arc-regs.h: Add a new subclass field. Add double assist accumulator register values. * arc-tbl.h: Use DPA subclass to mark the double assist instructions. Use DPX/SPX subclas to mark the FPX instructions. * arc-opc.c (RSP): Define instead of SP. (arc_aux_regs): Add the subclass field. include/ 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com> * opcode/arc.h (DPA, DPX, SPX): New subclass enums. (ARC_FPUDA): Define. (arc_aux_reg): Add new field. gas/ 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (is_code_density_p): Compare directly the subclass field. (is_spfp_p, is_dpfp_p, is_spfp_p): Define. (check_cpu_feature): New function. (find_opcode_match): Use check_cpu_feature function. (preprocess_operands): Likewise. (md_parse_option): Use mfpuda, mdpfp, mspfp options. * testsuite/gas/arc/tdpfp.d: New file. * testsuite/gas/arc/tfpuda.d: Likewise. * testsuite/gas/arc/tfpx.s: Likewise.
Diffstat (limited to 'gas/testsuite')
-rw-r--r--gas/testsuite/gas/arc/tdpfp.d28
-rw-r--r--gas/testsuite/gas/arc/tfpuda.d28
-rw-r--r--gas/testsuite/gas/arc/tfpx.s22
3 files changed, 78 insertions, 0 deletions
diff --git a/gas/testsuite/gas/arc/tdpfp.d b/gas/testsuite/gas/arc/tdpfp.d
new file mode 100644
index 0000000..6475ebc
--- /dev/null
+++ b/gas/testsuite/gas/arc/tdpfp.d
@@ -0,0 +1,28 @@
+#as:-mcpu=arcem -mdpfp
+#objdump: -dr
+#source: tfpx.s
+
+.*: +file format .*arc.*
+
+
+Disassembly of section .text:
+
+00000000 <.text>:
+ 0: 24aa 008c lr r4,\[770\]
+ 4: 23aa 004c lr r3,\[769\]
+ 8: 24aa 010c lr r4,\[772\]
+ c: 23aa 00cc lr r3,\[771\]
+ 10: 320c 00c1 daddh11 r1,r2,r3
+ 14: 320d 00c1 daddh12 r1,r2,r3
+ 18: 320e 00c1 daddh21 r1,r2,r3
+ 1c: 320f 00c1 daddh22 r1,r2,r3
+ 20: 3218 00c1 dexcl1 r1,r2,r3
+ 24: 3219 00c1 dexcl2 r1,r2,r3
+ 28: 3208 00c1 dmulh11 r1,r2,r3
+ 2c: 3209 00c1 dmulh12 r1,r2,r3
+ 30: 320a 00c1 dmulh21 r1,r2,r3
+ 34: 320b 00c1 dmulh22 r1,r2,r3
+ 38: 3210 00c1 dsubh11 r1,r2,r3
+ 3c: 3211 00c1 dsubh12 r1,r2,r3
+ 40: 3212 00c1 dsubh21 r1,r2,r3
+ 44: 3213 00c1 dsubh22 r1,r2,r3
diff --git a/gas/testsuite/gas/arc/tfpuda.d b/gas/testsuite/gas/arc/tfpuda.d
new file mode 100644
index 0000000..a6645a5
--- /dev/null
+++ b/gas/testsuite/gas/arc/tfpuda.d
@@ -0,0 +1,28 @@
+#as:-mcpu=arcem -mfpuda
+#objdump: -dr
+#source: tfpx.s
+
+.*: +file format .*arc.*
+
+
+Disassembly of section .text:
+
+00000000 <.text>:
+ 0: 24aa 00cc lr r4,\[771\]
+ 4: 23aa 008c lr r3,\[770\]
+ 8: 24aa 014c lr r4,\[773\]
+ c: 23aa 010c lr r3,\[772\]
+ 10: 3234 00c1 daddh11 r1,r2,r3
+ 14: 3235 00c1 daddh12 r1,r2,r3
+ 18: 3236 00c1 daddh21 r1,r2,r3
+ 1c: 3237 00c1 daddh22 r1,r2,r3
+ 20: 323c 00c1 dexcl1 r1,r2,r3
+ 24: 323d 00c1 dexcl2 r1,r2,r3
+ 28: 3230 00c1 dmulh11 r1,r2,r3
+ 2c: 3231 00c1 dmulh12 r1,r2,r3
+ 30: 3232 00c1 dmulh21 r1,r2,r3
+ 34: 3233 00c1 dmulh22 r1,r2,r3
+ 38: 3238 00c1 dsubh11 r1,r2,r3
+ 3c: 3239 00c1 dsubh12 r1,r2,r3
+ 40: 323a 00c1 dsubh21 r1,r2,r3
+ 44: 323b 00c1 dsubh22 r1,r2,r3
diff --git a/gas/testsuite/gas/arc/tfpx.s b/gas/testsuite/gas/arc/tfpx.s
new file mode 100644
index 0000000..ea722a3
--- /dev/null
+++ b/gas/testsuite/gas/arc/tfpx.s
@@ -0,0 +1,22 @@
+ lr r4,[d1h]
+ lr r3,[d1l]
+ lr r4,[d2h]
+ lr r3,[d2l]
+
+ daddh11 r1,r2,r3
+ daddh12 r1,r2,r3
+ daddh21 r1,r2,r3
+ daddh22 r1,r2,r3
+
+ dexcl1 r1,r2,r3
+ dexcl2 r1,r2,r3
+
+ dmulh11 r1,r2,r3
+ dmulh12 r1,r2,r3
+ dmulh21 r1,r2,r3
+ dmulh22 r1,r2,r3
+
+ dsubh11 r1,r2,r3
+ dsubh12 r1,r2,r3
+ dsubh21 r1,r2,r3
+ dsubh22 r1,r2,r3