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authorPaul Brook <paul@codesourcery.com>2006-10-08 18:44:07 +0000
committerPaul Brook <paul@codesourcery.com>2006-10-08 18:44:07 +0000
commit036dc3f7557a7cd087c0965aad5bab387c6b2bce (patch)
tree298b0f36ef97754dcd7d483bca2d797b5afb0d49 /gas/testsuite
parentea2c415d499ae16611bbfedfa1bd62a2e0e470e3 (diff)
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2006-10-08 Paul Brook <paul@codesourcery.com>
gas/ * config/tc-arm.c (parse_big_immediate): 64-bit host fix. (parse_operands): Use parse_big_immediate for OP_NILO. (neon_cmode_for_logic_imm): Try smaller element sizes. (neon_cmode_for_move_imm): Ditto. (do_neon_logic): Handle .i64 pseudo-op. gas/testsuite/ * testsuite/gas/arm/neon-cov.s: Test pseudo-instruction forms of vmov, vmvn and logic immediate instructions. * testsuite/gas/arm/neon-cov.d: ditto.
Diffstat (limited to 'gas/testsuite')
-rw-r--r--gas/testsuite/ChangeLog6
-rw-r--r--gas/testsuite/gas/arm/neon-cov.d142
-rw-r--r--gas/testsuite/gas/arm/neon-cov.s36
3 files changed, 184 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 91a168e..8b5d647 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2006-10-08 Paul Brook <paul@codesourcery.com>
+
+ * testsuite/gas/arm/neon-cov.s: Test pseudo-instruction forms of
+ vmov, vmvn and logic immediate instructions.
+ * testsuite/gas/arm/neon-cov.d: ditto.
+
2006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
* gas/arm/iwmmxt-wldstbh.s: New file.
diff --git a/gas/testsuite/gas/arm/neon-cov.d b/gas/testsuite/gas/arm/neon-cov.d
index ca695d8..a8c8e20 100644
--- a/gas/testsuite/gas/arm/neon-cov.d
+++ b/gas/testsuite/gas/arm/neon-cov.d
@@ -278,6 +278,24 @@ Disassembly of section \.text:
0[0-9a-f]+ <[^>]+> f3000150 veor q0, q0, q0
0[0-9a-f]+ <[^>]+> f3000150 veor q0, q0, q0
0[0-9a-f]+ <[^>]+> f3000110 veor d0, d0, d0
+0[0-9a-f]+ <[^>]+> f3820175 vbic\.i32 q0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820175 vbic\.i32 q0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820135 vbic\.i32 d0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820375 vbic\.i32 q0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820375 vbic\.i32 q0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820335 vbic\.i32 d0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820575 vbic\.i32 q0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820575 vbic\.i32 q0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820535 vbic\.i32 d0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820775 vbic\.i32 q0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820775 vbic\.i32 q0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820735 vbic\.i32 d0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820935 vbic\.i16 d0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b35 vbic\.i16 d0, #42240 ; 0xa500
0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff
0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff
0[0-9a-f]+ <[^>]+> f387013f vbic\.i32 d0, #255 ; 0x000000ff
@@ -296,12 +314,39 @@ Disassembly of section \.text:
0[0-9a-f]+ <[^>]+> f387077f vbic\.i32 q0, #-16777216 ; 0xff000000
0[0-9a-f]+ <[^>]+> f387077f vbic\.i32 q0, #-16777216 ; 0xff000000
0[0-9a-f]+ <[^>]+> f387073f vbic\.i32 d0, #-16777216 ; 0xff000000
+0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820935 vbic\.i16 d0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b35 vbic\.i16 d0, #42240 ; 0xa500
0[0-9a-f]+ <[^>]+> f387097f vbic\.i16 q0, #255 ; 0x00ff
0[0-9a-f]+ <[^>]+> f387097f vbic\.i16 q0, #255 ; 0x00ff
0[0-9a-f]+ <[^>]+> f387093f vbic\.i16 d0, #255 ; 0x00ff
0[0-9a-f]+ <[^>]+> f3870b7f vbic\.i16 q0, #65280 ; 0xff00
0[0-9a-f]+ <[^>]+> f3870b7f vbic\.i16 q0, #65280 ; 0xff00
0[0-9a-f]+ <[^>]+> f3870b3f vbic\.i16 d0, #65280 ; 0xff00
+0[0-9a-f]+ <[^>]+> f2800970 vbic\.i16 q0, #0 ; 0x0000
+0[0-9a-f]+ <[^>]+> f2800970 vbic\.i16 q0, #0 ; 0x0000
+0[0-9a-f]+ <[^>]+> f2800930 vbic\.i16 d0, #0 ; 0x0000
+0[0-9a-f]+ <[^>]+> f3820155 vorr\.i32 q0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820155 vorr\.i32 q0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820115 vorr\.i32 d0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820355 vorr\.i32 q0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820355 vorr\.i32 q0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820315 vorr\.i32 d0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820555 vorr\.i32 q0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820555 vorr\.i32 q0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820515 vorr\.i32 d0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820755 vorr\.i32 q0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820755 vorr\.i32 q0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820715 vorr\.i32 d0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820915 vorr\.i16 d0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b15 vorr\.i16 d0, #42240 ; 0xa500
0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff
0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff
0[0-9a-f]+ <[^>]+> f387011f vorr\.i32 d0, #255 ; 0x000000ff
@@ -320,12 +365,39 @@ Disassembly of section \.text:
0[0-9a-f]+ <[^>]+> f387075f vorr\.i32 q0, #-16777216 ; 0xff000000
0[0-9a-f]+ <[^>]+> f387075f vorr\.i32 q0, #-16777216 ; 0xff000000
0[0-9a-f]+ <[^>]+> f387071f vorr\.i32 d0, #-16777216 ; 0xff000000
+0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820915 vorr\.i16 d0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b15 vorr\.i16 d0, #42240 ; 0xa500
0[0-9a-f]+ <[^>]+> f387095f vorr\.i16 q0, #255 ; 0x00ff
0[0-9a-f]+ <[^>]+> f387095f vorr\.i16 q0, #255 ; 0x00ff
0[0-9a-f]+ <[^>]+> f387091f vorr\.i16 d0, #255 ; 0x00ff
0[0-9a-f]+ <[^>]+> f3870b5f vorr\.i16 q0, #65280 ; 0xff00
0[0-9a-f]+ <[^>]+> f3870b5f vorr\.i16 q0, #65280 ; 0xff00
0[0-9a-f]+ <[^>]+> f3870b1f vorr\.i16 d0, #65280 ; 0xff00
+0[0-9a-f]+ <[^>]+> f2800950 vorr\.i16 q0, #0 ; 0x0000
+0[0-9a-f]+ <[^>]+> f2800950 vorr\.i16 q0, #0 ; 0x0000
+0[0-9a-f]+ <[^>]+> f2800910 vorr\.i16 d0, #0 ; 0x0000
+0[0-9a-f]+ <[^>]+> f3820175 vbic\.i32 q0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820175 vbic\.i32 q0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820135 vbic\.i32 d0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820375 vbic\.i32 q0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820375 vbic\.i32 q0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820335 vbic\.i32 d0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820575 vbic\.i32 q0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820575 vbic\.i32 q0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820535 vbic\.i32 d0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820775 vbic\.i32 q0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820775 vbic\.i32 q0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820735 vbic\.i32 d0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820935 vbic\.i16 d0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b35 vbic\.i16 d0, #42240 ; 0xa500
0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff
0[0-9a-f]+ <[^>]+> f387017f vbic\.i32 q0, #255 ; 0x000000ff
0[0-9a-f]+ <[^>]+> f387013f vbic\.i32 d0, #255 ; 0x000000ff
@@ -344,12 +416,39 @@ Disassembly of section \.text:
0[0-9a-f]+ <[^>]+> f387077f vbic\.i32 q0, #-16777216 ; 0xff000000
0[0-9a-f]+ <[^>]+> f387077f vbic\.i32 q0, #-16777216 ; 0xff000000
0[0-9a-f]+ <[^>]+> f387073f vbic\.i32 d0, #-16777216 ; 0xff000000
+0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820975 vbic\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820935 vbic\.i16 d0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b75 vbic\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b35 vbic\.i16 d0, #42240 ; 0xa500
0[0-9a-f]+ <[^>]+> f387097f vbic\.i16 q0, #255 ; 0x00ff
0[0-9a-f]+ <[^>]+> f387097f vbic\.i16 q0, #255 ; 0x00ff
0[0-9a-f]+ <[^>]+> f387093f vbic\.i16 d0, #255 ; 0x00ff
0[0-9a-f]+ <[^>]+> f3870b7f vbic\.i16 q0, #65280 ; 0xff00
0[0-9a-f]+ <[^>]+> f3870b7f vbic\.i16 q0, #65280 ; 0xff00
0[0-9a-f]+ <[^>]+> f3870b3f vbic\.i16 d0, #65280 ; 0xff00
+0[0-9a-f]+ <[^>]+> f2800970 vbic\.i16 q0, #0 ; 0x0000
+0[0-9a-f]+ <[^>]+> f2800970 vbic\.i16 q0, #0 ; 0x0000
+0[0-9a-f]+ <[^>]+> f2800930 vbic\.i16 d0, #0 ; 0x0000
+0[0-9a-f]+ <[^>]+> f3820155 vorr\.i32 q0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820155 vorr\.i32 q0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820115 vorr\.i32 d0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820355 vorr\.i32 q0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820355 vorr\.i32 q0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820315 vorr\.i32 d0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820555 vorr\.i32 q0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820555 vorr\.i32 q0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820515 vorr\.i32 d0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820755 vorr\.i32 q0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820755 vorr\.i32 q0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820715 vorr\.i32 d0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820915 vorr\.i16 d0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b15 vorr\.i16 d0, #42240 ; 0xa500
0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff
0[0-9a-f]+ <[^>]+> f387015f vorr\.i32 q0, #255 ; 0x000000ff
0[0-9a-f]+ <[^>]+> f387011f vorr\.i32 d0, #255 ; 0x000000ff
@@ -368,12 +467,21 @@ Disassembly of section \.text:
0[0-9a-f]+ <[^>]+> f387075f vorr\.i32 q0, #-16777216 ; 0xff000000
0[0-9a-f]+ <[^>]+> f387075f vorr\.i32 q0, #-16777216 ; 0xff000000
0[0-9a-f]+ <[^>]+> f387071f vorr\.i32 d0, #-16777216 ; 0xff000000
+0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820955 vorr\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820915 vorr\.i16 d0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b55 vorr\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820b15 vorr\.i16 d0, #42240 ; 0xa500
0[0-9a-f]+ <[^>]+> f387095f vorr\.i16 q0, #255 ; 0x00ff
0[0-9a-f]+ <[^>]+> f387095f vorr\.i16 q0, #255 ; 0x00ff
0[0-9a-f]+ <[^>]+> f387091f vorr\.i16 d0, #255 ; 0x00ff
0[0-9a-f]+ <[^>]+> f3870b5f vorr\.i16 q0, #65280 ; 0xff00
0[0-9a-f]+ <[^>]+> f3870b5f vorr\.i16 q0, #65280 ; 0xff00
0[0-9a-f]+ <[^>]+> f3870b1f vorr\.i16 d0, #65280 ; 0xff00
+0[0-9a-f]+ <[^>]+> f2800950 vorr\.i16 q0, #0 ; 0x0000
+0[0-9a-f]+ <[^>]+> f2800950 vorr\.i16 q0, #0 ; 0x0000
+0[0-9a-f]+ <[^>]+> f2800910 vorr\.i16 d0, #0 ; 0x0000
0[0-9a-f]+ <[^>]+> f3100150 vbsl q0, q0, q0
0[0-9a-f]+ <[^>]+> f3100150 vbsl q0, q0, q0
0[0-9a-f]+ <[^>]+> f3100110 vbsl d0, d0, d0
@@ -1091,6 +1199,40 @@ Disassembly of section \.text:
0[0-9a-f]+ <[^>]+> f3810e31 vmov\.i64 d0, #0xff0000ff000000ff
0[0-9a-f]+ <[^>]+> f2810f51 vmov\.f32 q0, #4\.25 ; 0x40880000
0[0-9a-f]+ <[^>]+> f2810f11 vmov\.f32 d0, #4\.25 ; 0x40880000
+0[0-9a-f]+ <[^>]+> f3820e55 vmov\.i8 q0, #165 ; 0xa5
+0[0-9a-f]+ <[^>]+> f3820e15 vmov\.i8 d0, #165 ; 0xa5
+0[0-9a-f]+ <[^>]+> f2850e5a vmov\.i8 q0, #90 ; 0x5a
+0[0-9a-f]+ <[^>]+> f2850e1a vmov\.i8 d0, #90 ; 0x5a
+0[0-9a-f]+ <[^>]+> f3820e55 vmov\.i8 q0, #165 ; 0xa5
+0[0-9a-f]+ <[^>]+> f3820e15 vmov\.i8 d0, #165 ; 0xa5
+0[0-9a-f]+ <[^>]+> f2850e5a vmov\.i8 q0, #90 ; 0x5a
+0[0-9a-f]+ <[^>]+> f2850e1a vmov\.i8 d0, #90 ; 0x5a
+0[0-9a-f]+ <[^>]+> f3820855 vmov\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820815 vmov\.i16 d0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820a55 vmov\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820a15 vmov\.i16 d0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820e55 vmov\.i8 q0, #165 ; 0xa5
+0[0-9a-f]+ <[^>]+> f3820e15 vmov\.i8 d0, #165 ; 0xa5
+0[0-9a-f]+ <[^>]+> f2850e5a vmov\.i8 q0, #90 ; 0x5a
+0[0-9a-f]+ <[^>]+> f2850e1a vmov\.i8 d0, #90 ; 0x5a
+0[0-9a-f]+ <[^>]+> f3820855 vmov\.i16 q0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820815 vmov\.i16 d0, #165 ; 0x00a5
+0[0-9a-f]+ <[^>]+> f3820a55 vmov\.i16 q0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820a15 vmov\.i16 d0, #42240 ; 0xa500
+0[0-9a-f]+ <[^>]+> f3820055 vmov\.i32 q0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820015 vmov\.i32 d0, #165 ; 0x000000a5
+0[0-9a-f]+ <[^>]+> f3820255 vmov\.i32 q0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820215 vmov\.i32 d0, #42240 ; 0x0000a500
+0[0-9a-f]+ <[^>]+> f3820455 vmov\.i32 q0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820415 vmov\.i32 d0, #10813440 ; 0x00a50000
+0[0-9a-f]+ <[^>]+> f3820655 vmov\.i32 q0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820615 vmov\.i32 d0, #-1526726656 ; 0xa5000000
+0[0-9a-f]+ <[^>]+> f3820c55 vmov\.i32 q0, #42495 ; 0x0000a5ff
+0[0-9a-f]+ <[^>]+> f3820c15 vmov\.i32 d0, #42495 ; 0x0000a5ff
+0[0-9a-f]+ <[^>]+> f3820d55 vmov\.i32 q0, #10878975 ; 0x00a5ffff
+0[0-9a-f]+ <[^>]+> f3820d15 vmov\.i32 d0, #10878975 ; 0x00a5ffff
+0[0-9a-f]+ <[^>]+> f285067a vmvn\.i32 q0, #1509949440 ; 0x5a000000
+0[0-9a-f]+ <[^>]+> f285063a vmvn\.i32 d0, #1509949440 ; 0x5a000000
0[0-9a-f]+ <[^>]+> f3b005c0 vmvn q0, q0
0[0-9a-f]+ <[^>]+> f3b005c0 vmvn q0, q0
0[0-9a-f]+ <[^>]+> f3b00580 vmvn d0, d0
diff --git a/gas/testsuite/gas/arm/neon-cov.s b/gas/testsuite/gas/arm/neon-cov.s
index d3253ac..079e896 100644
--- a/gas/testsuite/gas/arm/neon-cov.s
+++ b/gas/testsuite/gas/arm/neon-cov.s
@@ -112,28 +112,46 @@
.endm
.macro logic_imm op opq
+ logic_imm_1 \op \opq 0x000000a5000000a5 .i64
+ logic_imm_1 \op \opq 0x0000a5000000a500 .i64
+ logic_imm_1 \op \opq 0x00a5000000a50000 .i64
+ logic_imm_1 \op \opq 0xa5000000a5000000 .i64
+ logic_imm_1 \op \opq 0x00a500a500a500a5 .i64
+ logic_imm_1 \op \opq 0xa500a500a500a500 .i64
logic_imm_1 \op \opq 0x000000ff .i32
logic_imm_1 \op \opq 0x000000ff .s32
logic_imm_1 \op \opq 0x000000ff .u32
logic_imm_1 \op \opq 0x0000ff00 .i32
logic_imm_1 \op \opq 0x00ff0000 .i32
logic_imm_1 \op \opq 0xff000000 .i32
+ logic_imm_1 \op \opq 0x00a500a5 .i32
+ logic_imm_1 \op \opq 0xa500a500 .i32
logic_imm_1 \op \opq 0x00ff .i16
logic_imm_1 \op \opq 0xff00 .i16
+ logic_imm_1 \op \opq 0x00 .i8
.endm
logic_imm vbic vbicq
logic_imm vorr vorrq
.macro logic_inv_imm op opq
+ logic_imm_1 \op \opq 0xffffff5affffff5a .i64
+ logic_imm_1 \op \opq 0xffff5affffff5aff .i64
+ logic_imm_1 \op \opq 0xff5affffff5affff .i64
+ logic_imm_1 \op \opq 0x5affffff5affffff .i64
+ logic_imm_1 \op \opq 0xff5aff5aff5aff5a .i64
+ logic_imm_1 \op \opq 0x5aff5aff5aff5aff .i64
logic_imm_1 \op \opq 0xffffff00 .i32
logic_imm_1 \op \opq 0xffffff00 .s32
logic_imm_1 \op \opq 0xffffff00 .u32
logic_imm_1 \op \opq 0xffff00ff .i32
logic_imm_1 \op \opq 0xff00ffff .i32
logic_imm_1 \op \opq 0x00ffffff .i32
+ logic_imm_1 \op \opq 0xff5aff5a .i32
+ logic_imm_1 \op \opq 0x5aff5aff .i32
logic_imm_1 \op \opq 0xff00 .i16
logic_imm_1 \op \opq 0x00ff .i16
+ logic_imm_1 \op \opq 0xff .i8
.endm
logic_inv_imm vand vandq
@@ -440,6 +458,24 @@
mov_imm vmov 0xff0000ff000000ff .i64
mov_imm vmov 0x40880000 .f32
+ mov_imm vmov 0xa5a5 .i16
+ mov_imm vmvn 0xa5a5 .i16
+ mov_imm vmov 0xa5a5a5a5 .i32
+ mov_imm vmvn 0xa5a5a5a5 .i32
+ mov_imm vmov 0x00a500a5 .i32
+ mov_imm vmov 0xa500a500 .i32
+ mov_imm vmov 0xa5a5a5a5a5a5a5a5 .i64
+ mov_imm vmvn 0xa5a5a5a5a5a5a5a5 .i64
+ mov_imm vmov 0x00a500a500a500a5 .i64
+ mov_imm vmov 0xa500a500a500a500 .i64
+ mov_imm vmov 0x000000a5000000a5 .i64
+ mov_imm vmov 0x0000a5000000a500 .i64
+ mov_imm vmov 0x00a5000000a50000 .i64
+ mov_imm vmov 0xa5000000a5000000 .i64
+ mov_imm vmov 0x0000a5ff0000a5ff .i64
+ mov_imm vmov 0x00a5ffff00a5ffff .i64
+ mov_imm vmov 0xa5ffffffa5ffffff .i64
+
vmvn q0,q0
vmvnq q0,q0
vmvn d0,d0