* configure.in: Define DEFAULT_ARCH for i386.

	* tc-i386.c (md_assemble): Return after the error message;
	move testing for 64bit operands to proper place.

	* i386.exp: Add tests for presence of 32bit versus 64bit output
	format; run both 64bit and 32bit tests when format is available;
	add x86_64 test.
	* x86_64.s: New file.
	* x86_64.d: New file.

4 files changed, 321 insertions, 1 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index ca795f1..ff5d279 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+Sat Jan  6 13:34:07 MET 2001  Jan Hubicka  <jh@suse.cz>
+
+	* i386.exp: Add tests for presence of 32bit versus 64bit output
+	format; run both 64bit and 32bit tests when format is available;
+	add x86_64 test.
+	* x86_64.s: New file.
+	* x86_64.d: New file.
+
 2001-01-02  Nick Clifton  <nickc@redhat.com>
 
 	* gas/arm/arm.exp: Pass -marmv3 to msr-bad test, since the
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 13ac8ef..3656694 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -14,8 +14,29 @@ proc run_list_test { name opts } {
     pass $testname
 }
 
+proc gas_64_check { } {
+    global NM
+    global NMFLAGS
+    global srcdir
 
-if [istarget "i*86-*-*"] then {
+    catch "exec $srcdir/lib/run $NM $NMFLAGS --help" nm_help
+    return [regexp "targets:.*x86_64" $nm_help];
+}
+proc gas_32_check { } {
+    global NM
+    global NMFLAGS
+    global srcdir
+
+    catch "exec $srcdir/lib/run $NM $NMFLAGS --help" nm_help
+    return [regexp "targets:.*i386" $nm_help];
+}
+
+
+if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]  then {
+
+    global ASFLAGS
+    set old_ASFLAGS "$ASFLAGS"
+    set ASFLAGS "$ASFLAGS --32"
 
     run_list_test "float" "-al"
     run_list_test "general" "-al --listing-lhs-width=2"
@@ -36,4 +57,15 @@ if [istarget "i*86-*-*"] then {
 	run_dump_test "jump16"
 	run_list_test "white" "-al --listing-lhs-width=3"
     }
+    set ASFLAGS "$old_ASFLAGS"
+}
+if [istarget "x86_64-*-*"] then {
+
+    global ASFLAGS
+    set old_ASFLAGS "$ASFLAGS"
+    set ASFLAGS "$ASFLAGS --64"
+
+    run_dump_test "x86_64"
+
+    set ASFLAGS "$old_ASFLAGS"
 }
diff --git a/gas/testsuite/gas/i386/x86_64.d b/gas/testsuite/gas/i386/x86_64.d
new file mode 100644
index 0000000..f353c10
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86_64.d
@@ -0,0 +1,126 @@
+#as: -J
+#objdump: -dw
+#name: i386 x86_64
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <bar-0x1a7>:
+[ 	]+0:	01 ca[ 	]+add[ 	]+%ecx,%edx
+[ 	]+2:	44 01 ca[ 	]+add[ 	]+%r9d,%edx
+[ 	]+5:	41 01 ca[ 	]+add[ 	]+%ecx,%r10d
+[ 	]+8:	48 01 ca[ 	]+add[ 	]+%rcx,%rdx
+[ 	]+b:	4d 01 ca[ 	]+add[ 	]+%r9,%r10
+[ 	]+e:	41 01 c0[ 	]+add[ 	]+%eax,%r8d
+[ 	]+11:	66 41 01 c0[ 	]+add[ 	]+%ax,%r8w
+[ 	]+15:	49 01 c0[ 	]+add[ 	]+%rax,%r8
+[ 	]+18:	05 11 22 33 44[ 	]+add[ 	]+\$0x44332211,%eax
+[ 	]+1d:	48 05 11 22 33 f4[ 	]+add[ 	]+\$0xf+4332211,%rax
+[ 	]+23:	66 05 33 44[ 	]+add[ 	]+\$0x4433,%ax
+[ 	]+27:	48 05 11 22 33 44[ 	]+add[ 	]+\$0x44332211,%rax
+[ 	]+2d:	00 ca[ 	]+add[ 	]+%cl,%dl
+[ 	]+2f:	00 f7[ 	]+add[ 	]+%dh,%bh
+[ 	]+31:	40 00 f7[ 	]+add[ 	]+%sil,%dil
+[ 	]+34:	41 00 f7[ 	]+add[ 	]+%sil,%r15b
+[ 	]+37:	44 00 f7[ 	]+add[ 	]+%r14b,%dil
+[ 	]+3a:	45 00 f7[ 	]+add[ 	]+%r14b,%r15b
+[ 	]+3d:	50[ 	]+pushq[ 	]+%rax
+[ 	]+3e:	41 50[ 	]+pushq[ 	]+%r8
+[ 	]+40:	41 59[ 	]+popq[ 	]+%r9
+[ 	]+42:	04 11[ 	]+add[ 	]+\$0x11,%al
+[ 	]+44:	80 c4 11[ 	]+add[ 	]+\$0x11,%ah
+[ 	]+47:	40 80 c4 11[ 	]+add[ 	]+\$0x11,%spl
+[ 	]+4b:	41 80 c0 11[ 	]+add[ 	]+\$0x11,%r8b
+[ 	]+4f:	41 80 c4 11[ 	]+add[ 	]+\$0x11,%r12b
+[ 	]+53:	0f 20 c0[ 	]+mov[ 	]+%cr0,%rax
+[ 	]+56:	41 0f 20 c0[ 	]+mov[ 	]+%cr0,%r8
+[ 	]+5a:	44 0f 20 c0[ 	]+mov[ 	]+%cr8,%rax
+[ 	]+5e:	44 0f 22 c0[ 	]+mov[ 	]+%rax,%cr8
+[ 	]+62:	f3 48 a5[ 	]+repz movsq %ds:\(%rsi\),%es:\(%rdi\)
+[ 	]+65:	f3 66 a5[ 	]+repz movsw %ds:\(%esi\),%es:\(%edi\)
+[ 	]+68:	f3 48 a5[ 	]+repz movsq %ds:\(%rsi\),%es:\(%rdi\)
+[ 	]+6b:	b0 11[ 	]+mov[ 	]+\$0x11,%al
+[ 	]+6d:	b4 11[ 	]+mov[ 	]+\$0x11,%ah
+[ 	]+6f:	40 b4 11[ 	]+mov[ 	]+\$0x11,%spl
+[ 	]+72:	41 b4 11[ 	]+mov[ 	]+\$0x11,%r12b
+[ 	]+75:	b8 44 33 22 11[ 	]+mov[ 	]+\$0x11223344,%eax
+[ 	]+7a:	41 b8 44 33 22 11[ 	]+mov[ 	]+\$0x11223344,%r8d
+[ 	]+80:	48 b8 88 77 66 55 44 33 22 11 	mov[ 	]+\$0x1122334455667788,%rax
+[ 	]+8a:	49 b8 88 77 66 55 44 33 22 11 	mov[ 	]+\$0x1122334455667788,%r8
+[ 	]+94:	03 00[ 	]+add[ 	]+\(%rax\),%eax
+[ 	]+96:	41 03 00[ 	]+add[ 	]+\(%r8\),%eax
+[ 	]+99:	45 03 00[ 	]+add[ 	]+\(%r8\),%r8d
+[ 	]+9c:	49 03 00[ 	]+add[ 	]+\(%r8\),%rax
+[ 	]+9f:	03 05 22 22 22 22[ 	]+add[ 	]+572662306\(%rip\),%eax.*
+[ 	]+a5:	03 45 00[ 	]+add[ 	]+0x0\(%rbp\),%eax
+[ 	]+a8:	03 04 25 22 22 22 22 	add[ 	]+0x22222222,%eax
+[ 	]+af:	41 03 45 00[ 	]+add[ 	]+0x0\(%r13\),%eax
+[ 	]+b3:	03 04 80[ 	]+add[ 	]+\(%rax,%rax,4\),%eax
+[ 	]+b6:	41 03 04 80[ 	]+add[ 	]+\(%r8,%rax,4\),%eax
+[ 	]+ba:	45 03 04 80[ 	]+add[ 	]+\(%r8,%rax,4\),%r8d
+[ 	]+be:	43 03 04 80[ 	]+add[ 	]+\(%r8,%r8,4\),%eax
+[ 	]+c2:	46 01 04 81[ 	]+add[ 	]+%r8d,\(%rcx,%r8,4\)
+[ 	]+c6:	03 14 c0[ 	]+add[ 	]+\(%rax,%rax,8\),%edx
+[ 	]+c9:	03 14 c8[ 	]+add[ 	]+\(%rax,%rcx,8\),%edx
+[ 	]+cc:	03 14 d0[ 	]+add[ 	]+\(%rax,%rdx,8\),%edx
+[ 	]+cf:	03 14 d8[ 	]+add[ 	]+\(%rax,%rbx,8\),%edx
+[ 	]+d2:	03 10[ 	]+add[ 	]+\(%rax\),%edx
+[ 	]+d4:	03 14 e8[ 	]+add[ 	]+\(%rax,%rbp,8\),%edx
+[ 	]+d7:	03 14 f0[ 	]+add[ 	]+\(%rax,%rsi,8\),%edx
+[ 	]+da:	03 14 f8[ 	]+add[ 	]+\(%rax,%rdi,8\),%edx
+[ 	]+dd:	42 03 14 c0[ 	]+add[ 	]+\(%rax,%r8,8\),%edx
+[ 	]+e1:	42 03 14 c8[ 	]+add[ 	]+\(%rax,%r9,8\),%edx
+[ 	]+e5:	42 03 14 d0[ 	]+add[ 	]+\(%rax,%r10,8\),%edx
+[ 	]+e9:	42 03 14 d8[ 	]+add[ 	]+\(%rax,%r11,8\),%edx
+[ 	]+ed:	42 03 14 e0[ 	]+add[ 	]+\(%rax,%r12,8\),%edx
+[ 	]+f1:	42 03 14 e8[ 	]+add[ 	]+\(%rax,%r13,8\),%edx
+[ 	]+f5:	42 03 14 f0[ 	]+add[ 	]+\(%rax,%r14,8\),%edx
+[ 	]+f9:	42 03 14 f8[ 	]+add[ 	]+\(%rax,%r15,8\),%edx
+[ 	]+fd:	83 c1 11[ 	]+add[ 	]+\$0x11,%ecx
+ 100:	83 00 11[ 	]+addl[ 	]+\$0x11,\(%rax\)
+ 103:	48 83 00 11[ 	]+addq[ 	]+\$0x11,\(%rax\)
+ 107:	41 83 00 11[ 	]+addl[ 	]+\$0x11,\(%r8\)
+ 10b:	83 04 81 11[ 	]+addl[ 	]+\$0x11,\(%rcx,%rax,4\)
+ 10f:	41 83 04 81 11[ 	]+addl[ 	]+\$0x11,\(%r9,%rax,4\)
+ 114:	42 83 04 81 11[ 	]+addl[ 	]+\$0x11,\(%rcx,%r8,4\)
+ 119:	83 05 22 22 22 22 33 	addl[ 	]+\$0x33,572662306\(%rip\).*
+ 120:	48 83 05 22 22 22 22 33 	addq[ 	]+\$0x33,572662306\(%rip\).*
+ 128:	81 05 22 22 22 22 33 33 33 33 	addl[ 	]+\$0x33333333,572662306\(%rip\).*
+ 132:	48 81 05 22 22 22 22 33 33 33 33 	addq[ 	]+\$0x33333333,572662306\(%rip\).*
+ 13d:	83 04 c5 22 22 22 22 33 	addl[ 	]+\$0x33,0x22222222\(,%rax,8\)
+ 145:	83 80 22 22 22 22 33 	addl[ 	]+\$0x33,0x22222222\(%rax\)
+ 14c:	83 80 22 22 22 22 33 	addl[ 	]+\$0x33,0x22222222\(%rax\)
+ 153:	41 83 04 e8 33[ 	]+addl[ 	]+\$0x33,\(%r8,%rbp,8\)
+ 158:	83 04 25 22 22 22 22 33 	addl[ 	]+\$0x33,0x22222222
+ 160:	a0 11 22 33 44 55 66 77 88 	mov[ 	]+0x8877665544332211,%al
+ 169:	a1 11 22 33 44 55 66 77 88 	mov[ 	]+0x8877665544332211,%eax
+ 172:	a2 11 22 33 44 55 66 77 88 	mov[ 	]+%al,0x8877665544332211
+ 17b:	a3 11 22 33 44 55 66 77 88 	mov[ 	]+%eax,0x8877665544332211
+ 184:	48 a1 11 22 33 44 55 66 77 88 	mov[ 	]+0x8877665544332211,%rax
+ 18e:	48 a3 11 22 33 44 55 66 77 88 	mov[ 	]+%rax,0x8877665544332211
+ 198:	48 99[ 	]+cqto[ 	]+
+ 19a:	48 98[ 	]+cltq[ 	]+
+ 19c:	48 63 c0[ 	]+movslq %eax,%rax
+ 19f:	48 0f bf c0[ 	]+movswq %ax,%rax
+ 1a3:	48 0f be c0[ 	]+movsbq %al,%rax
+
+0+1a7 <bar>:
+ 1a7:	b0 00[ 	]+mov[ 	]+\$0x0,%al
+ 1a9:	66 b8 00 00[ 	]+mov[ 	]+\$0x0,%ax
+ 1ad:	b8 00 00 00 00[ 	]+mov[ 	]+\$0x0,%eax
+ 1b2:	48 c7 c0 00 00 00 00 	mov[ 	]+\$0x0,%rax
+ 1b9:	a1 00 00 00 00 00 00 00 00 	mov[ 	]+0x0,%eax
+ 1c2:	8b 04 25 00 00 00 00 	mov[ 	]+0x0,%eax
+ 1c9:	8b 80 00 00 00 00[ 	]+mov[ 	]+0x0\(%rax\),%eax
+ 1cf:	8b 05 00 00 00 00[ 	]+mov[ 	]+0\(%rip\),%eax.*
+ 1d5:	b0 00[ 	]+mov[ 	]+\$0x0,%al
+ 1d7:	66 b8 00 00[ 	]+mov[ 	]+\$0x0,%ax
+ 1db:	b8 00 00 00 00[ 	]+mov[ 	]+\$0x0,%eax
+ 1e0:	48 c7 c0 00 00 00 00 	mov[ 	]+\$0x0,%rax
+ 1e7:	8b 04 25 00 00 00 00 	mov[ 	]+0x0,%eax
+ 1ee:	8b 04 25 00 00 00 00 	mov[ 	]+0x0,%eax
+ 1f5:	a1 00 00 00 00 00 00 00 00 	mov[ 	]+0x0,%eax
+ 1fe:	8b 04 25 00 00 00 00 	mov[ 	]+0x0,%eax
+ 205:	8b 80 00 00 00 00[ 	]+mov[ 	]+0x0\(%rax\),%eax
+ 20b:	8b 05 00 00 00 00[ 	]+mov[ 	]+0\(%rip\),%eax.*
+	...
diff --git a/gas/testsuite/gas/i386/x86_64.s b/gas/testsuite/gas/i386/x86_64.s
new file mode 100644
index 0000000..d65054e
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86_64.s
@@ -0,0 +1,154 @@
+.text
+.intel_syntax noprefix
+# REX prefix and addressing modes.
+add edx,ecx
+add edx,r9d
+add r10d,ecx
+add rdx,rcx
+add r10,r9
+add r8d,eax
+add r8w,ax
+add r8,rax
+add eax,0x44332211
+add rax,0xfffffffff4332211
+add ax,0x4433
+add rax,0x44332211
+add dl,cl
+add bh,dh
+add dil,sil
+add r15b,sil
+add dil,r14b
+add r15b,r14b
+PUSH RAX
+PUSH R8
+POP R9
+ADD AL,0x11
+ADD AH,0x11
+ADD SPL,0x11
+ADD R8B,0x11
+ADD R12B,0x11
+MOV RAX,CR0
+MOV R8,CR0
+MOV RAX,CR8
+MOV CR8,RAX
+REP MOVSQ #[RSI],[RDI]
+REP MOVSW #[RSI,[RDI]
+REP MOVSQ #[RSI],[RDI]
+MOV AL, 0x11
+MOV AH, 0x11
+MOV SPL, 0x11
+MOV R12B, 0x11
+MOV EAX,0x11223344
+MOV R8D,0x11223344
+MOV RAX,0x1122334455667788
+MOV R8,0x1122334455667788
+add eax,[rax]
+ADD EAX,[R8]
+ADD R8D,[R8]
+ADD RAX,[R8]
+ADD EAX,[0x22222222+RIP]
+ADD EAX,[RBP+0x00]
+ADD EAX,[0x22222222]
+ADD EAX,[R13+0]
+ADD EAX,[RAX+RAX*4]
+ADD EAX,[R8+RAX*4]
+ADD R8D,[R8+RAX*4]
+ADD EAX,[R8+R8*4]
+ADD [RCX+R8*4],R8D
+ADD EDX,[RAX+RAX*8]
+ADD EDX,[RAX+RCX*8]
+ADD EDX,[RAX+RDX*8]
+ADD EDX,[RAX+RBX*8]
+ADD EDX,[RAX]
+ADD EDX,[RAX+RBP*8]
+ADD EDX,[RAX+RSI*8]
+ADD EDX,[RAX+RDI*8]
+ADD EDX,[RAX+R8*8]
+ADD EDX,[RAX+R9*8]
+ADD EDX,[RAX+R10*8]
+ADD EDX,[RAX+R11*8]
+ADD EDX,[RAX+R12*8]
+ADD EDX,[RAX+R13*8]
+ADD EDX,[RAX+R14*8]
+ADD EDX,[RAX+R15*8]
+ADD ECX,0x11
+ADD DWORD PTR [RAX],0x11
+ADD QWORD PTR [RAX],0x11
+ADD DWORD PTR [R8],0x11
+ADD DWORD PTR [RCX+RAX*4],0x11
+ADD DWORD PTR [R9+RAX*4],0x11
+ADD DWORD PTR [RCX+R8*4],0x11
+ADD DWORD PTR [0x22222222+RIP],0x33
+ADD QWORD PTR [RIP+0x22222222],0x33
+ADD DWORD PTR [RIP+0x22222222],0x33333333
+ADD QWORD PTR [RIP+0x22222222],0x33333333
+ADD DWORD PTR [RAX*8+0x22222222],0x33
+ADD DWORD PTR [RAX+0x22222222],0x33
+ADD DWORD PTR [RAX+0x22222222],0x33
+ADD DWORD PTR [R8+RBP*8],0x33
+ADD DWORD PTR [0x22222222],0x33		
+#new instructions
+MOVABS AL,[0x8877665544332211]
+MOVABS EAX,[0x8877665544332211]
+MOVABS [0x8877665544332211],AL
+MOVABS [0x8877665544332211],EAX
+MOVABS RAX,[0x8877665544332211]
+MOVABS [0x8877665544332211],RAX
+cqo
+cdqe
+movsx rax, eax
+movsx rax, ax
+movsx rax, al
+bar:
+.att_syntax
+#testcase for symbol references.
+
+#immediates - various sizes:
+
+mov $symbol, %al
+mov $symbol, %ax
+mov $symbol, %eax
+mov $symbol, %rax
+
+#addressing modes:
+
+#absolute 64bit addressing
+movabs symbol, %eax
+
+#absolute 32bit addressing
+mov symbol, %eax
+
+#arithmetic
+mov symbol(%rax), %eax
+
+#RIP relative
+mov symbol(%rip), %eax
+
+.intel_syntax noprefix
+
+#immediates - various sizes:
+mov al, flat symbol
+mov ax, flat symbol
+mov eax, flat symbol
+mov rax, flat symbol
+
+#parts
+mov eax, high part symbol
+mov eax, low part symbol
+
+#addressing modes
+
+#absolute 64bit addressing
+movabs eax, [symbol]
+
+#absolute 32bit addressing
+mov eax, [symbol]
+
+#arithmetic
+mov eax, [rax+symbol]
+
+#RIP relative
+mov eax, [rip+symbol]
+
+# Get a good alignment.
+ .p2align	4,0