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authorClaudiu Zissulescu <claziss@synopsys.com>2016-11-15 15:11:47 +0100
committerClaudiu Zissulescu <claziss@synopsys.com>2016-11-29 11:29:18 +0100
commitabe7c33b45288b407e6d001aad713183d4bab5c6 (patch)
treea3dbd4094e3acef74967b4c48d839fba8c726b83 /gas/testsuite
parentee881e5d3312ea5396bddc37e8673b77bf549b4b (diff)
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[ARC] Add checking for LP_COUNT reg usage, improve error reporting.
gas/ 2016-11-29 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (find_opcode_match): New function argument errmsg. (assemble_tokens): Collect and report the eventual error message found during opcode matching process. * testsuite/gas/arc/lpcount-err.s: New file. * testsuite/gas/arc/add_s-err.s: Update error message. opcode/ 2016-11-29 Claudiu Zissulescu <claziss@synopsys.com> * arc-opc.c (insert_ra_chk): New function. (insert_rb_chk): Likewise. (insert_rad): Update text error message. (insert_rcd): Likewise. (insert_rhv2): Likewise. (insert_r0): Likewise. (insert_r1): Likewise. (insert_r2): Likewise. (insert_r3): Likewise. (insert_sp): Likewise. (insert_gp): Likewise. (insert_pcl): Likewise. (insert_blink): Likewise. (insert_ilink1): Likewise. (insert_ilink2): Likewise. (insert_ras): Likewise. (insert_rbs): Likewise. (insert_rcs): Likewise. (insert_simm3s): Likewise. (insert_rrange): Likewise. (insert_fpel): Likewise. (insert_blinkel): Likewise. (insert_pcel): Likewise. (insert_nps_3bit_dst): Likewise. (insert_nps_3bit_dst_short): Likewise. (insert_nps_3bit_src2_short): Likewise. (insert_nps_bitop_size_2b): Likewise. (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Likewise. (RA_CHK): Define. (RB): Adjust. (RB_CHK): Define. (RC): Adjust. * arc-dis.c (print_insn_arc): Add LOAD and STORE class. * arc-tbl.h (div, divu): All instructions are DIVREM class. Change first insn argument to check for LP_COUNT usage. (rem): Likewise. (ld, ldd): All instructions are LOAD class. Change first insn argument to check for LP_COUNT usage. (st, std): All instructions are STORE class. (mac, mpy, dmac, mul, dmpy): All instructions are MPY class. Change first insn argument to check for LP_COUNT usage. (mov): All instructions are MOVE class. Change first insn argument to check for LP_COUNT usage. include/ 2016-11-29 Claudiu Zissulescu <claziss@synopsys.com> * opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE instruction classes.
Diffstat (limited to 'gas/testsuite')
-rw-r--r--gas/testsuite/gas/arc/add_s-err.s2
-rw-r--r--gas/testsuite/gas/arc/lpcount-err.s9
2 files changed, 10 insertions, 1 deletions
diff --git a/gas/testsuite/gas/arc/add_s-err.s b/gas/testsuite/gas/arc/add_s-err.s
index 298f4ef..024bc43 100644
--- a/gas/testsuite/gas/arc/add_s-err.s
+++ b/gas/testsuite/gas/arc/add_s-err.s
@@ -4,7 +4,7 @@
; { dg-do assemble { target arc*-*-* } }
; { dg-options "--mcpu=arc700" }
;; The following insns are accepted by ARCv2 only
- add_s r4,r4,-1 ; { dg-error "Error: inappropriate arguments for opcode 'add_s'" }
+ add_s r4,r4,-1 ; { dg-error "Error: Register must be either r0-r3 or r12-r15 for instruction." }
add_s 0,0xAAAA5555,-1 ; { dg-error "Error: inappropriate arguments for opcode 'add_s'" }
add_s r0,r15,0x20 ; { dg-error "Error: inappropriate arguments for opcode 'add_s'" }
add_s r1,r15,0x20 ; { dg-error "Error: inappropriate arguments for opcode 'add_s'" }
diff --git a/gas/testsuite/gas/arc/lpcount-err.s b/gas/testsuite/gas/arc/lpcount-err.s
new file mode 100644
index 0000000..51d6f70
--- /dev/null
+++ b/gas/testsuite/gas/arc/lpcount-err.s
@@ -0,0 +1,9 @@
+;; LP_COUNT register cannot be used with multi-cycle instructions such as:
+;; load, lr, multiply and divide.
+; { dg-do assemble { target arc*-*-* } }
+
+ .cpu HS
+
+ mpy lp_count,r0,r1 ; { dg-error "Error: LP_COUNT register cannot be used as destination register." }
+ ld lp_count,[r2,1] ; { dg-error "Error: LP_COUNT register cannot be used as destination register." }
+ div lp_count,r12,r1 ; { dg-error "Error: LP_COUNT register cannot be used as destination register." }