PRU GAS Port

	* NEWS: Mention new PRU target.
	* Makefile.am: Add PRU target.
	* config/obj-elf.c: Ditto.
	* configure.tgt: Ditto.
	* config/tc-pru.c: New file.
	* config/tc-pru.h: New file.
	* doc/Makefile.am: Add documentation for PRU GAS port.
	* doc/all.texi, Ditto.
	* doc/as.texinfo: Ditto.
	* doc/c-pru.texi: Document PRU GAS options.
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
	* testsuite/gas/pru/alu.d: New file for PRU GAS testsuite.
	* testsuite/gas/pru/alu.s: Ditto.
	* testsuite/gas/pru/branch.d: Ditto.
	* testsuite/gas/pru/branch.s: Ditto.
	* testsuite/gas/pru/illegal.l: Ditto.
	* testsuite/gas/pru/illegal.s: Ditto.
	* testsuite/gas/pru/ldi.d: Ditto.
	* testsuite/gas/pru/ldi.s: Ditto.
	* testsuite/gas/pru/ldst.d: Ditto.
	* testsuite/gas/pru/ldst.s: Ditto.
	* testsuite/gas/pru/loop.d: Ditto.
	* testsuite/gas/pru/loop.s: Ditto.
	* testsuite/gas/pru/misc.d: Ditto.
	* testsuite/gas/pru/misc.s: Ditto.
	* testsuite/gas/pru/pru.exp: Ditto.
	* testsuite/gas/pru/pseudo.d: Ditto.
	* testsuite/gas/pru/pseudo.s: Ditto.
	* testsuite/gas/pru/warn_reglabel.l: Ditto.
	* testsuite/gas/pru/warn_reglabel.s: Ditto.
	* testsuite/gas/pru/xfr.d: Ditto.
	* testsuite/gas/pru/xfr.s: Ditto.
	* testsuite/gas/lns/lns.exp: Mark lns-common-1-alt variant for PRU.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>

22 files changed, 478 insertions, 0 deletions

diff --git a/gas/testsuite/gas/lns/lns.exp b/gas/testsuite/gas/lns/lns.exp
index 81e0396..acf9947 100644
--- a/gas/testsuite/gas/lns/lns.exp
+++ b/gas/testsuite/gas/lns/lns.exp
@@ -37,6 +37,7 @@ if {
 	 || [istarget mn10*-*-*]
 	 || [istarget msp430-*-*]
 	 || [istarget nds32*-*-*]
+	 || [istarget pru-*-*]
 	 || [istarget rl78-*-*]
 	 || [istarget xtensa*-*-*] } {
       run_dump_test "lns-common-1-alt"
diff --git a/gas/testsuite/gas/pru/alu.d b/gas/testsuite/gas/pru/alu.d
new file mode 100644
index 0000000..d91ad06
--- /dev/null
+++ b/gas/testsuite/gas/pru/alu.d
@@ -0,0 +1,32 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: PRU ALU
+
+# Test the ALU instructions
+
+.*: +file format elf32-pru
+
+Disassembly of section .text:
+0+0000 <[^>]*> 00e4e4e4 	add	fp, fp, fp
+0+0004 <[^>]*> 01ffe4e4 	add	fp, fp, 255
+0+0008 <[^>]*> 0100e4e4 	add	fp, fp, 0
+0+000c <[^>]*> 0100e4e4 	add	fp, fp, 0
+0+0010 <[^>]*> 0100a424 	add	fp.b1, fp.w1, 0
+0+0014 <[^>]*> 00634221 	add	r1.b1, sp.b2, ra.b3
+0+0018 <[^>]*> 02634221 	adc	r1.b1, sp.b2, ra.b3
+0+001c <[^>]*> 03634221 	adc	r1.b1, sp.b2, 99
+0+0020 <[^>]*> 00e0e0e0 	add	r0, r0, r0
+0+0024 <[^>]*> 02e0e0e0 	adc	r0, r0, r0
+0+0028 <[^>]*> 050affe1 	sub	r1, r31, 10
+0+002c <[^>]*> 070affe1 	suc	r1, r31, 10
+0+0030 <[^>]*> 090affff 	lsl	r31, r31, 10
+0+0034 <[^>]*> 0b0affff 	lsr	r31, r31, 10
+0+0038 <[^>]*> 0d0a70f0 	rsb	r16, r16.b3, 10
+0+003c <[^>]*> 0f0a70f0 	rsc	r16, r16.b3, 10
+0+0040 <[^>]*> 11aa61a1 	and	r1.w1, r1.b3, 170
+0+0044 <[^>]*> 13aa61a1 	or	r1.w1, r1.b3, 170
+0+0048 <[^>]*> 15aa61a1 	xor	r1.w1, r1.b3, 170
+0+004c <[^>]*> 1700e1e2 	not	sp, r1
+0+0050 <[^>]*> 18e2e1e1 	min	r1, r1, sp
+0+0054 <[^>]*> 1ac3e2e1 	max	r1, sp, ra.w2
+0+0058 <[^>]*> 1cc3e2e1 	clr	r1, sp, ra.w2
+0+005c <[^>]*> 1f0ce2e1 	set	r1, sp, 12
diff --git a/gas/testsuite/gas/pru/alu.s b/gas/testsuite/gas/pru/alu.s
new file mode 100644
index 0000000..e61e101
--- /dev/null
+++ b/gas/testsuite/gas/pru/alu.s
@@ -0,0 +1,30 @@
+# Source file used to test the ALU class of instructions.
+
+foo:
+	# Test various addressing modes
+	add	fp, fp, fp
+	add	fp, fp, 0xff
+	add	fp, fp, 0
+	add	fp, fp, 0
+	add	fp.b1, fp.w1, 0
+	add	r1.b1, r2.b2, r3.b3
+	adc	r1.b1, r2.b2, r3.b3
+	adc	r1.b1, r2.b2, 101-2
+
+	# Test ALU opcodes
+	add	r0, r0, r0
+	adc	r0, r0, r0
+	sub	r1, r31, 10
+	suc	r1, r31, 10
+	lsl	r31, r31, 10
+	lsr	r31, r31, 10
+	rsb	r16, r16.b3, 10
+	rsc	r16, r16.b3, 10
+	and	r1.w1, r1.b3, 0xaa
+	or	r1.w1, r1.b3, 0xaa
+	xor	r1.w1, r1.b3, 0xaa
+	not	r2, r1
+	min	r1, r1, r2
+	max	r1, r2, r3.w2
+	clr	r1, r2, r3.w2
+	set	r1, r2, 12
diff --git a/gas/testsuite/gas/pru/branch.d b/gas/testsuite/gas/pru/branch.d
new file mode 100644
index 0000000..f5b50a7
--- /dev/null
+++ b/gas/testsuite/gas/pru/branch.d
@@ -0,0 +1,63 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: PRU branch
+
+# Test the branch instructions
+
+.*: +file format elf32-pru
+
+Disassembly of section .text:
+0+0000 <[^>]*> 20ea0000 	jmp	r10
+0+0004 <[^>]*> 208a0000 	jmp	r10.w0
+0+0008 <[^>]*> 21004000 	jmp	00000100 <[^>]*>
+0+000c <[^>]*> 22ca00f6 	jal	r22, r10.w2
+0+0010 <[^>]*> 230000f7 	jal	r23, 00000000 <[^>]*>
+0+0014 <[^>]*> 23ffffb7 	jal	r23.w1, 0003fffc <[^>]*>
+0+0018 <[^>]*> 6100f700 	qbgt	00000018 <[^>]*>, r23, 0
+[\t ]*18: R_PRU_S10_PCREL[\t ]*.text\+0x60
+0+001c <[^>]*> 71ff5700 	qbge	0000001c <[^>]*>, r23.b2, 255
+[\t ]*1c: R_PRU_S10_PCREL[\t ]*.text\+0x60
+0+0020 <[^>]*> 4820b600 	qblt	00000020 <[^>]*>, r22.w1, r0.b1
+[\t ]*20: R_PRU_S10_PCREL[\t ]*.text\+0x60
+0+0024 <[^>]*> 58210000 	qble	00000024 <[^>]*>, r0.b0, r1.b1
+[\t ]*24: R_PRU_S10_PCREL[\t ]*.text\+0x60
+0+0028 <[^>]*> 50034100 	qbeq	00000028 <[^>]*>, r1.b2, ra.b0
+[\t ]*28: R_PRU_S10_PCREL[\t ]*.text\+0x60
+0+002c <[^>]*> 68f6f500 	qbne	0000002c <[^>]*>, r21, r22
+[\t ]*2c: R_PRU_S10_PCREL[\t ]*.text\+0x60
+0+0030 <[^>]*> 78000000 	qba	00000030 <[^>]*>
+[\t ]*30: R_PRU_S10_PCREL[\t ]*.text\+0x60
+#0+0034 <[^>]*> d0edec00 	qbbs	00000034 <[^>]*>, r12, r13
+0+0034 <[^>]*> d0edec00 	wbc	r12, r13
+[\t ]*34: R_PRU_S10_PCREL[\t ]*.text\+0x60
+#0+0038 <[^>]*> d105ec00 	qbbs	00000038 <[^>]*>, r12, 5
+0+0038 <[^>]*> d105ec00 	wbc	r12, 5
+[\t ]*38: R_PRU_S10_PCREL[\t ]*.text\+0x60
+#0+003c <[^>]*> c8edec00 	qbbc	0000003c <[^>]*>, r12, r13
+0+003c <[^>]*> c8edec00 	wbs	r12, r13
+[\t ]*3c: R_PRU_S10_PCREL[\t ]*.text\+0x60
+#0+0040 <[^>]*> c905ec00 	qbbc	00000040 <[^>]*>, r12, 5
+0+0040 <[^>]*> c905ec00 	wbs	r12, 5
+[\t ]*40: R_PRU_S10_PCREL[\t ]*.text\+0x60
+0+0044 <[^>]*> 6100f700 	qbgt	00000044 <[^>]*>, r23, 0
+[\t ]*44: R_PRU_S10_PCREL[\t ]*.text\+0xc
+0+0048 <[^>]*> 71ff5700 	qbge	00000048 <[^>]*>, r23.b2, 255
+[\t ]*48: R_PRU_S10_PCREL[\t ]*.text\+0xc
+0+004c <[^>]*> 4820b600 	qblt	0000004c <[^>]*>, r22.w1, r0.b1
+[\t ]*4c: R_PRU_S10_PCREL[\t ]*.text\+0xc
+0+0050 <[^>]*> 58210000 	qble	00000050 <[^>]*>, r0.b0, r1.b1
+[\t ]*50: R_PRU_S10_PCREL[\t ]*.text\+0xc
+0+0054 <[^>]*> 50034100 	qbeq	00000054 <[^>]*>, r1.b2, ra.b0
+[\t ]*54: R_PRU_S10_PCREL[\t ]*.text\+0xc
+0+0058 <[^>]*> 68f6f500 	qbne	00000058 <[^>]*>, r21, r22
+[\t ]*58: R_PRU_S10_PCREL[\t ]*.text\+0xc
+0+005c <[^>]*> 78000000 	qba	0000005c <[^>]*>
+[\t ]*5c: R_PRU_S10_PCREL[\t ]*.text\+0xc
+#0+0060 <[^>]*> d0edec00 	qbbs	00000060 <[^>]*>, r12, r13
+0+0060 <[^>]*> d0edec00 	wbc	r12, r13
+[\t ]*60: R_PRU_S10_PCREL[\t ]*.text\+0xc
+#0+0064 <[^>]*> d105ec00 	qbbs	00000064 <[^>]*>, r12, 5
+0+0064 <[^>]*> d105ec00 	wbc	r12, 5
+[\t ]*64: R_PRU_S10_PCREL[\t ]*.text\+0xc
+#0+0068 <[^>]*> c8edec00 	qbbc	00000068 <[^>]*>, r12, r13
+0+0068 <[^>]*> c8edec00 	wbs	r12, r13
+[\t ]*68: R_PRU_S10_PCREL[\t ]*.text\+0xc
diff --git a/gas/testsuite/gas/pru/branch.s b/gas/testsuite/gas/pru/branch.s
new file mode 100644
index 0000000..ab43c74
--- /dev/null
+++ b/gas/testsuite/gas/pru/branch.s
@@ -0,0 +1,42 @@
+# Source file used to test the miscellaneous instructions.
+
+foo:
+L1:
+	jmp	r10
+	jmp	r10.w0
+	jmp	0x100
+
+L2:
+	jal	r22, r10.w2
+	jal	r23, 0
+	jal	r23.w1, 0x3fffc
+
+	# relative branches - forward jump
+L3:
+	qbgt	L5, r23, 0
+	qbge	L5, r23.b2, 255
+	qblt	L5, r22.w1, r0.b1
+	qble	L5, r0.b0, r1.b1
+	qbeq	L5, r1.b2, r3.b0
+	qbne	L5, r21, r22
+	qba	L5
+
+	qbbs	L5, r12, r13
+	qbbs	L5, r12, 5
+	qbbc	L5, r12, r13
+	qbbc	L5, r12, 5
+
+	# relative branches - backward jump
+L4:
+	qbgt	L2, r23, 0
+	qbge	L2, r23.b2, 255
+	qblt	L2, r22.w1, r0.b1
+	qble	L2, r0.b0, r1.b1
+	qbeq	L2, r1.b2, r3.b0
+	qbne	L2, r21, r22
+	qba	L2
+
+L5:
+	qbbs	L2, r12, r13
+	qbbs	L2, r12, 5
+	qbbc	L2, r12, r13
diff --git a/gas/testsuite/gas/pru/illegal.l b/gas/testsuite/gas/pru/illegal.l
new file mode 100644
index 0000000..64de14b
--- /dev/null
+++ b/gas/testsuite/gas/pru/illegal.l
@@ -0,0 +1,5 @@
+.*illegal.s: Assembler messages:
+.*illegal.s:5: Error: unknown register r56
+.*illegal.s:8: Error: unrecognised instruction fop
+.*illegal.s:10: Error: too many arguments
+.*illegal.s:11: Error: too many arguments
diff --git a/gas/testsuite/gas/pru/illegal.s b/gas/testsuite/gas/pru/illegal.s
new file mode 100644
index 0000000..1571f74
--- /dev/null
+++ b/gas/testsuite/gas/pru/illegal.s
@@ -0,0 +1,11 @@
+# Source file used to test illegal operands.
+
+foo:
+# Illegal registers
+	add r56,r4,r5
+	add r4,r0,r2
+# Illegal opcodes
+	fop r3,r4,r5
+# Extra operands
+	nop Crapola
+	add r2, r2, r2, r4
diff --git a/gas/testsuite/gas/pru/ldi.d b/gas/testsuite/gas/pru/ldi.d
new file mode 100644
index 0000000..8851504
--- /dev/null
+++ b/gas/testsuite/gas/pru/ldi.d
@@ -0,0 +1,17 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: PRU ldi
+
+# Test the load/store operations
+
+.*: +file format elf32-pru
+
+Disassembly of section .text:
+0+0000 <[^>]*> 240000f0 	ldi	r16, 0
+[\t ]*0: R_PRU_LDI32	\*ABS\*\+0x12345678
+0+0004 <[^>]*> 240000d0 	ldi	r16.w2, 0
+0+0008 <[^>]*> 241234f0 	ldi	r16, 4660
+0+000c <[^>]*> 240000f0 	ldi	r16, 0
+[\t ]*c: R_PRU_U16_PMEMIMM	.text
+0+0010 <[^>]*> 240000f0 	ldi	r16, 0
+[\t ]*10: R_PRU_LDI32	var1
+0+0014 <[^>]*> 240000d0 	ldi	r16.w2, 0
diff --git a/gas/testsuite/gas/pru/ldi.s b/gas/testsuite/gas/pru/ldi.s
new file mode 100644
index 0000000..201a0f2
--- /dev/null
+++ b/gas/testsuite/gas/pru/ldi.s
@@ -0,0 +1,9 @@
+# Source file used to test the LDI instructions.
+
+	.extern var1
+foo:
+	# immediate load
+	ldi32	r16, 0x12345678
+	ldi	r16, 0x1234
+	ldi	r16, %pmem(foo)
+	ldi32	r16, var1
diff --git a/gas/testsuite/gas/pru/ldst.d b/gas/testsuite/gas/pru/ldst.d
new file mode 100644
index 0000000..7e44b6d
--- /dev/null
+++ b/gas/testsuite/gas/pru/ldst.d
@@ -0,0 +1,33 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: PRU load-store
+
+# Test the load/store operations
+
+.*: +file format elf32-pru
+
+Disassembly of section .text:
+0+0000 <[^>]*> 240000f0 	ldi	r16, 0
+0+0004 <[^>]*> 24fffff0 	ldi	r16, 65535
+0+0008 <[^>]*> 2401fff0 	ldi	r16, 511
+0+000c <[^>]*> f0611e20 	lbbo	r0.b1, r30, r1.b3, 1
+0+0010 <[^>]*> fe41bec0 	lbbo	r0.b2, r30, r1.b2, 124
+0+0014 <[^>]*> f1ff1e60 	lbbo	r0.b3, r30, 255, 1
+0+0018 <[^>]*> f1011e80 	lbbo	r0.b0, r30, 1, 2
+0+001c <[^>]*> fb005e00 	lbbo	r0.b0, r30, 0, 85
+0+0020 <[^>]*> fea1d912 	lbbo	r18.b0, r25, r1.w1, r0.b0
+0+0024 <[^>]*> ff65d992 	lbbo	r18.b0, r25, 101, r0.b1
+0+0028 <[^>]*> fee1f992 	lbbo	r18.b0, r25, r1, r0.b3
+0+002c <[^>]*> e0611e20 	sbbo	r0.b1, r30, r1.b3, 1
+0+0030 <[^>]*> ee41bec0 	sbbo	r0.b2, r30, r1.b2, 124
+0+0034 <[^>]*> e1ff1e60 	sbbo	r0.b3, r30, 255, 1
+0+0038 <[^>]*> e1011e80 	sbbo	r0.b0, r30, 1, 2
+0+003c <[^>]*> eb005e00 	sbbo	r0.b0, r30, 0, 85
+0+0040 <[^>]*> eee1d912 	sbbo	r18.b0, r25, r1, r0.b0
+0+0044 <[^>]*> ef65d992 	sbbo	r18.b0, r25, 101, r0.b1
+0+0048 <[^>]*> eee1f992 	sbbo	r18.b0, r25, r1, r0.b3
+0+004c <[^>]*> 9105608a 	lbco	r10.b0, 0, 5, 8
+0+0050 <[^>]*> 90ab618a 	lbco	r10.b0, 1, r11.w1, 8
+0+0054 <[^>]*> 91057f8a 	lbco	r10.b0, 31, 5, 8
+0+0058 <[^>]*> 8105608a 	sbco	r10.b0, 0, 5, 8
+0+005c <[^>]*> 80ab618a 	sbco	r10.b0, 1, r11.w1, 8
+0+0060 <[^>]*> 81057f8a 	sbco	r10.b0, 31, 5, 8
diff --git a/gas/testsuite/gas/pru/ldst.s b/gas/testsuite/gas/pru/ldst.s
new file mode 100644
index 0000000..e8ad3a2
--- /dev/null
+++ b/gas/testsuite/gas/pru/ldst.s
@@ -0,0 +1,37 @@
+# Source file used to test the load/store instructions.
+
+foo:
+	# immediate load
+	ldi	r16, 0
+	ldi	r16, 0xffff
+	ldi	r16, 511
+
+	# load
+	lbbo	&r0.b1, r30, r1.b3, 1
+	lbbo	r0.b2, r30, r1.b2, 124
+	lbbo	r0.b3, r30, 255, 1
+	lbbo	&r0, r30, 1, 2
+	lbbo	r0, r30, 0, 0x55
+	lbbo	r18, r25, r1.w1, r0.b0
+	lbbo	r18, r25, 101, r0.b1
+	lbbo	r18, r25, r1, r0.b3
+
+	# store
+	sbbo	&r0.b1, r30, r1.b3, 1
+	sbbo	r0.b2, r30, r1.b2, 124
+	sbbo	r0.b3, r30, 255, 1
+	sbbo	&r0, r30, 1, 2
+	sbbo	r0, r30, 0, 0x55
+	sbbo	r18, r25, r1, r0.b0
+	sbbo	r18, r25, 101, r0.b1
+	sbbo	r18, r25, r1, r0.b3
+
+	# load with constant table address
+	lbco	r10, 0, 5, 8
+	lbco	r10, 1, r11.w1, 8
+	lbco	r10, 31, 5, 8
+
+	# store with constant table address
+	sbco	r10, 0, 5, 8
+	sbco	r10, 1, r11.w1, 8
+	sbco	r10, 31, 5, 8
diff --git a/gas/testsuite/gas/pru/loop.d b/gas/testsuite/gas/pru/loop.d
new file mode 100644
index 0000000..b6d4a8a
--- /dev/null
+++ b/gas/testsuite/gas/pru/loop.d
@@ -0,0 +1,15 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: PRU loop
+
+# Test the loop instructions
+
+.*: +file format elf32-pru
+
+Disassembly of section .text:
+0+0000 <[^>]*> 304a0000 	loop	00000000 <[^>]*>, r10.b2
+[\t ]*0: R_PRU_U8_PCREL[\t ]*.text\+0x14
+0+0004 <[^>]*> 30eb8000 	iloop	00000004 <[^>]*>, r11
+[\t ]*4: R_PRU_U8_PCREL[\t ]*.text\+0x14
+0+0008 <[^>]*> 00e0e0e0 	add	r0, r0, r0
+0+000c <[^>]*> 00e0e0e0 	add	r0, r0, r0
+0+0010 <[^>]*> 00e0e0e0 	add	r0, r0, r0
diff --git a/gas/testsuite/gas/pru/loop.s b/gas/testsuite/gas/pru/loop.s
new file mode 100644
index 0000000..ae057a1
--- /dev/null
+++ b/gas/testsuite/gas/pru/loop.s
@@ -0,0 +1,10 @@
+# Source file used to test the loop instructions.
+
+foo:
+L1:
+	loop	L2, r10.b2
+	iloop	L2, r11
+	add	r0, r0, r0
+	add	r0, r0, r0
+	add	r0, r0, r0
+L2:
diff --git a/gas/testsuite/gas/pru/misc.d b/gas/testsuite/gas/pru/misc.d
new file mode 100644
index 0000000..7c791e6
--- /dev/null
+++ b/gas/testsuite/gas/pru/misc.d
@@ -0,0 +1,11 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: PRU misc
+
+# Test the miscellaneous instruction
+
+.*: +file format elf32-pru
+
+Disassembly of section .text:
+0+0000 <[^>]*> 2a000000 	halt
+0+0004 <[^>]*> 3e800000 	slp	1
+0+0008 <[^>]*> 3e000000 	slp	0
diff --git a/gas/testsuite/gas/pru/misc.s b/gas/testsuite/gas/pru/misc.s
new file mode 100644
index 0000000..cfe4d88
--- /dev/null
+++ b/gas/testsuite/gas/pru/misc.s
@@ -0,0 +1,6 @@
+# Source file used to test the miscellaneous instructions.
+
+foo:
+	halt
+	slp	1
+	slp	0
diff --git a/gas/testsuite/gas/pru/pru.exp b/gas/testsuite/gas/pru/pru.exp
new file mode 100644
index 0000000..397f3da
--- /dev/null
+++ b/gas/testsuite/gas/pru/pru.exp
@@ -0,0 +1,26 @@
+# Copyright (C) 2014-2016 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+
+#
+# Some generic PRU tests
+#
+
+if { [istarget pru-*-*] } {
+    run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
+
+    run_list_test "illegal" ""
+    run_list_test "warn_reglabel" ""
+}
diff --git a/gas/testsuite/gas/pru/pseudo.d b/gas/testsuite/gas/pru/pseudo.d
new file mode 100644
index 0000000..8da6a11
--- /dev/null
+++ b/gas/testsuite/gas/pru/pseudo.d
@@ -0,0 +1,15 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: PRU pseudo
+
+# Test the pseudo instruction
+
+.*: +file format elf32-pru
+
+Disassembly of section .text:
+0+0000 <[^>]*> 1300e2e1 	mov	r1, sp
+0+0004 <[^>]*> 12e0e0e0 	nop
+0+0008 <[^>]*> 230100c3 	call	00000400 <[^>]*>
+0+000c <[^>]*> 22ea00c3 	call	r10
+0+0010 <[^>]*> 20c30000 	ret
+0+0014 <[^>]*> d10cac00 	wbc	r12.w1, 12
+0+0018 <[^>]*> c8e1ec00 	wbs	r12, r1
diff --git a/gas/testsuite/gas/pru/pseudo.s b/gas/testsuite/gas/pru/pseudo.s
new file mode 100644
index 0000000..87b7dea
--- /dev/null
+++ b/gas/testsuite/gas/pru/pseudo.s
@@ -0,0 +1,10 @@
+# Source file used to test the pseudo instructions.
+
+foo:
+	mov	r1, r2
+	nop
+	call	0x400
+	call	r10
+	ret
+	wbc	r12.w1, 12
+	wbs	r12, r1
diff --git a/gas/testsuite/gas/pru/warn_reglabel.l b/gas/testsuite/gas/pru/warn_reglabel.l
new file mode 100644
index 0000000..eb077f1
--- /dev/null
+++ b/gas/testsuite/gas/pru/warn_reglabel.l
@@ -0,0 +1,3 @@
+.*warn_reglabel.s: Assembler messages:
+.*warn_reglabel.s:3: Warning: Label "r30" matches a CPU register name
+.*warn_reglabel.s:5: Warning: Label "r1.b2" matches a CPU register name
diff --git a/gas/testsuite/gas/pru/warn_reglabel.s b/gas/testsuite/gas/pru/warn_reglabel.s
new file mode 100644
index 0000000..d5e46f7
--- /dev/null
+++ b/gas/testsuite/gas/pru/warn_reglabel.s
@@ -0,0 +1,6 @@
+# Source file used to test warnings
+
+r30:
+	nop
+r1.b2:
+	nop
diff --git a/gas/testsuite/gas/pru/xfr.d b/gas/testsuite/gas/pru/xfr.d
new file mode 100644
index 0000000..fd9b889
--- /dev/null
+++ b/gas/testsuite/gas/pru/xfr.d
@@ -0,0 +1,44 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: PRU xfr
+
+# Test the XFR class of instruction
+
+.*: +file format elf32-pru
+
+Disassembly of section .text:
+0+0000 <[^>]*> 2eff8002 	zero	sp.b0, 1
+0+0004 <[^>]*> 2eff81d7 	zero	r23.b2, 4
+0+0008 <[^>]*> 2effbd80 	zero	r0.b0, 124
+0+000c <[^>]*> 2eff0002 	fill	sp.b0, 1
+0+0010 <[^>]*> 2eff01b7 	fill	r23.b1, 4
+0+0014 <[^>]*> 2eff3d80 	fill	r0.b0, 124
+0+0018 <[^>]*> 2e80000a 	xin	0, r10.b0, 1
+0+001c <[^>]*> 2e803daa 	xin	0, r10.b1, 124
+0+0020 <[^>]*> 2efe806a 	xin	253, r10.b3, 1
+0+0024 <[^>]*> 2efebdca 	xin	253, r10.b2, 124
+0+0028 <[^>]*> 2eaaaa0c 	xin	85, r12.b0, 85
+0+002c <[^>]*> 2f00000a 	xout	0, r10.b0, 1
+0+0030 <[^>]*> 2f003daa 	xout	0, r10.b1, 124
+0+0034 <[^>]*> 2f7e806a 	xout	253, r10.b3, 1
+0+0038 <[^>]*> 2f7ebdca 	xout	253, r10.b2, 124
+0+003c <[^>]*> 2f2aaa0c 	xout	85, r12.b0, 85
+0+0040 <[^>]*> 2f80000a 	xchg	0, r10.b0, 1
+0+0044 <[^>]*> 2f803daa 	xchg	0, r10.b1, 124
+0+0048 <[^>]*> 2ffe806a 	xchg	253, r10.b3, 1
+0+004c <[^>]*> 2ffebdca 	xchg	253, r10.b2, 124
+0+0050 <[^>]*> 2faaaa0c 	xchg	85, r12.b0, 85
+0+0054 <[^>]*> 2e80400a 	sxin	0, r10.b0, 1
+0+0058 <[^>]*> 2e807daa 	sxin	0, r10.b1, 124
+0+005c <[^>]*> 2efec06a 	sxin	253, r10.b3, 1
+0+0060 <[^>]*> 2efefdca 	sxin	253, r10.b2, 124
+0+0064 <[^>]*> 2eaaea0c 	sxin	85, r12.b0, 85
+0+0068 <[^>]*> 2f00400a 	sxout	0, r10.b0, 1
+0+006c <[^>]*> 2f007daa 	sxout	0, r10.b1, 124
+0+0070 <[^>]*> 2f7ec06a 	sxout	253, r10.b3, 1
+0+0074 <[^>]*> 2f7efdca 	sxout	253, r10.b2, 124
+0+0078 <[^>]*> 2f2aea0c 	sxout	85, r12.b0, 85
+0+007c <[^>]*> 2f80400a 	sxchg	0, r10.b0, 1
+0+0080 <[^>]*> 2f807daa 	sxchg	0, r10.b1, 124
+0+0084 <[^>]*> 2ffec06a 	sxchg	253, r10.b3, 1
+0+0088 <[^>]*> 2ffefdca 	sxchg	253, r10.b2, 124
+0+008c <[^>]*> 2faaea0c 	sxchg	85, r12.b0, 85
diff --git a/gas/testsuite/gas/pru/xfr.s b/gas/testsuite/gas/pru/xfr.s
new file mode 100644
index 0000000..875e1ca
--- /dev/null
+++ b/gas/testsuite/gas/pru/xfr.s
@@ -0,0 +1,52 @@
+# Source file used to test the XFR-class of instructions.
+
+foo:
+	# register clear and fill
+	zero	r2, 1
+	zero	r23.b2, 4
+	zero	r0, 124
+	fill	r2, 1
+	fill	r23.b1, 4
+	fill	r0, 124
+
+	# XIN
+	xin	0, r10, 1
+	xin	0, r10.b1, 124
+	xin	253, r10.b3, 1
+	xin	253, r10.b2, 124
+	xin	85, r12.b0, 85
+
+	# XOUT
+	xout	0, r10, 1
+	xout	0, r10.b1, 124
+	xout	253, r10.b3, 1
+	xout	253, r10.b2, 124
+	xout	85, r12.b0, 85
+
+	# XCHG
+	xchg	0, r10, 1
+	xchg	0, r10.b1, 124
+	xchg	253, r10.b3, 1
+	xchg	253, r10.b2, 124
+	xchg	85, r12.b0, 85
+
+	# SXIN
+	sxin	0, r10, 1
+	sxin	0, r10.b1, 124
+	sxin	253, r10.b3, 1
+	sxin	253, r10.b2, 124
+	sxin	85, r12.b0, 85
+
+	# SXOUT
+	sxout	0, r10, 1
+	sxout	0, r10.b1, 124
+	sxout	253, r10.b3, 1
+	sxout	253, r10.b2, 124
+	sxout	85, r12.b0, 85
+
+	# XCHG
+	sxchg	0, r10, 1
+	sxchg	0, r10.b1, 124
+	sxchg	253, r10.b3, 1
+	sxchg	253, r10.b2, 124
+	sxchg	85, r12.b0, 85