Add Visium support to gas

gas/
	* configure.tgt: Add Visium support.
	* Makefile.am (TARGET_CPU_CFILES): Move config/tc-vax.c around
	and add config/tc-visium.c.
	(TARGET_CPU_HFILES): Move config/tc-vax.h around and add
	config/tc-visium.h.
	* Makefile.in: Regenerate.
	* config/tc-visium.c: New file.
	* config/tc-visium.h: Likewise.
	* po/POTFILES.in: Regenerate.
gas/testsuite/
	* gas/elf/elf.exp: Skip ifunc-1 for Visium.
	* gas/visium/: New directory.

24 files changed, 1250 insertions, 1 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 5903720..63d58fe 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2014-12-06  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gas/elf/elf.exp: Skip ifunc-1 for Visium.
+	* gas/visium/: New directory.
+
 2014-11-30  Alan Modra  <amodra@gmail.com>
 
 	* gas/ppc/a2.d: Update for mftb change.
diff --git a/gas/testsuite/gas/elf/elf.exp b/gas/testsuite/gas/elf/elf.exp
index af5dbb2..291c2a7 100644
--- a/gas/testsuite/gas/elf/elf.exp
+++ b/gas/testsuite/gas/elf/elf.exp
@@ -172,11 +172,12 @@ if { [is_elf_format] } then {
     run_dump_test "symver"
 
     # No indirect functions on non-GNU targets.
-    # The MSP port sets the ELF header's OSABI field to ELFOSABI_STANDALONE.
+    # The Visium and MSP set the ELF header's OSABI field to ELFOSABI_STANDALONE.
     # The non-eabi ARM ports sets it to ELFOSABI_ARM.
     # So for these targets we cannot include an IFUNC symbol type
     # in the symbol type test.
     if { [istarget "*-*-hpux*"]
+	 || [istarget "visium-*-*"]
 	 || [istarget "msp*-*-*"]
 	 || [istarget "arm*-*-*"]} then {
 	# hppa64 has a non-standard common directive
diff --git a/gas/testsuite/gas/visium/allinsn_def.d b/gas/testsuite/gas/visium/allinsn_def.d
new file mode 100644
index 0000000..0a0170d
--- /dev/null
+++ b/gas/testsuite/gas/visium/allinsn_def.d
@@ -0,0 +1,134 @@
+#as:
+#objdump: -dzr
+#name: allinsn_def
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+0000000 <begin>:
+   0:	03 e2 00 14 	write.l 0\(r2\),r1
+   4:	03 e2 00 14 	write.l 0\(r2\),r1
+   8:	83 e1 04 22 	write.w 1\(r1\),r2
+   c:	03 e3 7c 71 	write.b 31\(r3\),r7
+  10:	03 e4 00 71 	write.b 0\(r4\),r7
+  14:	03 e4 80 54 	mults   r4,r5
+  18:	83 e7 fc a4 	eamwrite 31,r7,r10
+  1c:	83 ee 90 f4 	writemd r14,r15
+  20:	83 e9 94 04 	writemdc r9
+  24:	03 e5 88 04 	divs    r5
+  28:	83 e6 8c 04 	divu    r6
+  2c:	83 ea 98 04 	divds   r10
+  30:	83 eb 9c 04 	divdu   r11
+  34:	83 ec a4 04 	asrd    r12
+  38:	03 ed a8 04 	lsrd    r13
+  3c:	83 ee ac 04 	asld    r14
+  40:	82 80 00 04 	dsi
+  44:	83 e7 80 84 	mults   r7,r8
+  48:	03 e9 84 a4 	multu   r9,r10
+  4c:	02 a0 00 04 	eni
+  50:	82 80 00 04 	dsi
+  54:	82 fe 01 d4 	rfi
+
+0+0000058 <nsrel>:
+  58:	00 00 00 00 	nop
+  5c:	07 a0 00 04 	rflag   r0
+  60:	08 00 ff fe 	brr     eq,-2
+  64:	07 a0 00 04 	rflag   r0
+  68:	90 00 ff fc 	brr     cs,-4
+  6c:	07 a0 00 04 	rflag   r0
+  70:	18 00 ff fa 	brr     os,-6
+  74:	07 a0 00 04 	rflag   r0
+  78:	20 00 00 1c 	brr     ns,\+28
+  7c:	07 a0 00 04 	rflag   r0
+  80:	a8 00 00 1a 	brr     ne,\+26
+  84:	07 a0 00 04 	rflag   r0
+  88:	30 00 00 18 	brr     cc,\+24
+  8c:	07 a0 00 04 	rflag   r0
+  90:	38 00 00 16 	brr     oc,\+22
+  94:	07 a0 00 04 	rflag   r0
+  98:	c0 00 00 14 	brr     nc,\+20
+  9c:	07 a0 00 04 	rflag   r0
+  a0:	48 00 00 12 	brr     ge,\+18
+  a4:	07 a0 00 04 	rflag   r0
+  a8:	d0 00 00 10 	brr     gt,\+16
+  ac:	07 a0 00 04 	rflag   r0
+  b0:	58 00 00 0e 	brr     hi,\+14
+  b4:	07 a0 00 04 	rflag   r0
+  b8:	60 00 00 0c 	brr     le,\+12
+  bc:	07 a0 00 04 	rflag   r0
+  c0:	e8 00 00 0a 	brr     ls,\+10
+  c4:	07 a0 00 04 	rflag   r0
+  c8:	70 00 00 08 	brr     lt,\+8
+  cc:	07 a0 00 04 	rflag   r0
+  d0:	78 00 00 06 	brr     tr,\+6
+  d4:	07 a0 00 04 	rflag   r0
+  d8:	08 00 ff e0 	brr     eq,-32
+  dc:	00 00 00 00 	nop
+  e0:	00 00 00 00 	nop
+  e4:	00 00 00 00 	nop
+
+0+00000e8 <sreg>:
+  e8:	86 20 00 14 	adc.l   r0,r0,r1
+  ec:	86 20 08 32 	adc.w   r2,r0,r3
+  f0:	86 20 10 51 	adc.b   r4,r0,r5
+  f4:	86 00 08 14 	add.l   r2,r0,r1
+  f8:	06 04 14 32 	add.w   r5,r4,r3
+  fc:	86 07 1c 61 	add.b   r7,r7,r6
+ 100:	87 40 08 14 	and.l   r2,r0,r1
+ 104:	07 44 14 32 	and.w   r5,r4,r3
+ 108:	87 47 1c 61 	and.b   r7,r7,r6
+ 10c:	06 e3 10 44 	asl.l   r4,r3,r4
+ 110:	86 e5 1a 02 	asl.w   r6,r5,0
+ 114:	06 e5 1a 12 	asl.w   r6,r5,1
+ 118:	06 e7 23 f1 	asl.b   r8,r7,31
+ 11c:	86 a3 10 44 	asr.l   r4,r3,r4
+ 120:	06 a5 1a 02 	asr.w   r6,r5,0
+ 124:	86 a5 1a 12 	asr.w   r6,r5,1
+ 128:	86 a7 23 f1 	asr.b   r8,r7,31
+ 12c:	0f 89 28 04 	bra     eq,r9,r10
+ 130:	07 a0 00 04 	rflag   r0
+ 134:	af 87 04 04 	bra     ne,r7,r1
+ 138:	07 e0 ae 04 	readmda r11
+ 13c:	07 e0 b3 f4 	eamread r12,31
+ 140:	87 cd 30 04 	extb.l  r12,r13
+ 144:	87 cf 38 02 	extb.w  r14,r15
+ 148:	87 c1 00 01 	extb.b  r0,r1
+ 14c:	86 83 08 04 	extw.l  r2,r3
+ 150:	86 85 10 02 	extw.w  r4,r5
+ 154:	86 c7 18 84 	lsr.l   r6,r7,r8
+ 158:	06 ca 26 02 	lsr.w   r9,r10,0
+ 15c:	86 ca 26 12 	lsr.w   r9,r10,1
+ 160:	86 ca 27 f1 	lsr.b   r9,r10,31
+ 164:	87 6c 2c 04 	not.l   r11,r12
+ 168:	07 6e 34 02 	not.w   r13,r14
+ 16c:	07 6a 3c 01 	not.b   r15,r10
+ 170:	07 26 14 74 	or.l    r5,r6,r7
+ 174:	07 29 20 a2 	or.w    r8,r9,r10
+ 178:	87 22 04 31 	or.b    r1,r2,r3
+ 17c:	87 e5 12 04 	read.l  r4,0\(r5\)
+ 180:	87 e5 12 04 	read.l  r4,0\(r5\)
+ 184:	07 e7 1a 12 	read.w  r6,1\(r7\)
+ 188:	07 e9 23 f1 	read.b  r8,31\(r9\)
+ 18c:	87 e9 1a 11 	read.b  r6,1\(r9\)
+ 190:	87 e0 aa 04 	readmda r10
+ 194:	87 e0 ae 14 	readmdb r11
+ 198:	07 e0 c6 24 	readmdc r17
+ 19c:	87 a0 10 04 	rflag   r4
+ 1a0:	87 a0 1c 04 	rflag   r7
+ 1a4:	86 45 10 64 	sub.l   r4,r5,r6
+ 1a8:	06 48 1c 92 	sub.w   r7,r8,r9
+ 1ac:	06 41 00 21 	cmp.b   r1,r2
+ 1b0:	06 65 10 64 	subc.l  r4,r5,r6
+ 1b4:	86 68 1c 92 	subc.w  r7,r8,r9
+ 1b8:	86 61 00 21 	cmpc.b  r1,r2
+ 1bc:	07 03 10 24 	xor.l   r4,r3,r2
+ 1c0:	87 06 14 72 	xor.w   r5,r6,r7
+ 1c4:	07 09 04 81 	xor.b   r1,r9,r8
+ 1c8:	04 07 ff ff 	addi    r7,65535
+ 1cc:	04 87 80 00 	movil   r7,0x8000
+ 1d0:	84 a7 7f ff 	moviu   r7,0x7FFF
+ 1d4:	04 c6 00 01 	moviq   r6,1
+ 1d8:	84 47 ff ff 	subi    r7,65535
+ 1dc:	ff 86 00 04 	bra     tr,r6,r0
+ 1e0:	86 00 00 04 	add.l   r0,r0,r0
diff --git a/gas/testsuite/gas/visium/allinsn_def.s b/gas/testsuite/gas/visium/allinsn_def.s
new file mode 100644
index 0000000..10e8b7f
--- /dev/null
+++ b/gas/testsuite/gas/visium/allinsn_def.s
@@ -0,0 +1,157 @@
+begin:
+	write.l	(r2),r1
+	write.l	0(r2),r1
+	write.w	1(r1),r2
+	write.b	31(r3),r7
+	write.b	(r4),r7
+
+	eamwrite 0,r4,r5
+	eamwrite 31,r7,r10
+
+	writemd	r14,r15
+
+	writemdc r9
+
+	divs	r5
+	divu	r6
+	divds	r10
+	divdu	r11
+
+	asrd	r12
+	lsrd	r13
+	asld	r14
+
+	dsi
+
+	mults	r7,r8
+	multu	r9,r10
+
+	eni
+	dsi
+	rfi
+
+
+nsrel:
+	brr	fa,nsrel
+	rflag	r0
+	brr	eq,nsrel
+	rflag	r0
+	brr	cs,nsrel
+	rflag	r0
+	brr	os,nsrel
+	rflag	r0
+	brr	ns,sreg
+	rflag	r0
+	brr	ne,sreg
+	rflag	r0
+	brr	cc,sreg
+	rflag	r0
+	brr	oc,sreg
+	rflag	r0
+	brr	nc,sreg
+	rflag	r0
+	brr	ge,sreg
+	rflag	r0
+	brr	gt,sreg
+	rflag	r0
+	brr	hi,sreg
+	rflag	r0
+	brr	le,sreg
+	rflag	r0
+	brr	ls,sreg
+	rflag	r0
+	brr	lt,sreg
+	rflag	r0
+	brr	tr,sreg
+	rflag	r0
+	brr	eq,nsrel
+	nop
+	brr	fa,.
+	nop
+
+
+sreg:
+	adc.l	r0,r0,r1
+	adc.w	r2,r0,r3
+	adc.b	r4,r0,r5
+
+	add.l	r2,r0,r1
+	add.w	r5,r4,r3
+	add.b	r7,r7,r6
+
+	and.l	r2,r0,r1
+	and.w	r5,r4,r3
+	and.b	r7,r7,r6
+
+	asl.l	r4,r3,r4
+	asl.w	r6,r5,0
+	asl.w	r6,r5,1
+	asl.b	r8,r7,31
+
+	asr.l	r4,r3,r4
+	asr.w	r6,r5,0
+	asr.w	r6,r5,1
+	asr.b	r8,r7,31
+
+	bra	eq,r9,r10
+	rflag	r0
+	bra	ne,r7,r1
+
+	eamread	r11,0
+	eamread	r12,31
+
+	extb.l	r12,r13
+	extb.w	r14,r15
+	extb.b	r0,r1
+
+	extw.l	r2,r3
+	extw.w	r4,r5
+
+	lsr.l	r6,r7,r8
+	lsr.w	r9,r10,0
+	lsr.w	r9,r10,1
+	lsr.b	r9,r10,31
+
+	not.l	r11,r12
+	not.w	r13,r14
+	not.b 	r15,r10
+
+	or.l	r5,r6,r7
+	or.w	r8,r9,r10
+	or.b	r1,r2,r3
+
+	read.l	r4,(r5)
+	read.l	r4,0(r5)
+	read.w	r6,1(r7)
+	read.b	r8,31(r9)
+	read.b	r6,1(r9)
+
+	readmda	r10
+	readmdb	r11
+	readmdc	r17
+
+	rflag	r4
+	rflag	r7
+
+	sub.l	r4,r5,r6
+	sub.w	r7,r8,r9
+	sub.b	r0,r1,r2
+
+	subc.l	r4,r5,r6
+	subc.w	r7,r8,r9
+	subc.b	r0,r1,r2
+
+	xor.l	r4,r3,r2
+	xor.w	r5,r6,r7
+	xor.b	r1,r9,r8
+
+	addi	r7,65535
+	movil	r7,32768
+	moviu	r7,32767
+	moviq	r6,1
+	subi	r7,65535
+
+	bra	tr,r6,r0
+	add.l	r0,r0,r0
+
+	.end
diff --git a/gas/testsuite/gas/visium/allinsn_gr5.d b/gas/testsuite/gas/visium/allinsn_gr5.d
new file mode 100644
index 0000000..49ba3ab
--- /dev/null
+++ b/gas/testsuite/gas/visium/allinsn_gr5.d
@@ -0,0 +1,153 @@
+#as: -mtune=gr5
+#objdump: -dzr
+#name: allinsn_gr5
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+0000000 <begin>:
+   0:	03 e2 00 14 	write.l 0\(r2\),r1
+   4:	03 e2 00 14 	write.l 0\(r2\),r1
+   8:	83 e1 04 22 	write.w 1\(r1\),r2
+   c:	03 e3 7c 71 	write.b 31\(r3\),r7
+  10:	03 e4 00 71 	write.b 0\(r4\),r7
+  14:	03 e4 80 54 	mults   r4,r5
+  18:	83 e7 fc a4 	eamwrite 31,r7,r10
+  1c:	83 ee 90 f4 	writemd r14,r15
+  20:	83 e9 94 04 	writemdc r9
+  24:	03 e5 88 04 	divs    r5
+  28:	83 e6 8c 04 	divu    r6
+  2c:	83 ea 98 04 	divds   r10
+  30:	83 eb 9c 04 	divdu   r11
+  34:	83 ec a4 04 	asrd    r12
+  38:	03 ed a8 04 	lsrd    r13
+  3c:	83 ee ac 04 	asld    r14
+  40:	82 80 00 04 	dsi
+  44:	83 e7 80 84 	mults   r7,r8
+  48:	03 e9 84 a4 	multu   r9,r10
+  4c:	02 a0 00 04 	eni
+  50:	82 80 00 04 	dsi
+  54:	82 fe 01 d4 	rfi
+
+0+0000058 <nsrel>:
+  58:	00 00 00 00 	nop
+  5c:	07 a0 00 04 	rflag   r0
+  60:	08 00 ff fe 	brr     eq,-2
+  64:	07 a0 00 04 	rflag   r0
+  68:	90 00 ff fc 	brr     cs,-4
+  6c:	07 a0 00 04 	rflag   r0
+  70:	18 00 ff fa 	brr     os,-6
+  74:	07 a0 00 04 	rflag   r0
+  78:	20 00 00 1c 	brr     ns,\+28
+  7c:	07 a0 00 04 	rflag   r0
+  80:	a8 00 00 1a 	brr     ne,\+26
+  84:	07 a0 00 04 	rflag   r0
+  88:	30 00 00 18 	brr     cc,\+24
+  8c:	07 a0 00 04 	rflag   r0
+  90:	38 00 00 16 	brr     oc,\+22
+  94:	07 a0 00 04 	rflag   r0
+  98:	c0 00 00 14 	brr     nc,\+20
+  9c:	07 a0 00 04 	rflag   r0
+  a0:	48 00 00 12 	brr     ge,\+18
+  a4:	07 a0 00 04 	rflag   r0
+  a8:	d0 00 00 10 	brr     gt,\+16
+  ac:	07 a0 00 04 	rflag   r0
+  b0:	58 00 00 0e 	brr     hi,\+14
+  b4:	07 a0 00 04 	rflag   r0
+  b8:	60 00 00 0c 	brr     le,\+12
+  bc:	07 a0 00 04 	rflag   r0
+  c0:	e8 00 00 0a 	brr     ls,\+10
+  c4:	07 a0 00 04 	rflag   r0
+  c8:	70 00 00 08 	brr     lt,\+8
+  cc:	07 a0 00 04 	rflag   r0
+  d0:	78 00 00 06 	brr     tr,\+6
+  d4:	07 a0 00 04 	rflag   r0
+  d8:	08 00 ff e0 	brr     eq,-32
+  dc:	00 00 00 00 	nop
+  e0:	00 00 00 00 	nop
+  e4:	00 00 00 00 	nop
+
+0+00000e8 <sreg>:
+  e8:	86 20 00 14 	adc.l   r0,r0,r1
+  ec:	86 20 08 32 	adc.w   r2,r0,r3
+  f0:	86 20 10 51 	adc.b   r4,r0,r5
+  f4:	86 00 08 14 	add.l   r2,r0,r1
+  f8:	06 04 14 32 	add.w   r5,r4,r3
+  fc:	86 07 1c 61 	add.b   r7,r7,r6
+ 100:	87 40 08 14 	and.l   r2,r0,r1
+ 104:	07 44 14 32 	and.w   r5,r4,r3
+ 108:	87 47 1c 61 	and.b   r7,r7,r6
+ 10c:	06 e3 10 44 	asl.l   r4,r3,r4
+ 110:	86 e5 1a 02 	asl.w   r6,r5,0
+ 114:	06 e5 1a 12 	asl.w   r6,r5,1
+ 118:	06 e7 23 f1 	asl.b   r8,r7,31
+ 11c:	86 a3 10 44 	asr.l   r4,r3,r4
+ 120:	06 a5 1a 02 	asr.w   r6,r5,0
+ 124:	86 a5 1a 12 	asr.w   r6,r5,1
+ 128:	86 a7 23 f1 	asr.b   r8,r7,31
+ 12c:	0f 89 28 04 	bra     eq,r9,r10
+ 130:	07 a0 00 04 	rflag   r0
+ 134:	af 87 04 04 	bra     ne,r7,r1
+ 138:	07 e0 ae 04 	readmda r11
+ 13c:	07 e0 b3 f4 	eamread r12,31
+ 140:	87 cd 30 04 	extb.l  r12,r13
+ 144:	87 cf 38 02 	extb.w  r14,r15
+ 148:	87 c1 00 01 	extb.b  r0,r1
+ 14c:	86 83 08 04 	extw.l  r2,r3
+ 150:	86 85 10 02 	extw.w  r4,r5
+ 154:	86 c7 18 84 	lsr.l   r6,r7,r8
+ 158:	06 ca 26 02 	lsr.w   r9,r10,0
+ 15c:	86 ca 26 12 	lsr.w   r9,r10,1
+ 160:	86 ca 27 f1 	lsr.b   r9,r10,31
+ 164:	87 6c 2c 04 	not.l   r11,r12
+ 168:	07 6e 34 02 	not.w   r13,r14
+ 16c:	07 6a 3c 01 	not.b   r15,r10
+ 170:	07 26 14 74 	or.l    r5,r6,r7
+ 174:	07 29 20 a2 	or.w    r8,r9,r10
+ 178:	87 22 04 31 	or.b    r1,r2,r3
+ 17c:	87 e5 12 04 	read.l  r4,0\(r5\)
+ 180:	87 e5 12 04 	read.l  r4,0\(r5\)
+ 184:	07 e7 1a 12 	read.w  r6,1\(r7\)
+ 188:	07 e9 23 f1 	read.b  r8,31\(r9\)
+ 18c:	87 e9 1a 11 	read.b  r6,1\(r9\)
+ 190:	87 e0 aa 04 	readmda r10
+ 194:	87 e0 ae 14 	readmdb r11
+ 198:	07 e0 c6 24 	readmdc r17
+ 19c:	87 a0 10 04 	rflag   r4
+ 1a0:	87 a0 1c 04 	rflag   r7
+ 1a4:	86 45 10 64 	sub.l   r4,r5,r6
+ 1a8:	06 48 1c 92 	sub.w   r7,r8,r9
+ 1ac:	06 41 00 21 	cmp.b   r1,r2
+ 1b0:	06 65 10 64 	subc.l  r4,r5,r6
+ 1b4:	86 68 1c 92 	subc.w  r7,r8,r9
+ 1b8:	86 61 00 21 	cmpc.b  r1,r2
+ 1bc:	07 03 10 24 	xor.l   r4,r3,r2
+ 1c0:	87 06 14 72 	xor.w   r5,r6,r7
+ 1c4:	07 09 04 81 	xor.b   r1,r9,r8
+ 1c8:	04 07 ff ff 	addi    r7,65535
+ 1cc:	04 87 80 00 	movil   r7,0x8000
+ 1d0:	84 a7 7f ff 	moviu   r7,0x7FFF
+ 1d4:	04 c6 00 01 	moviq   r6,1
+ 1d8:	84 47 ff ff 	subi    r7,65535
+ 1dc:	ff 86 00 04 	bra     tr,r6,r0
+ 1e0:	86 00 00 04 	add.l   r0,r0,r0
+ 1e4:	d3 e3 84 5c 	fpinst  10,f1,f3,f5
+ 1e8:	db e4 88 6c 	fpinst  11,f2,f4,f6
+ 1ec:	7b ed ac fc 	fpinst  15,f11,f13,f15
+ 1f0:	8f ef e6 ec 	fpuread 1,r25,f15,f14
+ 1f4:	3b e3 9c 0c 	fabs    f7,f3
+ 1f8:	0b e6 b0 ec 	fadd    f12,f6,f14
+ 1fc:	8b e6 b0 0c 	fadd    f12,f6,f0
+ 200:	63 e6 b0 0c 	fmove   f12,f6
+ 204:	b3 e3 9c 0c 	fneg    f7,f3
+ 208:	93 e0 8c 9c 	fsub    f3,f0,f9
+ 20c:	1b e2 84 3c 	fmult   f1,f2,f3
+ 210:	23 eb a8 cc 	fdiv    f10,f11,f12
+ 214:	2b e9 8c 0c 	fsqrt   f3,f9
+ 218:	43 e4 94 0c 	ftoi    f5,f4
+ 21c:	4b e8 9c 0c 	itof    f7,f8
+ 220:	03 ff b4 0c 	fload   f13,r31
+ 224:	07 e7 e6 0c 	fstore  r25,f7
+ 228:	d7 ef 8a 0c 	fcmp    r2,f15,f0
+ 22c:	df ef 86 1c 	fcmpe   r1,f15,f1
diff --git a/gas/testsuite/gas/visium/allinsn_gr5.s b/gas/testsuite/gas/visium/allinsn_gr5.s
new file mode 100644
index 0000000..f4a9b30
--- /dev/null
+++ b/gas/testsuite/gas/visium/allinsn_gr5.s
@@ -0,0 +1,179 @@
+begin:
+	write.l	(r2),r1
+	write.l	0(r2),r1
+	write.w	1(r1),r2
+	write.b	31(r3),r7
+	write.b	(r4),r7
+
+	eamwrite 0,r4,r5
+	eamwrite 31,r7,r10
+
+	writemd	r14,r15
+
+	writemdc r9
+
+	divs	r5
+	divu	r6
+	divds	r10
+	divdu	r11
+
+	asrd	r12
+	lsrd	r13
+	asld	r14
+
+	dsi
+
+	mults	r7,r8
+	multu	r9,r10
+
+	eni
+	dsi
+	rfi
+
+
+nsrel:
+	brr	fa,nsrel
+	rflag	r0
+	brr	eq,nsrel
+	rflag	r0
+	brr	cs,nsrel
+	rflag	r0
+	brr	os,nsrel
+	rflag	r0
+	brr	ns,sreg
+	rflag	r0
+	brr	ne,sreg
+	rflag	r0
+	brr	cc,sreg
+	rflag	r0
+	brr	oc,sreg
+	rflag	r0
+	brr	nc,sreg
+	rflag	r0
+	brr	ge,sreg
+	rflag	r0
+	brr	gt,sreg
+	rflag	r0
+	brr	hi,sreg
+	rflag	r0
+	brr	le,sreg
+	rflag	r0
+	brr	ls,sreg
+	rflag	r0
+	brr	lt,sreg
+	rflag	r0
+	brr	tr,sreg
+	rflag	r0
+	brr	eq,nsrel
+	nop
+	brr	fa,.
+	nop
+
+
+sreg:
+	adc.l	r0,r0,r1
+	adc.w	r2,r0,r3
+	adc.b	r4,r0,r5
+
+	add.l	r2,r0,r1
+	add.w	r5,r4,r3
+	add.b	r7,r7,r6
+
+	and.l	r2,r0,r1
+	and.w	r5,r4,r3
+	and.b	r7,r7,r6
+
+	asl.l	r4,r3,r4
+	asl.w	r6,r5,0
+	asl.w	r6,r5,1
+	asl.b	r8,r7,31
+
+	asr.l	r4,r3,r4
+	asr.w	r6,r5,0
+	asr.w	r6,r5,1
+	asr.b	r8,r7,31
+
+	bra	eq,r9,r10
+	rflag	r0
+	bra	ne,r7,r1
+
+	eamread	r11,0
+	eamread	r12,31
+
+	extb.l	r12,r13
+	extb.w	r14,r15
+	extb.b	r0,r1
+
+	extw.l	r2,r3
+	extw.w	r4,r5
+
+	lsr.l	r6,r7,r8
+	lsr.w	r9,r10,0
+	lsr.w	r9,r10,1
+	lsr.b	r9,r10,31
+
+	not.l	r11,r12
+	not.w	r13,r14
+	not.b 	r15,r10
+
+	or.l	r5,r6,r7
+	or.w	r8,r9,r10
+	or.b	r1,r2,r3
+
+	read.l	r4,(r5)
+	read.l	r4,0(r5)
+	read.w	r6,1(r7)
+	read.b	r8,31(r9)
+	read.b	r6,1(r9)
+
+
+	readmda	r10
+	readmdb	r11
+	readmdc	r17
+
+	rflag	r4
+	rflag	r7
+
+	sub.l	r4,r5,r6
+	sub.w	r7,r8,r9
+	sub.b	r0,r1,r2
+
+	subc.l	r4,r5,r6
+	subc.w	r7,r8,r9
+	subc.b	r0,r1,r2
+
+	xor.l	r4,r3,r2
+	xor.w	r5,r6,r7
+	xor.b	r1,r9,r8
+
+	addi	r7,65535
+	movil	r7,32768
+	moviu	r7,32767
+	moviq	r6,1
+	subi	r7,65535
+
+	bra	tr,r6,r0
+	add.l	r0,r0,r0
+
+
+	fpinst	10,f1,f3,f5
+	fpinst	11,f2,f4,f6
+	fpinst	15,f11,f13,f15
+	fpuread	1,r25,f15,f14
+	fabs	f7,f3
+	fadd	f12,f6,f14
+	fadd	f12,f6,f0
+	fmove	f12,f6
+	fneg	f7,f3
+	fsub	f3,f0,f9
+	fmult	f1,f2,f3
+	fdiv	f10,f11,f12
+	fsqrt	f3,f9
+	ftoi	f5,f4
+	itof	f7,f8
+	fload	f13,r31
+	fstore	r25,f7
+	fcmp	r2,f15,f0
+	fcmpe	r1,f15,f1
+
+	.end
diff --git a/gas/testsuite/gas/visium/allinsn_gr6.d b/gas/testsuite/gas/visium/allinsn_gr6.d
new file mode 100644
index 0000000..bb198ec
--- /dev/null
+++ b/gas/testsuite/gas/visium/allinsn_gr6.d
@@ -0,0 +1,159 @@
+#as: -mtune=gr6
+#objdump: -dzr
+#name: allinsn_gr6
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+0000000 <begin>:
+   0:	03 e2 00 14 	write.l 0\(r2\),r1
+   4:	03 e2 00 14 	write.l 0\(r2\),r1
+   8:	83 e1 04 22 	write.w 1\(r1\),r2
+   c:	03 e3 7c 71 	write.b 31\(r3\),r7
+  10:	03 e4 00 71 	write.b 0\(r4\),r7
+  14:	03 e4 80 54 	mults   r4,r5
+  18:	83 e7 fc a4 	eamwrite 31,r7,r10
+  1c:	83 ee 90 f4 	writemd r14,r15
+  20:	83 e9 94 04 	writemdc r9
+  24:	03 e5 88 04 	divs    r5
+  28:	83 e6 8c 04 	divu    r6
+  2c:	83 ea 98 04 	divds   r10
+  30:	83 eb 9c 04 	divdu   r11
+  34:	83 ec a4 04 	asrd    r12
+  38:	03 ed a8 04 	lsrd    r13
+  3c:	83 ee ac 04 	asld    r14
+  40:	82 80 00 04 	dsi
+  44:	83 e7 80 84 	mults   r7,r8
+  48:	03 e9 84 a4 	multu   r9,r10
+  4c:	02 a0 00 04 	eni
+  50:	82 80 00 04 	dsi
+  54:	82 fe 01 d4 	rfi
+
+0+0000058 <nsrel>:
+  58:	00 00 00 00 	nop
+  5c:	07 a0 00 04 	rflag   r0
+  60:	08 00 ff fe 	brr     eq,-2
+  64:	07 a0 00 04 	rflag   r0
+  68:	90 00 ff fc 	brr     cs,-4
+  6c:	07 a0 00 04 	rflag   r0
+  70:	18 00 ff fa 	brr     os,-6
+  74:	07 a0 00 04 	rflag   r0
+  78:	20 00 00 1c 	brr     ns,\+28
+  7c:	07 a0 00 04 	rflag   r0
+  80:	a8 00 00 1a 	brr     ne,\+26
+  84:	07 a0 00 04 	rflag   r0
+  88:	30 00 00 18 	brr     cc,\+24
+  8c:	07 a0 00 04 	rflag   r0
+  90:	38 00 00 16 	brr     oc,\+22
+  94:	07 a0 00 04 	rflag   r0
+  98:	c0 00 00 14 	brr     nc,\+20
+  9c:	07 a0 00 04 	rflag   r0
+  a0:	48 00 00 12 	brr     ge,\+18
+  a4:	07 a0 00 04 	rflag   r0
+  a8:	d0 00 00 10 	brr     gt,\+16
+  ac:	07 a0 00 04 	rflag   r0
+  b0:	58 00 00 0e 	brr     hi,\+14
+  b4:	07 a0 00 04 	rflag   r0
+  b8:	60 00 00 0c 	brr     le,\+12
+  bc:	07 a0 00 04 	rflag   r0
+  c0:	e8 00 00 0a 	brr     ls,\+10
+  c4:	07 a0 00 04 	rflag   r0
+  c8:	70 00 00 08 	brr     lt,\+8
+  cc:	07 a0 00 04 	rflag   r0
+  d0:	78 00 00 06 	brr     tr,\+6
+  d4:	07 a0 00 04 	rflag   r0
+  d8:	08 00 ff e0 	brr     eq,-32
+  dc:	00 00 00 00 	nop
+  e0:	00 00 00 00 	nop
+  e4:	00 00 00 00 	nop
+
+0+00000e8 <sreg>:
+  e8:	86 20 00 14 	adc.l   r0,r0,r1
+  ec:	86 20 08 32 	adc.w   r2,r0,r3
+  f0:	86 20 10 51 	adc.b   r4,r0,r5
+  f4:	86 00 08 14 	add.l   r2,r0,r1
+  f8:	06 04 14 32 	add.w   r5,r4,r3
+  fc:	86 07 1c 61 	add.b   r7,r7,r6
+ 100:	87 40 08 14 	and.l   r2,r0,r1
+ 104:	07 44 14 32 	and.w   r5,r4,r3
+ 108:	87 47 1c 61 	and.b   r7,r7,r6
+ 10c:	06 e3 10 44 	asl.l   r4,r3,r4
+ 110:	86 e5 1a 02 	asl.w   r6,r5,0
+ 114:	06 e5 1a 12 	asl.w   r6,r5,1
+ 118:	06 e7 23 f1 	asl.b   r8,r7,31
+ 11c:	86 a3 10 44 	asr.l   r4,r3,r4
+ 120:	06 a5 1a 02 	asr.w   r6,r5,0
+ 124:	86 a5 1a 12 	asr.w   r6,r5,1
+ 128:	86 a7 23 f1 	asr.b   r8,r7,31
+ 12c:	0f 89 28 04 	bra     eq,r9,r10
+ 130:	07 a0 00 04 	rflag   r0
+ 134:	af 87 04 04 	bra     ne,r7,r1
+ 138:	07 e0 ae 04 	readmda r11
+ 13c:	07 e0 b3 f4 	eamread r12,31
+ 140:	87 cd 30 04 	extb.l  r12,r13
+ 144:	87 cf 38 02 	extb.w  r14,r15
+ 148:	87 c1 00 01 	extb.b  r0,r1
+ 14c:	86 83 08 04 	extw.l  r2,r3
+ 150:	86 85 10 02 	extw.w  r4,r5
+ 154:	86 c7 18 84 	lsr.l   r6,r7,r8
+ 158:	06 ca 26 02 	lsr.w   r9,r10,0
+ 15c:	86 ca 26 12 	lsr.w   r9,r10,1
+ 160:	86 ca 27 f1 	lsr.b   r9,r10,31
+ 164:	87 6c 2c 04 	not.l   r11,r12
+ 168:	07 6e 34 02 	not.w   r13,r14
+ 16c:	07 6a 3c 01 	not.b   r15,r10
+ 170:	07 26 14 74 	or.l    r5,r6,r7
+ 174:	07 29 20 a2 	or.w    r8,r9,r10
+ 178:	87 22 04 31 	or.b    r1,r2,r3
+ 17c:	87 e5 12 04 	read.l  r4,0\(r5\)
+ 180:	87 e5 12 04 	read.l  r4,0\(r5\)
+ 184:	07 e7 1a 12 	read.w  r6,1\(r7\)
+ 188:	07 e9 23 f1 	read.b  r8,31\(r9\)
+ 18c:	87 e9 1a 11 	read.b  r6,1\(r9\)
+ 190:	87 e0 aa 04 	readmda r10
+ 194:	87 e0 ae 14 	readmdb r11
+ 198:	07 e0 c6 24 	readmdc r17
+ 19c:	87 a0 10 04 	rflag   r4
+ 1a0:	87 a0 1c 04 	rflag   r7
+ 1a4:	86 45 10 64 	sub.l   r4,r5,r6
+ 1a8:	06 48 1c 92 	sub.w   r7,r8,r9
+ 1ac:	06 41 00 21 	cmp.b   r1,r2
+ 1b0:	06 65 10 64 	subc.l  r4,r5,r6
+ 1b4:	86 68 1c 92 	subc.w  r7,r8,r9
+ 1b8:	86 61 00 21 	cmpc.b  r1,r2
+ 1bc:	07 03 10 24 	xor.l   r4,r3,r2
+ 1c0:	87 06 14 72 	xor.w   r5,r6,r7
+ 1c4:	07 09 04 81 	xor.b   r1,r9,r8
+ 1c8:	04 07 ff ff 	addi    r7,65535
+ 1cc:	04 87 80 00 	movil   r7,0x8000
+ 1d0:	84 a7 7f ff 	moviu   r7,0x7FFF
+ 1d4:	04 c6 00 01 	moviq   r6,1
+ 1d8:	84 47 ff ff 	subi    r7,65535
+ 1dc:	ff 86 00 04 	bra     tr,r6,r0
+ 1e0:	86 00 00 04 	add.l   r0,r0,r0
+ 1e4:	d3 e3 84 5c 	fpinst  10,f1,f3,f5
+ 1e8:	db e4 88 6c 	fpinst  11,f2,f4,f6
+ 1ec:	7b ed ac fc 	fpinst  15,f11,f13,f15
+ 1f0:	8f ef e6 ec 	fpuread 1,r25,f15,f14
+ 1f4:	3b e3 9c 0c 	fabs    f7,f3
+ 1f8:	0b e6 b0 ec 	fadd    f12,f6,f14
+ 1fc:	8b e6 b0 0c 	fadd    f12,f6,f0
+ 200:	63 e6 b0 0c 	fmove   f12,f6
+ 204:	b3 e3 9c 0c 	fneg    f7,f3
+ 208:	93 e0 8c 9c 	fsub    f3,f0,f9
+ 20c:	1b e2 84 3c 	fmult   f1,f2,f3
+ 210:	23 eb a8 cc 	fdiv    f10,f11,f12
+ 214:	2b e9 8c 0c 	fsqrt   f3,f9
+ 218:	43 e4 94 0c 	ftoi    f5,f4
+ 21c:	4b e8 9c 0c 	itof    f7,f8
+ 220:	03 ff b4 0c 	fload   f13,r31
+ 224:	07 e7 e6 0c 	fstore  r25,f7
+ 228:	57 ef 82 0c 	fcmp    r0,f15,f0
+ 22c:	5f ef 82 1c 	fcmpe   r0,f15,f1
+ 230:	57 ef 82 0c 	fcmp    r0,f15,f0
+ 234:	5f ef 82 1c 	fcmpe   r0,f15,f1
+ 238:	02 63 00 04 	bmd     r1,r2,r3
+ 23c:	82 23 00 04 	bmi     r1,r2,r3
+ 240:	85 00 80 00 	wrtl    0x8000
+ 244:	05 20 7f ff 	wrtu    0x7FFF
diff --git a/gas/testsuite/gas/visium/allinsn_gr6.s b/gas/testsuite/gas/visium/allinsn_gr6.s
new file mode 100644
index 0000000..32953fb
--- /dev/null
+++ b/gas/testsuite/gas/visium/allinsn_gr6.s
@@ -0,0 +1,185 @@
+begin:
+	write.l	(r2),r1
+	write.l	0(r2),r1
+	write.w	1(r1),r2
+	write.b	31(r3),r7
+	write.b	(r4),r7
+
+	eamwrite 0,r4,r5
+	eamwrite 31,r7,r10
+
+	writemd	r14,r15
+
+	writemdc r9
+
+	divs	r5
+	divu	r6
+	divds	r10
+	divdu	r11
+
+	asrd	r12
+	lsrd	r13
+	asld	r14
+
+	dsi
+
+	mults	r7,r8
+	multu	r9,r10
+
+	eni
+	dsi
+	rfi
+
+
+nsrel:
+	brr	fa,nsrel
+	rflag	r0
+	brr	eq,nsrel
+	rflag	r0
+	brr	cs,nsrel
+	rflag	r0
+	brr	os,nsrel
+	rflag	r0
+	brr	ns,sreg
+	rflag	r0
+	brr	ne,sreg
+	rflag	r0
+	brr	cc,sreg
+	rflag	r0
+	brr	oc,sreg
+	rflag	r0
+	brr	nc,sreg
+	rflag	r0
+	brr	ge,sreg
+	rflag	r0
+	brr	gt,sreg
+	rflag	r0
+	brr	hi,sreg
+	rflag	r0
+	brr	le,sreg
+	rflag	r0
+	brr	ls,sreg
+	rflag	r0
+	brr	lt,sreg
+	rflag	r0
+	brr	tr,sreg
+	rflag	r0
+	brr	eq,nsrel
+	nop
+	brr	fa,.
+	nop
+
+
+sreg:
+	adc.l	r0,r0,r1
+	adc.w	r2,r0,r3
+	adc.b	r4,r0,r5
+
+	add.l	r2,r0,r1
+	add.w	r5,r4,r3
+	add.b	r7,r7,r6
+
+	and.l	r2,r0,r1
+	and.w	r5,r4,r3
+	and.b	r7,r7,r6
+
+	asl.l	r4,r3,r4
+	asl.w	r6,r5,0
+	asl.w	r6,r5,1
+	asl.b	r8,r7,31
+
+	asr.l	r4,r3,r4
+	asr.w	r6,r5,0
+	asr.w	r6,r5,1
+	asr.b	r8,r7,31
+
+	bra	eq,r9,r10
+	rflag	r0
+	bra	ne,r7,r1
+
+	eamread	r11,0
+	eamread	r12,31
+
+	extb.l	r12,r13
+	extb.w	r14,r15
+	extb.b	r0,r1
+
+	extw.l	r2,r3
+	extw.w	r4,r5
+
+	lsr.l	r6,r7,r8
+	lsr.w	r9,r10,0
+	lsr.w	r9,r10,1
+	lsr.b	r9,r10,31
+
+	not.l	r11,r12
+	not.w	r13,r14
+	not.b 	r15,r10
+
+	or.l	r5,r6,r7
+	or.w	r8,r9,r10
+	or.b	r1,r2,r3
+
+	read.l	r4,(r5)
+	read.l	r4,0(r5)
+	read.w	r6,1(r7)
+	read.b	r8,31(r9)
+	read.b	r6,1(r9)
+
+	readmda	r10
+	readmdb	r11
+	readmdc	r17
+
+	rflag	r4
+	rflag	r7
+
+	sub.l	r4,r5,r6
+	sub.w	r7,r8,r9
+	sub.b	r0,r1,r2
+
+	subc.l	r4,r5,r6
+	subc.w	r7,r8,r9
+	subc.b	r0,r1,r2
+
+	xor.l	r4,r3,r2
+	xor.w	r5,r6,r7
+	xor.b	r1,r9,r8
+
+	addi	r7,65535
+	movil	r7,32768
+	moviu	r7,32767
+	moviq	r6,1
+	subi	r7,65535
+
+	bra	tr,r6,r0
+	add.l	r0,r0,r0
+
+
+	fpinst	10,f1,f3,f5
+	fpinst	11,f2,f4,f6
+	fpinst	15,f11,f13,f15
+	fpuread	1,r25,f15,f14
+	fabs	f7,f3
+	fadd	f12,f6,f14
+	fadd	f12,f6,f0
+	fmove	f12,f6
+	fneg	f7,f3
+	fsub	f3,f0,f9
+	fmult	f1,f2,f3
+	fdiv	f10,f11,f12
+	fsqrt	f3,f9
+	ftoi	f5,f4
+	itof	f7,f8
+	fload	f13,r31
+	fstore	r25,f7
+	fcmp	r0,f15,f0
+	fcmpe	r0,f15,f1
+	fcmp	f15,f0
+	fcmpe	f15,f1
+
+	bmd	r1,r2,r3
+	bmi	r1,r2,r3
+
+	wrtl	32768
+	wrtu	32767
+	.end
diff --git a/gas/testsuite/gas/visium/basereg.s b/gas/testsuite/gas/visium/basereg.s
new file mode 100644
index 0000000..a875671
--- /dev/null
+++ b/gas/testsuite/gas/visium/basereg.s
@@ -0,0 +1,20 @@
+; Test error messages where targets are out of range.
+
+; { dg-do assemble }
+; { dg-options "-mtune=mcm" }
+
+	.text
+foo:
+	fstore	r4,f15
+	read.b	r6,1(r4)  ; { dg-error "base register not ready" "r4 not ready" }
+	readmdc r5
+	read.w	r7,31(r5) ; { dg-error "base register not ready" "r5 not ready" }
+	fcmp	r6,f4,f5
+	read.l	r8,13(r6) ; { dg-error "base register not ready" "r6 not ready" }
+	move.b	r7,r0
+	write.b	2(r7),r0  ; { dg-error "base register not ready" "r7 not ready" }
+	move.w	r8,r0
+	write.w	2(r8),r0  ; { dg-error "base register not ready" "r8 not ready" }
+	move.l	r9,r0
+	write.b	2(r9),r0  ; { dg-error "base register not ready" "r9 not ready" }
+	.end
diff --git a/gas/testsuite/gas/visium/brr-1.d b/gas/testsuite/gas/visium/brr-1.d
new file mode 100644
index 0000000..28b5f4b
--- /dev/null
+++ b/gas/testsuite/gas/visium/brr-1.d
@@ -0,0 +1,16 @@
+#as:
+#objdump: -d
+#name: brr-1
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+00000000 <foo>:
+   0:	78 00 00 00 	brr     tr,\+0
+   4:	84 c1 00 01 	moviq   r1,1
+   8:	78 00 00 00 	brr     tr,\+0
+   c:	84 c1 00 02 	moviq   r1,2
+  10:	78 00 ff fc 	brr     tr,-4
+  14:	84 c1 00 04 	moviq   r1,4
+  18:	00 00 00 00 	nop
diff --git a/gas/testsuite/gas/visium/brr-1.s b/gas/testsuite/gas/visium/brr-1.s
new file mode 100644
index 0000000..34d5490
--- /dev/null
+++ b/gas/testsuite/gas/visium/brr-1.s
@@ -0,0 +1,9 @@
+        .text
+foo:
+	brr tr,foo
+	 moviq r1,1
+	brr tr,0
+	 moviq r1,2
+	brr tr,foo
+	 moviq r1,4
+	brr fa,.
diff --git a/gas/testsuite/gas/visium/brr-2.d b/gas/testsuite/gas/visium/brr-2.d
new file mode 100644
index 0000000..48d9ef5
--- /dev/null
+++ b/gas/testsuite/gas/visium/brr-2.d
@@ -0,0 +1,18 @@
+#as: -mtune=gr6
+#objdump: -d
+#name: brr-2
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+00000000 <foo>:
+   0:	00 00 00 00 	nop
+   4:	78 00 ff ff 	brr     tr,-1
+   8:	84 c1 00 01 	moviq   r1,1
+   c:	00 00 00 00 	nop
+  10:	78 00 ff ff 	brr     tr,-1
+  14:	84 c1 00 02 	moviq   r1,2
+  18:	78 00 ff fa 	brr     tr,-6
+  1c:	84 c1 00 04 	moviq   r1,4
+  20:	00 00 00 00 	nop
diff --git a/gas/testsuite/gas/visium/brr-2.s b/gas/testsuite/gas/visium/brr-2.s
new file mode 100644
index 0000000..34d5490
--- /dev/null
+++ b/gas/testsuite/gas/visium/brr-2.s
@@ -0,0 +1,9 @@
+        .text
+foo:
+	brr tr,foo
+	 moviq r1,1
+	brr tr,0
+	 moviq r1,2
+	brr tr,foo
+	 moviq r1,4
+	brr fa,.
diff --git a/gas/testsuite/gas/visium/brr_backward.s b/gas/testsuite/gas/visium/brr_backward.s
new file mode 100644
index 0000000..a601bd2
--- /dev/null
+++ b/gas/testsuite/gas/visium/brr_backward.s
@@ -0,0 +1,15 @@
+; Test error messages where targets are out of range.
+
+; { dg-do assemble }
+
+	.text
+L1:
+	.rept	32768
+	nop
+	.endr
+	brr	tr,L1
+L2:
+	.rept	32769
+	nop
+	.endr
+	brr	tr,L2 ; { dg-error "out of range" "out of range brr" }
diff --git a/gas/testsuite/gas/visium/brr_forward.s b/gas/testsuite/gas/visium/brr_forward.s
new file mode 100644
index 0000000..ee00f4e
--- /dev/null
+++ b/gas/testsuite/gas/visium/brr_forward.s
@@ -0,0 +1,16 @@
+; Test error messages when targets are out of range
+
+; { dg-do assemble }
+
+	.text
+	brr	tr,L1
+	.rept	32766
+	nop
+	.endr
+L1:
+	brr	tr,L2 ; { dg-error "out of range" "out of range brr" }
+	.rept	32767
+	nop
+	.endr
+L2:
+	.end
diff --git a/gas/testsuite/gas/visium/error.exp b/gas/testsuite/gas/visium/error.exp
new file mode 100644
index 0000000..f06287d
--- /dev/null
+++ b/gas/testsuite/gas/visium/error.exp
@@ -0,0 +1,35 @@
+# Expect script for Visium tests.
+#   Copyright (C) 2014 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+
+# Test assembler warnings and errors.
+
+if [istarget visium-*-*] {
+
+  load_lib gas-dg.exp
+
+  dg-init
+
+  dg-runtest "$srcdir/$subdir/brr_backward.s" "" ""
+  dg-runtest "$srcdir/$subdir/brr_forward.s" "" ""
+  dg-runtest "$srcdir/$subdir/basereg.s" "" ""
+  dg-runtest "$srcdir/$subdir/fcmp.s" "" ""
+
+  dg-finish
+}
diff --git a/gas/testsuite/gas/visium/fcmp.s b/gas/testsuite/gas/visium/fcmp.s
new file mode 100644
index 0000000..713af4f
--- /dev/null
+++ b/gas/testsuite/gas/visium/fcmp.s
@@ -0,0 +1,11 @@
+; Test error messages for new syntax of FCMP/FCMPE
+
+; { dg-do assemble }
+; { dg-options "-mtune=gr6" }
+
+	.text
+foo:
+	fcmp r1, f1, f2 ; { dg-error "can only use r0 as Dest register" }
+	fcmp r0, f1, f2
+	fcmp f1, f2
+	.end
diff --git a/gas/testsuite/gas/visium/high-1.d b/gas/testsuite/gas/visium/high-1.d
new file mode 100644
index 0000000..167d2ea
--- /dev/null
+++ b/gas/testsuite/gas/visium/high-1.d
@@ -0,0 +1,19 @@
+#as:
+#objdump: -dr
+#name: high-1
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+0000000 <foo>:
+   0:	84 a4 00 01 	moviu   r4,0x0001
+			0: R_VISIUM_HI16	.text\+0x10000
+   4:	84 84 00 00 	movil   r4,0x0000
+			4: R_VISIUM_LO16	.text\+0x10000
+   8:	84 a4 12 34 	moviu   r4,0x1234
+   c:	84 84 87 65 	movil   r4,0x8765
+  10:	04 a4 00 00 	moviu   r4,0x0000
+			10: R_VISIUM_HI16	.text\+0x18
+  14:	84 84 00 18 	movil   r4,0x0018
+			14: R_VISIUM_LO16	.text\+0x18
diff --git a/gas/testsuite/gas/visium/high-1.s b/gas/testsuite/gas/visium/high-1.s
new file mode 100644
index 0000000..aaf570c
--- /dev/null
+++ b/gas/testsuite/gas/visium/high-1.s
@@ -0,0 +1,11 @@
+; Test %hi/%lo handling.
+
+foo:
+	moviu r4,%u(foo+0x10000)
+	movil r4,%l(foo+0x10000)
+
+	moviu r4,%u 0x12348765
+	movil r4,%l 0x12348765
+
+	moviu r4,%u .+8
+	movil r4,%l .+4
diff --git a/gas/testsuite/gas/visium/immed-1.d b/gas/testsuite/gas/visium/immed-1.d
new file mode 100644
index 0000000..d19cda0
--- /dev/null
+++ b/gas/testsuite/gas/visium/immed-1.d
@@ -0,0 +1,17 @@
+#as:
+#objdump: -dr
+#name: immed-1
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+0000000 <bar>:
+       0:	04 c1 00 00 	moviq   r1,0
+       4:	84 41 00 0c 	subi    r1,12
+       8:	04 01 00 00 	addi    r1,0
+			8: R_VISIUM_IM16	\.text
+       c:	84 c4 ff ec 	moviq   r4,65516
+	\.\.\.
+    1010:	04 c6 00 08 	moviq   r6,8
+    1014:	04 c7 00 e4 	moviq   r7,228
diff --git a/gas/testsuite/gas/visium/immed-1.s b/gas/testsuite/gas/visium/immed-1.s
new file mode 100644
index 0000000..9711430
--- /dev/null
+++ b/gas/testsuite/gas/visium/immed-1.s
@@ -0,0 +1,10 @@
+!	Tests for complex immediate expressions.
+	.text
+bar:
+	moviq	r1, 0
+	subi	r1, (. - bar + 8)
+	addi	r1, bar
+	moviq	r4, (bar - . -8) & 0xffff
+	.space 4096
+	moviq	r6, (. - bar - 8) & 0xff
+	moviq	r7, (bar - . -8) & 0xff
diff --git a/gas/testsuite/gas/visium/rela-1.d b/gas/testsuite/gas/visium/rela-1.d
new file mode 100644
index 0000000..274f5f8
--- /dev/null
+++ b/gas/testsuite/gas/visium/rela-1.d
@@ -0,0 +1,18 @@
+#as:
+#objdump: -dr
+#name: rela-1
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+0000000 <text>:
+   0:	f8 00 00 04 	brr     tr,\+4
+			0: R_VISIUM_PC16	.text2\+0x10
+   4:	00 00 00 00 	nop
+   8:	84 a6 00 00 	moviu   r6,0x0000
+			8: R_VISIUM_HI16	.text2\+0x10
+   c:	84 86 00 10 	movil   r6,0x0010
+			c: R_VISIUM_LO16	.text2\+0x10
+  10:	ff 86 00 04 	bra     tr,r6,r0
+  14:	00 00 00 00 	nop
diff --git a/gas/testsuite/gas/visium/rela-1.s b/gas/testsuite/gas/visium/rela-1.s
new file mode 100644
index 0000000..28e1d1e
--- /dev/null
+++ b/gas/testsuite/gas/visium/rela-1.s
@@ -0,0 +1,20 @@
+
+	.section .text
+text:
+	brr	tr,label
+	nop
+	moviu	r6, %u label
+	movil	r6, %l label
+	bra	tr,r6,r0
+	nop
+
+	.section .text2
+text2:
+	nop
+	nop
+	nop
+	nop
+label:
+	.end
+
+
diff --git a/gas/testsuite/gas/visium/visium.exp b/gas/testsuite/gas/visium/visium.exp
new file mode 100644
index 0000000..c54d738
--- /dev/null
+++ b/gas/testsuite/gas/visium/visium.exp
@@ -0,0 +1,32 @@
+# Expect script for Visium tests.
+#   Copyright (C) 2014 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+
+# Visium assembler testsuite.
+
+if [istarget visium-*-*] {
+    run_dump_test "allinsn_def"
+    run_dump_test "allinsn_gr5"
+    run_dump_test "allinsn_gr6"
+    run_dump_test "brr-1"
+    run_dump_test "brr-2"
+    run_dump_test "high-1"
+    run_dump_test "immed-1"
+    run_dump_test "rela-1"
+}