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authorH.J. Lu <hjl.tools@gmail.com>2015-05-11 11:11:19 -0700
committerH.J. Lu <hjl.tools@gmail.com>2015-05-11 11:12:39 -0700
commit814860358c2e4194d372018dd1ae78b5c95a44d0 (patch)
treec937ad8adddc54e3de0f75509aab0a017b5eceb1 /gas/testsuite
parent7b6d09fbc60b12c196b25a9ebbb77ddc24e06334 (diff)
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Add Intel MCU support to gas
-march=iamcu must be passed to i386 assembler to generate Intel MCU object file. gas/ * config/tc-i386.c (cpu_arch): Add iamcu. (i386_align_code): Handle PROCESSOR_IAMCU. (i386_arch): Likewise. (i386_mach): Likewise. (i386_target_format): Likewise. (valid_iamcu_cpu_flags): New function. (check_cpu_arch_compatible): Only allow Intel MCU instructions when targeting Intel MCU. (set_cpu_arch): Call valid_iamcu_cpu_flags to check if CPU flags are valid for Intel MCU. (md_parse_option): Likewise. * tc-i386.h (ELF_TARGET_IAMCU_FORMAT): New. (processor_type): Add PROCESSOR_IAMCU. * doc/c-i386.texi: Document iamcu. gas/testsuite/ * gas/i386/i386.exp: Run iamcu-1, iamcu-2, iamcu-3, iamcu-inval-1, iamcu-inval-2 and iamcu-inval-3. * gas/i386/iamcu-1.d: New file. * gas/i386/iamcu-1.s: Likewise. * gas/i386/iamcu-2.d: Likewise. * gas/i386/iamcu-2.s: Likewise. * gas/i386/iamcu-3.d: Likewise. * gas/i386/iamcu-3.s: Likewise. * gas/i386/iamcu-inval-1.l: Likewise. * gas/i386/iamcu-inval-1.s: Likewise. * gas/i386/iamcu-inval-2.l: Likewise. * gas/i386/iamcu-inval-2.s: Likewise. * gas/i386/iamcu-inval-3.l: Likewise. * gas/i386/iamcu-inval-3.s: Likewise.
Diffstat (limited to 'gas/testsuite')
-rw-r--r--gas/testsuite/ChangeLog17
-rw-r--r--gas/testsuite/gas/i386/i386.exp15
-rw-r--r--gas/testsuite/gas/i386/iamcu-1.d52
-rw-r--r--gas/testsuite/gas/i386/iamcu-1.s51
-rw-r--r--gas/testsuite/gas/i386/iamcu-2.d11
-rw-r--r--gas/testsuite/gas/i386/iamcu-2.s4
-rw-r--r--gas/testsuite/gas/i386/iamcu-3.d11
-rw-r--r--gas/testsuite/gas/i386/iamcu-3.s2
-rw-r--r--gas/testsuite/gas/i386/iamcu-inval-1.l21
-rw-r--r--gas/testsuite/gas/i386/iamcu-inval-1.s11
-rw-r--r--gas/testsuite/gas/i386/iamcu-inval-2.l2
-rw-r--r--gas/testsuite/gas/i386/iamcu-inval-2.s2
-rw-r--r--gas/testsuite/gas/i386/iamcu-inval-3.l2
-rw-r--r--gas/testsuite/gas/i386/iamcu-inval-3.s1
14 files changed, 200 insertions, 2 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index b3efb8f..da97ddc 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,20 @@
+2015-05-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/i386.exp: Run iamcu-1, iamcu-2, iamcu-3, iamcu-inval-1,
+ iamcu-inval-2 and iamcu-inval-3.
+ * gas/i386/iamcu-1.d: New file.
+ * gas/i386/iamcu-1.s: Likewise.
+ * gas/i386/iamcu-2.d: Likewise.
+ * gas/i386/iamcu-2.s: Likewise.
+ * gas/i386/iamcu-3.d: Likewise.
+ * gas/i386/iamcu-3.s: Likewise.
+ * gas/i386/iamcu-inval-1.l: Likewise.
+ * gas/i386/iamcu-inval-1.s: Likewise.
+ * gas/i386/iamcu-inval-2.l: Likewise.
+ * gas/i386/iamcu-inval-2.s: Likewise.
+ * gas/i386/iamcu-inval-3.l: Likewise.
+ * gas/i386/iamcu-inval-3.s: Likewise.
+
2015-05-08 Nick Clifton <nickc@redhat.com>
PR gas/18347
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 9492e80..c66dbc5 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -397,6 +397,15 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "relax-3"
run_dump_test "relax-4"
+
+ if {![istarget "*-*-nacl*"]} then {
+ run_dump_test "iamcu-1"
+ run_dump_test "iamcu-2"
+ run_dump_test "iamcu-3"
+ run_list_test "iamcu-inval-1" "-march=iamcu -al"
+ run_list_test "iamcu-inval-2" "-march=iamcu -al"
+ run_list_test "iamcu-inval-3" "-march=iamcu+sse4 -al"
+ }
}
# This is a PE specific test.
@@ -414,8 +423,10 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
# Common tests
if [expr [istarget "i*86-*-*"] || [istarget "x86_64-*-*"]] then {
- run_dump_test "intel-expr"
- run_dump_test "string-ok"
+ if {![istarget "i*86-*-elfiamcu"]} then {
+ run_dump_test "intel-expr"
+ run_dump_test "string-ok"
+ }
run_list_test "string-bad" ""
run_list_test "reg-bad" ""
run_list_test "space1" "-al"
diff --git a/gas/testsuite/gas/i386/iamcu-1.d b/gas/testsuite/gas/i386/iamcu-1.d
new file mode 100644
index 0000000..c4d22bf
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-1.d
@@ -0,0 +1,52 @@
+#as: -J -march=iamcu
+#objdump: -dw
+#not-target: *-*-nacl*
+
+.*: +file format elf32-iamcu.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 66 0f be f0 movsbw %al,%si
+[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
+[ ]*[a-f0-9]+: 0f bf f0 movswl %ax,%esi
+[ ]*[a-f0-9]+: 0f be 10 movsbl \(%eax\),%edx
+[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%eax\),%dx
+[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%eax\),%dx
+[ ]*[a-f0-9]+: 0f be 10 movsbl \(%eax\),%edx
+[ ]*[a-f0-9]+: 0f bf 10 movswl \(%eax\),%edx
+[ ]*[a-f0-9]+: 0f be 10 movsbl \(%eax\),%edx
+[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%eax\),%dx
+[ ]*[a-f0-9]+: 0f bf 10 movswl \(%eax\),%edx
+[ ]*[a-f0-9]+: 66 0f b6 f0 movzbw %al,%si
+[ ]*[a-f0-9]+: 0f b6 f0 movzbl %al,%esi
+[ ]*[a-f0-9]+: 0f b7 f0 movzwl %ax,%esi
+[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%eax\),%edx
+[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%eax\),%dx
+[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%eax\),%dx
+[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%eax\),%edx
+[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%eax\),%edx
+[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%eax\),%edx
+[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%eax\),%dx
+[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%eax\),%edx
+[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%eax\),%dx
+[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%eax\),%edx
+[ ]*[a-f0-9]+: 66 0f be f0 movsbw %al,%si
+[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
+[ ]*[a-f0-9]+: 0f bf f0 movswl %ax,%esi
+[ ]*[a-f0-9]+: 0f be 10 movsbl \(%eax\),%edx
+[ ]*[a-f0-9]+: 66 0f be 10 movsbw \(%eax\),%dx
+[ ]*[a-f0-9]+: 0f bf 10 movswl \(%eax\),%edx
+[ ]*[a-f0-9]+: 66 0f b6 f0 movzbw %al,%si
+[ ]*[a-f0-9]+: 0f b6 f0 movzbl %al,%esi
+[ ]*[a-f0-9]+: 0f b7 f0 movzwl %ax,%esi
+[ ]*[a-f0-9]+: 0f b6 10 movzbl \(%eax\),%edx
+[ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%eax\),%dx
+[ ]*[a-f0-9]+: 0f b7 10 movzwl \(%eax\),%edx
+[ ]*[a-f0-9]+: 66 0f be 00 movsbw \(%eax\),%ax
+[ ]*[a-f0-9]+: 0f be 00 movsbl \(%eax\),%eax
+[ ]*[a-f0-9]+: 0f bf 00 movswl \(%eax\),%eax
+[ ]*[a-f0-9]+: 66 0f b6 00 movzbw \(%eax\),%ax
+[ ]*[a-f0-9]+: 0f b6 00 movzbl \(%eax\),%eax
+[ ]*[a-f0-9]+: 0f b7 00 movzwl \(%eax\),%eax
+#pass
diff --git a/gas/testsuite/gas/i386/iamcu-1.s b/gas/testsuite/gas/i386/iamcu-1.s
new file mode 100644
index 0000000..b631dfa
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-1.s
@@ -0,0 +1,51 @@
+# IAMCU instructions
+ .text
+
+ movsx %al, %si
+ movsx %al, %esi
+ movsx %ax, %esi
+ movsx (%eax), %edx
+ movsx (%eax), %dx
+ movsxb (%eax), %dx
+ movsxb (%eax), %edx
+ movsxw (%eax), %edx
+ movsbl (%eax), %edx
+ movsbw (%eax), %dx
+ movswl (%eax), %edx
+
+ movzx %al, %si
+ movzx %al, %esi
+ movzx %ax, %esi
+ movzx (%eax), %edx
+ movzx (%eax), %dx
+ movzxb (%eax), %dx
+ movzxb (%eax), %edx
+ movzxw (%eax), %edx
+ movzb (%eax), %edx
+ movzb (%eax), %dx
+ movzbl (%eax), %edx
+ movzbw (%eax), %dx
+ movzwl (%eax), %edx
+
+ .intel_syntax noprefix
+
+ movsx si,al
+ movsx esi,al
+ movsx esi,ax
+ movsx edx,BYTE PTR [eax]
+ movsx dx,BYTE PTR [eax]
+ movsx edx,WORD PTR [eax]
+
+ movzx si,al
+ movzx esi,al
+ movzx esi,ax
+ movzx edx,BYTE PTR [eax]
+ movzx dx,BYTE PTR [eax]
+ movzx edx,WORD PTR [eax]
+
+ movsx ax, byte ptr [eax]
+ movsx eax, byte ptr [eax]
+ movsx eax, word ptr [eax]
+ movzx ax, byte ptr [eax]
+ movzx eax, byte ptr [eax]
+ movzx eax, word ptr [eax]
diff --git a/gas/testsuite/gas/i386/iamcu-2.d b/gas/testsuite/gas/i386/iamcu-2.d
new file mode 100644
index 0000000..f3f3bfd
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-2.d
@@ -0,0 +1,11 @@
+#as: -J -march=iamcu
+#objdump: -dw
+#not-target: *-*-nacl*
+
+.*: +file format elf32-iamcu.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 66 0f 1f 00 nopw \(%eax\)
+#pass
diff --git a/gas/testsuite/gas/i386/iamcu-2.s b/gas/testsuite/gas/i386/iamcu-2.s
new file mode 100644
index 0000000..0523277
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-2.s
@@ -0,0 +1,4 @@
+ .text
+ .arch .nop
+
+ nopw (%eax)
diff --git a/gas/testsuite/gas/i386/iamcu-3.d b/gas/testsuite/gas/i386/iamcu-3.d
new file mode 100644
index 0000000..291f601
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-3.d
@@ -0,0 +1,11 @@
+#as: -J -march=iamcu+nop
+#objdump: -dw
+#not-target: *-*-nacl*
+
+.*: +file format elf32-iamcu.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 66 0f 1f 00 nopw \(%eax\)
+#pass
diff --git a/gas/testsuite/gas/i386/iamcu-3.s b/gas/testsuite/gas/i386/iamcu-3.s
new file mode 100644
index 0000000..fac63ca
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-3.s
@@ -0,0 +1,2 @@
+ .text
+ nopw (%eax)
diff --git a/gas/testsuite/gas/i386/iamcu-inval-1.l b/gas/testsuite/gas/i386/iamcu-inval-1.l
new file mode 100644
index 0000000..7bbbc2d
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-inval-1.l
@@ -0,0 +1,21 @@
+.*: Assembler messages:
+.*:4: Error: .*
+.*:5: Error: .*
+.*:7: Error: .*
+.*:8: Error: .*
+.*:10: Error: .*
+.*:11: Error: .*
+GAS LISTING .*
+
+
+[ ]*1[ ]+\# Invalid Intel MCU instructions
+[ ]*2[ ]+\.text
+[ ]*3[ ]+
+[ ]*4[ ]+fnstsw
+[ ]*5[ ]+fstsw %ax
+[ ]*6[ ]+
+[ ]*7[ ]+cmove %eax,%ebx
+[ ]*8[ ]+nopw \(%eax\)
+[ ]*9[ ]+
+[ ]*10[ ]+movq %xmm1, \(%eax\)
+[ ]*11[ ]+movnti %eax, \(%eax\)
diff --git a/gas/testsuite/gas/i386/iamcu-inval-1.s b/gas/testsuite/gas/i386/iamcu-inval-1.s
new file mode 100644
index 0000000..4e25880
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-inval-1.s
@@ -0,0 +1,11 @@
+# Invalid Intel MCU instructions
+ .text
+
+ fnstsw
+ fstsw %ax
+
+ cmove %eax,%ebx
+ nopw (%eax)
+
+ movq %xmm1, (%eax)
+ movnti %eax, (%eax)
diff --git a/gas/testsuite/gas/i386/iamcu-inval-2.l b/gas/testsuite/gas/i386/iamcu-inval-2.l
new file mode 100644
index 0000000..e62e29d
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-inval-2.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*:2: Fatal error: `.sse4.1' isn't valid for Intel MCU
diff --git a/gas/testsuite/gas/i386/iamcu-inval-2.s b/gas/testsuite/gas/i386/iamcu-inval-2.s
new file mode 100644
index 0000000..46ef3ff
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-inval-2.s
@@ -0,0 +1,2 @@
+# Invalid .arch for Intel MCU
+ .arch .sse4.1
diff --git a/gas/testsuite/gas/i386/iamcu-inval-3.l b/gas/testsuite/gas/i386/iamcu-inval-3.l
new file mode 100644
index 0000000..a9762a5
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-inval-3.l
@@ -0,0 +1,2 @@
+Assembler messages:
+Fatal error: `sse4' isn't valid for Intel MCU
diff --git a/gas/testsuite/gas/i386/iamcu-inval-3.s b/gas/testsuite/gas/i386/iamcu-inval-3.s
new file mode 100644
index 0000000..1c255e2
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-inval-3.s
@@ -0,0 +1 @@
+.include "iamcu-1.s"