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author | Nick Clifton <nickc@redhat.com> | 2003-09-04 11:04:38 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2003-09-04 11:04:38 +0000 |
commit | 8ad30312fff34325113307cb27bcae49d220df15 (patch) | |
tree | e36909398f52d213a45a92122028b2c953768369 /gas/testsuite | |
parent | 3c9030c1f46b3255af11e975ae6f62713f55d645 (diff) | |
download | gdb-8ad30312fff34325113307cb27bcae49d220df15.zip gdb-8ad30312fff34325113307cb27bcae49d220df15.tar.gz gdb-8ad30312fff34325113307cb27bcae49d220df15.tar.bz2 |
Add binutils support for v850e1 processor
Diffstat (limited to 'gas/testsuite')
-rw-r--r-- | gas/testsuite/ChangeLog | 6 | ||||
-rw-r--r-- | gas/testsuite/gas/v850/basic.exp | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/v850/v850e1.d | 44 | ||||
-rw-r--r-- | gas/testsuite/gas/v850/v850e1.s | 38 |
4 files changed, 90 insertions, 1 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 454488d..54324dd 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2003-09-04 Nick Clifton <nickc@redhat.com> + + * gas/v850/v850e1.s: New test source file. + * gas/v850/v850e1.d: New test disassembly file. + * gas/v850/basic.exp: Run v850e1 test. + 2003-09-03 Robert Millan <robertmh@gnu.org> * gas/alpha/alpha.exp: Match GNU/KFreeBSD with new kfreebsd*-gnu diff --git a/gas/testsuite/gas/v850/basic.exp b/gas/testsuite/gas/v850/basic.exp index 9943813..e3b0713 100644 --- a/gas/testsuite/gas/v850/basic.exp +++ b/gas/testsuite/gas/v850/basic.exp @@ -1,4 +1,4 @@ -# Copyright (C) 1996 Free Software Foundation, Inc. +# Copyright (C) 1996, 2003 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -435,4 +435,5 @@ if [istarget v850*-*-*] then { gas_test "fepsw.s" "" "" "eqsw regression test" gas_test_error "range.s" "-mwarn-signed-overflow" "Check for range error on byte load/store" + run_dump_test "v850e1" } diff --git a/gas/testsuite/gas/v850/v850e1.d b/gas/testsuite/gas/v850/v850e1.d new file mode 100644 index 0000000..9fb689b --- /dev/null +++ b/gas/testsuite/gas/v850/v850e1.d @@ -0,0 +1,44 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: V850E1 instruction tests +#as: -mv850e1 + +# Test the new instructions in the V850E1 processor + +.*: +file format .*v850.* + +Disassembly of section .text: +0x0+00 e0 0f 42 13 [ ]*bsh r1, r2 +0x0+04 e0 1f 40 23 [ ]*bsw sp, gp +0x0+08 05 02 [ ]*callt 5 +0x0+0a e8 3f e4 00 [ ]*clr1 r7, r8 +0x0+0e f6 17 14 1b [ ]*cmov nz, -10, r2, sp +0x0+12 e1 17 34 1b [ ]*cmov nz, r1, r2, sp +0x0+16 e0 07 44 01 [ ]*ctret +0x0+1a e0 07 46 01 [ ]*dbret +0x0+1e 40 f8 [ ]*dbtrap +0x0+20 4e 06 00 80 [ ]*dispose 7, {r24}, r0 +0x0+24 4e 06 05 70 [ ]*dispose 7, {r25 - r27}, r5 +0x0+28 e1 17 c0 1a [ ]*div r1, r2, sp +0x0+2c e4 2f 80 32 [ ]*divh gp, r5, r6 +0x0+30 e7 47 82 4a [ ]*divhu r7, r8, r9 +0x0+34 ea 5f c2 62 [ ]*divu r10, r11, r12 +0x0+38 e0 6f 44 73 [ ]*hsw r13, r14 +0x0+3c a1 17 0d 00 [ ]*ld.bu 13\[r1\],r2 +0x0+40 e3 27 11 00 [ ]*ld.hu 16\[sp\],gp +0x0+44 21 06 78 56 34 12 [ ]*mov 0x12345678, r1 +0x0+4a e5 17 40 1a [ ]*mul 5, r2, sp +0x0+4e e1 17 20 1a [ ]*mul r1, r2, sp +0x0+52 e4 2f 22 32 [ ]*mulu gp, r5, r6 +0x0+56 e3 2f 46 32 [ ]*mulu 35, r5, r6 +0x0+5a ea 4f e2 00 [ ]*not1 r9, r10 +0x0+5e a8 07 01 80 [ ]*prepare {r24}, 20 +0x0+62 a8 07 03 70 [ ]*prepare {r25 - r27}, 20, sp +0x0+66 e1 4f e0 00 [ ]*set1 r9, r1 +0x0+6a ea 47 00 02 [ ]*sasf nz, r8 +0x0+6e 60 20 [ ]*sld.bu 0\[ep\],gp +0x0+70 77 28 [ ]*sld.hu 14\[ep\],r5 +0x0+72 a1 00 [ ]*sxb r1 +0x0+74 e2 00 [ ]*sxh r2 +0x0+76 ff 07 e6 00 [ ]*tst1 r0, lp +0x0+7a 83 00 [ ]*zxb sp +0x0+7c c4 00 [ ]*zxh gp diff --git a/gas/testsuite/gas/v850/v850e1.s b/gas/testsuite/gas/v850/v850e1.s new file mode 100644 index 0000000..5013261 --- /dev/null +++ b/gas/testsuite/gas/v850/v850e1.s @@ -0,0 +1,38 @@ +.text +.align 0 + + bsh r1, r2 + bsw r3, r4 + callt 5 + clr1 r7, [r8] + cmov nz, 22, r2, r3 + cmov nz, r1, r2, r3 + ctret + dbret + dbtrap + dispose 7, {r24} + dispose 7, {r25 - r27}, r5 + div r1, r2, r3 + divh r4, r5, r6 + divhu r7, r8, r9 + divu r10, r11, r12 + hsw r13, r14 + ld.bu 13 [r1], r2 + ld.hu 16 [r3], r4 + mov 0x12345678, r1 + mul 5, r2, r3 + mul r1, r2, r3 + mulu r4, r5, r6 + mulu 35, r5, r6 + not1 r9, [r10] + prepare {r24}, 20 + prepare {r25 - r27}, 20, sp + set1 r9, [r1] + sasf nz, r8 + sld.bu 0 [ep], r4 + sld.hu 14 [ep], r5 + sxb r1 + sxh r2 + tst1 r0, [r31] + zxb r3 + zxh r4 |