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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 17:07:51 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 17:08:12 +0000 |
| commit | 5f7728b7413b3bed576f8dd11d1343c20b3a2333 (patch) | |
| tree | 6ffd98797d79b0004da8026b756d73fe1832aa84 /gas/testsuite | |
| parent | 42f23f6218262ae8488caab214b7f272c6758941 (diff) | |
| download | gdb-5f7728b7413b3bed576f8dd11d1343c20b3a2333.zip gdb-5f7728b7413b3bed576f8dd11d1343c20b3a2333.tar.gz gdb-5f7728b7413b3bed576f8dd11d1343c20b3a2333.tar.bz2 | |
[AArch64][PATCH 7/14] Support FP16 Scalar Indexed Element instructions.
ARMv8.2 adds 16-bit floating point operations as an optional extension
to the floating point and Adv.SIMD support. This patch adds FP16
instructions to the group Scalar Indexed Element, making them available
when +simd+fp16 is enabled.
The instructions added are: FMLA, FMLS, FMUL and FMULX.
The general form for these instructions is
<OP> <Hd>, <Hs>, <V>.h[<idx>]
gas/testsuite/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/advsimd-fp16.d: Update expected output.
* gas/aarch64/advsimd-fp16.s: Add tests for scalar indexed element
instructions.
opcodes/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
* aarch64-tbl.h (aarch64_opcode_table): Add fp16 versions of fmla,
fmls, fmul and fmulx to the scalar indexed element group.
Change-Id: I6a4ee20a9ae1019b89d0fd05da55222f267c5627
Diffstat (limited to 'gas/testsuite')
| -rw-r--r-- | gas/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/advsimd-fp16.d | 16 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/advsimd-fp16.s | 15 |
3 files changed, 37 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 6e27869..4a44439 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,6 +1,12 @@ 2015-12-14 Matthew Wahab <matthew.wahab@arm.com> * gas/aarch64/advsimd-fp16.d: Update expected output. + * gas/aarch64/advsimd-fp16.s: Add tests for scalar indexed element + instructions. + +2015-12-14 Matthew Wahab <matthew.wahab@arm.com> + + * gas/aarch64/advsimd-fp16.d: Update expected output. * gas/aarch64/advsimd-fp16.s: Add tests for vector indexed element instructions. diff --git a/gas/testsuite/gas/aarch64/advsimd-fp16.d b/gas/testsuite/gas/aarch64/advsimd-fp16.d index 3fd4dcb..dacd51b 100644 --- a/gas/testsuite/gas/aarch64/advsimd-fp16.d +++ b/gas/testsuite/gas/aarch64/advsimd-fp16.d @@ -456,3 +456,19 @@ Disassembly of section \.text: [0-9a-f]+: 2f039041 fmulx v1.4h, v2.4h, v3.h\[0\] [0-9a-f]+: 6f009000 fmulx v0.8h, v0.8h, v0.h\[0\] [0-9a-f]+: 6f039041 fmulx v1.8h, v2.8h, v3.h\[0\] + [0-9a-f]+: 5fc31841 fmla d1, d2, v3.d\[1\] + [0-9a-f]+: 5fa31041 fmla s1, s2, v3.s\[1\] + [0-9a-f]+: 5f131041 fmla h1, h2, v3.h\[1\] + [0-9a-f]+: 5f001000 fmla h0, h0, v0.h\[0\] + [0-9a-f]+: 5fc35841 fmls d1, d2, v3.d\[1\] + [0-9a-f]+: 5fa35041 fmls s1, s2, v3.s\[1\] + [0-9a-f]+: 5f135041 fmls h1, h2, v3.h\[1\] + [0-9a-f]+: 5f005000 fmls h0, h0, v0.h\[0\] + [0-9a-f]+: 5fc39841 fmul d1, d2, v3.d\[1\] + [0-9a-f]+: 5fa39041 fmul s1, s2, v3.s\[1\] + [0-9a-f]+: 5f139041 fmul h1, h2, v3.h\[1\] + [0-9a-f]+: 5f009000 fmul h0, h0, v0.h\[0\] + [0-9a-f]+: 7fc39841 fmulx d1, d2, v3.d\[1\] + [0-9a-f]+: 7fa39041 fmulx s1, s2, v3.s\[1\] + [0-9a-f]+: 7f139041 fmulx h1, h2, v3.h\[1\] + [0-9a-f]+: 7f009000 fmulx h0, h0, v0.h\[0\] diff --git a/gas/testsuite/gas/aarch64/advsimd-fp16.s b/gas/testsuite/gas/aarch64/advsimd-fp16.s index ebdb97a..10f9067 100644 --- a/gas/testsuite/gas/aarch64/advsimd-fp16.s +++ b/gas/testsuite/gas/aarch64/advsimd-fp16.s @@ -172,3 +172,18 @@ indexed_elem fmul indexed_elem fmulx + + /* Scalar indexed element. */ + + .macro sindexed_elem, op + \op d1, d2, v3.d[1] + \op s1, s2, v3.s[1] + \op h1, h2, v3.h[1] + \op h0, h0, v0.h[0] + .endm + + sindexed_elem fmla + sindexed_elem fmls + + sindexed_elem fmul + sindexed_elem fmulx |