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authorClaudiu Zissulescu <claziss@gmail.com>2020-07-07 16:01:48 +0300
committerClaudiu Zissulescu <claziss@gmail.com>2020-07-07 16:01:48 +0300
commit3128916d88bf1bf0e4688de1529f481d57bd331a (patch)
treeb3e31e1ca4c79c195d189f04196b1b4e42c60ad0 /gas/testsuite
parentf337259fbd5ee31c6794158457dcd0d23e5c0f13 (diff)
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arc: Improve error messages when assembling
gas/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (find_opcode_match): Add error messages. * testsuite/gas/arc/add_s-err.s: Update test. * testsuite/gas/arc/asm-errors.err: Likewise. * testsuite/gas/arc/cpu-em-err.s: Likewise. * testsuite/gas/arc/hregs-err.s: Likewise. * testsuite/gas/arc/warn.s: Likewise.
Diffstat (limited to 'gas/testsuite')
-rw-r--r--gas/testsuite/gas/arc/add_s-err.s4
-rw-r--r--gas/testsuite/gas/arc/asm-errors.err6
-rw-r--r--gas/testsuite/gas/arc/cpu-em-err.s2
-rw-r--r--gas/testsuite/gas/arc/hregs-err.s8
-rw-r--r--gas/testsuite/gas/arc/warn.s4
5 files changed, 12 insertions, 12 deletions
diff --git a/gas/testsuite/gas/arc/add_s-err.s b/gas/testsuite/gas/arc/add_s-err.s
index 95fcf64..b7b7082 100644
--- a/gas/testsuite/gas/arc/add_s-err.s
+++ b/gas/testsuite/gas/arc/add_s-err.s
@@ -6,5 +6,5 @@
;; The following insns are accepted by ARCv2 only
add_s r4,r4,-1 ; { dg-error "Error: register must be either r0-r3 or r12-r15 for instruction" }
add_s 0,0xAAAA5555,-1 ; { dg-error "Error: inappropriate arguments for opcode 'add_s'" }
- add_s r0,r15,0x20 ; { dg-error "Error: inappropriate arguments for opcode 'add_s'" }
- add_s r1,r15,0x20 ; { dg-error "Error: inappropriate arguments for opcode 'add_s'" }
+ add_s r0,r15,0x20 ; { dg-error "Error: immediate is out of bounds for instruction 'add_s'" }
+ add_s r1,r15,0x20 ; { dg-error "Error: immediate is out of bounds for instruction 'add_s'" }
diff --git a/gas/testsuite/gas/arc/asm-errors.err b/gas/testsuite/gas/arc/asm-errors.err
index e889eb8..ccc65fe 100644
--- a/gas/testsuite/gas/arc/asm-errors.err
+++ b/gas/testsuite/gas/arc/asm-errors.err
@@ -1,6 +1,6 @@
[^:]*: Assembler messages:
-[^:]*:2: Error: inappropriate arguments for opcode 'adc'
-[^:]*:3: Error: inappropriate arguments for opcode 'adc'
-[^:]*:4: Error: inappropriate arguments for opcode 'adc'
+[^:]*:2: Error: flag mismatch for instruction 'adc'
+[^:]*:3: Error: flag mismatch for instruction 'adc'
+[^:]*:4: Error: flag mismatch for instruction 'adc'
[^:]*:5: Error: extra comma
[^:]*:5: Error: syntax error
diff --git a/gas/testsuite/gas/arc/cpu-em-err.s b/gas/testsuite/gas/arc/cpu-em-err.s
index 4faaae7..49b2951 100644
--- a/gas/testsuite/gas/arc/cpu-em-err.s
+++ b/gas/testsuite/gas/arc/cpu-em-err.s
@@ -1,4 +1,4 @@
;;; Check if .cpu em doesn't have code-density ops.
; { dg-do assemble { target arc*-*-* } }
.cpu em
- sub_s r15,r2,r15 ; { dg-error "Error: inappropriate arguments for opcode 'sub_s'" }
+ sub_s r15,r2,r15 ; { dg-error "Error: register must be SP for instruction 'sub_s'" }
diff --git a/gas/testsuite/gas/arc/hregs-err.s b/gas/testsuite/gas/arc/hregs-err.s
index f5fa5e8..a76415b 100644
--- a/gas/testsuite/gas/arc/hregs-err.s
+++ b/gas/testsuite/gas/arc/hregs-err.s
@@ -1,11 +1,11 @@
; { dg-do assemble { target arc*-*-* } }
.cpu HS
.text
- ld_s r0,[r32,28] ; { dg-error "Error: register must be R1 for instruction 'ld_s'" }
+ ld_s r0,[r32,28] ; { dg-error "Error: register must be GP for instruction 'ld_s'" }
ld_s r0,[r28,28]
ld_s r1,[r32,28] ; { dg-error "Error: register must be GP for instruction 'ld_s'" }
- ld_s r2,[r32,28] ; { dg-error "Error: register must be R1 for instruction 'ld_s'" }
+ ld_s r2,[r32,28] ; { dg-error "Error: register must be PCL for instruction 'ld_s'" }
ld_s r3,[pcl,0x10]
- add_s r0,r0,r32 ; { dg-error "Error: inappropriate arguments for opcode 'add_s'" }
+ add_s r0,r0,r32 ; { dg-error "Error: register out of range for instruction 'add_s'" }
add_s r0,r0,r28
- mov_s.ne r0,r32 ; { dg-error "Error: inappropriate arguments for opcode 'mov_s'" }
+ mov_s.ne r0,r32 ; { dg-error "Error: register out of range for instruction 'mov_s'" }
diff --git a/gas/testsuite/gas/arc/warn.s b/gas/testsuite/gas/arc/warn.s
index deec175..592ee31 100644
--- a/gas/testsuite/gas/arc/warn.s
+++ b/gas/testsuite/gas/arc/warn.s
@@ -3,9 +3,9 @@
; { dg-do assemble { target arc*-*-* } }
b.d foo
- mov r0,256
+ mov r0,256
- j.d foo ; { dg-warning "inappropriate arguments for opcode" "inappropriate arguments for opcode" }
+ j.d foo ; { dg-error "Error: flag mismatch for instruction 'j'" }
mov r0,r1
foo: