* gas/mips/mips.exp: mips-*-linux-*, mipsel-*-linux-* use only 32-bit

	register width by default. Add them to addr32 and exclude offending
	testcases.
	* gas/mips/delay.s: Avoid odd floating point registers.
	* gas/mips/delay.d: Likewise.
	* gas/mips/nodelay.d: Likewise.
	* gas/mips/mips4.s: Likewise.
	* gas/mips/mips4.d: Likewise.
	* gas/mips/mips5.s: Likewise.
	* gas/mips/mips5.d: Likewise.
	* gas/mips/vr5400.s: Likewise.
	* gas/mips/vr5400.d: Likewise.
	* gas/mips/vr5500.s: Likewise.
	* gas/mips/vr5500.d: Likewise.
	* gas/mips/elf_e_flags2.d: Allow different expansions of the move
	macro.
	* gas/mips/elf_e_flags3.d: Likewise.
	* gas/mips/elf_e_flags4.d: Likewise.
	* gas/mips/uld2-eb.d: Likewise.
	* gas/mips/uld2-el.d: Likewise.

18 files changed, 257 insertions, 230 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d913f2e..f203b39 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,26 @@
+2003-05-19  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* gas/mips/mips.exp: mips-*-linux-*, mipsel-*-linux-* use only 32-bit
+	register width by default. Add them to addr32 and exclude offending
+	testcases.
+	* gas/mips/delay.s: Avoid odd floating point registers.
+	* gas/mips/delay.d: Likewise.
+	* gas/mips/nodelay.d: Likewise.
+	* gas/mips/mips4.s: Likewise.
+	* gas/mips/mips4.d: Likewise.
+	* gas/mips/mips5.s: Likewise.
+	* gas/mips/mips5.d: Likewise.
+	* gas/mips/vr5400.s: Likewise.
+	* gas/mips/vr5400.d: Likewise.
+	* gas/mips/vr5500.s: Likewise.
+	* gas/mips/vr5500.d: Likewise.
+	* gas/mips/elf_e_flags2.d: Allow different expansions of the move
+	macro.
+	* gas/mips/elf_e_flags3.d: Likewise.
+	* gas/mips/elf_e_flags4.d: Likewise.
+	* gas/mips/uld2-eb.d: Likewise.
+	* gas/mips/uld2-el.d: Likewise.
+
 2003-05-16  Kelley Cook  <kelleycook@wideopenwest.com>
 
 	* lib/gas-defs.exp: Accept i[3-7]86 variants.
diff --git a/gas/testsuite/gas/mips/delay.d b/gas/testsuite/gas/mips/delay.d
index dde5c0a..0c3ef08 100644
--- a/gas/testsuite/gas/mips/delay.d
+++ b/gas/testsuite/gas/mips/delay.d
@@ -14,7 +14,7 @@ Disassembly of section .text:
 0+0000 <[^>]*> mtc1	zero,\$f0
 0+0004 <[^>]*> nop
 0+0008 <[^>]*> cvt.d.w	\$f0,\$f0
-0+000c <[^>]*> mtc1	zero,\$f1
+0+000c <[^>]*> mtc1	zero,\$f2
 0+0010 <[^>]*> nop
-0+0014 <[^>]*> cvt.d.w	\$f1,\$f1
+0+0014 <[^>]*> cvt.d.w	\$f2,\$f2
 	...
diff --git a/gas/testsuite/gas/mips/delay.s b/gas/testsuite/gas/mips/delay.s
index 5ee2f00..37c3a62 100644
--- a/gas/testsuite/gas/mips/delay.s
+++ b/gas/testsuite/gas/mips/delay.s
@@ -2,7 +2,7 @@
 foo:
 	mtc1	$0,$f0
 	cvt.d.w	$f0,$f0
-        mtc1    $0,$f1
-        cvt.d.w $f1,$f1
+        mtc1    $0,$f2
+        cvt.d.w $f2,$f2
         .space	8
 
diff --git a/gas/testsuite/gas/mips/elf_e_flags2.d b/gas/testsuite/gas/mips/elf_e_flags2.d
index 30dabe3..fceb547 100644
--- a/gas/testsuite/gas/mips/elf_e_flags2.d
+++ b/gas/testsuite/gas/mips/elf_e_flags2.d
@@ -20,7 +20,7 @@ Disassembly of section .text:
   10:	afbf0020 	sw	ra,32\(sp\)
   14:	0c000000 	jal	0 <foo>
   18:	00000000 	nop
-  1c:	0000102d 	move	v0,zero
+  1c:	0000102[1d] 	move	v0,zero
   20:	8fbf0020 	lw	ra,32\(sp\)
   24:	00000000 	nop
   28:	03e00008 	jr	ra
diff --git a/gas/testsuite/gas/mips/elf_e_flags3.d b/gas/testsuite/gas/mips/elf_e_flags3.d
index bc5fcd4..4a72d98 100644
--- a/gas/testsuite/gas/mips/elf_e_flags3.d
+++ b/gas/testsuite/gas/mips/elf_e_flags3.d
@@ -20,7 +20,7 @@ Disassembly of section .text:
   10:	afbf0020 	sw	ra,32\(sp\)
   14:	0c000000 	jal	0 <foo>
   18:	00000000 	nop
-  1c:	0000102d 	move	v0,zero
+  1c:	0000102[1d] 	move	v0,zero
   20:	8fbf0020 	lw	ra,32\(sp\)
   24:	00000000 	nop
   28:	03e00008 	jr	ra
diff --git a/gas/testsuite/gas/mips/elf_e_flags4.d b/gas/testsuite/gas/mips/elf_e_flags4.d
index bc5fcd4..4a72d98 100644
--- a/gas/testsuite/gas/mips/elf_e_flags4.d
+++ b/gas/testsuite/gas/mips/elf_e_flags4.d
@@ -20,7 +20,7 @@ Disassembly of section .text:
   10:	afbf0020 	sw	ra,32\(sp\)
   14:	0c000000 	jal	0 <foo>
   18:	00000000 	nop
-  1c:	0000102d 	move	v0,zero
+  1c:	0000102[1d] 	move	v0,zero
   20:	8fbf0020 	lw	ra,32\(sp\)
   24:	00000000 	nop
   28:	03e00008 	jr	ra
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 7e8a25d..97e2588 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -391,7 +391,7 @@ if { [istarget mips*-*-*] } then {
     set aout [expr [istarget *-*-bsd*] || [istarget *-*-openbsd*] ]
     set ilocks [istarget mipstx39*-*-*]
     set gpr_ilocks [expr [istarget mipstx39*-*-*]]
-    set addr32 [expr [istarget mipstx39*-*-*]]
+    set addr32 [expr [istarget mipstx39*-*-*] || [istarget mips-*-linux*] || [istarget mipsel-*-linux*]]
     set has_newabi [expr [istarget *-*-irix6*] || [istarget mips64*-*-linux*]]
 
     if { [istarget "mips*-*-*linux*"] } then {
@@ -430,7 +430,9 @@ if { [istarget mips*-*-*] } then {
     } else {
 	run_dump_test "div"
     }
-    run_dump_test_arches "dli"		[mips_arch_list_matching mips3]
+    if { !$addr32 } {
+	run_dump_test_arches "dli"		[mips_arch_list_matching mips3]
+    }
     if $elf {
 	run_dump_test_arches "elf-jal"	[mips_arch_list_matching mips1]
     } else {
@@ -559,12 +561,14 @@ if { [istarget mips*-*-*] } then {
 
     run_dump_test_arches "mips64"	[mips_arch_list_matching mips64]
 
-    run_dump_test "mips64-mips3d"
-    run_dump_test_arches "mips64-mips3d-incl" [mips_arch_list_matching mips3d]
+    if { !$addr32 } {
+	run_dump_test "mips64-mips3d"
+	run_dump_test_arches "mips64-mips3d-incl" [mips_arch_list_matching mips3d]
 
-    run_dump_test "mips64-mdmx"
-    run_dump_test "sb1-ext-mdmx"
-    run_dump_test "sb1-ext-ps"
+	run_dump_test "mips64-mdmx"
+	run_dump_test "sb1-ext-mdmx"
+	run_dump_test "sb1-ext-ps"
+    }
 
     run_dump_test "relax"
 
diff --git a/gas/testsuite/gas/mips/mips4.d b/gas/testsuite/gas/mips/mips4.d
index 17444cb..bc3e924 100644
--- a/gas/testsuite/gas/mips/mips4.d
+++ b/gas/testsuite/gas/mips/mips4.d
@@ -26,14 +26,14 @@ Disassembly of section .text:
 0+0044 <[^>]*> movf.d	\$f4,\$f6,\$fcc0
 0+0048 <[^>]*> movf.s	\$f4,\$f6,\$fcc0
 0+004c <[^>]*> movn	a0,a2,a2
-0+0050 <[^>]*> movn.d	\$f4,\$f5,a2
-0+0054 <[^>]*> movn.s	\$f4,\$f5,a2
+0+0050 <[^>]*> movn.d	\$f4,\$f6,a2
+0+0054 <[^>]*> movn.s	\$f4,\$f6,a2
 0+0058 <[^>]*> movt	a0,a1,\$fcc4
 0+005c <[^>]*> movt.d	\$f4,\$f6,\$fcc0
 0+0060 <[^>]*> movt.s	\$f4,\$f6,\$fcc0
 0+0064 <[^>]*> movz	a0,a2,a2
-0+0068 <[^>]*> movz.d	\$f4,\$f5,a2
-0+006c <[^>]*> movz.s	\$f4,\$f5,a2
+0+0068 <[^>]*> movz.d	\$f4,\$f6,a2
+0+006c <[^>]*> movz.s	\$f4,\$f6,a2
 0+0070 <[^>]*> msub.d	\$f0,\$f2,\$f4,\$f6
 0+0074 <[^>]*> msub.s	\$f0,\$f2,\$f4,\$f6
 0+0078 <[^>]*> nmadd.d	\$f0,\$f2,\$f4,\$f6
diff --git a/gas/testsuite/gas/mips/mips4.s b/gas/testsuite/gas/mips/mips4.s
index bf8b943..591292b 100644
--- a/gas/testsuite/gas/mips/mips4.s
+++ b/gas/testsuite/gas/mips/mips4.s
@@ -16,14 +16,14 @@ text_label:
 	movf.d	$f4,$f6,$fcc0
 	movf.s	$f4,$f6,$fcc0
 	movn	$4,$6,$6
-	movn.d	$f4,$f5,$6
-	movn.s	$f4,$f5,$6
+	movn.d	$f4,$f6,$6
+	movn.s	$f4,$f6,$6
 	movt	$4,$5,$fcc4
 	movt.d	$f4,$f6,$fcc0
 	movt.s	$f4,$f6,$fcc0
 	movz	$4,$6,$6
-	movz.d	$f4,$f5,$6
-	movz.s	$f4,$f5,$6
+	movz.d	$f4,$f6,$6
+	movz.s	$f4,$f6,$6
 	msub.d	$f0,$f2,$f4,$f6
 	msub.s	$f0,$f2,$f4,$f6
 	nmadd.d	$f0,$f2,$f4,$f6
diff --git a/gas/testsuite/gas/mips/mips5.d b/gas/testsuite/gas/mips/mips5.d
index 3b4570c..e313f56 100644
--- a/gas/testsuite/gas/mips/mips5.d
+++ b/gas/testsuite/gas/mips/mips5.d
@@ -7,62 +7,62 @@
 .*: +file format .*mips.*
 
 Disassembly of section \.text:
-0+0000 <[^>]*> 46c01045 	abs\.ps	\$f1,\$f2
-0+0004 <[^>]*> 46c520c0 	add\.ps	\$f3,\$f4,\$f5
-0+0008 <[^>]*> 4c68399e 	alnv\.ps	\$f6,\$f7,\$f8,\$3
-0+000c <[^>]*> 46ca4832 	c\.eq\.ps	\$f9,\$f10
-0+0010 <[^>]*> 46cc5a32 	c\.eq\.ps	\$fcc2,\$f11,\$f12
-0+0014 <[^>]*> 46ca4830 	c\.f\.ps	\$f9,\$f10
-0+0018 <[^>]*> 46cc5a30 	c\.f\.ps	\$fcc2,\$f11,\$f12
-0+001c <[^>]*> 46ca483e 	c\.le\.ps	\$f9,\$f10
-0+0020 <[^>]*> 46cc5a3e 	c\.le\.ps	\$fcc2,\$f11,\$f12
-0+0024 <[^>]*> 46ca483c 	c\.lt\.ps	\$f9,\$f10
-0+0028 <[^>]*> 46cc5a3c 	c\.lt\.ps	\$fcc2,\$f11,\$f12
-0+002c <[^>]*> 46ca483d 	c\.nge\.ps	\$f9,\$f10
-0+0030 <[^>]*> 46cc5a3d 	c\.nge\.ps	\$fcc2,\$f11,\$f12
-0+0034 <[^>]*> 46ca483b 	c\.ngl\.ps	\$f9,\$f10
-0+0038 <[^>]*> 46cc5a3b 	c\.ngl\.ps	\$fcc2,\$f11,\$f12
-0+003c <[^>]*> 46ca4839 	c\.ngle\.ps	\$f9,\$f10
-0+0040 <[^>]*> 46cc5a39 	c\.ngle\.ps	\$fcc2,\$f11,\$f12
-0+0044 <[^>]*> 46ca483f 	c\.ngt\.ps	\$f9,\$f10
-0+0048 <[^>]*> 46cc5a3f 	c\.ngt\.ps	\$fcc2,\$f11,\$f12
-0+004c <[^>]*> 46ca4836 	c\.ole\.ps	\$f9,\$f10
-0+0050 <[^>]*> 46cc5a36 	c\.ole\.ps	\$fcc2,\$f11,\$f12
-0+0054 <[^>]*> 46ca4834 	c\.olt\.ps	\$f9,\$f10
-0+0058 <[^>]*> 46cc5a34 	c\.olt\.ps	\$fcc2,\$f11,\$f12
-0+005c <[^>]*> 46ca483a 	c\.seq\.ps	\$f9,\$f10
-0+0060 <[^>]*> 46cc5a3a 	c\.seq\.ps	\$fcc2,\$f11,\$f12
-0+0064 <[^>]*> 46ca4838 	c\.sf\.ps	\$f9,\$f10
-0+0068 <[^>]*> 46cc5a38 	c\.sf\.ps	\$fcc2,\$f11,\$f12
-0+006c <[^>]*> 46ca4833 	c\.ueq\.ps	\$f9,\$f10
-0+0070 <[^>]*> 46cc5a33 	c\.ueq\.ps	\$fcc2,\$f11,\$f12
-0+0074 <[^>]*> 46ca4837 	c\.ule\.ps	\$f9,\$f10
-0+0078 <[^>]*> 46cc5a37 	c\.ule\.ps	\$fcc2,\$f11,\$f12
-0+007c <[^>]*> 46ca4835 	c\.ult\.ps	\$f9,\$f10
-0+0080 <[^>]*> 46cc5a35 	c\.ult\.ps	\$fcc2,\$f11,\$f12
-0+0084 <[^>]*> 46ca4831 	c\.un\.ps	\$f9,\$f10
-0+0088 <[^>]*> 46cc5a31 	c\.un\.ps	\$fcc2,\$f11,\$f12
-0+008c <[^>]*> 460f7366 	cvt\.ps\.s	\$f13,\$f14,\$f15
-0+0090 <[^>]*> 46c08c28 	cvt\.s\.pl	\$f16,\$f17
-0+0094 <[^>]*> 46c09ca0 	cvt\.s\.pu	\$f18,\$f19
+0+0000 <[^>]*> 46c01005 	abs\.ps	\$f0,\$f2
+0+0004 <[^>]*> 46c62080 	add\.ps	\$f2,\$f4,\$f6
+0+0008 <[^>]*> 4c6a419e 	alnv\.ps	\$f6,\$f8,\$f10,\$3
+0+000c <[^>]*> 46ca4032 	c\.eq\.ps	\$f8,\$f10
+0+0010 <[^>]*> 46cc5232 	c\.eq\.ps	\$fcc2,\$f10,\$f12
+0+0014 <[^>]*> 46ca4030 	c\.f\.ps	\$f8,\$f10
+0+0018 <[^>]*> 46cc5230 	c\.f\.ps	\$fcc2,\$f10,\$f12
+0+001c <[^>]*> 46ca403e 	c\.le\.ps	\$f8,\$f10
+0+0020 <[^>]*> 46cc523e 	c\.le\.ps	\$fcc2,\$f10,\$f12
+0+0024 <[^>]*> 46ca403c 	c\.lt\.ps	\$f8,\$f10
+0+0028 <[^>]*> 46cc523c 	c\.lt\.ps	\$fcc2,\$f10,\$f12
+0+002c <[^>]*> 46ca403d 	c\.nge\.ps	\$f8,\$f10
+0+0030 <[^>]*> 46cc523d 	c\.nge\.ps	\$fcc2,\$f10,\$f12
+0+0034 <[^>]*> 46ca403b 	c\.ngl\.ps	\$f8,\$f10
+0+0038 <[^>]*> 46cc523b 	c\.ngl\.ps	\$fcc2,\$f10,\$f12
+0+003c <[^>]*> 46ca4039 	c\.ngle\.ps	\$f8,\$f10
+0+0040 <[^>]*> 46cc5239 	c\.ngle\.ps	\$fcc2,\$f10,\$f12
+0+0044 <[^>]*> 46ca403f 	c\.ngt\.ps	\$f8,\$f10
+0+0048 <[^>]*> 46cc523f 	c\.ngt\.ps	\$fcc2,\$f10,\$f12
+0+004c <[^>]*> 46ca4036 	c\.ole\.ps	\$f8,\$f10
+0+0050 <[^>]*> 46cc5236 	c\.ole\.ps	\$fcc2,\$f10,\$f12
+0+0054 <[^>]*> 46ca4034 	c\.olt\.ps	\$f8,\$f10
+0+0058 <[^>]*> 46cc5234 	c\.olt\.ps	\$fcc2,\$f10,\$f12
+0+005c <[^>]*> 46ca403a 	c\.seq\.ps	\$f8,\$f10
+0+0060 <[^>]*> 46cc523a 	c\.seq\.ps	\$fcc2,\$f10,\$f12
+0+0064 <[^>]*> 46ca4038 	c\.sf\.ps	\$f8,\$f10
+0+0068 <[^>]*> 46cc5238 	c\.sf\.ps	\$fcc2,\$f10,\$f12
+0+006c <[^>]*> 46ca4033 	c\.ueq\.ps	\$f8,\$f10
+0+0070 <[^>]*> 46cc5233 	c\.ueq\.ps	\$fcc2,\$f10,\$f12
+0+0074 <[^>]*> 46ca4037 	c\.ule\.ps	\$f8,\$f10
+0+0078 <[^>]*> 46cc5237 	c\.ule\.ps	\$fcc2,\$f10,\$f12
+0+007c <[^>]*> 46ca4035 	c\.ult\.ps	\$f8,\$f10
+0+0080 <[^>]*> 46cc5235 	c\.ult\.ps	\$fcc2,\$f10,\$f12
+0+0084 <[^>]*> 46ca4031 	c\.un\.ps	\$f8,\$f10
+0+0088 <[^>]*> 46cc5231 	c\.un\.ps	\$fcc2,\$f10,\$f12
+0+008c <[^>]*> 46107326 	cvt\.ps\.s	\$f12,\$f14,\$f16
+0+0090 <[^>]*> 46c09428 	cvt\.s\.pl	\$f16,\$f18
+0+0094 <[^>]*> 46c0a4a0 	cvt\.s\.pu	\$f18,\$f20
 0+0098 <[^>]*> 4ca40505 	luxc1	\$f20,\$4\(\$5\)
-0+009c <[^>]*> 4ed8bd66 	madd\.ps	\$f21,\$f22,\$f23,\$f24
-0+00a0 <[^>]*> 46c0d646 	mov\.ps	\$f25,\$f26
-0+00a4 <[^>]*> 46c8e6d1 	movf\.ps	\$f27,\$f28,\$fcc2
-0+00a8 <[^>]*> 46c3e6d3 	movn\.ps	\$f27,\$f28,\$3
-0+00ac <[^>]*> 46d1f751 	movt\.ps	\$f29,\$f30,\$fcc4
-0+00b0 <[^>]*> 46c5f752 	movz\.ps	\$f29,\$f30,\$5
-0+00b4 <[^>]*> 4c020fee 	msub\.ps	\$f31,\$f0,\$f1,\$f2
-0+00b8 <[^>]*> 46c520c2 	mul\.ps	\$f3,\$f4,\$f5
-0+00bc <[^>]*> 46c03987 	neg\.ps	\$f6,\$f7
-0+00c0 <[^>]*> 4d2b5236 	nmadd\.ps	\$f8,\$f9,\$f10,\$f11
-0+00c4 <[^>]*> 4d2b523e 	nmsub\.ps	\$f8,\$f9,\$f10,\$f11
-0+00c8 <[^>]*> 46ce6b2c 	pll\.ps	\$f12,\$f13,\$f14
-0+00cc <[^>]*> 46d183ed 	plu\.ps	\$f15,\$f16,\$f17
-0+00d0 <[^>]*> 46d49cae 	pul\.ps	\$f18,\$f19,\$f20
-0+00d4 <[^>]*> 46d7b56f 	puu\.ps	\$f21,\$f22,\$f23
-0+00d8 <[^>]*> 46dace01 	sub\.ps	\$f24,\$f25,\$f26
-0+00dc <[^>]*> 4ce6d80d 	suxc1	\$f27,\$6\(\$7\)
-0+00e0 <[^>]*> 46cc5b32 	c\.eq\.ps	\$fcc3,\$f11,\$f12
-0+00e4 <[^>]*> 46cce6d1 	movf\.ps	\$f27,\$f28,\$fcc3
+0+009c <[^>]*> 4edac526 	madd\.ps	\$f20,\$f22,\$f24,\$f26
+0+00a0 <[^>]*> 46c0d606 	mov\.ps	\$f24,\$f26
+0+00a4 <[^>]*> 46c8e691 	movf\.ps	\$f26,\$f28,\$fcc2
+0+00a8 <[^>]*> 46c3e693 	movn\.ps	\$f26,\$f28,\$3
+0+00ac <[^>]*> 46d1f711 	movt\.ps	\$f28,\$f30,\$fcc4
+0+00b0 <[^>]*> 46c5f712 	movz\.ps	\$f28,\$f30,\$5
+0+00b4 <[^>]*> 4c0417ae 	msub\.ps	\$f30,\$f0,\$f2,\$f4
+0+00b8 <[^>]*> 46c62082 	mul\.ps	\$f2,\$f4,\$f6
+0+00bc <[^>]*> 46c04187 	neg\.ps	\$f6,\$f8
+0+00c0 <[^>]*> 4d0c51b6 	nmadd\.ps	\$f6,\$f8,\$f10,\$f12
+0+00c4 <[^>]*> 4d0c51be 	nmsub\.ps	\$f6,\$f8,\$f10,\$f12
+0+00c8 <[^>]*> 46ce62ac 	pll\.ps	\$f10,\$f12,\$f14
+0+00cc <[^>]*> 46d283ad 	plu\.ps	\$f14,\$f16,\$f18
+0+00d0 <[^>]*> 46d4942e 	pul\.ps	\$f16,\$f18,\$f20
+0+00d4 <[^>]*> 46d8b52f 	puu\.ps	\$f20,\$f22,\$f24
+0+00d8 <[^>]*> 46dac581 	sub\.ps	\$f22,\$f24,\$f26
+0+00dc <[^>]*> 4ce6d00d 	suxc1	\$f26,\$6\(\$7\)
+0+00e0 <[^>]*> 46cc5332 	c\.eq\.ps	\$fcc3,\$f10,\$f12
+0+00e4 <[^>]*> 46cce691 	movf\.ps	\$f26,\$f28,\$fcc3
 	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips5.s b/gas/testsuite/gas/mips/mips5.s
index b60935c..70b844e 100644
--- a/gas/testsuite/gas/mips/mips5.s
+++ b/gas/testsuite/gas/mips/mips5.s
@@ -1,65 +1,65 @@
 # Source file used to test -mips5 instructions.
 
 text_label:	
-	abs.ps		$f1, $f2
-	add.ps		$f3, $f4, $f5
-	alnv.ps		$f6, $f7, $f8, $3
-	c.eq.ps		$f9, $f10
-	c.eq.ps		$fcc2, $f11, $f12
-	c.f.ps	    	$f9, $f10
-	c.f.ps	    	$fcc2, $f11, $f12
-	c.le.ps		$f9, $f10
-	c.le.ps		$fcc2, $f11, $f12
-	c.lt.ps		$f9, $f10
-	c.lt.ps		$fcc2, $f11, $f12
-	c.nge.ps	$f9, $f10
-	c.nge.ps	$fcc2, $f11, $f12
-	c.ngl.ps	$f9, $f10
-	c.ngl.ps	$fcc2, $f11, $f12
-	c.ngle.ps	$f9, $f10
-	c.ngle.ps	$fcc2, $f11, $f12
-	c.ngt.ps	$f9, $f10
-	c.ngt.ps	$fcc2, $f11, $f12
-	c.ole.ps	$f9, $f10
-	c.ole.ps	$fcc2, $f11, $f12
-	c.olt.ps	$f9, $f10
-	c.olt.ps	$fcc2, $f11, $f12
-	c.seq.ps	$f9, $f10
-	c.seq.ps	$fcc2, $f11, $f12
-	c.sf.ps		$f9, $f10
-	c.sf.ps		$fcc2, $f11, $f12
-	c.ueq.ps	$f9, $f10
-	c.ueq.ps	$fcc2, $f11, $f12
-	c.ule.ps	$f9, $f10
-	c.ule.ps	$fcc2, $f11, $f12
-	c.ult.ps	$f9, $f10
-	c.ult.ps	$fcc2, $f11, $f12
-	c.un.ps		$f9, $f10
-	c.un.ps		$fcc2, $f11, $f12
-	cvt.ps.s	$f13, $f14, $f15
-	cvt.s.pl	$f16, $f17
-	cvt.s.pu	$f18, $f19
+	abs.ps		$f0, $f2
+	add.ps		$f2, $f4, $f6
+	alnv.ps		$f6, $f8, $f10, $3
+	c.eq.ps		$f8, $f10
+	c.eq.ps		$fcc2, $f10, $f12
+	c.f.ps	    	$f8, $f10
+	c.f.ps	    	$fcc2, $f10, $f12
+	c.le.ps		$f8, $f10
+	c.le.ps		$fcc2, $f10, $f12
+	c.lt.ps		$f8, $f10
+	c.lt.ps		$fcc2, $f10, $f12
+	c.nge.ps	$f8, $f10
+	c.nge.ps	$fcc2, $f10, $f12
+	c.ngl.ps	$f8, $f10
+	c.ngl.ps	$fcc2, $f10, $f12
+	c.ngle.ps	$f8, $f10
+	c.ngle.ps	$fcc2, $f10, $f12
+	c.ngt.ps	$f8, $f10
+	c.ngt.ps	$fcc2, $f10, $f12
+	c.ole.ps	$f8, $f10
+	c.ole.ps	$fcc2, $f10, $f12
+	c.olt.ps	$f8, $f10
+	c.olt.ps	$fcc2, $f10, $f12
+	c.seq.ps	$f8, $f10
+	c.seq.ps	$fcc2, $f10, $f12
+	c.sf.ps		$f8, $f10
+	c.sf.ps		$fcc2, $f10, $f12
+	c.ueq.ps	$f8, $f10
+	c.ueq.ps	$fcc2, $f10, $f12
+	c.ule.ps	$f8, $f10
+	c.ule.ps	$fcc2, $f10, $f12
+	c.ult.ps	$f8, $f10
+	c.ult.ps	$fcc2, $f10, $f12
+	c.un.ps		$f8, $f10
+	c.un.ps		$fcc2, $f10, $f12
+	cvt.ps.s	$f12, $f14, $f16
+	cvt.s.pl	$f16, $f18
+	cvt.s.pu	$f18, $f20
 	luxc1		$f20, $4($5)
-	madd.ps		$f21, $f22, $f23, $f24
-	mov.ps		$f25, $f26
-	movf.ps		$f27, $f28, $fcc2
-	movn.ps		$f27, $f28, $3
-	movt.ps		$f29, $f30, $fcc4
-	movz.ps		$f29, $f30, $5
-	msub.ps		$f31, $f0, $f1, $f2
-	mul.ps		$f3, $f4, $f5
-	neg.ps		$f6, $f7
-	nmadd.ps	$f8, $f9, $f10, $f11
-	nmsub.ps	$f8, $f9, $f10, $f11
-	pll.ps		$f12, $f13, $f14
-	plu.ps		$f15, $f16, $f17
-	pul.ps		$f18, $f19, $f20
-	puu.ps		$f21, $f22, $f23
-	sub.ps		$f24, $f25, $f26
-	suxc1		$f27, $6($7)
+	madd.ps		$f20, $f22, $f24, $f26
+	mov.ps		$f24, $f26
+	movf.ps		$f26, $f28, $fcc2
+	movn.ps		$f26, $f28, $3
+	movt.ps		$f28, $f30, $fcc4
+	movz.ps		$f28, $f30, $5
+	msub.ps		$f30, $f0, $f2, $f4
+	mul.ps		$f2, $f4, $f6
+	neg.ps		$f6, $f8
+	nmadd.ps	$f6, $f8, $f10, $f12
+	nmsub.ps	$f6, $f8, $f10, $f12
+	pll.ps		$f10, $f12, $f14
+	plu.ps		$f14, $f16, $f18
+	pul.ps		$f16, $f18, $f20
+	puu.ps		$f20, $f22, $f24
+	sub.ps		$f22, $f24, $f26
+	suxc1		$f26, $6($7)
 
-	c.eq.ps		$fcc3, $f11, $f12	# warns
-	movf.ps		$f27, $f28, $fcc3	# warns
+	c.eq.ps		$fcc3, $f10, $f12	# warns
+	movf.ps		$f26, $f28, $fcc3	# warns
 
 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
       .space  8
diff --git a/gas/testsuite/gas/mips/nodelay.d b/gas/testsuite/gas/mips/nodelay.d
index 7e4da40..10101f0 100644
--- a/gas/testsuite/gas/mips/nodelay.d
+++ b/gas/testsuite/gas/mips/nodelay.d
@@ -14,6 +14,6 @@
 Disassembly of section .text:
 0+0000 <[^>]*> mtc1	zero,\$f0
 0+0004 <[^>]*> cvt.d.w	\$f0,\$f0
-0+0008 <[^>]*> mtc1	zero,\$f1
-0+000c <[^>]*> cvt.d.w	\$f1,\$f1
+0+0008 <[^>]*> mtc1	zero,\$f2
+0+000c <[^>]*> cvt.d.w	\$f2,\$f2
 	...
diff --git a/gas/testsuite/gas/mips/uld2-eb.d b/gas/testsuite/gas/mips/uld2-eb.d
index 90681da6..815da74 100644
--- a/gas/testsuite/gas/mips/uld2-eb.d
+++ b/gas/testsuite/gas/mips/uld2-eb.d
@@ -19,8 +19,8 @@ Disassembly of section .text:
 0+000c <[^>]*> 6ca40008 	ldr	\$4,8\(\$5\)
 0+0010 <[^>]*> 68a10000 	ldl	\$1,0\(\$5\)
 0+0014 <[^>]*> 6ca10007 	ldr	\$1,7\(\$5\)
-0+0018 <[^>]*> 0020282d 	move	\$5,\$1
+0+0018 <[^>]*> 0020282[1d] 	move	\$5,\$1
 0+001c <[^>]*> 68a10001 	ldl	\$1,1\(\$5\)
 0+0020 <[^>]*> 6ca10008 	ldr	\$1,8\(\$5\)
-0+0024 <[^>]*> 0020282d 	move	\$5,\$1
+0+0024 <[^>]*> 0020282[1d] 	move	\$5,\$1
 	\.\.\.
diff --git a/gas/testsuite/gas/mips/uld2-el.d b/gas/testsuite/gas/mips/uld2-el.d
index 08a53a7..7b0032e 100644
--- a/gas/testsuite/gas/mips/uld2-el.d
+++ b/gas/testsuite/gas/mips/uld2-el.d
@@ -19,8 +19,8 @@ Disassembly of section .text:
 0+000c <[^>]*> 6ca40001 	ldr	\$4,1\(\$5\)
 0+0010 <[^>]*> 68a10007 	ldl	\$1,7\(\$5\)
 0+0014 <[^>]*> 6ca10000 	ldr	\$1,0\(\$5\)
-0+0018 <[^>]*> 0020282d 	move	\$5,\$1
+0+0018 <[^>]*> 0020282[1d] 	move	\$5,\$1
 0+001c <[^>]*> 68a10008 	ldl	\$1,8\(\$5\)
 0+0020 <[^>]*> 6ca10001 	ldr	\$1,1\(\$5\)
-0+0024 <[^>]*> 0020282d 	move	\$5,\$1
+0+0024 <[^>]*> 0020282[1d] 	move	\$5,\$1
 	\.\.\.
diff --git a/gas/testsuite/gas/mips/vr5400.d b/gas/testsuite/gas/mips/vr5400.d
index 9d5d1ee..110490a 100644
--- a/gas/testsuite/gas/mips/vr5400.d
+++ b/gas/testsuite/gas/mips/vr5400.d
@@ -35,93 +35,93 @@ Disassembly of section \.text:
 0+006c <stuff\+0x6c> mfps	a0,1
 0+0070 <stuff\+0x70> mtpc	a0,1
 0+0074 <stuff\+0x74> mtps	a0,1
-0+0078 <stuff\+0x78> add\.ob	\$f0,\$f1,\$f2
-0+007c <stuff\+0x7c> add\.ob	\$f3,\$f4,\$f6\[2\]
-0+0080 <stuff\+0x80> add\.ob	\$f6,\$f5,0xf
-0+0084 <stuff\+0x84> add\.ob	\$f3,\$f7,0x1f
-0+0088 <stuff\+0x88> and\.ob	\$f0,\$f1,\$f2
-0+008c <stuff\+0x8c> and\.ob	\$f3,\$f4,\$f6\[2\]
-0+0090 <stuff\+0x90> and\.ob	\$f6,\$f5,0xf
-0+0094 <stuff\+0x94> and\.ob	\$f3,\$f7,0x1f
+0+0078 <stuff\+0x78> add\.ob	\$f0,\$f2,\$f4
+0+007c <stuff\+0x7c> add\.ob	\$f2,\$f4,\$f6\[2\]
+0+0080 <stuff\+0x80> add\.ob	\$f6,\$f4,0xf
+0+0084 <stuff\+0x84> add\.ob	\$f4,\$f6,0x1f
+0+0088 <stuff\+0x88> and\.ob	\$f0,\$f2,\$f4
+0+008c <stuff\+0x8c> and\.ob	\$f2,\$f4,\$f6\[2\]
+0+0090 <stuff\+0x90> and\.ob	\$f6,\$f4,0xf
+0+0094 <stuff\+0x94> and\.ob	\$f4,\$f6,0x1f
 0+0098 <stuff\+0x98> c\.eq\.ob	\$f0,\$f2
-0+009c <stuff\+0x9c> c\.eq\.ob	\$f3,\$f6\[2\]
+0+009c <stuff\+0x9c> c\.eq\.ob	\$f4,\$f6\[2\]
 0+00a0 <stuff\+0xa0> c\.eq\.ob	\$f6,0xf
-0+00a4 <stuff\+0xa4> c\.eq\.ob	\$f3,0x1f
+0+00a4 <stuff\+0xa4> c\.eq\.ob	\$f4,0x1f
 0+00a8 <stuff\+0xa8> c\.le\.ob	\$f0,\$f2
-0+00ac <stuff\+0xac> c\.le\.ob	\$f3,\$f6\[2\]
+0+00ac <stuff\+0xac> c\.le\.ob	\$f4,\$f6\[2\]
 0+00b0 <stuff\+0xb0> c\.le\.ob	\$f6,0xf
-0+00b4 <stuff\+0xb4> c\.le\.ob	\$f3,0x1f
+0+00b4 <stuff\+0xb4> c\.le\.ob	\$f4,0x1f
 0+00b8 <stuff\+0xb8> c\.lt\.ob	\$f0,\$f2
-0+00bc <stuff\+0xbc> c\.lt\.ob	\$f3,\$f6\[2\]
+0+00bc <stuff\+0xbc> c\.lt\.ob	\$f4,\$f6\[2\]
 0+00c0 <stuff\+0xc0> c\.lt\.ob	\$f6,0xf
-0+00c4 <stuff\+0xc4> c\.lt\.ob	\$f3,0x1f
-0+00c8 <stuff\+0xc8> max\.ob	\$f0,\$f1,\$f2
-0+00cc <stuff\+0xcc> max\.ob	\$f3,\$f4,\$f6\[2\]
-0+00d0 <stuff\+0xd0> max\.ob	\$f6,\$f5,0xf
-0+00d4 <stuff\+0xd4> max\.ob	\$f3,\$f7,0x1f
-0+00d8 <stuff\+0xd8> min\.ob	\$f0,\$f1,\$f2
-0+00dc <stuff\+0xdc> min\.ob	\$f3,\$f4,\$f6\[2\]
-0+00e0 <stuff\+0xe0> min\.ob	\$f6,\$f5,0xf
-0+00e4 <stuff\+0xe4> min\.ob	\$f3,\$f7,0x1f
-0+00e8 <stuff\+0xe8> mul\.ob	\$f0,\$f1,\$f2
-0+00ec <stuff\+0xec> mul\.ob	\$f3,\$f4,\$f6\[2\]
-0+00f0 <stuff\+0xf0> mul\.ob	\$f6,\$f5,0xf
-0+00f4 <stuff\+0xf4> mul\.ob	\$f3,\$f7,0x1f
+0+00c4 <stuff\+0xc4> c\.lt\.ob	\$f4,0x1f
+0+00c8 <stuff\+0xc8> max\.ob	\$f0,\$f2,\$f4
+0+00cc <stuff\+0xcc> max\.ob	\$f2,\$f4,\$f6\[2\]
+0+00d0 <stuff\+0xd0> max\.ob	\$f6,\$f4,0xf
+0+00d4 <stuff\+0xd4> max\.ob	\$f4,\$f6,0x1f
+0+00d8 <stuff\+0xd8> min\.ob	\$f0,\$f2,\$f4
+0+00dc <stuff\+0xdc> min\.ob	\$f2,\$f4,\$f6\[2\]
+0+00e0 <stuff\+0xe0> min\.ob	\$f6,\$f4,0xf
+0+00e4 <stuff\+0xe4> min\.ob	\$f4,\$f6,0x1f
+0+00e8 <stuff\+0xe8> mul\.ob	\$f0,\$f2,\$f4
+0+00ec <stuff\+0xec> mul\.ob	\$f2,\$f4,\$f6\[2\]
+0+00f0 <stuff\+0xf0> mul\.ob	\$f6,\$f4,0xf
+0+00f4 <stuff\+0xf4> mul\.ob	\$f4,\$f6,0x1f
 0+00f8 <stuff\+0xf8> mula\.ob	\$f0,\$f2
-0+00fc <stuff\+0xfc> mula\.ob	\$f3,\$f6\[2\]
+0+00fc <stuff\+0xfc> mula\.ob	\$f4,\$f6\[2\]
 0+0100 <stuff\+0x100> mula\.ob	\$f6,0xf
-0+0104 <stuff\+0x104> mula\.ob	\$f3,0x1f
+0+0104 <stuff\+0x104> mula\.ob	\$f4,0x1f
 0+0108 <stuff\+0x108> mull\.ob	\$f0,\$f2
-0+010c <stuff\+0x10c> mull\.ob	\$f3,\$f6\[2\]
+0+010c <stuff\+0x10c> mull\.ob	\$f4,\$f6\[2\]
 0+0110 <stuff\+0x110> mull\.ob	\$f6,0xf
-0+0114 <stuff\+0x114> mull\.ob	\$f3,0x1f
+0+0114 <stuff\+0x114> mull\.ob	\$f4,0x1f
 0+0118 <stuff\+0x118> muls\.ob	\$f0,\$f2
-0+011c <stuff\+0x11c> muls\.ob	\$f3,\$f6\[2\]
+0+011c <stuff\+0x11c> muls\.ob	\$f4,\$f6\[2\]
 0+0120 <stuff\+0x120> muls\.ob	\$f6,0xf
-0+0124 <stuff\+0x124> muls\.ob	\$f3,0x1f
+0+0124 <stuff\+0x124> muls\.ob	\$f4,0x1f
 0+0128 <stuff\+0x128> mulsl\.ob	\$f0,\$f2
-0+012c <stuff\+0x12c> mulsl\.ob	\$f3,\$f6\[2\]
+0+012c <stuff\+0x12c> mulsl\.ob	\$f4,\$f6\[2\]
 0+0130 <stuff\+0x130> mulsl\.ob	\$f6,0xf
-0+0134 <stuff\+0x134> mulsl\.ob	\$f3,0x1f
-0+0138 <stuff\+0x138> nor\.ob	\$f0,\$f1,\$f2
-0+013c <stuff\+0x13c> nor\.ob	\$f3,\$f4,\$f6\[2\]
-0+0140 <stuff\+0x140> nor\.ob	\$f6,\$f5,0xf
-0+0144 <stuff\+0x144> nor\.ob	\$f3,\$f7,0x1f
-0+0148 <stuff\+0x148> or\.ob	\$f0,\$f1,\$f2
-0+014c <stuff\+0x14c> or\.ob	\$f3,\$f4,\$f6\[2\]
-0+0150 <stuff\+0x150> or\.ob	\$f6,\$f5,0xf
-0+0154 <stuff\+0x154> or\.ob	\$f3,\$f7,0x1f
-0+0158 <stuff\+0x158> pickf\.ob	\$f0,\$f1,\$f2
-0+015c <stuff\+0x15c> pickf\.ob	\$f3,\$f4,\$f6\[2\]
-0+0160 <stuff\+0x160> pickf\.ob	\$f6,\$f5,0xf
-0+0164 <stuff\+0x164> pickf\.ob	\$f3,\$f7,0x1f
-0+0168 <stuff\+0x168> pickt\.ob	\$f0,\$f1,\$f2
-0+016c <stuff\+0x16c> pickt\.ob	\$f3,\$f4,\$f6\[2\]
-0+0170 <stuff\+0x170> pickt\.ob	\$f6,\$f5,0xf
-0+0174 <stuff\+0x174> pickt\.ob	\$f3,\$f7,0x1f
-0+0178 <stuff\+0x178> sub\.ob	\$f0,\$f1,\$f2
-0+017c <stuff\+0x17c> sub\.ob	\$f3,\$f4,\$f6\[2\]
-0+0180 <stuff\+0x180> sub\.ob	\$f6,\$f5,0xf
-0+0184 <stuff\+0x184> sub\.ob	\$f3,\$f7,0x1f
-0+0188 <stuff\+0x188> xor\.ob	\$f0,\$f1,\$f2
-0+018c <stuff\+0x18c> xor\.ob	\$f3,\$f4,\$f6\[2\]
-0+0190 <stuff\+0x190> xor\.ob	\$f6,\$f5,0xf
-0+0194 <stuff\+0x194> xor\.ob	\$f3,\$f7,0x1f
-0+0198 <stuff\+0x198> alni\.ob	\$f1,\$f2,\$f3,5
-0+019c <stuff\+0x19c> shfl\.mixh\.ob	\$f1,\$f2,\$f3
-0+01a0 <stuff\+0x1a0> shfl\.mixl\.ob	\$f1,\$f2,\$f3
-0+01a4 <stuff\+0x1a4> bc2tl	0+4324 <stuff\+0x4324>
-0+01a8 <stuff\+0x1a8> shfl\.pacl\.ob	\$f1,\$f2,\$f3
-0+01ac <stuff\+0x1ac> sll\.ob	\$f2,\$f4,\$f5\[3\]
-0+01b0 <stuff\+0x1b0> sll\.ob	\$f3,\$f6,0xe
-0+01b4 <stuff\+0x1b4> srl\.ob	\$f2,\$f4,\$f5\[3\]
-0+01b8 <stuff\+0x1b8> srl\.ob	\$f3,\$f6,0xe
+0+0134 <stuff\+0x134> mulsl\.ob	\$f4,0x1f
+0+0138 <stuff\+0x138> nor\.ob	\$f0,\$f2,\$f4
+0+013c <stuff\+0x13c> nor\.ob	\$f2,\$f4,\$f6\[2\]
+0+0140 <stuff\+0x140> nor\.ob	\$f6,\$f4,0xf
+0+0144 <stuff\+0x144> nor\.ob	\$f4,\$f6,0x1f
+0+0148 <stuff\+0x148> or\.ob	\$f0,\$f2,\$f4
+0+014c <stuff\+0x14c> or\.ob	\$f2,\$f4,\$f6\[2\]
+0+0150 <stuff\+0x150> or\.ob	\$f6,\$f4,0xf
+0+0154 <stuff\+0x154> or\.ob	\$f4,\$f6,0x1f
+0+0158 <stuff\+0x158> pickf\.ob	\$f0,\$f2,\$f4
+0+015c <stuff\+0x15c> pickf\.ob	\$f2,\$f4,\$f6\[2\]
+0+0160 <stuff\+0x160> pickf\.ob	\$f6,\$f4,0xf
+0+0164 <stuff\+0x164> pickf\.ob	\$f4,\$f6,0x1f
+0+0168 <stuff\+0x168> pickt\.ob	\$f0,\$f2,\$f4
+0+016c <stuff\+0x16c> pickt\.ob	\$f2,\$f4,\$f6\[2\]
+0+0170 <stuff\+0x170> pickt\.ob	\$f6,\$f4,0xf
+0+0174 <stuff\+0x174> pickt\.ob	\$f4,\$f6,0x1f
+0+0178 <stuff\+0x178> sub\.ob	\$f0,\$f2,\$f4
+0+017c <stuff\+0x17c> sub\.ob	\$f2,\$f4,\$f6\[2\]
+0+0180 <stuff\+0x180> sub\.ob	\$f6,\$f4,0xf
+0+0184 <stuff\+0x184> sub\.ob	\$f4,\$f6,0x1f
+0+0188 <stuff\+0x188> xor\.ob	\$f0,\$f2,\$f4
+0+018c <stuff\+0x18c> xor\.ob	\$f2,\$f4,\$f6\[2\]
+0+0190 <stuff\+0x190> xor\.ob	\$f6,\$f4,0xf
+0+0194 <stuff\+0x194> xor\.ob	\$f4,\$f6,0x1f
+0+0198 <stuff\+0x198> alni\.ob	\$f0,\$f2,\$f4,5
+0+019c <stuff\+0x19c> shfl\.mixh\.ob	\$f0,\$f2,\$f4
+0+01a0 <stuff\+0x1a0> shfl\.mixl\.ob	\$f0,\$f2,\$f4
+0+01a4 <stuff\+0x1a4> shfl\.pach\.ob	\$f0,\$f2,\$f4
+0+01a8 <stuff\+0x1a8> shfl\.pacl\.ob	\$f0,\$f2,\$f4
+0+01ac <stuff\+0x1ac> sll\.ob	\$f2,\$f4,\$f6\[3\]
+0+01b0 <stuff\+0x1b0> sll\.ob	\$f4,\$f6,0xe
+0+01b4 <stuff\+0x1b4> srl\.ob	\$f2,\$f4,\$f6\[3\]
+0+01b8 <stuff\+0x1b8> srl\.ob	\$f4,\$f6,0xe
 0+01bc <stuff\+0x1bc> rzu\.ob	\$f2,0xd
 0+01c0 <stuff\+0x1c0> rach\.ob	\$f2
 0+01c4 <stuff\+0x1c4> racl\.ob	\$f2
 0+01c8 <stuff\+0x1c8> bc2f	0+04c8 <stuff\+0x4c8>
 0+01cc <stuff\+0x1cc> wach\.ob	\$f2
-0+01d0 <stuff\+0x1d0> wacl\.ob	\$f2,\$f3
+0+01d0 <stuff\+0x1d0> wacl\.ob	\$f2,\$f4
 0+01d4 <stuff\+0x1d4> rorv	a0,a1,a2
 0+01d8 <stuff\+0x1d8> ror	a0,a1,0x11
 0+01dc <stuff\+0x1dc> drorv	a0,a1,a2
diff --git a/gas/testsuite/gas/mips/vr5400.s b/gas/testsuite/gas/mips/vr5400.s
index ae3ad81..c5cbfa2 100644
--- a/gas/testsuite/gas/mips/vr5400.s
+++ b/gas/testsuite/gas/mips/vr5400.s
@@ -48,28 +48,28 @@ stuff:
 	.macro	nsel2 op
 	/* Test each form of each vector opcode.  */
 	\op	$f0,$f2
-	\op	$f3,$f6[2]
+	\op	$f4,$f6[2]
 	\op	$f6,15
 	.if 0	/* Which is right?? */
 	/* Test negative numbers in immediate-value slot.  */
 	\op	$f4,-3
 	.else
 	/* Test that it's recognized as an unsigned field.  */
-	\op	$f3,31
+	\op	$f4,31
 	.endif
 	.endm
 
 	.macro	nsel3 op
 	/* Test each form of each vector opcode.  */
-	\op	$f0,$f1,$f2
-	\op	$f3,$f4,$f6[2]
-	\op	$f6,$f5,15
+	\op	$f0,$f2,$f4
+	\op	$f2,$f4,$f6[2]
+	\op	$f6,$f4,15
 	.if 0	/* Which is right?? */
 	/* Test negative numbers in immediate-value slot.  */
 	\op	$f4,$f6,-3
 	.else
 	/* Test that it's recognized as an unsigned field.  */
-	\op	$f3,$f7,31
+	\op	$f4,$f6,31
 	.endif
 	.endm
 
@@ -93,17 +93,17 @@ stuff:
 	nsel3	xor.ob
 
 	/* ALNI, SHFL: Vector only.  */
-	alni.ob		$f1,$f2,$f3,5
-	shfl.mixh.ob	$f1,$f2,$f3
-	shfl.mixl.ob	$f1,$f2,$f3
-	shfl.pach.ob	$f1,$f2,$f3
-	shfl.pacl.ob	$f1,$f2,$f3
+	alni.ob		$f0,$f2,$f4,5
+	shfl.mixh.ob	$f0,$f2,$f4
+	shfl.mixl.ob	$f0,$f2,$f4
+	shfl.pach.ob	$f0,$f2,$f4
+	shfl.pacl.ob	$f0,$f2,$f4
 
 	/* SLL,SRL: Scalar or immediate.  */
-	sll.ob	$f2,$f4,$f5[3]
-	sll.ob	$f3,$f6,14
-	srl.ob	$f2,$f4,$f5[3]
-	srl.ob	$f3,$f6,14
+	sll.ob	$f2,$f4,$f6[3]
+	sll.ob	$f4,$f6,14
+	srl.ob	$f2,$f4,$f6[3]
+	srl.ob	$f4,$f6,14
 
 	/* RZU: Immediate, must be 0, 8, or 16.  */
 	rzu.ob	$f2,13
@@ -113,7 +113,7 @@ stuff:
 	racl.ob	$f2
 	racm.ob	$f2
 	wach.ob	$f2
-	wacl.ob	$f2,$f3
+	wacl.ob	$f2,$f4
 
 	ror	$4,$5,$6
 	rol	$4,$5,15
diff --git a/gas/testsuite/gas/mips/vr5500.d b/gas/testsuite/gas/mips/vr5500.d
index f821ba7..7ebd020 100644
--- a/gas/testsuite/gas/mips/vr5500.d
+++ b/gas/testsuite/gas/mips/vr5500.d
@@ -44,8 +44,8 @@ Disassembly of section .text:
 0+00090 <stuff\+0x90> dclo	v1,a0
 0+00094 <stuff\+0x94> clz	v1,a0
 0+00098 <stuff\+0x98> dclz	v1,a0
-0+0009c <stuff\+0x9c> luxc1	\$f1,a0\(v0\)
-0+000a0 <stuff\+0xa0> suxc1	\$f1,a0\(v0\)
+0+0009c <stuff\+0x9c> luxc1	\$f0,a0\(v0\)
+0+000a0 <stuff\+0xa0> suxc1	\$f2,a0\(v0\)
 0+000a4 <stuff\+0xa4> tlbp
 0+000a8 <stuff\+0xa8> tlbr
 	\.\.\.
diff --git a/gas/testsuite/gas/mips/vr5500.s b/gas/testsuite/gas/mips/vr5500.s
index 9d07410..02f0561 100644
--- a/gas/testsuite/gas/mips/vr5500.s
+++ b/gas/testsuite/gas/mips/vr5500.s
@@ -67,8 +67,8 @@ stuff:
 	clz	$3,$4
 	dclz    $3,$4
 
-	luxc1	$f1,$4($2)
-	suxc1   $f1,$4($2)
+	luxc1	$f0,$4($2)
+	suxc1   $f2,$4($2)
 
 	tlbp
 	tlbr