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| author | Richard Sandiford <richard.sandiford@arm.com> | 2016-09-21 16:49:31 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2016-09-21 16:49:31 +0100 |
| commit | 73866052f244927457202e4b0d1542bea529878f (patch) | |
| tree | 0f505bedda2de518422b06a8abe1589746398e85 /gas/testsuite | |
| parent | e1b988bba630c09564248ebb78cf29c70f2d04db (diff) | |
| download | gdb-73866052f244927457202e4b0d1542bea529878f.zip gdb-73866052f244927457202e4b0d1542bea529878f.tar.gz gdb-73866052f244927457202e4b0d1542bea529878f.tar.bz2 | |
[AArch64][SVE 12/32] Remove boolean parameters from parse_address_main
In the review of the original version of this series, Richard didn't
like the use of boolean parameters to parse_address_main. I think we
can just get rid of them and leave the callers to check the addressing
modes. As it happens, the handling of ADDR_SIMM9{,_2} already did this
for relocation operators (i.e. it used parse_address_reloc and then
rejected relocations).
The callers are already set up to reject invalid register post-indexed
addressing, so we can simply remove the accept_reg_post_index parameter
without adding any more checks. This again creates a corner case where:
.equ x2, 1
ldr w0, [x1], x2
was previously an acceptable way of writing "ldr w0, [x1], #1" but
is now rejected.
Removing the "reloc" parameter means that two cases need to check
explicitly for relocation operators.
ADDR_SIMM9_2 appers to be unused. I'll send a separate patch
to remove it.
This patch makes parse_address temporarily equivalent to
parse_address_main, but later patches in the series will need
to keep the distinction.
gas/
* config/tc-aarch64.c (parse_address_main): Remove reloc and
accept_reg_post_index parameters. Parse relocations and register
post indexes unconditionally.
(parse_address): Remove accept_reg_post_index parameter.
Update call to parse_address_main.
(parse_address_reloc): Delete.
(parse_operands): Call parse_address instead of parse_address_main.
Update existing callers of parse_address and make them check
inst.reloc.type where appropriate.
* testsuite/gas/aarch64/diagnostic.s: Add tests for relocations
in ADDR_SIMPLE, SIMD_ADDR_SIMPLE, ADDR_SIMM7 and ADDR_SIMM9 addresses.
Also test for invalid uses of post-index register addressing.
* testsuite/gas/aarch64/diagnostic.l: Update accordingly.
Diffstat (limited to 'gas/testsuite')
| -rw-r--r-- | gas/testsuite/gas/aarch64/diagnostic.l | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/diagnostic.s | 12 |
2 files changed, 20 insertions, 0 deletions
diff --git a/gas/testsuite/gas/aarch64/diagnostic.l b/gas/testsuite/gas/aarch64/diagnostic.l index ef23577..0fb4db9 100644 --- a/gas/testsuite/gas/aarch64/diagnostic.l +++ b/gas/testsuite/gas/aarch64/diagnostic.l @@ -150,3 +150,11 @@ [^:]*:264: Error: invalid floating-point constant at operand 2 -- `fmov s0,-2' [^:]*:266: Error: integer 64-bit register expected at operand 2 -- `st2 {v0.4s,v1.4s},\[sp\],xzr' [^:]*:267: Error: integer or zero register expected at operand 2 -- `str x1,\[x2,sp\]' +[^:]*:270: Error: relocation not allowed at operand 3 -- `ldnp x1,x2,\[x3,#:lo12:foo\]' +[^:]*:271: Error: invalid addressing mode at operand 2 -- `ld1 {v0\.4s},\[x3,#:lo12:foo\]' +[^:]*:272: Error: the optional immediate offset can only be 0 at operand 2 -- `stuminl x0,\[x3,#:lo12:foo\]' +[^:]*:273: Error: relocation not allowed at operand 2 -- `prfum pldl1keep,\[x3,#:lo12:foo\]' +[^:]*:275: Error: invalid addressing mode at operand 2 -- `ldr x0,\[x3\],x4' +[^:]*:276: Error: invalid addressing mode at operand 3 -- `ldnp x1,x2,\[x3\],x4' +[^:]*:278: Error: invalid addressing mode at operand 2 -- `stuminl x0,\[x3\],x4' +[^:]*:279: Error: invalid addressing mode at operand 2 -- `prfum pldl1keep,\[x3\],x4' diff --git a/gas/testsuite/gas/aarch64/diagnostic.s b/gas/testsuite/gas/aarch64/diagnostic.s index 8dbb542..a9cd124 100644 --- a/gas/testsuite/gas/aarch64/diagnostic.s +++ b/gas/testsuite/gas/aarch64/diagnostic.s @@ -265,3 +265,15 @@ st2 {v0.4s, v1.4s}, [sp], xzr str x1, [x2, sp] + + ldr x0, [x1, #:lo12:foo] // OK + ldnp x1, x2, [x3, #:lo12:foo] + ld1 {v0.4s}, [x3, #:lo12:foo] + stuminl x0, [x3, #:lo12:foo] + prfum pldl1keep, [x3, #:lo12:foo] + + ldr x0, [x3], x4 + ldnp x1, x2, [x3], x4 + ld1 {v0.4s}, [x3], x4 // OK + stuminl x0, [x3], x4 + prfum pldl1keep, [x3], x4 |