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authorMike Frysinger <vapier@gentoo.org>2011-03-29 01:25:13 +0000
committerMike Frysinger <vapier@gentoo.org>2011-03-29 01:25:13 +0000
commitf4a2f576d439afac300134257b3d9fcfc7e15fd3 (patch)
treeeb3ef526a7aa727e049b2a80fd13d225f956b1db /gas/testsuite
parent332bf1ed7493992da9371a6726436752ee782529 (diff)
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gas: blackfin: reject invalid 16bit acc add insns
The 16bit acc add insn cannot assign the two results to the same dreg, so make sure gas rejects attempts to use this insn variant. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'gas/testsuite')
-rw-r--r--gas/testsuite/ChangeLog7
-rw-r--r--gas/testsuite/gas/bfin/expected_errors.l1
-rw-r--r--gas/testsuite/gas/bfin/expected_errors.s2
-rw-r--r--gas/testsuite/gas/bfin/video2.d1
-rwxr-xr-xgas/testsuite/gas/bfin/video2.s1
5 files changed, 10 insertions, 2 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 4f69afa..b4bdca1 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2011-03-28 Mike Frysinger <vapier@gentoo.org>
+
+ * gas/bfin/expected_errors.s: Add invalid 16bit acc add insn tests.
+ * gas/bfin/expected_errors.l: Add new error messages.
+ * testsuite/gas/bfin/video2.s: Drop invalid 16bit acc add insn.
+ * testsuite/gas/bfin/video2.d: Updated disassembly output.
+
2011-03-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/ilp32/inval.s: Remove .quad.
diff --git a/gas/testsuite/gas/bfin/expected_errors.l b/gas/testsuite/gas/bfin/expected_errors.l
index 863b30b..2f746db 100644
--- a/gas/testsuite/gas/bfin/expected_errors.l
+++ b/gas/testsuite/gas/bfin/expected_errors.l
@@ -100,3 +100,4 @@
.*:126: Error: Resource conflict in dest reg.
.*:127: Error: Differing source registers.
.*:129: Error: Register mismatch.
+.*:131: Error: Illegal dest register combination. Input text was A0.H.
diff --git a/gas/testsuite/gas/bfin/expected_errors.s b/gas/testsuite/gas/bfin/expected_errors.s
index 46be66c..f6e3f6f 100644
--- a/gas/testsuite/gas/bfin/expected_errors.s
+++ b/gas/testsuite/gas/bfin/expected_errors.s
@@ -127,3 +127,5 @@
R7 = R3 +|- R4, R1 = R1 -|+ R2;
R0 = R3 + R4, R1 = R5 - R6;
+
+ R7 = A1.L + A1.H, R7 = A0.L + A0.H;
diff --git a/gas/testsuite/gas/bfin/video2.d b/gas/testsuite/gas/bfin/video2.d
index b9830d9..98f2239 100644
--- a/gas/testsuite/gas/bfin/video2.d
+++ b/gas/testsuite/gas/bfin/video2.d
@@ -50,7 +50,6 @@ Disassembly of section .text:
[ 0-9a-f]+: 37 c4 10 0a R5 = BYTEOP3P \(R3:2, R1:0\) \(HI\);
[ 0-9a-f]+: 17 c4 10 2c R6 = BYTEOP3P \(R3:2, R1:0\) \(LO, R\);
[ 0-9a-f]+: 37 c4 10 2e R7 = BYTEOP3P \(R3:2, R1:0\) \(HI, R\);
-[ 0-9a-f]+: 0c c4 00 40 R0 = A1.L \+ A1.H, R0 = A0.L \+ A0.H;
[ 0-9a-f]+: 0c c4 00 42 R0 = A1.L \+ A1.H, R1 = A0.L \+ A0.H;
[ 0-9a-f]+: 0c c4 80 46 R2 = A1.L \+ A1.H, R3 = A0.L \+ A0.H;
[ 0-9a-f]+: 0c c4 00 4b R4 = A1.L \+ A1.H, R5 = A0.L \+ A0.H;
diff --git a/gas/testsuite/gas/bfin/video2.s b/gas/testsuite/gas/bfin/video2.s
index 22fb50f..4ec9f75 100755
--- a/gas/testsuite/gas/bfin/video2.s
+++ b/gas/testsuite/gas/bfin/video2.s
@@ -68,7 +68,6 @@ r7 = byteop3p (r3:2, r1:0) (hi, r) ;
//Dreg = A1.L + A1.H, Dreg = A0.L + A0.H ; /* (b) */
-R0 = A1.L + A1.H, R0= A0.L + A0.H ;
R0 = A1.L + A1.H, R1= A0.L + A0.H ;
R2 = A1.L + A1.H, R3= A0.L + A0.H ;
R4 = A1.L + A1.H, R5= A0.L + A0.H ;