gas/

    * config/tc-arm.c (parse_psr): Add LHS argument. Improve support
    for *APSR bitmasks.
    (operand_parse_code): Replace OP_PSR with OP_wPSR and OP_rPSR.
    Remove OP_RVC_PSR.
    (parse_operands): Likewise.
    (do_mrs): Tweak error message for constraint.
    (do_t_mrs): Update constraints for changes to APSR support.
    (do_t_msr): Likewise. Don't set PSR_f flag here.
    (psrs): Remove "g", "nzcvq", "nzcvqg".
    (insns): Tweak entries for msr and mrs instructions.

    opcodes/
    * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
    (print_insn_thumb32): Add APSR bitmask support.

    gas/testsuite/
    * gas/arm/mrs-msr-thumb-v7-m.s: New.
    * gas/arm/mrs-msr-thumb-v7-m.d: New.
    * gas/arm/mrs-msr-thumb-v7-m-bad.d: New.
    * gas/arm/mrs-msr-thumb-v7-m-bad.l: New.
    * gas/arm/mrs-msr-thumb-v7-m-bad.s: New.
    * gas/arm/mrs-msr-thumb-v7e-m.d: New.
    * gas/arm/mrs-msr-thumb-v7e-m.s: New.
    * gas/arm/mrs-msr-arm-v7-a-bad.d: New.
    * gas/arm/mrs-msr-arm-v7-a-bad.l: New.
    * gas/arm/mrs-msr-arm-v7-a-bad.s: New.
    * gas/arm/mrs-msr-arm-v7-a.d: New.
    * gas/arm/mrs-msr-arm-v7-a.s: New.
    * gas/arm/mrs-msr-arm-v6.d: New.
    * gas/arm/mrs-msr-arm-v6.s: New.
    * gas/arm/mrs-msr-thumb-v6t2.d: New.
    * gas/arm/mrs-msr-thumb-v6t2.s: New.
    * gas/arm/arch7.d: Fix typo in disassembly for BASEPRI_MAX,
    bitmasks for IAPSR etc.
    * gas/arm/arch7.s: Specify bitmask for APSR writes.
    * gas/arm/archv6m.s: Likewise.
    * msr-imm-bad.l: Tweak expected disassembly in error message.
    * msr-reg-bad.l: Likewise.
    * msr-imm.d: Tweak expected disassembly.
    * msr-reg.d: Likewise.
    * msr-reg-thumb.d: Likewise.
    * msr-imm.s: Specify bitmask on APSR writes.
    * msr-reg.s: Add comment about deprecated usage.

27 files changed, 224 insertions, 22 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 43b6091..daa7b04 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,33 @@
+2011-04-11  Julian Brown  <julian@codesourcery.com>
+
+	* gas/arm/mrs-msr-thumb-v7-m.s: New.
+	* gas/arm/mrs-msr-thumb-v7-m.d: New.
+	* gas/arm/mrs-msr-thumb-v7-m-bad.d: New.
+	* gas/arm/mrs-msr-thumb-v7-m-bad.l: New.
+	* gas/arm/mrs-msr-thumb-v7-m-bad.s: New.
+	* gas/arm/mrs-msr-thumb-v7e-m.d: New.
+	* gas/arm/mrs-msr-thumb-v7e-m.s: New.
+	* gas/arm/mrs-msr-arm-v7-a-bad.d: New.
+	* gas/arm/mrs-msr-arm-v7-a-bad.l: New.
+	* gas/arm/mrs-msr-arm-v7-a-bad.s: New.
+	* gas/arm/mrs-msr-arm-v7-a.d: New.
+	* gas/arm/mrs-msr-arm-v7-a.s: New.
+	* gas/arm/mrs-msr-arm-v6.d: New.
+	* gas/arm/mrs-msr-arm-v6.s: New.
+	* gas/arm/mrs-msr-thumb-v6t2.d: New.
+	* gas/arm/mrs-msr-thumb-v6t2.s: New.
+	* gas/arm/arch7.d: Fix typo in disassembly for BASEPRI_MAX,
+	bitmasks for IAPSR etc.
+	* gas/arm/arch7.s: Specify bitmask for APSR writes.
+	* gas/arm/archv6m.s: Likewise.
+	* msr-imm-bad.l: Tweak expected disassembly in error message.
+	* msr-reg-bad.l: Likewise.
+	* msr-imm.d: Tweak expected disassembly.
+	* msr-reg.d: Likewise.
+	* msr-reg-thumb.d: Likewise.
+	* msr-imm.s: Specify bitmask on APSR writes.
+	* msr-reg.s: Add comment about deprecated usage.
+
 2011-04-11  Dan McDonald  <dan@wellkeeper.com>
 
 	PR gas/12296
diff --git a/gas/testsuite/gas/arm/arch7.d b/gas/testsuite/gas/arm/arch7.d
index 4f9d9aa..2da6d0a 100644
--- a/gas/testsuite/gas/arm/arch7.d
+++ b/gas/testsuite/gas/arm/arch7.d
@@ -57,13 +57,13 @@ Disassembly of section .text:
 0+0c0 <[^>]*> f3ef 8009 	mrs	r0, PSP
 0+0c4 <[^>]*> f3ef 8010 	mrs	r0, PRIMASK
 0+0c8 <[^>]*> f3ef 8011 	mrs	r0, BASEPRI
-0+0cc <[^>]*> f3ef 8012 	mrs	r0, BASEPRI_MASK
+0+0cc <[^>]*> f3ef 8012 	mrs	r0, BASEPRI_MAX
 0+0d0 <[^>]*> f3ef 8013 	mrs	r0, FAULTMASK
 0+0d4 <[^>]*> f3ef 8014 	mrs	r0, CONTROL
-0+0d8 <[^>]*> f380 8800 	msr	(CPSR_f|APSR), r0
-0+0dc <[^>]*> f380 8801 	msr	IAPSR, r0
-0+0e0 <[^>]*> f380 8802 	msr	EAPSR, r0
-0+0e4 <[^>]*> f380 8803 	msr	PSR, r0
+0+0d8 <[^>]*> f380 8800 	msr	(CPSR_f|APSR_nzcvq), r0
+0+0dc <[^>]*> f380 8801 	msr	IAPSR_nzcvq, r0
+0+0e0 <[^>]*> f380 8802 	msr	EAPSR_nzcvq, r0
+0+0e4 <[^>]*> f380 8803 	msr	PSR_nzcvq, r0
 0+0e8 <[^>]*> f380 8805 	msr	IPSR, r0
 0+0ec <[^>]*> f380 8806 	msr	EPSR, r0
 0+0f0 <[^>]*> f380 8807 	msr	IEPSR, r0
@@ -71,9 +71,9 @@ Disassembly of section .text:
 0+0f8 <[^>]*> f380 8809 	msr	PSP, r0
 0+0fc <[^>]*> f380 8810 	msr	PRIMASK, r0
 0+100 <[^>]*> f380 8811 	msr	BASEPRI, r0
-0+104 <[^>]*> f380 8812 	msr	BASEPRI_MASK, r0
+0+104 <[^>]*> f380 8812 	msr	BASEPRI_MAX, r0
 0+108 <[^>]*> f380 8813 	msr	FAULTMASK, r0
 0+10c <[^>]*> f380 8814 	msr	CONTROL, r0
 0+110 <[^>]*> f3ef 8003 	mrs	r0, PSR
-0+114 <[^>]*> f380 8803 	msr	PSR, r0
+0+114 <[^>]*> f380 8803 	msr	PSR_nzcvq, r0
 0+118 <[^>]*> df00      	svc	0
diff --git a/gas/testsuite/gas/arm/arch7.s b/gas/testsuite/gas/arm/arch7.s
index e1a2ed0..27059dc 100644
--- a/gas/testsuite/gas/arm/arch7.s
+++ b/gas/testsuite/gas/arm/arch7.s
@@ -63,10 +63,10 @@ label2:
 	mrs	r0, basepri_max
 	mrs	r0, faultmask
 	mrs	r0, control
-	msr	apsr, r0
-	msr	iapsr, r0
-	msr	eapsr, r0
-	msr	psr, r0
+	msr	apsr_nzcvq, r0
+	msr	iapsr_nzcvq, r0
+	msr	eapsr_nzcvq, r0
+	msr	psr_nzcvq, r0
 	msr	ipsr, r0
 	msr	epsr, r0
 	msr	iepsr, r0
@@ -78,6 +78,6 @@ label2:
 	msr	faultmask, r0
 	msr	control, r0
 	mrs	r0, xpsr
-	msr	xpsr, r0
+	msr	xpsr_nzcvq, r0
 
 	svc	0
diff --git a/gas/testsuite/gas/arm/archv6m.s b/gas/testsuite/gas/arm/archv6m.s
index 013bba9..137bacc 100644
--- a/gas/testsuite/gas/arm/archv6m.s
+++ b/gas/testsuite/gas/arm/archv6m.s
@@ -5,7 +5,7 @@
 	.align	2
 	.global	foo
 foo:
-	msr apsr,r6
+	msr apsr_nzcvq,r6
 	msr epsr,r9
 	mrs r2, iapsr
 	yield
diff --git a/gas/testsuite/gas/arm/mrs-msr-arm-v6.d b/gas/testsuite/gas/arm/mrs-msr-arm-v6.d
new file mode 100644
index 0000000..0afafad
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-arm-v6.d
@@ -0,0 +1,16 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MRS/MSR test, architecture v6, ARM mode
+
+.*:     file format .*
+
+
+Disassembly of section .text:
+0+00 <[^>]*> e10f4000 	mrs	r4, CPSR
+0+04 <[^>]*> e10f5000 	mrs	r5, CPSR
+0+08 <[^>]*> e14f6000 	mrs	r6, SPSR
+0+0c <[^>]*> e328f101 	msr	CPSR_f, #1073741824	; 0x40000000
+0+10 <[^>]*> e328f202 	msr	CPSR_f, #536870912	; 0x20000000
+0+14 <[^>]*> e369f201 	msr	SPSR_fc, #268435456	; 0x10000000
+0+18 <[^>]*> e128f004 	msr	CPSR_f, r4
+0+1c <[^>]*> e128f005 	msr	CPSR_f, r5
+0+20 <[^>]*> e169f006 	msr	SPSR_fc, r6
diff --git a/gas/testsuite/gas/arm/mrs-msr-arm-v6.s b/gas/testsuite/gas/arm/mrs-msr-arm-v6.s
new file mode 100644
index 0000000..c52abd9
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-arm-v6.s
@@ -0,0 +1,13 @@
+	.arch armv6
+	.text
+	.arm
+	
+	mrs r4, apsr
+	mrs r5, cpsr
+	mrs r6, spsr
+	msr apsr_nzcvq, #0x40000000
+	msr cpsr_f, #0x20000000
+	msr spsr, #0x10000000
+	msr apsr_nzcvq, r4
+	msr cpsr_f, r5
+	msr spsr, r6
diff --git a/gas/testsuite/gas/arm/mrs-msr-arm-v7-a-bad.d b/gas/testsuite/gas/arm/mrs-msr-arm-v7-a-bad.d
new file mode 100644
index 0000000..e4cf35e
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-arm-v7-a-bad.d
@@ -0,0 +1,2 @@
+# name: MRS/MSR negative test, architecture v7-A, ARM mode
+# error-output: mrs-msr-arm-v7-a-bad.l
diff --git a/gas/testsuite/gas/arm/mrs-msr-arm-v7-a-bad.l b/gas/testsuite/gas/arm/mrs-msr-arm-v7-a-bad.l
new file mode 100644
index 0000000..222198f
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-arm-v7-a-bad.l
@@ -0,0 +1,5 @@
+[^:]*: Assembler messages:
+[^:]*:5: Error: 'APSR', 'CPSR' or 'SPSR' expected -- `mrs r4,apsr_nzcvq'
+[^:]*:6: Error: selected processor does not support requested special purpose register -- `mrs r5,iapsr'
+[^:]*:7: Error: selected processor does not support requested special purpose register -- `msr iapsr,r4'
+[^:]*:8: writing to APSR without specifying a bitmask is deprecated
diff --git a/gas/testsuite/gas/arm/mrs-msr-arm-v7-a-bad.s b/gas/testsuite/gas/arm/mrs-msr-arm-v7-a-bad.s
new file mode 100644
index 0000000..e76af9f
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-arm-v7-a-bad.s
@@ -0,0 +1,8 @@
+	.arch armv7-a
+	.text
+	.arm
+	
+	mrs r4, apsr_nzcvq
+	mrs r5, iapsr
+	msr iapsr, r4
+	msr apsr, r5
diff --git a/gas/testsuite/gas/arm/mrs-msr-arm-v7-a.d b/gas/testsuite/gas/arm/mrs-msr-arm-v7-a.d
new file mode 100644
index 0000000..62d9349
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-arm-v7-a.d
@@ -0,0 +1,16 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MRS/MSR test, architecture v7-A, ARM mode
+
+.*:     file format .*
+
+
+Disassembly of section .text:
+0+00 <[^>]*> e10f4000 	mrs	r4, CPSR
+0+04 <[^>]*> e10f5000 	mrs	r5, CPSR
+0+08 <[^>]*> e14f6000 	mrs	r6, SPSR
+0+0c <[^>]*> e32cf101 	msr	CPSR_fs, #1073741824	; 0x40000000
+0+10 <[^>]*> e328f202 	msr	CPSR_f, #536870912	; 0x20000000
+0+14 <[^>]*> e369f201 	msr	SPSR_fc, #268435456	; 0x10000000
+0+18 <[^>]*> e128f004 	msr	CPSR_f, r4
+0+1c <[^>]*> e128f005 	msr	CPSR_f, r5
+0+20 <[^>]*> e169f006 	msr	SPSR_fc, r6
diff --git a/gas/testsuite/gas/arm/mrs-msr-arm-v7-a.s b/gas/testsuite/gas/arm/mrs-msr-arm-v7-a.s
new file mode 100644
index 0000000..c9ecada
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-arm-v7-a.s
@@ -0,0 +1,13 @@
+	.arch armv7-a
+	.text
+	.arm
+	
+	mrs r4, apsr
+	mrs r5, cpsr
+	mrs r6, spsr
+	msr apsr_nzcvqg, #0x40000000
+	msr cpsr_f, #0x20000000
+	msr spsr, #0x10000000
+	msr apsr_nzcvq, r4
+	msr cpsr_f, r5
+	msr spsr, r6
diff --git a/gas/testsuite/gas/arm/mrs-msr-thumb-v6t2.d b/gas/testsuite/gas/arm/mrs-msr-thumb-v6t2.d
new file mode 100644
index 0000000..cc0ba1b
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-thumb-v6t2.d
@@ -0,0 +1,13 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MRS/MSR test, architecture v6t2, Thumb mode
+
+.*:     file format .*
+
+
+Disassembly of section .text:
+0+00 <[^>]*> f3ef 8400 	mrs	r4, CPSR
+0+04 <[^>]*> f3ef 8500 	mrs	r5, CPSR
+0+08 <[^>]*> f3ff 8600 	mrs	r6, SPSR
+0+0c <[^>]*> f384 8c00 	msr	CPSR_fs, r4
+0+10 <[^>]*> f385 8800 	msr	CPSR_f, r5
+0+14 <[^>]*> f396 8900 	msr	SPSR_fc, r6
diff --git a/gas/testsuite/gas/arm/mrs-msr-thumb-v6t2.s b/gas/testsuite/gas/arm/mrs-msr-thumb-v6t2.s
new file mode 100644
index 0000000..2d041c5
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-thumb-v6t2.s
@@ -0,0 +1,10 @@
+	.arch armv6t2
+	.text
+	.thumb
+	
+	mrs r4, apsr
+	mrs r5, cpsr
+	mrs r6, spsr
+	msr apsr_nzcvqg, r4
+	msr cpsr_f, r5
+	msr spsr, r6
diff --git a/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m-bad.d b/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m-bad.d
new file mode 100644
index 0000000..eef7f03
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m-bad.d
@@ -0,0 +1,2 @@
+# name: MRS/MSR negative test, architecture v7-M, Thumb mode
+# error-output: mrs-msr-thumb-v7-m-bad.l
diff --git a/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m-bad.l b/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m-bad.l
new file mode 100644
index 0000000..e9770b6
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m-bad.l
@@ -0,0 +1,10 @@
+[^:]*: Assembler messages:
+[^:]*:5: Error: selected processor does not support requested special purpose register -- `mrs r4,cpsr'
+[^:]*:6: Error: selected processor does not support requested special purpose register -- `mrs r5,spsr'
+[^:]*:7: Error: selected processor does not support DSP extension -- `msr apsr_nzcvqg,r4'
+[^:]*:8: Error: selected processor does not support DSP extension -- `msr iapsr_nzcvqg,r5'
+[^:]*:9: Error: bad bitmask specified after APSR -- `msr xpsr_nncvq,r6'
+[^:]*:10: Error: bad bitmask specified after APSR -- `msr xpsr_nzcv,r7'
+[^:]*:11: Error: selected processor does not support requested special purpose register -- `msr cpsr_f,r7'
+[^:]*:12: Error: selected processor does not support requested special purpose register -- `msr spsr,r8'
+[^:]*:13: Error: syntax error -- `msr primask_nzcvq,r9'
diff --git a/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m-bad.s b/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m-bad.s
new file mode 100644
index 0000000..da61015
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m-bad.s
@@ -0,0 +1,13 @@
+	.arch armv7-m
+	.text
+	.thumb
+	
+	mrs r4, cpsr
+	mrs r5, spsr
+	msr apsr_nzcvqg, r4
+	msr iapsr_nzcvqg, r5
+	msr xpsr_nncvq, r6
+	msr xpsr_nzcv, r7
+	msr cpsr_f, r7
+	msr spsr, r8
+	msr primask_nzcvq, r9
diff --git a/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m.d b/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m.d
new file mode 100644
index 0000000..0a73897
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m.d
@@ -0,0 +1,15 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MRS/MSR test, architecture v7-M, Thumb mode
+
+
+.*:     file format .*
+
+
+Disassembly of section .text:
+0+00 <[^>]*> f3ef 8400 	mrs	r4, CPSR
+0+04 <[^>]*> f3ef 8502 	mrs	r5, EAPSR
+0+08 <[^>]*> f3ef 8610 	mrs	r6, PRIMASK
+0+0c <[^>]*> f383 8803 	msr	PSR_nzcvq, r3
+0+10 <[^>]*> f384 8800 	msr	CPSR_f, r4
+0+14 <[^>]*> f385 8801 	msr	IAPSR_nzcvq, r5
+0+18 <[^>]*> f386 8810 	msr	PRIMASK, r6
diff --git a/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m.s b/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m.s
new file mode 100644
index 0000000..54cf723
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m.s
@@ -0,0 +1,11 @@
+	.arch armv7-m
+	.text
+	.thumb
+	
+	mrs r4, apsr
+	mrs r5, eapsr
+	mrs r6, primask
+	msr xpsr_nzcvq, r3
+	msr apsr_nzcvq, r4
+	msr iapsr_nzcvq, r5
+	msr primask, r6
diff --git a/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.d b/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.d
new file mode 100644
index 0000000..8eb1ff9
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.d
@@ -0,0 +1,13 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MRS/MSR test, architecture v7e-M, Thumb mode
+
+.*:     file format .*
+
+
+Disassembly of section .text:
+0+00 <[^>]*> f3ef 8400 	mrs	r4, CPSR
+0+04 <[^>]*> f3ef 8502 	mrs	r5, EAPSR
+0+08 <[^>]*> f3ef 8610 	mrs	r6, PRIMASK
+0+0c <[^>]*> f384 8c00 	msr	CPSR_fs, r4
+0+10 <[^>]*> f385 8401 	msr	IAPSR_g, r5
+0+14 <[^>]*> f386 8812 	msr	BASEPRI_MAX, r6
diff --git a/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.s b/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.s
new file mode 100644
index 0000000..e9e8588
--- /dev/null
+++ b/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.s
@@ -0,0 +1,10 @@
+	.arch armv7e-m
+	.text
+	.thumb
+	
+	mrs r4, apsr
+	mrs r5, eapsr
+	mrs r6, primask
+	msr apsr_nzcvqg, r4
+	msr iapsr_g, r5
+	msr basepri_max, r6
diff --git a/gas/testsuite/gas/arm/msr-imm-bad.l b/gas/testsuite/gas/arm/msr-imm-bad.l
index 4f1ef98..78d958b 100644
--- a/gas/testsuite/gas/arm/msr-imm-bad.l
+++ b/gas/testsuite/gas/arm/msr-imm-bad.l
@@ -1,5 +1,5 @@
 [^:]*: Assembler messages:
-[^:]*:9: Error: Thumb encoding does not support an immediate here -- `msr APSR,#0xc0000004'
+[^:]*:9: Error: Thumb encoding does not support an immediate here -- `msr APSR_nzcvq,#0xc0000004'
 [^:]*:10: Error: Thumb encoding does not support an immediate here -- `msr APSR_g,#0xc0000004'
 [^:]*:11: Error: Thumb encoding does not support an immediate here -- `msr APSR_nzcvq,#0xc0000004'
 [^:]*:12: Error: Thumb encoding does not support an immediate here -- `msr APSR_nzcvqg,#0xc0000004'
diff --git a/gas/testsuite/gas/arm/msr-imm.d b/gas/testsuite/gas/arm/msr-imm.d
index a450cb0..729720d 100644
--- a/gas/testsuite/gas/arm/msr-imm.d
+++ b/gas/testsuite/gas/arm/msr-imm.d
@@ -5,7 +5,7 @@
 .*: +file format .*arm.*
 
 Disassembly of section .text:
-00000000 <[^>]*> e329f113 	msr	CPSR_fc, #-1073741820	; 0xc0000004
+00000000 <[^>]*> e328f113 	msr	CPSR_f, #-1073741820	; 0xc0000004
 00000004 <[^>]*> e324f113 	msr	CPSR_s, #-1073741820	; 0xc0000004
 00000008 <[^>]*> e328f113 	msr	CPSR_f, #-1073741820	; 0xc0000004
 0000000c <[^>]*> e32cf113 	msr	CPSR_fs, #-1073741820	; 0xc0000004
diff --git a/gas/testsuite/gas/arm/msr-imm.s b/gas/testsuite/gas/arm/msr-imm.s
index 99df7f7..3fd963e 100644
--- a/gas/testsuite/gas/arm/msr-imm.s
+++ b/gas/testsuite/gas/arm/msr-imm.s
@@ -6,7 +6,7 @@
 
 	@ Write to Special Register from Immediate
 	@ Write to application status register
-	msr	APSR,#0xc0000004
+	msr	APSR_nzcvq,#0xc0000004
 	msr	APSR_g,#0xc0000004
 	msr	APSR_nzcvq,#0xc0000004
 	msr	APSR_nzcvqg,#0xc0000004
diff --git a/gas/testsuite/gas/arm/msr-reg-bad.l b/gas/testsuite/gas/arm/msr-reg-bad.l
index 3e97c36..585d418 100644
--- a/gas/testsuite/gas/arm/msr-reg-bad.l
+++ b/gas/testsuite/gas/arm/msr-reg-bad.l
@@ -1,7 +1,7 @@
 [^:]*: Assembler messages:
-[^:]*:9: Error: syntax error -- `msr APSR_g,r9'
-[^:]*:10: Error: syntax error -- `msr APSR_nzcvq,r9'
-[^:]*:11: Error: syntax error -- `msr APSR_nzcvqg,r9'
+[^:]*:8: writing to APSR without specifying a bitmask is deprecated
+[^:]*:9: Error: selected processor does not support DSP extension -- `msr APSR_g,r9'
+[^:]*:11: Error: selected processor does not support DSP extension -- `msr APSR_nzcvqg,r9'
 [^:]*:14: Error: selected processor does not support requested special purpose register -- `msr CPSR,r9'
 [^:]*:15: Error: selected processor does not support requested special purpose register -- `msr CPSR_s,r9'
 [^:]*:16: Error: selected processor does not support requested special purpose register -- `msr CPSR_f,r9'
diff --git a/gas/testsuite/gas/arm/msr-reg-thumb.d b/gas/testsuite/gas/arm/msr-reg-thumb.d
index e449af1..39b1275 100644
--- a/gas/testsuite/gas/arm/msr-reg-thumb.d
+++ b/gas/testsuite/gas/arm/msr-reg-thumb.d
@@ -2,12 +2,13 @@
 # as: -march=armv7-a -mthumb
 # source: msr-reg.s
 # objdump: -dr --prefix-addresses --show-raw-insn
+# warning: writing to APSR without specifying a bitmask is deprecated
 # skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
 
 .*: +file format .*arm.*
 
 Disassembly of section .text:
-00000000 <[^>]*> f389 8900 	msr	CPSR_fc, r9
+00000000 <[^>]*> f389 8800 	msr	CPSR_f, r9
 00000004 <[^>]*> f389 8400 	msr	CPSR_s, r9
 00000008 <[^>]*> f389 8800 	msr	CPSR_f, r9
 0000000c <[^>]*> f389 8c00 	msr	CPSR_fs, r9
diff --git a/gas/testsuite/gas/arm/msr-reg.d b/gas/testsuite/gas/arm/msr-reg.d
index 6531a93..3603f9c 100644
--- a/gas/testsuite/gas/arm/msr-reg.d
+++ b/gas/testsuite/gas/arm/msr-reg.d
@@ -1,11 +1,12 @@
 # name: MSR register operands
 # as: -march=armv7-a
 # objdump: -dr --prefix-addresses --show-raw-insn
+# warning: writing to APSR without specifying a bitmask is deprecated
 
 .*: +file format .*arm.*
 
 Disassembly of section .text:
-00000000 <[^>]*> e129f009 	msr	CPSR_fc, r9
+00000000 <[^>]*> e128f009 	msr	CPSR_f, r9
 00000004 <[^>]*> e124f009 	msr	CPSR_s, r9
 00000008 <[^>]*> e128f009 	msr	CPSR_f, r9
 0000000c <[^>]*> e12cf009 	msr	CPSR_fs, r9
diff --git a/gas/testsuite/gas/arm/msr-reg.s b/gas/testsuite/gas/arm/msr-reg.s
index beb22b6..4f79b0e 100644
--- a/gas/testsuite/gas/arm/msr-reg.s
+++ b/gas/testsuite/gas/arm/msr-reg.s
@@ -5,7 +5,7 @@
 .syntax unified
 
 	@ Write to Special Register from register
-	msr	APSR,r9
+	msr	APSR,r9    @ deprecated usage.
 	msr	APSR_g,r9
 	msr	APSR_nzcvq,r9
 	msr	APSR_nzcvqg,r9