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author | Jan Beulich <jbeulich@suse.com> | 2020-07-20 08:55:48 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2020-07-20 08:55:48 +0200 |
commit | 48ef937e913d31bbd24a7ae568d30b499a6b3477 (patch) | |
tree | 1756069c86fa289c0c1490160997871bd03f1723 /gas/testsuite | |
parent | 693bec1ed63fcd4dc00ce13a702a256955f8cc6f (diff) | |
download | gdb-48ef937e913d31bbd24a7ae568d30b499a6b3477.zip gdb-48ef937e913d31bbd24a7ae568d30b499a6b3477.tar.gz gdb-48ef937e913d31bbd24a7ae568d30b499a6b3477.tar.bz2 |
x86: honor absolute section when emitting code
Various provisions exist for insns to be placed in the absolute section,
yet actually trying to do so didn't work. While data emission (of non-
zero values) is not allowed by generic code, I think this functionality
is useful for the programmer to be able to determine the size of insns.
Therefore, rather than turning the silnet failure into a verbose one,
make things mostly work; the one class of insns not supported (yet) are
branches (JMP and Jcc) with dynamically determined displacement widths.
In this one case, an error now gets reported instead of silently
ignoring the code.
Also avoid recording ISA / feature usage for insns emitted to the
absolute section.
Diffstat (limited to 'gas/testsuite')
-rw-r--r-- | gas/testsuite/gas/i386/i386.exp | 5 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/sizing.s | 55 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/sizing32.d | 20 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/sizing64.d | 20 |
4 files changed, 100 insertions, 0 deletions
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 4fd5a77..f401732 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -139,6 +139,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "noreg32-data16" run_list_test "movx16" "-I${srcdir}/$subdir -al" run_list_test "movx32" "-al" + run_dump_test "sizing32" run_dump_test "addr16" run_dump_test "addr32" run_dump_test "code16" @@ -1236,5 +1237,9 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t } + set ASFLAGS "$old_ASFLAGS --64" + + run_dump_test "sizing64" + set ASFLAGS "$old_ASFLAGS" } diff --git a/gas/testsuite/gas/i386/sizing.s b/gas/testsuite/gas/i386/sizing.s new file mode 100644 index 0000000..c9b9820 --- /dev/null +++ b/gas/testsuite/gas/i386/sizing.s @@ -0,0 +1,55 @@ + .macro insn, mnem:req, opnds:vararg + .struct + \mnem \opnds + .equiv \mnem, . + .endm + + insn inc %eax + + .equiv .Lis_64bit, inc > 1 + + insn add $1, %al + + insn adc $1, %cl + + insn sub $0x12345678, %eax + + insn sbb $0x12345678, %ecx + + insn and $1, %eax + + insn call . + + insn jecxz . + + insn pextrw $0, %xmm0, %eax + + .macro pextrw_store opnds:vararg + {store} pextrw \opnds + .endm + insn pextrw_store $0, %xmm0, %eax + + insn vpextrw $0, %xmm0, %eax + + .macro vpextrw_evex opnds:vararg + {evex} vpextrw \opnds + .endm + insn vpextrw_evex $0, %xmm0, %eax + + .if .Lis_64bit + + insn mov $0x876543210, %rcx + + insn movq 0x876543210, %rax + + .else + + insn lcall $0, $0 + + .code16 + + insn ljmp $0, $0 + + .endif + + insn bextr $0x11223344, %fs:(,%eax,2), %eax diff --git a/gas/testsuite/gas/i386/sizing32.d b/gas/testsuite/gas/i386/sizing32.d new file mode 100644 index 0000000..3fe8ed8 --- /dev/null +++ b/gas/testsuite/gas/i386/sizing32.d @@ -0,0 +1,20 @@ +#name: ix86 insn sizing +#nm: -B +#source: sizing.s + +#... +0+03 a adc +0+02 a add +0+03 a and +0+10 a bextr +0+05 a call +0+01 a inc +0+02 a jecxz +0+07 a lcall +0+05 a ljmp +0+05 a pextrw +0+06 a pextrw_store +0+06 a sbb +0+05 a sub +0+05 a vpextrw +0+07 a vpextrw_evex diff --git a/gas/testsuite/gas/i386/sizing64.d b/gas/testsuite/gas/i386/sizing64.d new file mode 100644 index 0000000..d337885 --- /dev/null +++ b/gas/testsuite/gas/i386/sizing64.d @@ -0,0 +1,20 @@ +#name: x86-64 insn sizing +#nm: -B +#source: sizing.s + +#... +0+03 a adc +0+02 a add +0+03 a and +0+10 a bextr +0+05 a call +0+02 a inc +0+03 a jecxz +0+0a a mov +0+0a a movq +0+05 a pextrw +0+06 a pextrw_store +0+06 a sbb +0+05 a sub +0+05 a vpextrw +0+07 a vpextrw_evex |