x86: Add {disp16} pseudo prefix

Use Prefix_XXX for pseudo prefixes.  Add {disp16} pseudo prefix and
replace {disp32} pseudo prefix with {disp16} in 16-bit mode test.
Check invalid {disp16}/{disp32} pseudo prefixes.

gas/

	PR gas/26305
	* config/tc-i386.c (_i386_insn::disp_encoding): Add
	disp_encoding_16bit.
	(parse_insn): Check Prefix_XXX for pseudo prefixes.  Handle
	{disp16}.
	(build_modrm_byte): Handle {disp16}.
	(i386_index_check): Check invalid {disp16} and {disp32} pseudo
	prefixes.
	* doc/c-i386.texi: Update {disp32} documentation and document
	{disp16}.
	* testsuite/gas/i386/i386.exp: Run x86-64-inval-pseudo.
	* testsuite/gas/i386/inval-pseudo.s: Add {disp32}/{disp16}
	tests.
	* testsuite/gas/i386/pseudos.s: Add {disp8}/{disp32} vmovaps
	tests with 128-byte displacement.  Add {disp16} tests.
	* testsuite/gas/i386/x86-64-pseudos.s: Add {disp8}/{disp32}
	vmovaps test.  Add (%r13)/(%r13d) tests.
	* testsuite/gas/i386/x86-64-inval-pseudo.l: New file.
	* testsuite/gas/i386/x86-64-inval-pseudo.s: Likewise.
	* testsuite/gas/i386/inval-pseudo.l: Updated.
	* testsuite/gas/i386/pseudos.d: Likewise.
	* testsuite/gas/i386/x86-64-pseudos.d: Likewise.

opcodes/

	PR gas/26305
	* i386-opc.h (Prefix_Disp8): New.
	(Prefix_Disp16): Likewise.
	(Prefix_Disp32): Likewise.
	(Prefix_Load): Likewise.
	(Prefix_Store): Likewise.
	(Prefix_VEX): Likewise.
	(Prefix_VEX3): Likewise.
	(Prefix_EVEX): Likewise.
	(Prefix_REX): Likewise.
	(Prefix_NoOptimize): Likewise.
	* i386-opc.tbl: Use Prefix_XXX on pseudo prefixes.  Add {disp16}.
	* i386-tbl.h: Regenerated.

9 files changed, 125 insertions, 10 deletions

diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 0ac9c1f..0a863ff 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -1105,6 +1105,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_list_test "x86-64-cet-shstk-inval"
     run_dump_test "x86-64-pseudos"
     run_list_test "x86-64-pseudos-bad"
+    run_list_test "x86-64-inval-pseudo" "-al"
     run_dump_test "x86-64-notrack"
     run_dump_test "x86-64-notrack-intel"
     run_list_test "x86-64-notrackbad" "-al"
diff --git a/gas/testsuite/gas/i386/inval-pseudo.l b/gas/testsuite/gas/i386/inval-pseudo.l
index cf344f6..9df0a98 100644
--- a/gas/testsuite/gas/i386/inval-pseudo.l
+++ b/gas/testsuite/gas/i386/inval-pseudo.l
@@ -1,5 +1,7 @@
 .*: Assembler messages:
 .*:3: Error: .*
+.*:5: Error: .*
+.*:6: Error: .*
 GAS LISTING .*
 
 
@@ -7,5 +9,7 @@ GAS LISTING .*
 [ 	]*2[ 	]+\?\?\?\? 90       		nop
 [ 	]*3[ 	]+\{disp32\}
 [ 	]*4[ 	]+\?\?\?\? 90       		nop
-[ 	]*5[ 	]+\?\?\?\? 00000000 		\.p2align 4,0
+[ 	]*5[ 	]+\{disp32\} movb \(%bp\),%al
+[ 	]*6[ 	]+\{disp16\} movb \(%ebp\),%al
+[ 	]*7[ 	]+\?\?\?\? 00000000 		\.p2align 4,0
 #...
diff --git a/gas/testsuite/gas/i386/inval-pseudo.s b/gas/testsuite/gas/i386/inval-pseudo.s
index a40362b..b5a6233 100644
--- a/gas/testsuite/gas/i386/inval-pseudo.s
+++ b/gas/testsuite/gas/i386/inval-pseudo.s
@@ -2,4 +2,6 @@
 	nop
 	{disp32}
 	nop
+	{disp32} movb (%bp),%al
+	{disp16} movb (%ebp),%al
 	.p2align 4,0
diff --git a/gas/testsuite/gas/i386/pseudos.d b/gas/testsuite/gas/i386/pseudos.d
index 76aae36..4f029f1 100644
--- a/gas/testsuite/gas/i386/pseudos.d
+++ b/gas/testsuite/gas/i386/pseudos.d
@@ -22,6 +22,10 @@ Disassembly of section .text:
  +[a-f0-9]+:	c5 f8 28 90 00 00 00 00 	vmovaps 0x0\(%eax\),%xmm2
  +[a-f0-9]+:	62 f1 7c 08 28 50 00 	vmovaps 0x0\(%eax\),%xmm2
  +[a-f0-9]+:	62 f1 7c 08 28 90 00 00 00 00 	vmovaps 0x0\(%eax\),%xmm2
+ +[a-f0-9]+:	c5 f8 28 90 80 00 00 00 	vmovaps 0x80\(%eax\),%xmm2
+ +[a-f0-9]+:	c5 f8 28 90 80 00 00 00 	vmovaps 0x80\(%eax\),%xmm2
+ +[a-f0-9]+:	62 f1 7c 08 28 50 08 	vmovaps 0x80\(%eax\),%xmm2
+ +[a-f0-9]+:	62 f1 7c 08 28 90 80 00 00 00 	vmovaps 0x80\(%eax\),%xmm2
  +[a-f0-9]+:	89 c8                	mov    %ecx,%eax
  +[a-f0-9]+:	8b c1                	mov    %ecx,%eax
  +[a-f0-9]+:	89 c8                	mov    %ecx,%eax
@@ -291,9 +295,15 @@ Disassembly of section .text:
  +[a-f0-9]+:	8a 45 00             	mov    0x0\(%ebp\),%al
  +[a-f0-9]+:	8a 45 00             	mov    0x0\(%ebp\),%al
  +[a-f0-9]+:	8a 85 00 00 00 00    	mov    0x0\(%ebp\),%al
+ +[a-f0-9]+:	67 8a 04             	mov    \(%si\),%al
+ +[a-f0-9]+:	67 8a 44 00          	mov    0x0\(%si\),%al
+ +[a-f0-9]+:	67 8a 84 00 00       	mov    0x0\(%si\),%al
+ +[a-f0-9]+:	67 8a 05             	mov    \(%di\),%al
+ +[a-f0-9]+:	67 8a 45 00          	mov    0x0\(%di\),%al
+ +[a-f0-9]+:	67 8a 85 00 00       	mov    0x0\(%di\),%al
  +[a-f0-9]+:	67 8a 07             	mov    \(%bx\),%al
- +[a-f0-9]+:	67 8a 07             	mov    \(%bx\),%al
- +[a-f0-9]+:	67 8a 07             	mov    \(%bx\),%al
+ +[a-f0-9]+:	67 8a 47 00          	mov    0x0\(%bx\),%al
+ +[a-f0-9]+:	67 8a 87 00 00       	mov    0x0\(%bx\),%al
  +[a-f0-9]+:	67 8a 46 00          	mov    0x0\(%bp\),%al
  +[a-f0-9]+:	67 8a 46 00          	mov    0x0\(%bp\),%al
  +[a-f0-9]+:	67 8a 86 00 00       	mov    0x0\(%bp\),%al
@@ -311,6 +321,10 @@ Disassembly of section .text:
  +[a-f0-9]+:	c5 f8 28 90 00 00 00 00 	vmovaps 0x0\(%eax\),%xmm2
  +[a-f0-9]+:	62 f1 7c 08 28 50 00 	vmovaps 0x0\(%eax\),%xmm2
  +[a-f0-9]+:	62 f1 7c 08 28 90 00 00 00 00 	vmovaps 0x0\(%eax\),%xmm2
+ +[a-f0-9]+:	c5 f8 28 90 80 00 00 00 	vmovaps 0x80\(%eax\),%xmm2
+ +[a-f0-9]+:	c5 f8 28 90 80 00 00 00 	vmovaps 0x80\(%eax\),%xmm2
+ +[a-f0-9]+:	62 f1 7c 08 28 50 08 	vmovaps 0x80\(%eax\),%xmm2
+ +[a-f0-9]+:	62 f1 7c 08 28 90 80 00 00 00 	vmovaps 0x80\(%eax\),%xmm2
  +[a-f0-9]+:	89 c8                	mov    %ecx,%eax
  +[a-f0-9]+:	8b c1                	mov    %ecx,%eax
  +[a-f0-9]+:	89 c8                	mov    %ecx,%eax
@@ -328,9 +342,15 @@ Disassembly of section .text:
  +[a-f0-9]+:	8a 45 00             	mov    0x0\(%ebp\),%al
  +[a-f0-9]+:	8a 45 00             	mov    0x0\(%ebp\),%al
  +[a-f0-9]+:	8a 85 00 00 00 00    	mov    0x0\(%ebp\),%al
+ +[a-f0-9]+:	67 8a 04             	mov    \(%si\),%al
+ +[a-f0-9]+:	67 8a 44 00          	mov    0x0\(%si\),%al
+ +[a-f0-9]+:	67 8a 84 00 00       	mov    0x0\(%si\),%al
+ +[a-f0-9]+:	67 8a 05             	mov    \(%di\),%al
+ +[a-f0-9]+:	67 8a 45 00          	mov    0x0\(%di\),%al
+ +[a-f0-9]+:	67 8a 85 00 00       	mov    0x0\(%di\),%al
  +[a-f0-9]+:	67 8a 07             	mov    \(%bx\),%al
- +[a-f0-9]+:	67 8a 07             	mov    \(%bx\),%al
- +[a-f0-9]+:	67 8a 07             	mov    \(%bx\),%al
+ +[a-f0-9]+:	67 8a 47 00          	mov    0x0\(%bx\),%al
+ +[a-f0-9]+:	67 8a 87 00 00       	mov    0x0\(%bx\),%al
  +[a-f0-9]+:	67 8a 46 00          	mov    0x0\(%bp\),%al
  +[a-f0-9]+:	67 8a 46 00          	mov    0x0\(%bp\),%al
  +[a-f0-9]+:	67 8a 86 00 00       	mov    0x0\(%bp\),%al
diff --git a/gas/testsuite/gas/i386/pseudos.s b/gas/testsuite/gas/i386/pseudos.s
index bc18654..603e112 100644
--- a/gas/testsuite/gas/i386/pseudos.s
+++ b/gas/testsuite/gas/i386/pseudos.s
@@ -17,6 +17,11 @@ _start:
 	{evex} {disp8} vmovaps (%eax),%xmm2
 	{evex} {disp32} vmovaps (%eax),%xmm2
 
+	{vex} {disp8} vmovaps 128(%eax),%xmm2
+	{vex} {disp32} vmovaps 128(%eax),%xmm2
+	{evex} {disp8} vmovaps 128(%eax),%xmm2
+	{evex} {disp32} vmovaps 128(%eax),%xmm2
+
 	mov %ecx, %eax
 	{load} mov %ecx, %eax
 	{store} mov %ecx, %eax
@@ -297,13 +302,21 @@ _start:
 	{disp8} movb (%ebp),%al
 	{disp32} movb (%ebp),%al
 
+	movb (%si),%al
+	{disp8} movb (%si),%al
+	{disp16} movb (%si),%al
+
+	movb (%di),%al
+	{disp8} movb (%di),%al
+	{disp16} movb (%di),%al
+
 	movb (%bx),%al
 	{disp8} movb (%bx),%al
-	{disp32} movb (%bx),%al
+	{disp16} movb (%bx),%al
 
 	movb (%bp),%al
 	{disp8} movb (%bp),%al
-	{disp32} movb (%bp),%al
+	{disp16} movb (%bp),%al
 
 	.intel_syntax noprefix
 	{vex3} vmovaps xmm2,xmm7
@@ -320,6 +333,12 @@ _start:
 	{disp32} vmovaps xmm2,XMMWORD PTR [eax]
 	{evex} {disp8} vmovaps xmm2,XMMWORD PTR [eax]
 	{evex} {disp32} vmovaps xmm2,XMMWORD PTR [eax]
+
+	{vex} {disp8} vmovaps xmm2,XMMWORD PTR [eax+128]
+	{vex} {disp32} vmovaps xmm2,XMMWORD PTR [eax+128]
+	{evex} {disp8} vmovaps xmm2,XMMWORD PTR [eax+128]
+	{evex} {disp32} vmovaps xmm2,XMMWORD PTR [eax+128]
+
 	mov eax,ecx
 	{load} mov eax,ecx
 	{store} mov eax,ecx
@@ -339,10 +358,18 @@ _start:
 	{disp8} mov al, BYTE PTR [ebp]
 	{disp32} mov al, BYTE PTR [ebp]
 
+	mov al, BYTE PTR [si]
+	{disp8} mov al, BYTE PTR [si]
+	{disp16} mov al, BYTE PTR [si]
+
+	mov al, BYTE PTR [di]
+	{disp8} mov al, BYTE PTR [di]
+	{disp16} mov al, BYTE PTR [di]
+
 	mov al, BYTE PTR [bx]
 	{disp8} mov al, BYTE PTR [bx]
-	{disp32} mov al, BYTE PTR [bx]
+	{disp16} mov al, BYTE PTR [bx]
 
 	mov al, BYTE PTR [bp]
 	{disp8} mov al, BYTE PTR [bp]
-	{disp32} mov al, BYTE PTR [bp]
+	{disp16} mov al, BYTE PTR [bp]
diff --git a/gas/testsuite/gas/i386/x86-64-inval-pseudo.l b/gas/testsuite/gas/i386/x86-64-inval-pseudo.l
new file mode 100644
index 0000000..13ad0fb
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-inval-pseudo.l
@@ -0,0 +1,10 @@
+.*: Assembler messages:
+.*:2: Error: .*
+.*:3: Error: .*
+GAS LISTING .*
+
+
+[ 	]*1[ 	]+\.text
+[ 	]*2[ 	]+\{disp16\} movb \(%ebp\),%al
+[ 	]*3[ 	]+\{disp16\} movb \(%rbp\),%al
+#...
diff --git a/gas/testsuite/gas/i386/x86-64-inval-pseudo.s b/gas/testsuite/gas/i386/x86-64-inval-pseudo.s
new file mode 100644
index 0000000..c10b14c
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-inval-pseudo.s
@@ -0,0 +1,4 @@
+	.text
+	{disp16} movb (%ebp),%al
+	{disp16} movb (%rbp),%al
+	.p2align 4,0
diff --git a/gas/testsuite/gas/i386/x86-64-pseudos.d b/gas/testsuite/gas/i386/x86-64-pseudos.d
index 0fb18a3..5d039dc 100644
--- a/gas/testsuite/gas/i386/x86-64-pseudos.d
+++ b/gas/testsuite/gas/i386/x86-64-pseudos.d
@@ -22,6 +22,10 @@ Disassembly of section .text:
  +[a-f0-9]+:	c5 f8 28 90 00 00 00 00 	vmovaps 0x0\(%rax\),%xmm2
  +[a-f0-9]+:	62 f1 7c 08 28 50 00 	vmovaps 0x0\(%rax\),%xmm2
  +[a-f0-9]+:	62 f1 7c 08 28 90 00 00 00 00 	vmovaps 0x0\(%rax\),%xmm2
+ +[a-f0-9]+:	c5 f8 28 90 80 00 00 00 	vmovaps 0x80\(%rax\),%xmm2
+ +[a-f0-9]+:	c5 f8 28 90 80 00 00 00 	vmovaps 0x80\(%rax\),%xmm2
+ +[a-f0-9]+:	62 f1 7c 08 28 50 08 	vmovaps 0x80\(%rax\),%xmm2
+ +[a-f0-9]+:	62 f1 7c 08 28 90 80 00 00 00 	vmovaps 0x80\(%rax\),%xmm2
  +[a-f0-9]+:	48 89 c8             	mov    %rcx,%rax
  +[a-f0-9]+:	48 8b c1             	mov    %rcx,%rax
  +[a-f0-9]+:	48 89 c8             	mov    %rcx,%rax
@@ -304,7 +308,7 @@ Disassembly of section .text:
  +[a-f0-9]+:	40 d3 e0             	rex shl %cl,%eax
  +[a-f0-9]+:	40 a0 01 00 00 00 00 00 00 00 	rex movabs 0x1,%al
  +[a-f0-9]+:	40 38 ca             	rex cmp %cl,%dl
- +[a-f0-9]+:	40 b3 01             	rex mov \$(0x)?1,%bl
+ +[a-f0-9]+:	40 b3 01             	rex mov \$(0x)1,%bl
  +[a-f0-9]+:	f2 40 0f 38 f0 c1    	rex crc32 %cl,%eax
  +[a-f0-9]+:	40 89 c3             	rex mov %eax,%ebx
  +[a-f0-9]+:	41 89 c6             	mov    %eax,%r14d
@@ -321,6 +325,12 @@ Disassembly of section .text:
  +[a-f0-9]+:	67 8a 45 00          	mov    0x0\(%ebp\),%al
  +[a-f0-9]+:	67 8a 45 00          	mov    0x0\(%ebp\),%al
  +[a-f0-9]+:	67 8a 85 00 00 00 00 	mov    0x0\(%ebp\),%al
+ +[a-f0-9]+:	41 8a 45 00          	mov    0x0\(%r13\),%al
+ +[a-f0-9]+:	41 8a 45 00          	mov    0x0\(%r13\),%al
+ +[a-f0-9]+:	41 8a 85 00 00 00 00 	mov    0x0\(%r13\),%al
+ +[a-f0-9]+:	67 41 8a 45 00       	mov    0x0\(%r13d\),%al
+ +[a-f0-9]+:	67 41 8a 45 00       	mov    0x0\(%r13d\),%al
+ +[a-f0-9]+:	67 41 8a 85 00 00 00 00 	mov    0x0\(%r13d\),%al
  +[a-f0-9]+:	c4 e1 78 28 d7       	vmovaps %xmm7,%xmm2
  +[a-f0-9]+:	c4 e1 78 28 d7       	vmovaps %xmm7,%xmm2
  +[a-f0-9]+:	c4 e1 78 29 fa       	vmovaps %xmm7,%xmm2
@@ -335,6 +345,10 @@ Disassembly of section .text:
  +[a-f0-9]+:	c5 f8 28 90 00 00 00 00 	vmovaps 0x0\(%rax\),%xmm2
  +[a-f0-9]+:	62 f1 7c 08 28 50 00 	vmovaps 0x0\(%rax\),%xmm2
  +[a-f0-9]+:	62 f1 7c 08 28 90 00 00 00 00 	vmovaps 0x0\(%rax\),%xmm2
+ +[a-f0-9]+:	c5 f8 28 90 80 00 00 00 	vmovaps 0x80\(%rax\),%xmm2
+ +[a-f0-9]+:	c5 f8 28 90 80 00 00 00 	vmovaps 0x80\(%rax\),%xmm2
+ +[a-f0-9]+:	62 f1 7c 08 28 50 08 	vmovaps 0x80\(%rax\),%xmm2
+ +[a-f0-9]+:	62 f1 7c 08 28 90 80 00 00 00 	vmovaps 0x80\(%rax\),%xmm2
  +[a-f0-9]+:	48 89 c8             	mov    %rcx,%rax
  +[a-f0-9]+:	48 8b c1             	mov    %rcx,%rax
  +[a-f0-9]+:	48 89 c8             	mov    %rcx,%rax
@@ -365,4 +379,10 @@ Disassembly of section .text:
  +[a-f0-9]+:	67 8a 45 00          	mov    0x0\(%ebp\),%al
  +[a-f0-9]+:	67 8a 45 00          	mov    0x0\(%ebp\),%al
  +[a-f0-9]+:	67 8a 85 00 00 00 00 	mov    0x0\(%ebp\),%al
+ +[a-f0-9]+:	41 8a 45 00          	mov    0x0\(%r13\),%al
+ +[a-f0-9]+:	41 8a 45 00          	mov    0x0\(%r13\),%al
+ +[a-f0-9]+:	41 8a 85 00 00 00 00 	mov    0x0\(%r13\),%al
+ +[a-f0-9]+:	41 8a 45 00          	mov    0x0\(%r13\),%al
+ +[a-f0-9]+:	67 41 8a 45 00       	mov    0x0\(%r13d\),%al
+ +[a-f0-9]+:	67 41 8a 85 00 00 00 00 	mov    0x0\(%r13d\),%al
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-pseudos.s b/gas/testsuite/gas/i386/x86-64-pseudos.s
index 3b3638c..3818df97 100644
--- a/gas/testsuite/gas/i386/x86-64-pseudos.s
+++ b/gas/testsuite/gas/i386/x86-64-pseudos.s
@@ -17,6 +17,11 @@ _start:
 	{evex} {disp8} vmovaps (%rax),%xmm2
 	{evex} {disp32} vmovaps (%rax),%xmm2
 
+	{vex} {disp8} vmovaps 128(%rax),%xmm2
+	{vex} {disp32} vmovaps 128(%rax),%xmm2
+	{evex} {disp8} vmovaps 128(%rax),%xmm2
+	{evex} {disp32} vmovaps 128(%rax),%xmm2
+
 	mov %rcx, %rax
 	{load} mov %rcx, %rax
 	{store} mov %rcx, %rax
@@ -328,6 +333,14 @@ _start:
 	{disp8} movb (%ebp),%al
 	{disp32} movb (%ebp),%al
 
+	movb (%r13),%al
+	{disp8} movb (%r13),%al
+	{disp32} movb (%r13),%al
+
+	movb (%r13d),%al
+	{disp8} movb (%r13d),%al
+	{disp32} movb (%r13d),%al
+
 	.intel_syntax noprefix
 	{vex3} vmovaps xmm2,xmm7
 	{vex3} {load} vmovaps xmm2,xmm7
@@ -343,6 +356,12 @@ _start:
 	{disp32} vmovaps xmm2,XMMWORD PTR [rax]
 	{evex} {disp8} vmovaps xmm2,XMMWORD PTR [rax]
 	{evex} {disp32} vmovaps xmm2,XMMWORD PTR [rax]
+
+	{vex} {disp8} vmovaps xmm2,XMMWORD PTR [rax+128]
+	{vex} {disp32} vmovaps xmm2,XMMWORD PTR [rax+128]
+	{evex} {disp8} vmovaps xmm2,XMMWORD PTR [rax+128]
+	{evex} {disp32} vmovaps xmm2,XMMWORD PTR [rax+128]
+
 	mov rax,rcx
 	{load} mov rax,rcx
 	{store} mov rax,rcx
@@ -375,3 +394,11 @@ _start:
 	mov al, BYTE PTR [ebp]
 	{disp8} mov al, BYTE PTR [ebp]
 	{disp32} mov al, BYTE PTR [ebp]
+
+	mov al, BYTE PTR [r13]
+	{disp8} mov al, BYTE PTR [r13]
+	{disp32} mov al, BYTE PTR [r13]
+
+	mov al, BYTE PTR [r13]
+	{disp8} mov al, BYTE PTR [r13d]
+	{disp32} mov al, BYTE PTR [r13d]