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authorNathan Sidwell <nathan@codesourcery.com>2005-11-08 11:15:13 +0000
committerNathan Sidwell <nathan@codesourcery.com>2005-11-08 11:15:13 +0000
commit6f84a2a6497dab3564cb0fb0031632700158393b (patch)
treee2f6f244e27b5cc4d4c0e1ed433776221a7d12c5 /gas/doc
parent16ac4ab5a8d7c4998e8a2648a452df6e96e5e4ef (diff)
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bfd:
Add ms2. * archures.c (bfd_mach_ms2): Define. * cpu-ms1.c (arch_info_struct): Add ms2 stanza. * elf32-ms1.c (elf32_ms1_machine): Add ms2 case. (ms1_elf_merge_private_bfd_data): Remove unused variables. Add correct merging logic, with workaround. (ms1_elf_print_private_bfd_data): Add ms2 case. * reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc. * libbfd.h: Regenerated. * bfd-in2.h: Regenerated. cpu: Add ms2 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and model. (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, f-cb2incr, f-rc3): New fields. (LOOP): New instruction. (JAL-HAZARD): New hazard. (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): New operands. (mul, muli, dbnz, iflush): Enable for ms2 (jal, reti): Has JAL-HAZARD. (ldctxt, ldfb, stfb): Only ms1. (fbcb): Only ms1,ms1-003. (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, fbcbincrs, mfbcbincrs): Enable for ms2. (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. * ms1.opc (parse_loopsize): New. (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. (print_pcrel): New. gas: Add ms2. * config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1. (ms1_architectures): Add ms2. (md_parse_option): Add ms2. (md_show_usage): Add ms2. (md_assemble): Add JAL_HAZARD detection logic. (md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case. * doc/c-ms1.texi: New. * doc/all.texi: Add MS1. * doc/Makefile.am (CPU_DOCS): Add c-ms1.texi. * doc/Makefile.in: Rebuilt. * doc/Makefile: Rebuilt. gas/testsuite: Add ms2. * gas/ms1/allinsn.d: Adjust pcrel disassembly. * gas/ms1/errors.exp: Fix target triplet. * gas/ms1/ms1-16-003.d: Adjust pcrel disassembly. * gas/ms1/ms1-16-003.s: Tweak label. * gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test. * gas/ms1/ms2.d, gas/ms1/ms2.s: New. * gas/ms1/relocs.d: Adjust expected machine name and pcrel disassembly. * gas/ms1/relocs.exp: Adjust target triplet. include: Add ms2. * elf/ms1.h (EF_MS1_CPU_MS2): New. opcodes: Add ms2. * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h: Regenerated.
Diffstat (limited to 'gas/doc')
-rw-r--r--gas/doc/Makefile.am1
-rw-r--r--gas/doc/Makefile.in1
-rw-r--r--gas/doc/all.texi1
-rw-r--r--gas/doc/c-ms1.texi44
4 files changed, 47 insertions, 0 deletions
diff --git a/gas/doc/Makefile.am b/gas/doc/Makefile.am
index 14770d5..a2785d4 100644
--- a/gas/doc/Makefile.am
+++ b/gas/doc/Makefile.am
@@ -42,6 +42,7 @@ CPU_DOCS = \
c-m68k.texi \
c-mips.texi \
c-mmix.texi \
+ c-ms1.texi \
c-msp430.texi \
c-ns32k.texi \
c-pdp11.texi \
diff --git a/gas/doc/Makefile.in b/gas/doc/Makefile.in
index d8d4419..0fae527 100644
--- a/gas/doc/Makefile.in
+++ b/gas/doc/Makefile.in
@@ -234,6 +234,7 @@ CPU_DOCS = \
c-m68k.texi \
c-mips.texi \
c-mmix.texi \
+ c-ms1.texi \
c-msp430.texi \
c-ns32k.texi \
c-pdp11.texi \
diff --git a/gas/doc/all.texi b/gas/doc/all.texi
index c10ec08..2476b2e 100644
--- a/gas/doc/all.texi
+++ b/gas/doc/all.texi
@@ -48,6 +48,7 @@
@set MCORE
@set MIPS
@set MMIX
+@set MS1
@set MSP430
@set PDP11
@set PJ
diff --git a/gas/doc/c-ms1.texi b/gas/doc/c-ms1.texi
new file mode 100644
index 0000000..854d411
--- /dev/null
+++ b/gas/doc/c-ms1.texi
@@ -0,0 +1,44 @@
+@c Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
+@c Free Software Foundation, Inc.
+@c This is part of the GAS manual.
+@c For copying conditions, see the file as.texinfo.
+
+@ifset GENERIC
+@page
+@node MS1-Dependent
+@chapter MS1 Dependent Features
+@end ifset
+
+@ifclear GENERIC
+@node Machine Dependencies
+@chapter MS1 Dependent Features
+@end ifclear
+
+@cindex MS1 support
+@menu
+* MS1 Options:: Options
+@end menu
+
+@node MS1 Options
+@section Options
+@cindex MS1 options (none)
+@cindex options for MS1 (none)
+
+@table @code
+
+@cindex @code{-march=} command line option, MS1
+@item -march=@var{processor}
+This option specifies the target processor. The assembler will issue an
+error message if an attempt is made to assemble an instruction which
+will not execute on the target processor. The following processor names are
+recognized:
+@code{ms1-64-001},
+@code{ms1-16-002},
+@code{ms1-16-003},
+and @code{ms2}.
+
+@cindex @code{-nosched} command line option, MS1
+@item -nosched
+This option disables scheduling restriction checking.
+
+@end table